CN114978085A - Duplexer, method for suppressing higher order resonance of duplexer, and electronic device - Google Patents

Duplexer, method for suppressing higher order resonance of duplexer, and electronic device Download PDF

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Publication number
CN114978085A
CN114978085A CN202110218502.1A CN202110218502A CN114978085A CN 114978085 A CN114978085 A CN 114978085A CN 202110218502 A CN202110218502 A CN 202110218502A CN 114978085 A CN114978085 A CN 114978085A
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frequency
order resonance
low
filter
duplexer
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边子鹏
庞慰
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ROFS Microsystem Tianjin Co Ltd
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H7/00Multiple-port networks comprising only passive electrical elements as network components
    • H03H7/01Frequency selective two-port networks
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H7/00Multiple-port networks comprising only passive electrical elements as network components
    • H03H7/46Networks for connecting several sources or loads, working on different frequencies or frequency bands, to a common load or source

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Abstract

The invention discloses a duplexer, a method for inhibiting high-order resonance of the duplexer and electronic equipment. The duplexer includes: the high-frequency-end filter, the low-frequency-end filter and the high-order resonance suppression circuit are sequentially connected in series, wherein series resonators in the high-frequency-end filter are stacked to be in an approximately symmetrical structure, series resonators in the low-frequency-end filter are stacked to be in an asymmetrical structure, a second high-order resonance pseudo-passband of the low-frequency-end filter is overlapped with a second high-order resonance pseudo-passband of the high-frequency-end filter, and the low-frequency-end filter is provided with a first high-order resonance pseudo-passband; the high-order resonance suppression circuit is arranged between the antenna end and the common end of the duplexer in parallel, and the high-order resonance suppression circuit is provided with a first suppression zero point and a second suppression zero point, wherein the first suppression zero point is positioned at a first high-order resonance pseudo-passband of the low-frequency-end filter, and the second suppression zero point is positioned at a second high-order resonance pseudo-passband of the low-frequency-end filter and the high-frequency-end filter which are superposed.

Description

Duplexer, method for suppressing higher order resonance of duplexer, and electronic device
Technical Field
The present invention relates to the field of filter technologies, and in particular, to a duplexer, a method for suppressing high-order resonance of the duplexer, and an electronic device.
Background
The recent trend toward miniaturization and high performance of communication devices has been increasing, posing even greater challenges to rf front-ends. In the radio frequency communication front end, on one hand, miniaturization is realized by reducing the sizes of a chip and a packaging substrate, and on the other hand, better performance is realized by better resonator matching design.
Patent CN112073018A proposes a method for improving out-of-band rejection of a filter and a duplexer, but in this patent, a high-order resonance rejection circuit provided at a certain node of a low-frequency-side series path only improves out-of-band rejection characteristics of the low-frequency-side filter, a high-order resonance rejection circuit provided at a certain node of a high-frequency-side series path only improves out-of-band rejection characteristics of the high-frequency-side filter, and if achieving high-order resonance of the low-frequency-side filter and the high-frequency-side filter while rejecting, a high-order resonance rejection circuit is required to be provided in each of the low-frequency filter and the high-frequency-side filter; in addition, since the high-order resonance position of the low-frequency-side filter and the high-order resonance position of the high-frequency-side filter are different in the conventional design, even if one high-order resonance suppression circuit is provided at the antenna side, the high-order resonance of the low-frequency-side filter and the suppression of the high-order resonance of the high-frequency-side filter need to be compromised, and the improvement of the out-of-band suppression characteristic is limited.
Disclosure of Invention
In view of this, the present invention provides a duplexer, a method for suppressing high-order resonance of the duplexer, and an electronic device, which are beneficial to improving device performance and have the advantages of simple structure and adaptability to miniaturized design. The invention provides the following technical scheme:
a duplexer, comprising: the high-frequency-end filter, the low-frequency-end filter and the high-order resonance suppression circuit are sequentially connected in series, wherein series resonators in the high-frequency-end filter are stacked to be in an approximately symmetrical structure, series resonators in the low-frequency-end filter are stacked to be in an asymmetrical structure, a second high-order resonance pseudo-passband of the low-frequency-end filter is overlapped with a second high-order resonance pseudo-passband of the high-frequency-end filter, and the low-frequency-end filter is provided with a first high-order resonance pseudo-passband; the high-order resonance suppression circuit is arranged between the antenna end and the public end of the duplexer in parallel, the high-order resonance suppression circuit is provided with a first suppression zero point and a second suppression zero point, the first suppression zero point is located on the low-frequency end filter at the first high-order resonance pseudo-passband, and the second suppression zero point is located on the low-frequency end filter and the high-frequency end filter at the second high-order resonance pseudo-passband.
Optionally, a stacking asymmetry parameter of the series resonators in the high frequency side filter is smaller than a stacking asymmetry parameter of the series resonators in the low frequency side filter.
Optionally, a stacking asymmetry parameter of the series resonators in the high-frequency end filter is less than 0.25.
Optionally, a stacking asymmetry parameter of the series resonators in the low frequency end filter is equal to or greater than 0.15.
Optionally, the higher order resonance suppression circuit is composed of a resonator and an inductor cascade.
Optionally, the resonator in the higher-order resonance suppression circuit and the low-frequency-side filter or the high-frequency-side filter are disposed in the same chip.
Optionally, the resonator in the high-order resonance suppression circuit is an FBAR, BAW or LWR resonator.
Optionally, the resonator in the higher order resonance suppression circuit is formed by connecting a plurality of resonators in series and/or parallel.
Optionally, at least one of the plurality of resonators has a resonant frequency different from resonant frequencies of the other resonators.
An electronic device comprising the duplexer of the present invention.
A method of suppressing higher order resonances in a duplexer, comprising: stacking a first series resonator in a high-frequency end filter into an approximately symmetrical structure, and stacking a second series resonator in a low-frequency end filter into an asymmetrical structure, so that a second high-order resonance pseudo-passband of the low-frequency end filter coincides with a second high-order resonance pseudo-passband of the high-frequency end filter and the low-frequency end filter has a first high-order resonance pseudo-passband; and a higher order resonance suppression circuit is arranged between the antenna end and the common end CT in parallel, wherein the higher order resonance suppression circuit is provided with a first suppression zero point, so that the first suppression zero point is positioned at the first higher order resonance pseudo-passband of the low frequency end filter, and so that the second suppression zero point is positioned at the second higher order resonance pseudo-passband of the low frequency end filter and the high frequency end filter which are superposed.
Optionally, a stacking asymmetry parameter of the series resonators in the high frequency side filter is smaller than a stacking asymmetry parameter of the series resonators in the low frequency side filter.
Optionally, the calculation formula of the stacking asymmetry parameter is:
Figure BDA0002954896170000031
where s is a stacking asymmetry parameter, D Blunt Density of the passivation layer, D Top roof Density of the top electrode, D Bottom (C) Is the density of the bottom electrode, T Blunt Thickness of the passivation layer, T Top roof Thickness of the top electrode, T Bottom Is the thickness of the bottom electrode.
According to the technical scheme of the invention, the pseudo passbands of the second high-order resonance corresponding to the high-frequency filter and the low-frequency filter are superposed by designing the asymmetric characteristics of the high-frequency filter and the low-frequency filter, and then only one high-order resonance suppression circuit is added at the antenna end to realize the simultaneous suppression of the high-order resonance of the low-frequency filter and the high-frequency filter, so that the out-of-band suppression of the duplexer is improved to the greatest extent, and the design miniaturization of devices is facilitated.
Drawings
The drawings are included to provide a better understanding of the invention and are not to be construed as unduly limiting the invention. Wherein:
FIG. 1 is a schematic diagram of a film bulk acoustic resonator
FIG. 2 is a schematic diagram of the frequency characteristic curve of the real part of the impedance of the film bulk acoustic resonator;
FIG. 3 is a graph comparing the real part frequency characteristic of the impedance of resonators with different stacking asymmetry coefficients;
fig. 4(a) is a circuit architecture diagram of a prior art duplexer, and fig. 4(b) is an insertion loss frequency characteristic curve corresponding to fig. 4 (a);
fig. 5(a), 5(b), 5(c), 5(d) and 5(e) are a circuit architecture diagram of a duplexer, a schematic diagram of a high-order resonance suppression circuit at an antenna side in the duplexer, an insertion loss frequency characteristic curve of a high-frequency side filter and a low-frequency side filter, an insertion loss frequency characteristic curve of a high-order resonance suppression circuit, and an insertion loss frequency characteristic curve of the duplexer according to a first embodiment of the present invention;
fig. 6 is a circuit configuration diagram of a duplexer of a second embodiment of the present invention;
FIGS. 7(a) and 7(b) are cross-sectional views of a first implementation and AA' respectively of an LWR resonator;
fig. 8(a) and 8(b) are cross-sectional views of a second implementation structure and AA' of the LWR resonator, respectively.
Detailed Description
The embodiments of the present invention will be described in detail below with reference to the accompanying drawings.
Fig. 1 is a schematic diagram of a film bulk acoustic resonator illustrating a region between two dotted lines as a resonance effective region.
The substrate 31 may be made of monocrystalline silicon, gallium arsenide, sapphire, quartz, or the like.
The piezoelectric thin film layer 32 can be made of a rare earth element-doped material containing a certain atomic ratio of single crystal aluminum nitride, polycrystalline aluminum nitride, zinc oxide, PZT, or the like.
The bottom electrode 33 may be made of molybdenum, ruthenium, gold, aluminum, magnesium, tungsten, copper, titanium, iridium, osmium, chromium, or the like.
Top electrode 34 (containing a mass loading layer) of molybdenum, ruthenium, gold, aluminum, magnesium, tungsten, copper, titanium, iridium, osmium, chromium, and the like, may be selected.
An acoustic mirror 35, this illustration being a cavity. Or may be a bragg reflector.
The passivation layer 36 may be made of a single crystal aluminum nitride, a polycrystalline aluminum nitride, zinc oxide, PZT, or other rare earth element doped material with a certain atomic ratio.
Fig. 2 is a schematic diagram of impedance frequency characteristics of the film bulk acoustic resonator. The main resonance of the film bulk acoustic resonator has two resonance frequency points: one is a series resonance frequency point fs when the main resonance impedance value of the resonator reaches a minimum value; and the other is the parallel resonance frequency fp when the resonator main resonance impedance value reaches a maximum value. In addition, due to the structural characteristics of the bulk acoustic wave resonator, the resonator generates a main resonance and high-order resonances (a first high-order resonance, a second high-order resonator, and the like) at a high frequency end, fig. 2 shows only the first high-order resonance and the second high-order resonance, and the frequency position and strength of the high-order resonances are related to the symmetry of the resonator stack (stack). The formula for calculating the laminated asymmetry parameter s of the resonator is as follows:
Figure BDA0002954896170000051
wherein s is a stacking asymmetry parameter, D Blunt Density of the passivation layer, D Top roof Density of the top electrode, D Bottom Is the density of the bottom electrode, T Blunt Thickness of the passivation layer, T Top roof Thickness of the top electrode, T Bottom Is the thickness of the bottom electrode. The smaller the s-number of the resonator, the better the symmetry and the weaker the first higher order resonance.
Fig. 3 is a graph comparing the real part of impedance frequency characteristic curves of different laminated asymmetric parametric resonators. The solid line in the figure is the corresponding curve of the resonator Res-1, and the resonators are stacked to form an approximately symmetrical structure; the dotted line in the figure is the curve corresponding to the resonator Res-2, which is stacked in an asymmetric configuration. As can be seen, as the asymmetry of the resonator stack increases, the second higher order resonance of the resonator shifts to the high frequency side while the first higher order resonance gradually increases.
Fig. 4(a) is a circuit architecture diagram of a prior art duplexer. The low-frequency end filter D1 is a ladder-type structure filter composed of series resonators S11-S14 and parallel resonators P12-P13, L3 and L4 are parallel branch grounding inductors, and the low-frequency end filter D1 is respectively connected between a common end CT and a low-frequency end filter signal output (input) port LT through an input (output) end inductor L1 and an output (input) end inductor L2. The high-frequency end filter D2 is a ladder-type structure filter composed of series resonators S21-S24 and parallel resonators P21-P24, L7 and L8 are parallel branch grounding inductors, and the high-frequency end filter D2 is respectively connected between a common end CT and a high-frequency end filter signal output (input) port HT through an input (output) end inductor L5 and an output (input) end inductor L6. The parallel grounding inductor LM is connected between the common terminal CT and the antenna ANT.
Fig. 4(b) is a conventional duplexer insertion loss frequency characteristic curve shown in fig. 4 (a). Wherein the series resonator stacks of the low-frequency side filter and the high-frequency side filter each adopt an approximately symmetrical structure, for example, the asymmetry parameter of the series resonators in the low-frequency side filter and the high-frequency side filter is not more than 0.15. The pseudo passband 50 is formed by the second higher order resonance of the resonators in the low frequency side filter and the pseudo passband 51 is formed by the second higher order resonance of the resonators in the high frequency side filter, with the pseudo passband 50 and the pseudo passband 51 being distant from each other. The presence of the spurious passband severely affects the out-of-band rejection characteristics of the filter, resulting in poor rejection characteristics of the filter for noise or other interfering signals at this frequency band.
Fig. 5(a) is a circuit architecture diagram of a duplexer in accordance with a first embodiment of the present invention. The low-frequency end filter D1 is a ladder-type structure filter composed of series resonators S11-S14 and parallel resonators P12-P13, L3 and L4 are parallel branch grounding inductors, the signal input (output) end of the low-frequency end filter D1 is connected with a common end CT, and the signal output (input) end is connected with a signal output (input) port LT of the low-frequency end filter through an inductor L2. The high-frequency-end filter D2 is a ladder-type filter composed of series resonators S21-S24 and parallel resonators P21-P24, L7 and L8 are parallel branch grounding inductors, a signal input (output) port of the high-frequency-end filter D2 is connected with a common end CT through an inductor L5, and a signal output (input) port is connected with a signal output (input) port HT of the high-frequency-end filter D2 through an inductor L6. And a high-order resonance suppression circuit of the antenna end is connected in parallel between the common end CT and the antenna end. The position of a first zero suppression point of the high-order resonance suppression circuit is determined by a series resonance frequency point and LS inductance of the resonator, and the position of a second zero suppression point is determined by a plate capacitor and the LS inductance of the resonator R-HSC together. The resonator R-HSC in the antenna terminal high-order resonance suppression circuit can also be arranged on the same chip with the high-frequency filter D2.
Compared with the duplexer in the prior art, the duplexer in the first embodiment of the present invention adds the antenna-side high-order resonance suppression circuit shown in fig. 5(b) on the one hand, and on the other hand, the duplexer satisfies the following conditions by fine setting on the device design: the series resonators in the high-frequency-end filter are stacked to be in an approximately symmetrical structure, the series resonators in the low-frequency-end filter are stacked to be in an asymmetrical structure, a second high-order resonance pseudo-passband of the low-frequency-end filter is overlapped with a second high-order resonance pseudo-passband of the high-frequency-end filter, and the low-frequency-end filter is provided with a first high-order resonance pseudo-passband; the high-order resonance suppression circuit arranged between the antenna end and the common end of the duplexer in parallel comprises a first suppression zero and a second suppression zero, wherein the first suppression zero is positioned at a first high-order resonance pseudo-passband of the low-frequency end filter, and the second suppression zero is positioned at a second high-order resonance pseudo-passband superposed with the high-frequency end filter.
For example, the series resonator stack in the high frequency side filter is set to be an approximately symmetrical structure (for example, B5 (i.e., a Band 5 duplexer with a transmitting Band at 824-. The series resonator stack in the low-frequency side filter is set to be in an asymmetric structure (for example, B5, the asymmetry parameter S3 of the series resonator in the low-frequency side filter is, for example, S3 is 0.25), and the parallel resonator stack is provided with a mass loading layer on the basis of the series resonator stack, and the mass loading layer is adjacent to the top electrode (for example, B5, the asymmetry parameter S4 of the parallel resonator in the low-frequency side filter is, for example, S4 is, 0.35). The high-frequency side filter and the low-frequency side filter of the duplexer of the first embodiment of the present invention satisfy S1< S3, the insertion loss frequency characteristic curves are as shown in fig. 5(c), the second higher-order resonance pseudo-passband of the low-frequency side filter coincides with the second higher-order resonance pseudo-passband of the high-frequency side filter, and at this time, the first higher-order resonance of the resonator in the low-frequency side filter is enhanced due to the asymmetry of the resonator in the low-frequency side filter, so that the low-frequency side filter generates a first higher-order resonance pseudo-passband as shown at 53 in fig. 5 (c). The insertion loss frequency characteristic curve of the higher order resonance suppression circuit in the duplexer of this embodiment is shown in fig. 5(d), in which the first suppression zero is located at the first higher order resonance pseudo passband of the low frequency side filter, and the second suppression zero is located at the second higher order resonance pseudo passband of the low frequency side filter and the high frequency side filter. Namely, the high-order resonance suppression circuit arranged at the antenna end realizes the simultaneous suppression of the high-order resonance of the low-frequency end filter and the high-frequency end filter.
Fig. 5(e) shows a duplexer insertion loss frequency characteristic curve according to the first embodiment of the present invention. The thick solid line is a high-frequency-end filter insertion loss frequency characteristic curve, the dotted line is a low-frequency-end filter insertion loss frequency characteristic curve, and the thin solid line is an antenna-end high-order resonance suppression circuit insertion loss frequency characteristic curve. By adjusting the resonator stack in the low-frequency-end filter and arranging a high-order resonance suppression circuit at the antenna end, the high-order resonance of the low-frequency-end filter and the high-frequency-end filter can be suppressed at the same time, and the high-order resonance suppression can be improved by 15-30 dB.
Fig. 6 shows a circuit structure diagram of a duplexer in accordance with a second embodiment of the present invention. Compared with the duplexer of the first embodiment of the invention, the difference is that the resonator R-HSC in the antenna end high-order resonance suppression circuit is realized by adopting an LWR resonator. The resonator R-HSC in the antenna terminal high-order resonance suppression circuit can also be arranged on the same chip with the high-frequency filter D2.
Fig. 7(a) shows a first implementation structure of the LWR resonator used as the resonator R-HSC in the high-order resonance suppression circuit according to the present invention, and fig. 7(b) is a cross-sectional view of the first implementation structure of the LWR resonator shown in fig. 7(a) at position AA'. The resonance frequency point of the LWR resonator is determined by the width and the spacing of the interdigital electrodes.
Fig. 8(a) shows a second implementation structure of the LWR resonator used as the resonator R-HSC in the high-order resonance suppression circuit according to the present invention, and fig. 8(b) is a cross-sectional view of the second implementation structure of the LWR resonator shown in fig. 8(a) at position AA'. The resonance frequency point of the LWR resonator is determined by the width and the spacing of the interdigital electrodes.
According to the technical scheme of the embodiment of the invention, the second high-order resonance pseudo-passband corresponding to the high-frequency filter and the low-frequency filter is superposed by finely designing the asymmetric characteristics of the high-frequency filter and the low-frequency filter, and then only one high-order resonance suppression circuit is added at the antenna end to realize the simultaneous suppression of the high-order resonance of the low-frequency filter and the high-frequency filter, so that the out-of-band suppression of the duplexer is improved to the greatest extent, and the design miniaturization of devices is facilitated. The technical scheme is applied to the electronic equipment, and is also beneficial to improving the performance of the electronic equipment.
The above-described embodiments should not be construed as limiting the scope of the invention. Those skilled in the art will appreciate that various modifications, combinations, sub-combinations, and substitutions can occur, depending on design requirements and other factors. Any modification, equivalent replacement, and improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims (13)

1. A duplexer, characterized by comprising: a high-frequency side filter, a low-frequency side filter, and a higher order resonance suppression circuit, wherein,
the series resonators in the high-frequency-end filter are stacked to be in an approximately symmetrical structure, the series resonators in the low-frequency-end filter are stacked to be in an asymmetrical structure, a second high-order resonance pseudo-passband of the low-frequency-end filter is overlapped with a second high-order resonance pseudo-passband of the high-frequency-end filter, and the low-frequency-end filter is provided with a first high-order resonance pseudo-passband;
the high-order resonance suppression circuit is arranged between the antenna end and the public end of the duplexer in parallel, the high-order resonance suppression circuit is provided with a first suppression zero point and a second suppression zero point, the first suppression zero point is located on the low-frequency end filter at the first high-order resonance pseudo-passband, and the second suppression zero point is located on the low-frequency end filter and the high-frequency end filter at the second high-order resonance pseudo-passband.
2. The duplexer according to claim 1, wherein a stacking asymmetry parameter of the series resonators in the high-frequency-side filter is smaller than a stacking asymmetry parameter of the series resonators in the low-frequency-side filter.
3. The duplexer of claim 2, wherein a stacking asymmetry parameter of the series resonators in the high-frequency side filter is less than 0.25.
4. The duplexer according to claim 2 or 3, wherein a stacking asymmetry parameter of the series resonators in the low-frequency-side filter is 0.15 or more.
5. The duplexer of claim 1, wherein the high-order resonance suppression circuit is comprised of a resonator and an inductor cascade.
6. The duplexer according to claim 5, wherein the resonator in the higher order resonance suppression circuit is provided in the same chip as the low frequency side filter or the high frequency side filter.
7. The duplexer of claim 5, wherein the resonator in the high-order resonance suppression circuit is an FBAR, BAW, or LWR resonator.
8. The duplexer according to claim 5, wherein the resonator in the high-order resonance suppression circuit is formed by connecting a plurality of resonators in series and/or parallel.
9. The duplexer of claim 8, wherein at least one of the plurality of resonators has a resonant frequency different from resonant frequencies of other resonators.
10. An electronic device comprising the duplexer of any one of claims 1 to 9.
11. A method for suppressing higher order resonance of a duplexer, comprising:
stacking a first series resonator in a high-frequency end filter into an approximately symmetrical structure, and stacking a second series resonator in a low-frequency end filter into an asymmetrical structure, so that a second high-order resonance pseudo-passband of the low-frequency end filter coincides with a second high-order resonance pseudo-passband of the high-frequency end filter and the low-frequency end filter has a first high-order resonance pseudo-passband;
and a higher order resonance suppression circuit is arranged between the antenna end and the common end CT in parallel, wherein the higher order resonance suppression circuit is provided with a first suppression zero point, so that the first suppression zero point is positioned at the first higher order resonance pseudo-passband of the low frequency end filter, and so that the second suppression zero point is positioned at the second higher order resonance pseudo-passband of the low frequency end filter and the high frequency end filter which are superposed.
12. The method of claim 11, wherein a stacking asymmetry parameter of the series resonators in the high frequency side filter is less than a stacking asymmetry parameter of the series resonators in the low frequency side filter.
13. The method of claim 12, wherein the stacking asymmetry parameter is calculated by the formula:
Figure FDA0002954896160000031
where s is a stacking asymmetry parameter, D Blunt Density of the passivation layer, D Top roof Density of the top electrode, D Bottom Is the density of the bottom electrode, T Blunt Thickness of the passivation layer, T Top roof Thickness of the top electrode, T Bottom Is the thickness of the bottom electrode.
CN202110218502.1A 2021-02-26 2021-02-26 Duplexer, method for suppressing higher order resonance of duplexer, and electronic device Pending CN114978085A (en)

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JP5081742B2 (en) * 2007-06-29 2012-11-28 日本電波工業株式会社 Antenna duplexer
CN109391242B (en) * 2017-08-03 2022-08-09 株式会社村田制作所 Composite filter device, high-frequency front-end circuit, and communication device
CN111600574B (en) * 2019-08-30 2023-10-03 天津大学 Bulk acoustic wave filter and out-of-band suppression improvement method thereof
CN110943711B (en) * 2019-11-06 2023-10-03 天津大学 Duplexer and electronic equipment
CN112073018B (en) * 2020-05-28 2022-02-25 诺思(天津)微系统有限责任公司 Duplexer, multiplexer, and communication device
CN111478679A (en) * 2020-06-15 2020-07-31 上海芯波电子科技有限公司 High-performance duplexer based on SAW and BAW

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