CN114977972A - Motor control method and device and vehicle - Google Patents

Motor control method and device and vehicle Download PDF

Info

Publication number
CN114977972A
CN114977972A CN202210719059.0A CN202210719059A CN114977972A CN 114977972 A CN114977972 A CN 114977972A CN 202210719059 A CN202210719059 A CN 202210719059A CN 114977972 A CN114977972 A CN 114977972A
Authority
CN
China
Prior art keywords
interval
period
duty cycle
cycle
duty ratio
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202210719059.0A
Other languages
Chinese (zh)
Inventor
赵慧超
李伟亮
李芝炳
李帅
冉再庆
徐泽绪
刘静东
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
FAW Group Corp
Original Assignee
FAW Group Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by FAW Group Corp filed Critical FAW Group Corp
Priority to CN202210719059.0A priority Critical patent/CN114977972A/en
Publication of CN114977972A publication Critical patent/CN114977972A/en
Priority to PCT/CN2023/098260 priority patent/WO2023246484A1/en
Pending legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
    • H02P27/00—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage
    • H02P27/04—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage
    • H02P27/06—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage using dc to ac converters or inverters
    • H02P27/08—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage using dc to ac converters or inverters with pulse width modulation
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B60—VEHICLES IN GENERAL
    • B60L—PROPULSION OF ELECTRICALLY-PROPELLED VEHICLES; SUPPLYING ELECTRIC POWER FOR AUXILIARY EQUIPMENT OF ELECTRICALLY-PROPELLED VEHICLES; ELECTRODYNAMIC BRAKE SYSTEMS FOR VEHICLES IN GENERAL; MAGNETIC SUSPENSION OR LEVITATION FOR VEHICLES; MONITORING OPERATING VARIABLES OF ELECTRICALLY-PROPELLED VEHICLES; ELECTRIC SAFETY DEVICES FOR ELECTRICALLY-PROPELLED VEHICLES
    • B60L15/00—Methods, circuits, or devices for controlling the traction-motor speed of electrically-propelled vehicles
    • B60L15/20—Methods, circuits, or devices for controlling the traction-motor speed of electrically-propelled vehicles for control of the vehicle or its driving motor to achieve a desired performance, e.g. speed, torque, programmed variation of speed
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0003—Details of control, feedback or regulation circuits
    • H02M1/0038—Circuits or arrangements for suppressing, e.g. by masking incorrect turn-on or turn-off signals, e.g. due to current spikes in current mode control
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/32—Means for protecting converters other than automatic disconnection
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/38—Means for preventing simultaneous conduction of switches
    • H02M1/385—Means for preventing simultaneous conduction of switches with means for correcting output voltage deviations introduced by the dead time
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H02M7/5387—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
    • H02M7/53871—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current
    • H02M7/53875—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current with analogue control of three-phase output
    • H02M7/53876—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current with analogue control of three-phase output based on synthesising a desired voltage vector via the selection of appropriate fundamental voltage vectors, and corresponding dwelling times
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
    • H02P21/00—Arrangements or methods for the control of electric machines by vector control, e.g. by control of field orientation
    • H02P21/14—Estimation or adaptation of machine parameters, e.g. flux, current or voltage
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02T—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO TRANSPORTATION
    • Y02T10/00—Road transport of goods or passengers
    • Y02T10/60—Other road transportation technologies with climate change mitigation effect
    • Y02T10/72—Electric energy management in electromobility

Abstract

The invention discloses a motor control method, a motor control device and a vehicle. Acquiring a torque instruction obtained on a communication bus; determining a voltage vector instruction according to the torque instruction and the three-phase current of the motor; determining a pulse width modulation signal waveform according to the voltage vector instruction; and filtering narrow pulses in the pulse width modulation signal according to the pulse width modulation signal waveforms of two continuous periods. On the basis of not increasing the hardware cost, narrow pulses in all periodic pulse width modulation signals are filtered, the power loss of a motor driving system is reduced, larger surge voltage peak and oscillation are avoided, and the service life of the motor is prolonged.

Description

Motor control method and device and vehicle
Technical Field
The invention relates to the technical field of motor control, in particular to a motor control method, a motor control device and a vehicle.
Background
With the rapid development of the electric automobile industry, the inverter technology is mature day by day, and the requirements on the efficiency and the energy density of an electric drive system are higher and higher. At present, an insulated gate bipolar transistor IGBT module is mainly used as a switch device in an inverter of an electric drive system. The turn-on process and the turn-off process of the IGBT both require a certain time, and in order to protect the IGBT and prevent the upper and lower bridge arms from being directly connected, dead time is usually increased. In addition, the on-off pulse with too short duration cannot generate effective on-off and generates extra power loss, and an IGBT switching device can generate larger surge voltage peak and oscillation, thereby threatening the reliable operation of the IGBT, reducing the service life of the IGBT and even directly causing the damage of an electric appliance. To protect the IGBT, device lifetime is increased, and a narrow pulse suppression function is generally added.
The prior art methods for filtering narrow pulses mainly include the following two methods:
firstly, a CPLD (complex programmable logic device) is used for inhibiting narrow pulse signals, more CPLD resources are needed to be used, if the CPLD resource capacity is not enough, small pulse signals cannot be filtered, a large-capacity CPLD chip needs to be replaced, and the system cost is increased;
secondly, the DSP software forces the PWM module to output 100% or 0% duty ratio when the duty ratio is smaller than or larger than the duty ratio corresponding to the minimum pulse width; when the duty ratio is 100% or 0%, the output pulse width is half of the maximum pulse width in the two pulses in the front and back periods, and the output pulse width is still smaller than the minimum pulse width recommended by a manufacturer; DSP software is needed to control and filter a duty ratio value corresponding to twice the minimum pulse width, and the filtering pulse width is large, so that the performance of the inverter is influenced; and the inability of the TI company C2000 series digital signal processor to output 100% or 0% duty cycle affects the implementation of software control.
Disclosure of Invention
The invention provides a motor control method, a motor control device and a vehicle, and aims to solve the problem that narrow pulses in all periods cannot be inhibited on the basis of not increasing hardware cost in the prior art.
According to an aspect of the present invention, there is provided a motor control method including:
acquiring a torque instruction obtained on a communication bus;
determining a voltage vector instruction according to the torque instruction and the three-phase current of the motor;
determining a pulse width modulation signal waveform according to the voltage vector instruction;
and filtering narrow pulses in the pulse width modulation signal according to the pulse width modulation signal waveforms of two continuous periods.
Optionally, the motor controller includes a three-phase bridge circuit, where the three-phase bridge circuit includes an upper bridge arm and a lower bridge arm;
filtering out narrow pulses in the pwm signal according to the two consecutive periods of the pwm signal waveform comprises:
determining a first waveform corresponding to the upper bridge arm and a second waveform corresponding to the lower bridge arm according to the pulse width modulation signal waveform of each period;
determining an interval where a pulse width modulation command is located according to the first waveform and the second waveform;
and filtering narrow pulses in the pulse width modulation signals according to the interval where the pulse width modulation instructions of the previous period and the current period are located and the preset duty ratio condition.
Optionally, determining an interval where the pulse width modulation command is located according to the first waveform and the second waveform includes:
when Dm is more than or equal to 0 and less than 0.5Dp, Dt is 0, Db is 1, and the pulse width modulation command is in a first interval;
when Dm is more than or equal to 0.5Dp and less than Dd, Dt is 0, Db is 1-2Dm, and the pulse width modulation command is in a second interval;
when Dd is less than Dm and less than 1-Dd, Dt is Dm-Dd, Db is 1-Dm-Dd, and the pulse width modulation command is in a third interval;
when Dm is less than 1-Dd and less than 1, Dt is 2Dm-1, Db is 0, and the pulse width modulation command is in a fourth interval;
when Dm is equal to 1, Dt is equal to 1, Db is equal to 0, and the pwm command is in a fifth interval;
wherein Dt represents an upper bridge arm first level duty ratio, Db represents a lower bridge arm first level duty ratio, Dm represents a duty ratio command from the space vector pulse width modulation module, Dd represents a dead time, and Dp represents a narrow pulse time.
Optionally, the filtering narrow pulses in the pwm signal according to the interval where the pwm command of the previous cycle and the current cycle is located and the preset duty ratio condition includes:
when the last period duty cycle is in the first interval and the current period duty cycle is in the second interval or the last period duty cycle is in the first interval and the current period duty cycle is in the third interval or the last period duty cycle is in the second interval and the current period duty cycle is in the first interval or the last period duty cycle is in the second interval and the current period duty cycle is in the second interval or the last period duty cycle is in the second interval and the current period duty cycle is in the third interval or the last period duty cycle is in the third interval and the current period duty cycle is in the first interval or the last period duty cycle is in the third interval and the current period duty cycle is in the second interval or the last period duty cycle is in the third interval and the current period duty cycle is in the second interval or the last period duty cycle Db1+ Db2 is more than or equal to 2Dp, or the duty ratio of the last period is in the fifth interval, the duty ratio of the current period is in the fourth interval, 1-Dm2< Dp, or the duty ratio of the last period is in the fifth interval, and the duty ratio of the current period is in the fifth interval, the original signal is directly output;
when the last period duty cycle is in the first interval, the current period duty cycle is in the fourth interval or the last period duty cycle is in the first interval, the current period duty cycle is in the fifth interval or the last period duty cycle is in the second interval, the current period duty cycle is in the fourth interval or the last period duty cycle is in the second interval, the current period duty cycle is in the fifth interval or the last period duty cycle is in the third interval, the current period duty cycle is in the fourth interval, the 1-Dm1-Dd1 is not less than 2Dp, the last period duty cycle is in the third interval, the current period duty cycle is in the fifth interval, the 1-Dm1-Dd1 is not less than 2Dp, the last period duty cycle is in the fourth interval, the current period duty cycle is in the fourth interval, the 2-Dm1-Dm2 is not less than Dp, or the last period duty cycle is in the fourth interval, the current period duty cycle is in the fourth interval When the fifth interval is more than or equal to Dp from 1-Dm1, adding a second level of dead time to the upper bridge arm in the current period, and setting the level as the first level;
when the duty ratio of the last period is in the third interval, the duty ratio of the current period is in the third interval, and Db1+ Db2 is less than 2Dp, the first level formed by splicing the middle two periods of the lower bridge arm is cancelled, and the second level is continuously output;
when the duty ratio of the last period is in the third interval, the duty ratio of the current period is in the fourth interval and 1-Dm1-Dd1 is less than 2Dp, or the duty ratio of the last period is in the third interval and the duty ratio of the current period is in the fifth interval and 1-Dm1-Dd1 is less than 2Dp, the first level in the middle of the lower bridge arm of the last period is cancelled, and the second level is continuously output;
when the duty ratio of the last period is in the fourth interval, the duty ratio of the current period is in the first interval or the duty ratio of the last period is in the fourth interval, the duty ratio of the current period is in the second interval or the duty ratio of the last period is in the fourth interval, the duty ratio of the current period is in the third interval, 1-Dm2-Dd2 is not less than 2Dp, or the duty ratio of the last period is in the fifth interval, the duty ratio of the current period is in the first interval or the duty ratio of the last period is in the fifth interval, the duty ratio of the current period is in the second interval or the duty ratio of the last period is in the fifth interval, the duty ratio of the current period is in the third interval, and 1-Dm2-Dd2 is not less than 2Dp, advancing the turn-off time of the upper bridge arm of the last period by a dead time to the second level state;
when the duty ratio of the last period is in the fourth interval, the duty ratio of the current period is in the third interval and 1-Dm2-Dd2<2Dp or the duty ratio of the last period is in the fifth interval and the duty ratio of the current period is in the third interval and 1-Dm2-Dd2<2Dp, the first level in the middle of the lower bridge arm of the current period is cancelled, and the second level is continuously output;
when the duty ratio of the last period is in the fourth interval, the duty ratio of the current period is in the fourth interval, and 2-Dm1-Dm2< Dp, the second level formed by splicing the middle two periods of the upper bridge arm is cancelled, and the first level is continuously output;
when the duty ratio of the previous period is in the fourth interval and the duty ratio of the current period is in the fifth interval and 1-Dm1< Dp, delaying the turn-off time of the upper bridge arm of the previous period, and continuously outputting the first level until the current period;
when the duty ratio of the last period is in the five interval, the duty ratio of the current period is in the fourth interval, and 1-Dm2 is less than Dp, the turn-off time of the upper bridge arm of the current period is advanced, and the first level is continuously output after the last period is finished;
wherein the voltage of the first level is greater than the voltage of the second level.
Optionally, before determining the voltage vector command according to the torque command and the three-phase current of the motor, the method further includes:
and carrying out data processing on the torque instruction.
Optionally, the data processing the torque command includes:
debounce, slope limit, and smooth switching between different control modes for the torque command.
Optionally, the width of the narrow pulse is less than or equal to 2 μ s.
Optionally, the width of the dead time is 2 μ s to 5 μ s.
According to another aspect of the present invention, there is provided a motor apparatus including: the acquisition module is used for acquiring a torque instruction obtained on the communication bus;
the voltage vector instruction determining module is used for determining a voltage vector instruction according to the torque instruction and the three-phase current of the motor;
the waveform determining module is used for determining the waveform of the pulse width modulation signal according to the voltage vector instruction;
and the processing module is used for filtering the narrow pulse in the pulse width modulation signal according to the pulse width modulation signal waveform of two continuous periods.
According to another aspect of the present invention, there is provided a vehicle equipped with the above motor apparatus.
According to the technical scheme of the embodiment of the invention, a torque instruction obtained on a communication bus is obtained; determining a voltage vector instruction according to the torque instruction and the three-phase current of the motor; determining a pulse width modulation signal waveform according to the voltage vector instruction; and filtering narrow pulses in the pulse width modulation signal according to the pulse width modulation signal waveforms of two continuous periods. On the basis of not increasing hardware cost, narrow pulses in all periodic pulse width modulation signals are filtered, power loss of a motor driving system is reduced, generation of large surge voltage peak and oscillation is avoided, and the service life of the motor is prolonged.
It should be understood that the statements in this section do not necessarily identify key or critical features of the embodiments of the present invention, nor do they necessarily limit the scope of the invention. Other features of the present invention will become apparent from the following description.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a vehicle motor system according to an embodiment of the present invention;
fig. 2 is a flowchart of a motor control method according to an embodiment of the present invention;
fig. 3 is a schematic diagram of a three-phase bridge circuit according to a second embodiment of the present invention;
fig. 4 is a flowchart of a motor control method according to a second embodiment of the present invention;
FIGS. 5A-5E are schematic diagrams of PWM command intervals according to a second embodiment of the present invention;
FIGS. 6A-6H are schematic diagrams illustrating comparison between before and after suppression of a narrow pulse in a PWM signal according to a second embodiment of the present invention;
fig. 7 is a schematic structural diagram of a motor apparatus according to a third embodiment of the present invention.
Detailed Description
In order to make the technical solutions of the present invention better understood, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It should be noted that the terms "first," "second," and the like in the description and claims of the present invention and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the invention described herein are capable of operation in sequences other than those illustrated or described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
Example one
The embodiment of the invention provides a motor control method, which can be executed by a motor device, and the motor device can be arranged in a vehicle.
Optionally, fig. 1 is a schematic structural diagram of a vehicle motor system according to a first embodiment of the present invention.
As shown in fig. 1, the vehicle motor control system includes the following parts: the device comprises a motor Controller 1, a tested motor 3 with a rotary transformer 2 (rotary transformer) as a position sensor, a high-voltage power supply 4, a low-voltage power supply 5, a CAN control instruction 6 (Controller Area Network, CAN), an IG signal 7 (ignition signal) and the like. The motor controller consists of a control board, a drive board and an IGBT (insulated gate bipolar transistor), and is connected with all other parts; the high-voltage power supply 4 provides high-voltage power supply for the whole system and is used for controlling the rotation of the tested motor 3; the low-voltage control power supply 5 supplies power to an internal control board of the motor controller 1, performs signal operation and provides a corresponding driving signal; the CAN control instruction 6 refers to CAN signals from other controllers of the whole vehicle, and when the motor system is on the test bench, the part CAN also refer to a control instruction from an upper computer; the IG signal 7 and the like are all other signals necessary for the operation of other electric machine systems, such as an IG on/off signal from the entire vehicle and an airbag collision signal.
Fig. 2 is a flowchart of a motor control method according to an embodiment of the present invention.
Referring to fig. 1 and fig. 2, a motor control method according to an embodiment of the present invention includes the following steps:
and S110, acquiring a torque command obtained on the communication bus.
Specifically, the communication bus may be a CAN bus (controller area network), and the control board on the motor controller obtains a torque command signal on the CAN bus.
And S120, determining a voltage vector command according to the torque command and the three-phase current of the motor.
Specifically, the three-phase current of the motor is obtained by actual measurement. When the motor controller works in a non-flux weakening area, an MTPA (maximum torque current ratio control) control mode is adopted, id instructions and iq instructions are obtained in a table look-up mode according to torque instructions, and closed-loop control is respectively carried out. Along with the increase of the rotating speed of the motor or the increase of a torque instruction or the reduction of the bus voltage, the working point of the motor gradually approaches to a weak magnetic area, and when the difference value between the calculated voltage vector and the bus voltage/sqrt (3) is smaller than a certain value (for example, 5V, different systems are selected according to test effects), the control mode is switched from MTPA current control to voltage vector control. When the voltage vector control mode is adopted, the voltage vector instruction amplitude set by the inverter is bus voltage/sqrt (3), and the phase angle of the voltage vector instruction is obtained according to closed-loop control of the instruction torque and the actual torque. And the actual torque used by the closed-loop control is calculated according to the information such as the three-phase current of the motor, the position angle of the rotor, the motor parameters and the like.
And S130, determining the waveform of the pulse width modulation signal according to the voltage vector instruction.
Specifically, the control board obtains 6 paths of pulse width modulation signal waveform signals through calculation according to the voltage vector instruction, and transmits the signals to the drive board.
And S140, filtering narrow pulses in the pulse width modulation signal according to the pulse width modulation signal waveforms of two continuous periods.
Specifically, the driving board performs level conversion and necessary signal processing on 6 paths of pulse width modulation signal waveform signals output by the control board for two continuous periods according to the characteristics of the IGBT, and is used for driving the IGBT to enable the output waveform of the IGBT to be consistent with the pulse width modulation signal waveform output by the control board, so that narrow pulses in the pulse width modulation signals are filtered.
Optionally, the width of the narrow pulse is less than or equal to 2 μ s.
According to the technical scheme of the embodiment of the invention, the torque instruction obtained on the communication bus is obtained; determining a voltage vector instruction according to the torque instruction and the three-phase current of the motor; determining the waveform of the pulse width modulation signal according to the voltage vector instruction; and filtering narrow pulses in the pulse width modulation signal according to the pulse width modulation signal waveforms of two continuous periods. On the basis of not increasing hardware cost, narrow pulses in all periodic pulse width modulation signals are filtered, power loss of a motor driving system is reduced, generation of large surge voltage peak and oscillation is avoided, and the service life of the motor is prolonged.
Example two
Optionally, fig. 3 is a schematic diagram of a three-phase bridge circuit provided in a vehicle motor system according to a second embodiment of the present invention, where A, B, C denotes a three-phase power supply, VT denotes a thyristor, PMSM denotes a motor, and U denotes a motor d Representing a voltage. As shown in fig. 3, the three-phase bridge circuit includes an upper arm and a lower arm.
Fig. 4 is a flowchart of a motor control method according to a second embodiment of the present invention, and on the basis of the second embodiment, an embodiment of filtering out narrow pulses in a pwm signal according to a waveform of the pwm signal in two consecutive cycles is exemplarily shown.
Referring to fig. 3 and 4, a motor control method according to an embodiment of the present invention includes the following steps:
and S210, acquiring a torque command obtained on the communication bus.
And S220, determining a voltage vector command according to the torque command and the three-phase current of the motor.
And S230, determining the waveform of the pulse width modulation signal according to the voltage vector instruction.
And S241, determining a first waveform corresponding to the upper bridge arm and a second waveform corresponding to the lower bridge arm according to the pulse width modulation signal waveform of each period.
And S242, determining the interval where the pulse width modulation command is located according to the first waveform and the second waveform.
Specifically, fig. 5A-5E are graphs of pwm command intervals provided by a second embodiment of the present invention, in which H, L represents a high level and a low level, respectively, and H, L represents a first level and a second level, respectively, in an embodiment.
As shown in fig. 5A, when Dm is 0 ≦ Dm < 0.5Dp, Dt is 0, Db is 1, and the pwm command is in the first interval;
as shown in fig. 5B, when Dp is 0.5 ≦ Dm < Dd, Dt is 0, Db is 1-2Dm, and the pwm command is in the second interval;
as shown in fig. 5C, when Dd is less than or equal to Dm < 1-Dd, Dt is Dm-Dd, Db is 1-Dm-Dd, and the pwm command is in the third interval;
as shown in fig. 5D, when 1-Dd ≦ Dm < 1, Dt is 2Dm-1, Db is 0, and the pwm command is in the fourth interval;
as shown in fig. 5E, when Dm is equal to 1, Dt is equal to 1, Db is equal to 0, and the pwm command is in the fifth interval;
wherein Dt represents an upper bridge arm first level duty ratio, Db represents a lower bridge arm first level duty ratio, Dm represents a duty ratio command from the space vector pulse width modulation module, Dd represents a dead time, and Dp represents a narrow pulse time.
Optionally, the width of the dead time is 2 μ s to 5 μ s.
And S243, filtering narrow pulses in the pulse width modulation signal according to the interval where the pulse width modulation instruction of the previous period and the current period is located and the preset duty ratio condition.
Specifically, fig. 6A to 6H are schematic diagrams illustrating comparison before and after suppression of a narrow pulse in a pwm signal according to a second embodiment of the present invention, where H, L represents a first level (high level) and a second level (low level), respectively.
When the last cycle duty cycle is in the first interval and the current cycle duty cycle is in the first interval or the last cycle duty cycle is in the first interval and the current cycle duty cycle is in the second interval or the last cycle duty cycle is in the first interval and the current cycle duty cycle is in the third interval or the last cycle duty cycle is in the second interval and the current cycle duty cycle is in the second interval or the last cycle duty cycle is in the second interval and the current cycle duty cycle is in the third interval or the last cycle duty cycle is in the third interval and the current cycle duty cycle is in the second interval or the last cycle duty cycle is in the third interval and the current cycle duty cycle is in the third interval and Db1+ Db2 ≧ 2Dp or the last cycle duty cycle is in the fifth interval and the current cycle duty cycle is in the fourth interval and 1-Dm2< Dp or when the duty cycle of the previous period is in the fifth interval and the duty cycle of the current period is in the fifth interval, the original signal is directly output without any post-processing.
As shown in FIG. 6A, when the last cycle duty cycle is in the first interval and the current cycle duty cycle is in the fourth interval or the last cycle duty cycle is in the first interval and the current cycle duty cycle is in the fifth interval or the last cycle duty cycle is in the second interval and the current cycle duty cycle is in the fifth interval or the last cycle duty cycle is in the third interval and the current cycle duty cycle is in the fourth interval and the 1-Dm1-Dd1 ≧ 2Dp or the last cycle duty cycle is in the third interval and the current cycle duty cycle is in the fifth interval and 1-Dm1-Dd1 ≧ 2Dp or the last cycle duty cycle is in the fourth interval and the current cycle duty cycle is in the fourth interval and 2-Dm1-Dm2 ≧ Dp or the last cycle duty cycle is in the fourth interval and the current cycle duty cycle is in the fifth interval and the 1-Dm1 ≧ Dp, and after a second level of dead time is added to the upper bridge arm in the current period, setting the level as the first level.
As shown in fig. 6B, when the duty ratio of the previous period is in the third interval, the duty ratio of the current period is in the third interval, and Db1+ Db 2<2Dp, the first level formed by splicing the middle two periods of the lower arm is cancelled, and the second level is continuously output.
As shown in fig. 6C, when the duty ratio of the last period is in the third interval and the duty ratio of the current period is in the fourth interval and 1-Dm1-Dd 1< 2Dp or the duty ratio of the last period is in the third interval and the duty ratio of the current period is in the fifth interval and 1-Dm1-Dd 1< 2Dp, the first level in the middle of the lower arm of the last period is cancelled and the second level is continuously output.
As shown in FIG. 6D, when the duty ratio of the previous period is in the fourth interval, the duty ratio of the current period is in the first interval or the duty ratio of the previous period is in the fourth interval, the duty ratio of the current period is in the second interval or the duty ratio of the previous period is in the fourth interval, the duty ratio of the current period is in the third interval and 1-Dm2-Dd2 is not less than 2Dp, or the duty ratio of the previous period is in the fifth interval and the duty ratio of the current period is in the first interval or the duty ratio of the previous period is in the fifth interval and the duty ratio of the current period is in the second interval or the duty ratio of the previous period is in the fifth interval and the duty ratio of the current period is in the third interval and 1-Dm2-Dd2 is not less than 2Dp, the turn-off time of the upper arm of the previous period is advanced by a second level state of one dead zone time.
As shown in fig. 6E, when the duty ratio of the last period is in the fourth interval and the duty ratio of the current period is in the third interval and 1-Dm2-Dd2<2Dp or the duty ratio of the last period is in the fifth interval and the duty ratio of the current period is in the third interval and 1-Dm2-Dd2<2Dp, the first level in the middle of the lower arm of the current period is cancelled and the second level is continuously output.
As shown in fig. 6F, when the duty ratio of the previous cycle is in the fourth interval and the duty ratio of the current cycle is in the fourth interval, and 2-Dm1-Dm2< Dp, the second level formed by splicing the middle two cycles of the upper arm is cancelled, and the first level is continuously output.
As shown in fig. 6G, when the duty ratio of the previous period is in the fourth interval and the duty ratio of the current period is in the fifth interval and 1-Dm1< Dp, the upper arm turn-off time of the previous period is delayed, and the first level is continuously output until the current period.
As shown in fig. 6H, when the duty ratio of the previous period is in the fifth interval and the duty ratio of the current period is in the fourth interval and 1-Dm2< Dp, the turn-off time of the upper arm of the current period is advanced, and the first level is continuously output since the previous period is finished.
Further, when determining the voltage vector command according to the torque command and the three-phase current of the motor, the method further includes: and carrying out data processing on the torque command. The data processing of the torque command includes, but is not limited to, debouncing, slope limiting, and smooth switching between different control modes of the torque command.
According to the embodiment of the invention, a torque instruction obtained on a communication bus is obtained, a voltage vector instruction is determined according to the torque instruction and the three-phase current of a motor, a pulse width modulation signal waveform is determined according to the voltage vector instruction, a first waveform corresponding to an upper bridge arm and a second waveform corresponding to a lower bridge arm are determined according to the pulse width modulation signal waveform of each period, an interval where the pulse width modulation instruction is located is determined according to the first waveform and the second waveform, and narrow pulses in the pulse width modulation signal are filtered according to the interval where the pulse width modulation instruction of the upper period and the current period is located and a preset duty ratio condition. The interval where the pulse width modulation command is located is determined according to the waveform of the pulse width modulation signal of each period, dead time is added in different intervals according to different rules, on the basis of not increasing hardware cost, narrow pulses in all the periodic pulse width modulation signals are filtered, power loss of a motor driving system is reduced, generation of large surge voltage peak and oscillation is avoided, and the service life of the motor is prolonged.
EXAMPLE III
Fig. 7 is a schematic structural diagram of a motor apparatus according to a third embodiment of the present invention. As shown in fig. 7, the apparatus 10 includes:
the acquisition module 11 is used for acquiring a torque instruction obtained on a communication bus;
the voltage vector instruction determining module 12 is configured to determine a voltage vector instruction according to the torque instruction and the three-phase current of the motor;
the waveform determining module 13 is configured to determine a pulse width modulation signal waveform according to the voltage vector instruction;
and the processing module 14 is configured to filter out narrow pulses in the pwm signal according to the waveform of the pwm signal in two consecutive cycles.
Optionally, the apparatus further includes an interval determining module, configured to determine an interval where the pulse width modulation instruction is located according to the first waveform and the second waveform.
Specifically, when Dm is greater than or equal to 0 and less than 0.5Dp, Dt is 0, Db is 1, and the pwm command is in the first interval;
when Dm is more than or equal to 0.5Dp and less than Dd, Dt is 0, Db is 1-2Dm, and the pulse width modulation command is in a second interval;
when Dd is less than Dm and less than 1-Dd, Dt is Dm-Dd, Db is 1-Dm-Dd, and the pulse width modulation command is in a third interval;
when Dm is less than 1-Dd and less than 1, Dt is 2Dm-1, Db is 0, and the pulse width modulation command is in a fourth interval;
when Dm is equal to 1, Dt is equal to 1, Db is equal to 0, and the pwm command is in the fifth interval;
wherein Dt represents an upper bridge arm first level duty ratio, Db represents a lower bridge arm first level duty ratio, Dm represents a duty ratio command from the space vector pulse width modulation module, Dd represents a dead time, and Dp represents a narrow pulse time.
Optionally, the processing module 14 may be further configured to filter the narrow pulse in the pwm signal according to the interval where the pwm command of the previous cycle and the current cycle is located and the preset duty ratio condition.
Specifically, when the duty ratio of the previous period is in the first interval, the duty ratio of the current period is in the second interval, the duty ratio of the current period is in the first interval, the duty ratio of the current period is in the third interval, the duty ratio of the current period is in the second interval, the duty ratio of the current period is in the first interval, the duty ratio of the current period is in the second interval, the duty ratio of the previous period is in the second interval, the duty ratio of the current period is in the third interval, the duty ratio of the current period is in the first interval, the duty ratio of the previous period is in the third interval, the duty ratio of the current period is in the second interval, the duty ratio of the previous period is in the third interval, the duty ratio of the current period is in the Db1+ Db2 ≧ 2Dp, or the duty ratio of the previous period is in the fifth interval, the duty ratio of the current period is in the fourth interval When the interval and 1-Dm2< Dp or the duty ratio of the last period is in the fifth interval and the duty ratio of the current period is in the fifth interval, the original signal is directly output without any post-processing.
When the last cycle duty cycle is in the first interval and the current cycle duty cycle is in the fourth interval or the last cycle duty cycle is in the first interval and the current cycle duty cycle is in the fifth interval or the last cycle duty cycle is in the second interval and the current cycle duty cycle is in the fourth interval and 1-Dm1-Dd1 ≧ 2Dp or the last cycle duty cycle is in the third interval and the current cycle duty cycle is in the fifth interval and 1-Dm1-Dd1 Dp or the last cycle duty cycle is in the fourth interval and the current cycle duty cycle is in the fourth interval and 2-Dm1-Dm2 ≧ Dp or the last cycle duty cycle is in the fourth interval and the current cycle duty cycle is in the fifth interval and 1-Dm1 ≧ Dp, and after a second level of dead time is added to the upper bridge arm in the current period, setting the level as the first level.
And when the duty ratio of the previous period is in the third interval, the duty ratio of the current period is in the third interval, and Db1+ Db2 is less than 2Dp, canceling the first level formed by splicing the middle two periods of the lower bridge arm, and continuously outputting the second level.
And when the duty ratio of the last period is in the third interval, the duty ratio of the current period is in the fourth interval and 1-Dm1-Dd1 is less than 2Dp, or the duty ratio of the last period is in the third interval and the duty ratio of the current period is in the fifth interval and 1-Dm1-Dd1 is less than 2Dp, the first level in the middle of the lower bridge arm of the last period is cancelled, and the second level is continuously output.
When the duty ratio of the last period is in the fourth interval, the duty ratio of the current period is in the first interval or the duty ratio of the last period is in the fourth interval, the duty ratio of the current period is in the second interval or the duty ratio of the last period is in the fourth interval, the duty ratio of the current period is in the third interval, 1-Dm2-Dd2 is larger than or equal to 2Dp, or the duty ratio of the last period is in the fifth interval, the duty ratio of the current period is in the first interval or the duty ratio of the last period is in the fifth interval, the duty ratio of the current period is in the second interval or the duty ratio of the last period is in the fifth interval, the duty ratio of the current period is in the third interval, and 1-Dm2-Dd2 is larger than or equal to 2Dp, the upper turn-off time of the last period is advanced by a second level state of a dead time.
And when the duty ratio of the last period is in the fourth interval, the duty ratio of the current period is in the third interval and 1-Dm2-Dd2<2Dp, or the duty ratio of the last period is in the fifth interval and the duty ratio of the current period is in the third interval and 1-Dm2-Dd2<2Dp, canceling the first level in the middle of the lower bridge arm of the current period and continuously outputting the second level.
And when the duty ratio of the last period is in the fourth interval, the duty ratio of the current period is in the fourth interval, and 2-Dm1-Dm2< Dp, the second level formed by splicing the middle two periods of the upper bridge arm is cancelled, and the first level is continuously output.
And when the duty ratio of the last period is in the fourth interval, the duty ratio of the current period is in the fifth interval and 1-Dm1< Dp, delaying the turn-off time of the upper bridge arm of the last period, and continuously outputting the first level until the current period.
And when the duty ratio of the last period is in the fifth interval, the duty ratio of the current period is in the fourth interval and 1-Dm2< Dp, advancing the turn-off time of the upper bridge arm of the current period, and continuously outputting the first level after the last period is finished.
The motor device provided by the embodiment of the invention can execute the motor control method provided by any embodiment of the invention, and has corresponding functional modules and beneficial effects of the execution method.
Example four
The fourth embodiment of the invention provides a vehicle, wherein the vehicle is provided with the motor device of the third embodiment, can execute the motor control method provided by any embodiment of the invention, and has corresponding functional modules and beneficial effects of the execution method.
It should be understood that various forms of the flows shown above may be used, with steps reordered, added, or deleted. For example, the steps described in the present invention may be executed in parallel, sequentially, or in different orders, and are not limited herein as long as the desired results of the technical solution of the present invention can be achieved.
The above-described embodiments should not be construed as limiting the scope of the invention. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions may be made in accordance with design requirements and other factors. Any modification, equivalent replacement, and improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims (10)

1. A motor control method, characterized by comprising:
acquiring a torque instruction obtained on a communication bus;
determining a voltage vector instruction according to the torque instruction and the three-phase current of the motor;
determining a pulse width modulation signal waveform according to the voltage vector instruction;
and filtering narrow pulses in the pulse width modulation signal according to the pulse width modulation signal waveforms of two continuous periods.
2. The motor control method of claim 1, wherein the motor controller comprises a three-phase bridge circuit comprising an upper leg and a lower leg;
according to the pulse width modulation signal waveform of two continuous periods, filtering out narrow pulses in the pulse width modulation signal comprises:
determining a first waveform corresponding to the upper bridge arm and a second waveform corresponding to the lower bridge arm according to the pulse width modulation signal waveform of each period;
determining an interval where a pulse width modulation command is located according to the first waveform and the second waveform;
and filtering narrow pulses in the pulse width modulation signals according to the interval where the pulse width modulation instructions of the previous period and the current period are located and the preset duty ratio condition.
3. The motor control method according to claim 2, wherein determining the section in which the pulse width modulation command is located according to the first waveform and the second waveform comprises:
when Dm is more than or equal to 0 and less than 0.5Dp, Dt is 0, Db is 1, and the pulse width modulation command is in a first interval;
when Dm is more than or equal to 0.5Dp and less than Dd, Dt is 0, Db is 1-2Dm, and the pulse width modulation command is in a second interval;
when Dd is less than or equal to Dm and less than 1-Dd, Dt is Dm-Dd, Db is 1-Dm-Dd, and the pulse width modulation command is in a third interval;
when Dm is less than 1-Dd and less than 1, Dt is 2Dm-1, Db is 0, and the pulse width modulation command is in a fourth interval;
when Dm is equal to 1, Dt is equal to 1, Db is equal to 0, and the pwm command is in a fifth interval;
wherein Dt represents an upper bridge arm first level duty ratio, Db represents a lower bridge arm first level duty ratio, Dm represents a duty ratio command from the space vector pulse width modulation module, Dd represents a dead time, and Dp represents a narrow pulse time.
4. The motor control method of claim 3, wherein filtering the narrow pulses in the PWM signal according to the interval where the PWM command of the previous cycle and the current cycle is located and a preset duty ratio condition, comprises:
when the last period duty cycle is in the first interval and the current period duty cycle is in the second interval or the last period duty cycle is in the first interval and the current period duty cycle is in the third interval or the last period duty cycle is in the second interval and the current period duty cycle is in the first interval or the last period duty cycle is in the second interval and the current period duty cycle is in the second interval or the last period duty cycle is in the second interval and the current period duty cycle is in the third interval or the last period duty cycle is in the third interval and the current period duty cycle is in the first interval or the last period duty cycle is in the third interval and the current period duty cycle is in the second interval or the last period duty cycle is in the third interval and the current period duty cycle is in the second interval or the last period duty cycle Db1+ Db2 is more than or equal to 2Dp, or the duty ratio of the last period is in the fifth interval, the duty ratio of the current period is in the fourth interval, 1-Dm2< Dp, or the duty ratio of the last period is in the fifth interval, and the duty ratio of the current period is in the fifth interval, the original signal is directly output;
when the last period duty cycle is in the first interval, the current period duty cycle is in the fourth interval or the last period duty cycle is in the first interval, the current period duty cycle is in the fifth interval or the last period duty cycle is in the second interval, the current period duty cycle is in the fourth interval or the last period duty cycle is in the second interval, the current period duty cycle is in the fifth interval or the last period duty cycle is in the third interval, the current period duty cycle is in the fourth interval, the 1-Dm1-Dd1 is not less than 2Dp, the last period duty cycle is in the third interval, the current period duty cycle is in the fifth interval, the 1-Dm1-Dd1 is not less than 2Dp, the last period duty cycle is in the fourth interval, the current period duty cycle is in the fourth interval, the 2-Dm1-Dm2 is not less than Dp, or the last period duty cycle is in the fourth interval, the current period duty cycle is in the fourth interval When the fifth interval is more than or equal to Dp from 1-Dm1, adding a second level of dead time to the upper bridge arm in the current period, and setting the level as the first level;
when the duty ratio of the last period is in the third interval, the duty ratio of the current period is in the third interval, and Db1+ Db2 is less than 2Dp, the first level formed by splicing the middle two periods of the lower bridge arm is cancelled, and the second level is continuously output;
when the duty ratio of the last period is in the third interval, the duty ratio of the current period is in the fourth interval and 1-Dm1-Dd1 is less than 2Dp, or the duty ratio of the last period is in the third interval and the duty ratio of the current period is in the fifth interval and 1-Dm1-Dd1 is less than 2Dp, the first level in the middle of the lower bridge arm of the last period is cancelled, and the second level is continuously output;
when the last cycle duty cycle is in the fourth interval and the current cycle duty cycle is in the first interval or the last cycle duty cycle is in the fourth interval and the current cycle duty cycle is in the second interval or the last cycle duty cycle is in the fourth interval and the current cycle duty cycle is in the third interval and 1-Dm2-Dd2 is ≧ 2Dp or the last cycle duty cycle is in the fifth interval and the current cycle duty cycle is in the first interval or the last cycle duty cycle is in the fifth interval and the current cycle duty cycle is in the second interval or the last cycle duty cycle is in the fifth interval and the current cycle duty cycle is in the third interval and 1-Dm2-Dd2 is ≧ 2Dp, advancing the upper arm turn-off time of the last cycle by the second level state of one dead zone time;
when the duty ratio of the last period is in the fourth interval, the duty ratio of the current period is in the third interval and 1-Dm2-Dd2<2Dp or the duty ratio of the last period is in the fifth interval and the duty ratio of the current period is in the third interval and 1-Dm2-Dd2<2Dp, the first level in the middle of the lower bridge arm of the current period is cancelled, and the second level is continuously output;
when the duty ratio of the last period is in the fourth interval, the duty ratio of the current period is in the fourth interval, and 2-Dm1-Dm2< Dp, the second level formed by splicing the middle two periods of the upper bridge arm is cancelled, and the first level is continuously output;
when the duty ratio of the previous period is in the fourth interval and the duty ratio of the current period is in the fifth interval and 1-Dm1< Dp, delaying the turn-off time of the upper bridge arm of the previous period, and continuously outputting the first level until the current period;
when the duty ratio of the last period is in the five intervals, the duty ratio of the current period is in the fourth interval, and 1-Dm2 is smaller than Dp, the turn-off time of an upper bridge arm of the current period is advanced, and the first level is continuously output after the last period is finished;
wherein the voltage of the first level is greater than the voltage of the second level.
5. The method of claim 1, further comprising, prior to determining a voltage vector command based on the torque command and three phase currents of the motor:
and carrying out data processing on the torque instruction.
6. The motor control method according to claim 5, wherein the data processing of the torque command includes:
debounce, slope limit, and smooth switching between different control modes for the torque command.
7. The motor control method according to claim 1, characterized in that the width of the narrow pulse is less than or equal to 2 μ s.
8. The motor control method according to claim 3, wherein the width of the dead time is 2 μ s to 5 μ s.
9. An electric motor apparatus, comprising:
the acquisition module is used for acquiring a torque instruction obtained on the communication bus;
the voltage vector instruction determining module is used for determining a voltage vector instruction according to the torque instruction and the three-phase current of the motor;
the waveform determining module is used for determining the waveform of the pulse width modulation signal according to the voltage vector instruction;
and the processing module is used for filtering the narrow pulse in the pulse width modulation signal according to the pulse width modulation signal waveform of two continuous periods.
10. A vehicle characterized by comprising the motor control apparatus of claim 9.
CN202210719059.0A 2022-06-23 2022-06-23 Motor control method and device and vehicle Pending CN114977972A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
CN202210719059.0A CN114977972A (en) 2022-06-23 2022-06-23 Motor control method and device and vehicle
PCT/CN2023/098260 WO2023246484A1 (en) 2022-06-23 2023-06-05 Electric motor control method and apparatus, and vehicle

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202210719059.0A CN114977972A (en) 2022-06-23 2022-06-23 Motor control method and device and vehicle

Publications (1)

Publication Number Publication Date
CN114977972A true CN114977972A (en) 2022-08-30

Family

ID=82966461

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202210719059.0A Pending CN114977972A (en) 2022-06-23 2022-06-23 Motor control method and device and vehicle

Country Status (2)

Country Link
CN (1) CN114977972A (en)
WO (1) WO2023246484A1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2023246484A1 (en) * 2022-06-23 2023-12-28 中国第一汽车股份有限公司 Electric motor control method and apparatus, and vehicle

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101013875B (en) * 2006-12-15 2010-05-26 奇瑞汽车股份有限公司 Motor controller for DSP-based hybrid power automobile
WO2010116815A1 (en) * 2009-03-30 2010-10-14 株式会社日立製作所 Ac motor control device and ac motor driving system
JP6439771B2 (en) * 2016-10-19 2018-12-19 トヨタ自動車株式会社 Driving device and automobile
CN110323927A (en) * 2018-12-14 2019-10-11 特变电工西安电气科技有限公司 A kind of three-level inverter burst pulse suppressing method and device
CN111478613B (en) * 2020-04-20 2021-07-27 上海正泰电源系统有限公司 DSP implementation method for restraining inverter narrow pulse
CN113270996B (en) * 2021-04-07 2022-11-11 中国第一汽车股份有限公司 PWM modulation method for restraining narrow pulse
CN114977972A (en) * 2022-06-23 2022-08-30 中国第一汽车股份有限公司 Motor control method and device and vehicle

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2023246484A1 (en) * 2022-06-23 2023-12-28 中国第一汽车股份有限公司 Electric motor control method and apparatus, and vehicle

Also Published As

Publication number Publication date
WO2023246484A1 (en) 2023-12-28

Similar Documents

Publication Publication Date Title
US10027262B2 (en) Pseudorandom PWM variation based on motor operating point
JP4450082B2 (en) Electric motor drive device and control method thereof
US20110080131A1 (en) Control device
CN100418296C (en) PWM inverter control method
KR20140049451A (en) Inverter control method for eco-friendly vehicle
CN110171296B (en) Controller for electric vehicle
CN105556830A (en) Electric motor control apparatus and electric motor control method
CN104682761A (en) Current source power conversion apparatus
JP2011091962A (en) Abnormality determination device of current sensor and abnormality determination method
EP2413497B1 (en) Device and method for power-saving driving of device having same load pattern
CN114977972A (en) Motor control method and device and vehicle
US7629756B2 (en) Method and apparatus for controlling asynchronous motors
CN108448956B (en) Rotor position detection device of six-phase asymmetric square wave motor
CN106911275A (en) Electric automobile method for controlling permanent magnet synchronous motor and control system
JP6962446B2 (en) Power conversion control method and power conversion control device
CN105471240A (en) Method for selecting shutdown speed of shutdown process in power semiconductor
Priya et al. Analysis of various switch faults of the three level neutral point clamped inverter feeding induction motor drive
Raj et al. Multiband hysteresis current controller for three level BLDC motor drive
US11101743B2 (en) Method and device for operating a multi-phase electric machine
CN110311542B (en) Control method and control device for virtual reactance of modular multilevel converter
JP2013230052A (en) Motor control device
WO2021048999A1 (en) Electric power conversion device
CN115065295A (en) Motor control method, motor controller, electric drive system and new energy automobile
CN112072909B (en) Drive signal modulation method for inhibiting electromagnetic interference of electric vehicle power module
CN107819417B (en) Method for calculating supporting capacitor capacity for multi-motor integrated controller

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination