CN114975288A - 功率半导体模块装置 - Google Patents

功率半导体模块装置 Download PDF

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Publication number
CN114975288A
CN114975288A CN202210171192.7A CN202210171192A CN114975288A CN 114975288 A CN114975288 A CN 114975288A CN 202210171192 A CN202210171192 A CN 202210171192A CN 114975288 A CN114975288 A CN 114975288A
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Prior art keywords
printed circuit
circuit board
terminal element
substrate
power semiconductor
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CN202210171192.7A
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English (en)
Inventor
R·L·奇尔布斯
G·伯尼希
J·德博克
M·格德斯
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Infineon Technologies AG
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Infineon Technologies AG
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Publication of CN114975288A publication Critical patent/CN114975288A/zh
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Abstract

一种功率半导体模块装置包括壳体；衬底，布置在壳体内部并包括电介质绝缘层和布置在电介质绝缘层第一侧上的第一金属化层；至少一个半导体主体，安装在第一金属化层的背离电介质绝缘层的第一表面上；第一印刷电路板，布置在壳体内部，基本与衬底平行且垂直地位于衬底上方；以及多个第一端子元件，其机械连接到第一金属化层，其中每一个第一端子元件都从第一金属化层沿垂直于第一表面的垂直方向朝向第一印刷电路板延伸，其中每一个第一端子元件都包括压入配合销，第一印刷电路板包括多个通孔，每一个压入配合销都布置在一个通孔中，并且第一印刷电路板主要通过多个第一端子元件和由多个压入配合销形成的连接部而保持在相对于衬底的期望位置处。

Description

功率半导体模块装置
技术领域
本公开内容涉及功率半导体模块装置(power semiconductor modulearrangement)，具体地说，本公开内容涉及包括至少一个印刷电路板的功率半导体模块装置。
背景技术
功率半导体模块装置通常包括壳体内部的衬底。衬底通常包括衬底层(例如，陶瓷层)、沉积在衬底层第一侧上的第一金属化层、以及可选地沉积在衬底层第二侧上的第二金属化层。可以在衬底上布置包括一个或多个可控半导体元件(例如，采用半桥配置的两个IGBT)的半导体装置。通常提供允许从壳体外部接触该半导体装置的一个或多个接触元件。功率半导体模块是已知的，其中接触元件布置在衬底上，并且沿基本上垂直于衬底的主表面的方向突出穿过壳体的盖。接触元件的突出到壳体之外的部分可以机械地和电地耦合到印刷电路板。这样的装置通常又大又笨重。需要一种紧凑且尺寸小的功率半导体模块装置。
发明内容
一种功率半导体模块装置包括：壳体；衬底，其布置在壳体内部，并包括电介质绝缘层、以及布置在电介质绝缘层第一侧上的第一金属化层；至少一个半导体主体，其安装在第一金属化层的背离电介质绝缘层的第一表面上；第一印刷电路板，其布置在壳体内部，基本与衬底平行且垂直地位于衬底上方；以及多个第一端子元件，其机械连接到第一金属化层，其中所述多个第一端子元件中的每一个第一端子元件都从第一金属化层沿垂直于第一表面的垂直方向朝向第一印刷电路板延伸，其中所述多个第一端子元件中的每一个第一端子元件都包括压入配合销(pressfit pin)，第一印刷电路板包括多个通孔，所述多个压入配合销中的每一个压入配合销都布置在一个通孔中，并且第一印刷电路板主要通过所述多个第一端子元件和由所述多个压入配合销形成的连接部而保持在相对于衬底的期望位置处。
参考以下附图和说明书可以更好地理解本发明。附图中的部件不一定按比例绘制，而是强调说明本发明的原理。此外，在附图中，相同附图标记在所有不同视图中指代相对应的部分。
附图说明
图1是功率半导体模块装置的截面图。
图2是另一种功率半导体模块装置的截面图。
图3是另一种功率半导体模块装置的截面图。
图4A和4B示意性地示出了压入配合连接部(pressfit connection)。
图5是示例性功率半导体模块装置的截面图。
图6A和6B示意性地示出了示例性接触元件。
图7是接触元件的截面图。
图8是根据一个示例的功率半导体模块装置的截面图。
图9是根据另一个示例的功率半导体模块装置的截面图。
图10是根据一个示例的接触元件的截面图。
图11是根据另一个示例的功率半导体模块装置的截面图。
具体实施方式
在以下的详细描述中，参考了附图。附图显示了可以实施本发明的具体示例。应当理解，关于各种示例所描述的特征和原理可以彼此进行组合，除非另外特别指出。在说明书以及权利要求中，将特定元件命名为“第一元件”、“第二元件”、“第三元件”等不应被理解为是列举。相反，此类命名仅用于称呼不同的“元件”。也就是说，例如，“第三元件”的存在不需要“第一元件”和“第二元件”的存在。如本文所描述的半导体主体可以由(掺杂的)半导体材料制成，并且可以是半导体芯片或者可以包括在半导体芯片中。一种半导体主体具有电连接焊盘，并且包括至少一个具有电极的半导体元件。
参考图1，其示出了功率半导体模块装置100的截面图。功率半导体模块装置100包括壳体7和衬底10。衬底10包括电介质绝缘层11、附接到电介质绝缘层11的(结构化)第一金属化层111、以及附接到电介质绝缘层11的(结构化)第二金属化层112。电介质绝缘层11设置在第一金属化层111和第二金属化层112之间。
第一金属化层111和第二金属化层112中的每一个可以由以下材料之一组成或者包括以下材料之一：铜；铜合金；铝；铝合金；在功率半导体模块装置的操作期间保持固态的任何其它金属或合金。衬底10可以是陶瓷衬底，即电介质绝缘层11为陶瓷(例如，薄陶瓷层)的衬底。陶瓷可以由以下材料之一组成或者包括以下材料之一：氧化铝；氮化铝；氧化锆；氮化硅；氮化硼；或任何其它电介质陶瓷。可选地，电介质绝缘层11可以由有机化合物组成并且包括以下材料中的一种或多种：Al2O3、AlN、SiC、BeO、BN或Si3N4。例如，衬底10可以是例如直接铜键合(DCB)衬底、直接铝键合(DAB)衬底或活性金属钎焊(AMB)衬底。此外，衬底10可以是绝缘金属衬底(IMS)。绝缘金属衬底通常包括电介质绝缘层11，其例如包括诸如环氧树脂或聚酰亚胺之类的(填充)材料。例如，电介质绝缘层11的材料可以填充有陶瓷颗粒。这样的颗粒可以包括例如Si2O、Al2O3、AlN、SiN或BN，并且可以具有约1μm和约50μm之间的直径。衬底10也可以是具有非陶瓷电介质绝缘层11的常规印刷电路板(PCB)。例如，非陶瓷电介质绝缘层11可以由固化树脂组成，或者包括固化树脂。
衬底10布置在壳体7中。在图1所示的示例中，衬底10形成壳体7的基础表面(basesurface)，而壳体7本身仅包括侧壁和盖。然而，这只是一个示例。壳体7还可以包括基础表面，并且衬底10布置在壳体7内部的基础表面上。根据另一个示例(没有具体示出)，衬底10可以安装在基板上。基板可以形成壳体7的底部。在一些功率半导体模块装置100中，在同一壳体7内布置多于一个衬底10。
可以在至少一个衬底10上布置一个或多个半导体主体20。布置在至少一个衬底10上的每个半导体主体20可以包括二极管、IGBT(绝缘栅双极晶体管)、MOSFET(金属氧化物半导体场效应晶体管)、JFET(结场效应晶体管)、HEMT(高电子迁移率晶体管)或者任何其它合适的半导体元件。
一个或多个半导体主体20可以在衬底10上形成半导体装置。在图1中，仅示例性地示出了两个半导体主体20。图1中的衬底10的第二金属化层112是连续层。根据另一个示例，第二金属化层112可以是结构化层。根据其它示例，可以省略第二金属化层112。在图1所示的示例中，第一金属化层111是结构化层。本上下文中的“结构化层”是指相应的金属化层不是连续层，而是包括在层的不同部分之间的凹槽。在图1中示意性地示出了这种凹槽。该示例中的第一金属化层111包括三个不同的部分。不同的半导体主体20可以安装到第一金属化层111的相同或不同部分。第一金属化层的不同部分可以没有电连接部，或者可以使用电连接部3(例如，键合线)电连接到一个或多个其它部分。例如，可以使用电连接部3将半导体主体20彼此电连接或电连接到第一金属化层111。代替键合线，电连接部3还可以包括例如键合带、连接板或导体轨，这仅举了几个示例。一个或多个半导体管芯20可以通过导电连接层60而电连接和机械连接到衬底10。这种导电连接层60可以是例如焊料层、导电粘合剂层、或烧结金属粉末(例如，烧结银(Ag)粉末)层。
图1中所示的功率半导体模块装置100还包括端子元件4。端子元件4电连接到第一金属化层111，并提供壳体7的内部和外部之间的电连接。端子元件4的第一端可以电连接到第一金属化层111，而端子元件4的第二端41突出到壳体7之外。可以在端子元件4的第二端41处从外部电接触该端子元件4。然而，这样的端子元件4仅仅是一个示例。可以以任何其它合适的方式从壳体7外部电接触壳体7内部的部件。例如，可以将端子元件4布置得更靠近或邻近壳体7的侧壁。端子元件4也可以垂直或水平地突出穿过壳体7的侧壁。端子元件4甚至可以突出穿过壳体7的接地表面。端子元件4的第一端可以通过例如导电连接层(图1中没有清楚示出)而电连接和机械连接到衬底10。这种导电连接层可以是例如焊料层、导电粘合剂层、或者烧结金属粉末(例如，烧结银(Ag)粉末)层。例如，端子元件4的第一端也可以通过一个或多个电连接部3电耦合到衬底。例如，端子元件4的第二端41可以连接到印刷电路板(图1中没有示出)。
功率半导体模块装置100通常还包括密封剂5。例如，密封剂5可以由硅树脂凝胶(silicone gel)组成或者包括硅树脂凝胶，或者可以是刚性模制化合物。密封剂5可以至少部分地填充壳体7的内部，从而覆盖布置在衬底10上的部件和电连接部。端子元件4可以部分地嵌入密封剂5中。然而，至少它们的第二端41没有被密封剂5覆盖并且从密封剂5穿过壳体7而突出到壳体7的外部。密封剂5被配置为保护功率半导体模块装置100的部件和电连接部(特别是布置在壳体7内部的部件)而不受特定环境条件和机械损坏的影响。通常也可以省略壳体7，并且仅用密封剂5来保护衬底10和安装在其上的任何部件。在这种情况下，密封剂5可以是例如刚性材料。
现在参考图2，其示意性地示出了根据一个示例的功率半导体模块装置100。图2的功率半导体模块装置100基本上对应于上面已经参照图1解释的功率半导体模块装置100。然而，图2中所示的功率半导体模块装置100包括第一端子元件44和第二端子元件4。第二端子元件4基本上对应于上面已经参照图1描述的端子元件4。也就是说，第二端子元件4的第二端41突出到壳体7之外。另一方面，第一端子元件44完全布置在壳体7的内部，而不延伸到壳体7的外部。第一印刷电路板81耦合到第一端子元件44。因此，第一印刷电路板81也布置在壳体7内部。第二端子元件4的第二端41连接到第二印刷电路板82，第二印刷电路板82布置在壳体7的外部。通过将印刷电路板布置在壳体7的内部，可以以紧凑和节省空间的方式实施功率半导体模块装置100。这是因为通常布置在外部印刷电路板上的特定数量的多个部件可以布置在第一印刷电路板81上而不是第二印刷电路板82上。因此，与仅包括壳体7外部的第二印刷电路板82而不包括壳体7内部的第一印刷电路板81的装置相比，可以减少第二印刷电路板82的尺寸。
第一端子元件44被配置为电接触第一印刷电路板81。第一端子元件44进一步被配置为将第一印刷电路板81保持在其相对于衬底10的适当位置处。具体地说，第一印刷电路板81被布置为基本上平行于衬底10，并且垂直地位于衬底10上方。在组装过程中可能出现特定公差，因此可能出现与精确平行布置相比±15°的偏差。垂直方向y是垂直于衬底10的顶表面的方向，其中衬底10的顶表面是安装有半导体主体20的表面。第一印刷电路板81与衬底10垂直间隔开，也就是说，第一印刷电路板81与衬底10不彼此直接接触。仅通过第一端子元件44来提供第一印刷电路板81和衬底10之间的接触。
为了能够将第一印刷电路板81牢固地保持在相对于衬底10的限定位置处并且(电)接触第一印刷电路板81，第一端子元件44包括压入配合销。在图3中示意性地示出了包括压入配合销46的第一端子元件44。图3特别地示出了布置在衬底10上的半导体主体20和第一端子元件44。为了清楚起见，在图3中省略了任何其它部件。第一端子元件44在其背离衬底10的第二端处包括压入配合销46。在图4A-4B中示例性地示出了这种第一端子元件44的第二端，其中图4A示意性示出了未组装状态下的压入配合销46和对应的配对物(例如，第一印刷电路板81中的通孔810)，而图4B示意性地示出了组装状态下的压入配合销46和对应的配对物。通孔810可以形成用于第一端子元件44的压入配合销46的适当配对物。虽然未连接到配对物，但压入配合销46具有比其配对物更大的宽度。压入配合销46的宽度是在与半导体衬底10的顶表面101平行的水平方向x上的宽度。在压入过程期间，将压入配合销46推入到配对物中。这导致压入配合销46的塑性变形(通过图4B中的箭头示出)。当插入到配对物时，压入配合销46的宽度减小。通常只需要很小的插入力，同时具有很高的保持力。在插入压入配合销46之后，压入配合销46和配对物彼此牢固地附接在一起。压入配合销46的宽度减小形成了对抗压入配合销46压缩的力。因此，第一端子元件44可以不容易从通孔810中分离。
使用压入配合连接部使得功率半导体模块装置100的组装变得容易。也就是说，第一印刷电路板81可以容易地布置在衬底10上方，并且第一端子元件44的压入配合销46可以容易地插入到第一印刷电路板81中的相应通孔810中。当第一端子元件44已插入到第一印刷电路板81中的相应通孔810时，第一印刷电路板81被牢固地保持在衬底10上方的其期望位置处。这在图5中被示意性地示出。在图5中，出于说明目的，仅示出了一个第一端子元件44。然而，通常需要多个第一端子元件44来将第一印刷电路板81牢固地保持在其适当位置处，并防止第一印刷电路板81意外倾斜。多个第一端子元件44中的每一个可以电耦合到第一印刷电路板81。例如，第一端子元件44的压入配合销46可以与第一印刷电路板81的导体轨道812接触，如在图5中所示例性示出的。通常在印刷电路板上布置多个导体轨道812。导体轨道812可以布置在第一印刷电路板81的下表面上(如图5中所示)，或者布置在顶表面上，下表面是面对衬底10的表面，而顶表面是背离衬底10的表面。
多个压入配合销46的反作用力(其对抗压入配合销46的变形)通常足以防止第一印刷电路板81被进一步推向衬底10。然而，根据一个示例，第一端子元件44中的一个或多个还可以包括保持器件48。保持器件48被配置为形成用于第一印刷电路板81的屏障或端部止动件(end stop)，并防止压入配合销46被完全推入而穿过通孔810。以这种方式，可以将第一印刷电路板81保持在衬底10上方的限定距离处。保持器件48可以包括突出部、轴环(collar)或边缘，例如，如图6B中所示意性示出的。然而，保持器件48可以具有任何其它合适的形状。图6A示意性地示出了保持器件48的另一个示例。该示例中的保持器件48包括从第一端子元件44朝向第一印刷电路板81对角延伸的条杆。以这种方式，条杆和压入配合销46可以具有例如三叉戟(trident)或耙子的形状。在图6A所示的示例中，示出了布置在第一端子元件44的两个相对侧上的两个条杆。然而，保持器件48可以包括从第一端子元件44延伸的多于两个条杆。可以围绕第一端子元件44的周边以规则的间隔布置两个或更多个条杆。
第一端子元件44和第二端子元件4可以通过例如导电连接层安装到衬底10。这种导电连接层可以是焊料层、导电粘合剂层、焊缝、或者烧结金属粉末(例如，烧结银(Ag)粉末)层。根据另一个示例，第一端子元件44可以插入到被布置在衬底10上的套筒或铆接部(rivet)49中。可以通过例如导电连接层将铆接部49安装到衬底10。这种导电连接层可以是例如焊料层、导电粘合剂层、焊缝、或者烧结金属粉末(例如，烧结银(Ag)粉末)层。第一端子元件44在其第一端处可以具有指向衬底10的销的形状，并因此可以容易地插入到铆接部49中。这在图7中被示意性地示出。这同样适用于第二端子元件4(没有结合铆接部来具体说明第二端子元件4)。
在图2所示的示例中，功率半导体模块装置包括第一端子元件44和第二端子元件4。如图8中示例性所示，装置还可以包括第三端子元件43。第三端子元件43布置在第一印刷电路板81上，并从第一印刷电路板81穿过壳体7延伸到壳体7的外部。在壳体7的外部，第三端子元件43机械地并电耦合到第二印刷电路板82。也就是说，第三端子元件43形成第一印刷电路板81和第二印刷电路板82之间的连接。然而，第三端子元件43不耦合到衬底10。例如，可以以与第一端子元件44或第二端子元件4相同的方式来实施第三端子元件43。
根据更进一步的示例，第一端子元件44可以形成衬底10和第一印刷电路板81之间的连接(如上文已经描述的那样)，并且第一端子元件44可以进一步延伸到壳体7的外部，从而形成与第二印刷电路板82的进一步连接。这在图9中被示意性地示出。也就是说，在图9所示的示例中，第一端子元件44机械耦合到衬底10、第一印刷电路板81和第二印刷电路板82中的每一个。在该示例中，第一印刷电路板81仍可以通过压入配合连接部46而保持在适当的位置处。这在图10中被示意性地示出。在上文通过图2至图8所描述的示例中，在第一端子元件44的顶端处形成压入配合连接部46，顶端是第一端子元件81的被布置为离衬底10最远的端部。与此相比，在图9和图10的示例中，在第一端子元件44的中心部分中形成压入配合连接部46。该中心部分布置在第一端子元件44的顶端和下端之间，下端是第一端子元件44的耦合到衬底10的端部。例如，第一端子元件44的顶端和下端可以被实施为简单的销。下端可以以与上面参照图1至图8所描述的相同的方式机械地耦合到衬底10。顶端可以延伸穿过第二印刷电路板82中的开口或通孔，并且可以通过例如焊料连接部而机械地耦合到第二印刷电路板82。第一印刷电路板81可以以与上面已经所描述的相同方式通过压入配合连接部46机械地耦合到第一端子元件44，唯一的区别在于，压入配合连接部46不形成第一端子元件44的顶端。
如图9和图10中所示的第一端子元件44可以例如包括如上面已经参照图6A-6B所描述的保持器件48，以便提供第一印刷电路板81的进一步稳定性。与上面描述的示例中的第一印刷电路板一样，仅通过压入配合连接部46或至少主要通过压入配合连接部46将该示例中的第一印刷电路板81保持在期望的位置处。不需要例如由壳体7形成的其它端部止动件或支撑表面来将第一印刷电路板81保持在其适当位置处。也就是说，第一印刷电路板81不一定与壳体7接触。然而，可以提供由壳体7形成的其它端部止动件或支撑表面来进行补充支撑，通过压入配合连接部46来承载主要负载。根据一个示例，至少90％是通过压入配合连接部46将第一印刷电路板81保持在其期望位置处。
壳体7具有在水平面上的第一截面区域。该截面区域可以大于第一印刷电路板81的截面区域。也就是说，第一印刷电路板81和壳体7的侧壁之间存在间隙，如在所有附图中所示出的那样。第一印刷电路板81可以布置在壳体7中，并通过多个第一端子元件44的压入配合连接部46来将第一印刷电路板81固定在适当位置处。由于在第一印刷电路板81和壳体7的侧壁之间设置的间隙，可以随后通过将合适的材料浇注到壳体7中来形成密封剂5。以这种方式，即使已经在壳体7内部布置了第一印刷电路板81，也可以在第一印刷电路板81和衬底10之间形成密封剂5。
形成在第一端子元件44和第一印刷电路板81之间的压入配合连接部46是非常稳定的机械连接部。也就是说，即使在衬底10的方向上将相当大的力施加在第一印刷电路板81上，第一印刷电路板81也会保持在期望位置处。例如，如果在第一印刷电路板81和第二印刷电路板82之间形成插塞连接部，也同样是这种情况。这在图11中被示意性地示出。在第一印刷电路板81的顶表面上布置第一连接器部件91，并且在第二印刷电路板82的下表面上布置第二连接器部件92，该下表面是面向衬底10的表面。也就是说，第一连接器部件91和第二连接器部件92彼此面对。当在功率半导体模块装置100上布置第二印刷电路板82时，第二连接器部件92插入到第一连接器部件91中并且形成插塞连接部。然而，为了形成该插塞连接部，在衬底10的方向上将特定的力施加在第一印刷电路板81上。也就是说，可能将第一印刷电路板81推向衬底10。为了防止将第一印刷电路板81推向衬底10从而离开期望的位置，例如可以将多个第一端子元件44布置为靠近第一连接器部件91。也就是说，可以将两个或更多个第一端子元件44布置在距第一连接器部件91周围的例如5mm(毫米)或更小的周边内。以这种方式，在受到由于将第二连接器部件92插入第一连接器部件91中而产生力的该区域中，将第一印刷电路板81保持在期望位置处的保持力可以显著地增加。
通常，第一端子元件44在衬底10上的布置并不限于特定的位置。可以将第一端子元件44布置在衬底10的任何合适位置处。也就是说，可以将它们布置为靠近衬底10的边缘或者衬底10中央的任何地方。第一端子元件44的数量可以取决于衬底10与第一印刷电路板81和可能的第二印刷电路板82之间所需的电连接部的数量。然而，也可以选择第一端子元件44的数量，以便提供第一印刷电路板81的足够机械稳定性。在这种情况下，第一端子元件44中的一个或多个可以仅用于将第一印刷电路板81机械地保持在其适当位置处，而无需提供衬底10、第一印刷电路板81和可选的第二印刷电路板82之间的电连接。
在上述的示例中，只有一个印刷电路板(即，第一印刷电路板81)布置在壳体7内部。然而，也可以在壳体7内部布置不止一个印刷电路板。可以在壳体内部沿水平方向彼此相邻地布置两个或更多个印刷电路板，也可以在壳体7内部在不同的水平面上彼此平行地布置两个或更多个印刷电路板。布置在不同水平面上的印刷电路板可以完全重叠或者仅部分地重叠。
可以将本文参照不同附图描述的端子元件彼此组合在单个装置中。也就是说，功率半导体模块装置100可以包括如参照图5至图8描述的第一端子元件44和/或如参照图9和图10描述的第一端子元件44、第二端子元件4、以及可选的如参照图8描述的第三端子元件43。

Claims (14)

1.一种功率半导体模块装置(100)，包括：
壳体(7)；
衬底(10)，其布置在所述壳体(7)内部，并包括电介质绝缘层(11)和布置在所述电介质绝缘层(11)的第一侧上的第一金属化层(111)；
至少一个半导体主体(20)，其安装在所述第一金属化层(111)的背离所述电介质绝缘层(11)的第一表面(101)上；
第一印刷电路板(81)，其布置在所述壳体(7)内部，基本与所述衬底(10)平行且垂直地位于所述衬底(10)上方；以及
多个第一端子元件(44)，其机械连接到所述第一金属化层(111)，其中所述多个第一端子元件(44)中的每一个第一端子元件(44)都从所述第一金属化层(111)沿垂直于所述第一表面(101)的垂直方向(y)朝向所述第一印刷电路板(81)延伸，其中
所述多个第一端子元件(44)中的每一个第一端子元件(44)都包括压入配合销(46)，
所述第一印刷电路板(81)包括多个通孔(810)，
所述多个压入配合销(46)中的每一个压入配合销(46)都布置在一个所述通孔(810)中，并且
所述第一印刷电路板(81)主要通过所述多个第一端子元件(44)和由所述多个压入配合销(46)形成的连接部而保持在相对于所述衬底(10)的期望位置处。
2.根据权利要求1所述的功率半导体模块装置，其中，所述多个压入配合销(46)中的至少一个压入配合销(46)布置在相应的所述第一端子元件(44)的顶端处，其中，所述顶端是所述第一端子元件(44)的背离衬底(10)的端部。
3.根据权利要求1或2所述的功率半导体模块装置，其中，所述多个压入配合销(46)中的至少一个压入配合销(46)布置在相应的所述第一端子元件(44)的中心部分中，其中，所述中心部分布置在相应的所述第一端子元件(44)的顶端和下端之间，所述下端是所述第一端子元件(44)的耦合到所述衬底(10)的端部。
4.根据权利要求3所述的功率半导体模块装置，其中，如果所述压入配合销(46)布置在相应的所述第一端子元件(44)的所述中心部分中，则相应的所述第一端子元件(44)的所述顶端机械地耦合到第二印刷电路板(82)。
5.根据权利要求1至4中的任何一项所述的功率半导体模块装置，其中，所述多个第一端子元件(44)中的至少一个第一端子元件(44)还包括保持器件(48)，所述保持器件(48)被配置为形成用于所述第一印刷电路板(81)的屏障或端部止动件，并防止所述压入配合销(46)被完全推入而穿过相应的所述通孔(810)。
6.根据权利要求5所述的功率半导体模块装置，其中，至少一个所述保持器件(48)中的每一个保持器件(48)包括：
突出部、轴环或边缘，或
从所述第一端子元件(44)朝向所述第一印刷电路板(81)对角延伸的两个或更多个条杆。
7.根据权利要求1至6中的任何一项所述的功率半导体模块装置，还包括至少一个第二端子元件(4)，所述至少一个第二端子元件(4)的下端机械耦合到所述衬底(10)，并且所述至少一个第二端子元件(4)的第一端(41)机械耦合到第二印刷电路板(82)，其中所述至少一个第二端子元件(4)的所述第一端(41)延伸到所述壳体(7)的外部，并且其中，所述第二印刷电路板(82)布置在所述壳体(7)的外部。
8.根据权利要求7所述的功率半导体模块装置，其中，所述至少一个第二端子元件(4)不接触所述第一印刷电路板(81)。
9.根据前述权利要求中的任何一项所述的功率半导体模块装置，还包括：
布置在所述第一印刷电路板(81)的顶表面上的连接器部件(91)，所述顶表面是背离所述衬底(10)的表面，并且所述连接器部件(91)被配置为电连接到所述壳体(7)外部的电路。
10.根据权利要求9所述的功率半导体模块装置，其中，至少两个第一端子元件(44)布置在距所述第一连接器部件(91)5mm或更小的周边内。
11.根据前述权利要求中的任何一项所述的功率半导体模块装置，还包括：在所述多个第一端子元件(44)中的每一个第一端子元件(44)与所述第一金属化层(111)之间的连接层。
12.根据权利要求11所述的功率半导体模块装置，其中，所述连接层包括以下中的至少一种：
焊料层；
导电粘合剂；
烧结金属粉末层；以及
焊缝。
13.根据权利要求1至10中的任何一项所述的功率半导体模块装置，还包括布置在所述衬底(10)上的多个铆接部(49)，其中，所述多个第一端子元件(44)中的每一个第一端子元件(44)的下端都插入到一个所述铆接部(49)中。
14.根据前述权利要求中的任何一项所述的功率半导体模块装置，还包括：
第二印刷电路板(82)，其布置在所述壳体(7)的外部；以及
至少一个第三端子元件(43)，其布置在所述第一印刷电路板(81)上，并从所述第一印刷电路板(81)穿过所述壳体(7)而延伸到所述壳体(7)的外部，其中，在所述壳体(7)的外部，所述第三端子元件(43)机械地且电耦合到所述第二印刷电路板(82)。
CN202210171192.7A 2021-02-25 2022-02-24 功率半导体模块装置 Pending CN114975288A (zh)

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US10123443B2 (en) * 2014-12-25 2018-11-06 Fuji Electric Co., Ltd. Semiconductor device
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