CN114972237B - Wafer detection model construction method and detection method - Google Patents
Wafer detection model construction method and detection method Download PDFInfo
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- CN114972237B CN114972237B CN202210551377.0A CN202210551377A CN114972237B CN 114972237 B CN114972237 B CN 114972237B CN 202210551377 A CN202210551377 A CN 202210551377A CN 114972237 B CN114972237 B CN 114972237B
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- 238000001514 detection method Methods 0.000 title claims abstract description 144
- 238000010276 construction Methods 0.000 title claims abstract description 15
- 238000000034 method Methods 0.000 claims abstract description 28
- 239000011159 matrix material Substances 0.000 claims abstract description 13
- 238000013461 design Methods 0.000 claims abstract description 7
- 238000007689 inspection Methods 0.000 claims description 13
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- 238000012790 confirmation Methods 0.000 claims description 3
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- 235000012431 wafers Nutrition 0.000 description 68
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 238000012545 processing Methods 0.000 description 4
- 229910052710 silicon Inorganic materials 0.000 description 4
- 239000010703 silicon Substances 0.000 description 4
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- 239000004065 semiconductor Substances 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- 235000012239 silicon dioxide Nutrition 0.000 description 2
- 238000007711 solidification Methods 0.000 description 2
- 230000008023 solidification Effects 0.000 description 2
- 238000006467 substitution reaction Methods 0.000 description 2
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T7/00—Image analysis
- G06T7/0002—Inspection of images, e.g. flaw detection
- G06T7/0004—Industrial image inspection
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T7/00—Image analysis
- G06T7/60—Analysis of geometric attributes
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T2207/00—Indexing scheme for image analysis or image enhancement
- G06T2207/30—Subject of image; Context of image processing
- G06T2207/30108—Industrial image inspection
- G06T2207/30148—Semiconductor; IC; Wafer
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Abstract
The invention discloses a wafer detection model construction method and a detection method, wherein the method comprises the steps of creating a detection model and interacting with an equipment end, wherein the detection model comprises an xml detection model and an exposure area characteristic point model, the xml detection model comprises a wafer name, a wafer size, an exposure area size, an effective exposure area size, a relative position relation between a wafer center and an exposure area, a characteristic point size, a chip array, a dicing channel size and an edge invalid area width, and the exposure area characteristic point model comprises a plurality of exposure area characteristic point matrix information; the equipment end is internally provided with a detection execution unit, and the detection execution unit comprises a light source automatic setting module, an alignment execution module and a Golden image module. According to the invention, design data editing can be realized by means of wafer detection model construction, the detection scheme establishment requirement can be met without entity mapping, meanwhile, the detection model is easy to realize interaction with the equipment end, and the high-efficiency high-precision switching alignment requirement is met. The detection modeling time is shortened, and the equipment utilization rate is improved.
Description
Technical Field
The invention relates to a wafer detection model construction method and a detection method, and belongs to the technical field of wafer chip visual detection modeling.
Background
A wafer refers to a silicon wafer used for manufacturing a silicon semiconductor integrated circuit, and is called a wafer because the wafer is circular in shape; various circuit element structures can be fabricated on a silicon wafer to form an IC product with specific electrical functions. The starting material for the wafer is silicon, while the crust surface is useful with inexhaustible silicon dioxide. The silicon dioxide ore is refined by an electric arc furnace, chloridized by hydrochloric acid and distilled to prepare high-purity polysilicon.
In semiconductor manufacturing, wafers are layered in tens to hundreds of layers, each of which is subjected to photolithography, etching, polishing, and the like. In order to ensure that each process is normal, appearance detection needs to be performed after the process, and the surface morphology of the product changes after each process, which means that for one product, appearance detection equipment needs to perform detection by a plurality of detection schemes. As the process becomes more complex, there may be hundreds of inspection schemes for the appearance of a wafer product, each of which varies somewhat.
At present, when detecting a wafer product after each procedure, an appearance detection scheme matched with the wafer after the procedure is formed is required to be established, so that modeling data cannot be obtained after the processing is finished, meanwhile, a large number of detection items and detection parameter solidification modeling are covered in the appearance detection scheme, and when the current appearance detection scheme is established, a large amount of manpower and detection machine debugging time are occupied, and the detection efficiency of the wafer is affected.
Disclosure of Invention
The invention aims to solve the defects of the prior art, and provides a wafer detection model construction method and a detection method aiming at the problems of relatively stiff solidification, utilization rate intersection and the like in the traditional detection scheme.
In order to achieve the above purpose, the technical scheme adopted by the invention is as follows:
the wafer detection model construction method comprises the following steps:
creating a detection model, wherein the detection model comprises an xml detection model and an exposure region characteristic point model,
The xml detection model comprises a wafer name, a wafer size, an exposure area size, an effective exposure area size, a relative position relation between a wafer center and an exposure area, a characteristic point size, a chip array, a dicing channel size and an edge invalid area width,
The exposure area characteristic point model comprises a plurality of exposure area characteristic point matrix information;
The method comprises the steps of interacting equipment ends, arranging a detection execution unit used for importing the detection model in the equipment ends, wherein a light source automatic setting module used for being matched with the xml detection model, an alignment execution module used for performing alignment switching according to the relative position relation between the center of a wafer and an exposure area and the exposure area characteristic point matrix information, and a Golden image module used for generating a contrast Golden image through initial image acquisition are arranged in the detection execution unit.
Preferably, the alignment execution module includes an automatic edge-finding centering module for collecting wafer dicing margin around wafer swing and positioning wafer center.
Preferably, a switching position adjusting module for switching the core in the current exposure area according to the chip array is arranged in the detection executing unit.
Preferably, the xml detection model includes wafer process layer data, and the light source automatic setting module performs automatic light source intensity adjustment according to the wafer process layer data and the exposure area size.
Preferably, a detection and judgment module for detecting and judging the current wafer collected data according to the xml detection model is arranged in the detection execution unit.
Preferably, the detection model is an online edited or offline edited data packet.
The invention also provides a wafer detection method, which comprises the following steps:
S1, setting a detection model, and editing an xml detection model and an exposure region characteristic point model according to design parameters of a wafer to be detected;
s2, the equipment end responds, and a detection execution unit of the equipment end receives the edited xml detection model and the exposure area characteristic point model and generates a corresponding action execution path;
S3, detecting operation, namely performing detection operation according to the generated action execution path, performing wafer center fixed point, performing current exposure area position confirmation according to the wafer center and the relative position relation between the wafer center and the exposure area, and performing accurate positioning and switching alignment of the current exposure area according to the exposure area characteristic point matrix information;
S4, chip image acquisition, namely, carrying out image acquisition on a plurality of chips in an exposure area according to a chip array;
S5, generating a comparison Golden image, and generating a comparison Golden image by compounding a plurality of acquired chip images;
and S6, detecting the chip, repeating the steps S3-S4, and comparing and analyzing the acquired chip image with the comparison Golden image.
Preferably, the alignment execution module includes an automatic edge-finding centering module for swinging around the wafer to collect the cutting margin of the wafer and position the center of the wafer, and in step S2, the center of the wafer is fixed by the automatic edge-finding centering module.
Preferably, the detection execution unit is internally provided with a detection judgment module for detecting and judging the current wafer acquisition data according to the xml detection model,
In the step S2, when the automatic edge-finding centering module swings to collect the wafer cutting margin, the wafer size collection, the exposure area size collection, the feature point size collection and the dicing street size collection are performed, and the collected information is compared with the xml detection model through the detection and judgment module.
The beneficial effects of the invention are mainly as follows:
1. design data editing can be realized through a wafer detection model construction mode, the detection scheme establishment requirement can be met without physical wafer molding mapping, meanwhile, the detection model is easy to realize interaction with an equipment end, and the high-efficiency high-precision switching alignment requirement is met.
2. The detection modeling time is shortened, the equipment utilization rate is improved, and the detection period is effectively shortened.
3. The detection model is ingenious in construction, so that the detection operation is efficient and smooth, and the method has high economic value.
Drawings
Other features, objects and advantages of the present application will become more apparent upon reading of the detailed description of non-limiting embodiments, made with reference to the accompanying drawings in which:
FIG. 1 is a flow chart of a wafer inspection method according to the present invention.
FIG. 2 is a tabular diagram of an xml detection model in the present invention.
FIG. 3 is a schematic diagram of the interactive positioning operation of the device side in the present invention.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present invention more apparent, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is apparent that the described embodiments are some embodiments of the present invention, but not all embodiments of the present invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
The application is described in further detail below with reference to the drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the application and are not limiting of the application. It should be noted that, for convenience of description, only the portions related to the present application are shown in the drawings. It should be noted that, without conflict, the embodiments of the present application and features of the embodiments may be combined with each other.
The invention provides a wafer detection model construction method, which comprises the following steps:
Creating a detection model, wherein the detection model comprises an xml detection model and an exposure region characteristic point model, the xml detection model is shown in fig. 2, the xml detection model comprises a wafer name (Product ID), a wafer Size (WAFER DIAMETER), an exposure region Size (Shot Size), an effective exposure region Size (Step Size), a relative position relation (Offset) between a wafer center and an exposure region, a characteristic point Size (Locking Corner Size), a Chip Array (chip_array), a dicing street Size (dicing Width), and an edge ineffective region Width (EBR Size), and the exposure region characteristic point model comprises a plurality of exposure region characteristic point matrix information.
Specifically, the conventional appearance detection scheme is in a formula form, that is, a fixed formula file is adopted, a fixed attribute value exists in the file, the fixed attribute value is a data value obtained by collecting an image after forming a wafer, the appearance detection scheme cannot be established under the condition that no wafer is formed, in addition, in the conventional detection scheme, basically, dimensional data and specific reference systems such as a related coordinate system relation and characteristic points are not available, when the image detection data collection is carried out on the appearance detection equipment at the rear end Camtek, an alignment program is required to be additionally arranged, generally, the mode of image analysis and positioning point capture is adopted, the degree of correlation between the mode and the appearance detection scheme is small, and the problems of low efficiency, easiness in deviation of relative position degree and the like exist when the detection scheme is aligned with the detection scheme.
In this case, first, an xml detection model and an exposure region feature point model are established, where the xml detection model includes a wafer name (Product ID), a wafer Size (WAFER DIAMETER), an exposure region Size (Shot Size), an effective exposure region Size (Step Size), a relative positional relationship (Offset) between a wafer center and an exposure region, a feature point Size (Locking Corner Size), a Chip Array (chip_array), a dicing street Size (Scribe Width), and an edge dead region Width (EBR Size).
The attribute items in the xml detection model are editable attribute items aiming at wafers, the editing of the xml detection model can be realized through wafer design attributes, the attribute item editing can be satisfied without waiting for a wafer finished product, and in addition, the related attribute items of the relative position relation (Offset) between the wafer center and an exposure area and the related attribute items of a Chip Array (chip_array) exist, so that the positioning and switching bit execution requirement of an equipment end is satisfied.
The exposure area characteristic point model is a matrix distribution system aiming at characteristic points, after the exposure area position is locked, one characteristic point can be accurately aligned, and then the position of other exposure areas is switched through the matrix distribution system, so that the switching position is efficient and accurate.
The detection model is in interactive fit with the equipment end, a detection execution unit for importing the detection model is arranged in the equipment end, and a light source automatic setting module for matching with the xml detection model, an alignment execution module for performing alignment switching according to the relative position relation between the center of the wafer and the exposure area characteristic point matrix information and a Golden image module for generating a contrast Golden image by initial image acquisition are arranged in the detection execution unit.
Specifically, the corresponding cooperation execution operation of the current xml detection model and the exposure region characteristic point model can be realized through the detection execution unit, the light source is automatically set according to the xml detection model, the light source intensity is generally manually adjusted in the traditional mode, and the wafer formed in different procedures has an adaptive light source.
And the alignment execution module is used for performing exposure area switching alignment according to the relative position relation between the wafer center and the exposure area characteristic point matrix information, so that the high-efficiency and accurate positioning requirement is met.
The method is characterized in that the equipment end is prepared and controlled in advance, when the chip is detected, the detection of the current finished chip is directly carried out, the chip in the exposure area is subjected to image acquisition after the alignment is switched, and the acquired image data is used as a comparison Golden image. It should be noted that, in general, a plurality of chip image data may be collected to perform corresponding synthesis, so as to satisfy the reference accuracy of the comparison Golden image.
In one embodiment, the alignment execution module includes an auto-edge-seeking centering module for swinging around the wafer to collect wafer dicing margin and to locate the wafer center.
Specifically, in general, the center alignment of the wafer is performed by automatic center pointing according to the carrying position of the carrier, and the wafer has a cutting margin tolerance, so that the center pointing has an error.
In a specific embodiment, a switching position adjusting module for performing switching alignment with the chip in the current exposure area according to the chip array is arranged in the detection executing unit.
The technology is in the prior art, namely after the exposure area is determined, automatic chip position degree alignment switching can be realized according to chip array information, and the accurate alignment image acquisition requirement of a single chip is met.
In one embodiment, the xml detection model includes wafer process layer data, and the automatic light source setting module performs automatic light source intensity adjustment according to the wafer process layer data and the exposure region size.
Specifically, the wafer has multiple procedures, namely different processing layers exist, and the size of the exposure area of each processing layer and each processing layer can influence the suitability of the detection light source, so that more intelligent light source intensity adjustment can be realized according to the wafer procedure layer data and the size of the exposure area, the detection illumination reliability is met, the manual adjustment cost is reduced, and the equipment debugging period is shortened.
In a specific embodiment, a detection and judgment module for detecting and judging the current wafer collected data by the xml detection model is arranged in the detection execution unit.
Specifically, wafer inspection generally includes wafer surface inspection and chip surface inspection on the wafer surface, so the xml inspection model in the present application performs high-precision data reference, and when inspection is performed, the wafer surface inspection requirement can be satisfied by performing a certain range of comparison according to the set data of the xml inspection model.
In a specific embodiment, the detection model is a data packet edited online or offline, so that more flexible editing operation can be realized, and interaction between the data packet and data propagation of the equipment end can be realized.
The wafer inspection method of the present invention is illustrated in detail, as shown in fig. 1, and includes the following steps:
setting a detection model, and editing an xml detection model and an exposure region characteristic point model according to design parameters of a wafer to be detected.
The equipment end responds, and a detection execution unit of the equipment end receives the edited xml detection model and the exposure area characteristic point model and generates a corresponding action execution path.
The detection operation is performed, as shown in fig. 3, by performing the detection operation according to the generated action execution path, performing the wafer center fixed point, performing the current exposure region position confirmation according to the wafer center and the relative position relation between the wafer center and the exposure region, and then performing the accurate positioning and the switching alignment of the current exposure region according to the exposure region feature point matrix information.
And (3) chip image acquisition, namely carrying out respective image acquisition of a plurality of chips in an exposure area according to the chip array.
And generating a comparison Golden image by compositing a plurality of acquired chip images.
And (3) chip detection, namely comparing and analyzing the acquired chip image with the comparison Golden image.
In the equipment end response step, the wafer center is fixed by the automatic edge finding centering module.
In a specific embodiment, the automatic edge-finding centering module performs wafer size collection, exposure area size collection, feature point size collection and dicing channel size collection when performing swing collection on the wafer dicing margin, and compares collected information with an xml detection model through the detection judging module, so that the wafer surface detection requirement is met.
Through the description, design data editing can be realized through the mode of wafer detection model construction, the detection scheme establishment requirement can be met without physical wafer molding mapping, meanwhile, the detection model is easy to realize interaction with the equipment end, and the high-efficiency high-precision switching alignment requirement is met. The detection modeling time is shortened, the equipment utilization rate is improved, and the detection period is effectively shortened. The detection model is ingenious in construction, so that the detection operation is efficient and smooth, and the method has high economic value.
The terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus/apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus/apparatus.
Thus far, the technical solution of the present invention has been described in connection with the preferred embodiments shown in the drawings, but it is easily understood by those skilled in the art that the scope of protection of the present invention is not limited to these specific embodiments. Equivalent modifications and substitutions for related technical features may be made by those skilled in the art without departing from the principles of the present invention, and such modifications and substitutions will fall within the scope of the present invention.
Claims (3)
1. The wafer detection model construction method is characterized by comprising the following steps:
creating a detection model, wherein the detection model comprises an xml detection model and an exposure region characteristic point model,
The xml detection model comprises a wafer name, a wafer size, an exposure area size, an effective exposure area size, a relative position relation between a wafer center and an exposure area, a characteristic point size, a chip array, a dicing channel size and an edge invalid area width,
The exposure area characteristic point model comprises a plurality of exposure area characteristic point matrix information;
The method comprises the steps of interacting equipment ends, arranging a detection execution unit used for importing the detection model in the equipment ends, wherein a light source automatic setting module used for being matched with the xml detection model, an alignment execution module used for performing alignment switching according to the relative position relation between the center of a wafer and an exposure area and the characteristic point matrix information of the exposure area, and a Golden image module used for generating a contrast Golden image through initial image acquisition are arranged in the detection execution unit;
The xml detection model comprises wafer process layer data, and the light source automatic setting module carries out automatic light source intensity adjustment according to the wafer process layer data and the exposure area size;
The detection execution unit is internally provided with a detection judgment module for detecting and judging the current wafer acquisition data according to the xml detection model;
The alignment execution module comprises an automatic edge-finding alignment module for swinging around a wafer to collect the cutting margin of the wafer and positioning the center of the wafer;
and a switching position adjusting module used for switching the chip in the current exposure area according to the chip array is arranged in the detection executing unit.
2. The wafer inspection model construction method according to claim 1, wherein:
The detection model is a data packet edited online or offline.
3. The wafer inspection method based on the wafer inspection model construction method according to claim 1 or 2, characterized by comprising the steps of:
S1, setting a detection model, and editing an xml detection model and an exposure region characteristic point model according to design parameters of a wafer to be detected;
s2, the equipment end responds, and a detection execution unit of the equipment end receives the edited xml detection model and the exposure area characteristic point model and generates a corresponding action execution path;
S3, detecting operation, namely performing detection operation according to the generated action execution path, performing wafer center fixed point, performing current exposure area position confirmation according to the wafer center and the relative position relation between the wafer center and the exposure area, and performing accurate positioning and switching alignment of the current exposure area according to the exposure area characteristic point matrix information;
S4, chip image acquisition, namely, carrying out image acquisition on a plurality of chips in an exposure area according to a chip array;
S5, generating a comparison Golden image, and generating a comparison Golden image by compounding a plurality of acquired chip images;
S6, detecting a chip, repeating the steps S3-S4, and comparing and analyzing the acquired chip image with a comparison Golden image;
The alignment execution module comprises an automatic edge-searching alignment module for swinging around the wafer to collect the cutting margin of the wafer and positioning the center of the wafer, and in the step S2, the automatic edge-searching alignment module is used for fixing the center of the wafer;
The detection execution unit is internally provided with a detection judgment module for detecting and judging the current wafer acquisition data according to the xml detection model,
In the step S2, when the automatic edge-finding centering module swings to collect the wafer cutting margin, the wafer size collection, the exposure area size collection, the feature point size collection and the dicing street size collection are performed, and the collected information is compared with the xml detection model through the detection and judgment module.
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| CN103034062A (en) * | 2011-09-29 | 2013-04-10 | 中芯国际集成电路制造(北京)有限公司 | Method for edge exposure of wafer, optical modules and automatic focusing systems |
| CN110429047A (en) * | 2019-06-28 | 2019-11-08 | 福建省福联集成电路有限公司 | A kind of gallium arsenide integrated circuit manufacture yellow light area automated system and device |
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| US4669867A (en) * | 1984-02-20 | 1987-06-02 | Canon Kabushiki Kaisha | Alignment and exposure apparatus |
| JPH0563052A (en) * | 1991-08-30 | 1993-03-12 | Canon Inc | Device and method for manufacture of semiconductor |
| CN1862385B (en) * | 2005-04-15 | 2011-08-24 | 三星电子株式会社 | System and method for detecting focus change in photolithographic process using test characteristic |
| TWI338819B (en) * | 2006-06-23 | 2011-03-11 | Ind Tech Res Inst | Recticle pattern applied to mix-and-match lithography process and alignment method of thereof |
| CN107561864B (en) * | 2016-06-30 | 2019-10-25 | 上海微电子装备（集团）股份有限公司 | Edge exposure device and method |
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| CN103034062A (en) * | 2011-09-29 | 2013-04-10 | 中芯国际集成电路制造(北京)有限公司 | Method for edge exposure of wafer, optical modules and automatic focusing systems |
| CN110429047A (en) * | 2019-06-28 | 2019-11-08 | 福建省福联集成电路有限公司 | A kind of gallium arsenide integrated circuit manufacture yellow light area automated system and device |
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