CN114959898B - Preparation method of silicon carbide epitaxial wafer for high-voltage and ultrahigh-voltage device - Google Patents
Preparation method of silicon carbide epitaxial wafer for high-voltage and ultrahigh-voltage device Download PDFInfo
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- C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
- C30B25/02—Epitaxial-layer growth
- C30B25/18—Epitaxial-layer growth characterised by the substrate
- C30B25/183—Epitaxial-layer growth characterised by the substrate being provided with a buffer layer, e.g. a lattice matching layer
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- C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
- C30B25/02—Epitaxial-layer growth
- C30B25/18—Epitaxial-layer growth characterised by the substrate
- C30B25/186—Epitaxial-layer growth characterised by the substrate being specially pre-treated by, e.g. chemical or physical means
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- C30B33/00—After-treatment of single crystals or homogeneous polycrystalline material with defined structure
- C30B33/02—Heat treatment
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
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- H01L21/02524—Group 14 semiconducting materials
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- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
Abstract
The invention provides a preparation method of a silicon carbide epitaxial wafer for a high-voltage ultrahigh-voltage device, which comprises the following steps: a carbon film is coated on the carbon surface of a silicon carbide substrate, the carbon film is placed in an epitaxial furnace reaction chamber, hydrogen is introduced, the temperature is gradually increased to 1600-1650 ℃, a silicon source, a carbon source and a doping source are introduced, a buffer layer is grown on the silicon surface of the silicon carbide substrate, the flow values of various sources are regulated, the epitaxial layer is grown to a specified thickness, annealing is carried out, the temperature is reduced to the room temperature, and after the wafer is protected, the carbon film is polished, so that the silicon carbide epitaxial wafer is obtained. According to the invention, on the basis of the existing commercial epitaxial furnace, the carbon film is coated on the substrate, carbon vacancies of the epitaxial layer are supplemented through carbon atom migration of the carbon film in the epitaxy and annealing processes, so that the carbon vacancy repair is realized, in addition, the annealing process parameters can be regulated, the density of the carbon vacancies is improved, the service life of carriers is prolonged, and compared with the traditional carrier service life enhancement technology, complex injection and annealing or long-time high-temperature oxidation are not required.
Description
Technical Field
The invention belongs to a silicon carbide epitaxial growth method, and particularly relates to a preparation method of a silicon carbide epitaxial wafer for a high-voltage ultrahigh-voltage device.
Background
The third-generation semiconductor silicon carbide material has the advantages of high heat conductivity, high breakdown field strength, high saturated electron drift rate and the like, can meet the new requirements of the modern electronic technology on severe conditions such as high temperature, high power, high voltage, high frequency, radiation resistance and the like, and is also a strategic direction of the semiconductor technology in China in the future. With the continuous popularization and development of the third-generation semiconductor materials, the semiconductor material plays a key role in industries such as power electronics, aerospace, new energy, smart power grids, electric automobiles and the like.
The light is absorbed by the surface of the semiconductor. Photon absorption produces one majority carrier and one minority carrier at a time, known as an unbalanced carrier. In many semiconductor materials, the number of photogenerated unbalanced carriers is much less than the majority carriers generated by doping that are inherently present in the material. Thus, the number of majority carriers in the semiconductor is substantially unchanged when illuminated, while minority carriers are significantly increased.
The average time from generation to recombination of the unbalanced carriers is called the unbalanced carrier lifetime (minority carrier lifetime), denoted by τ. It reflects the decay rate of minority carrier concentration. The influence of the unbalanced minority carrier is dominant with respect to the unbalanced minority carrier, so the lifetime of the unbalanced carrier is often referred to as minority carrier lifetime, simply minority carrier lifetime
Minority carrier lifetime is an important parameter of semiconductor materials and semiconductor devices, directly reflecting whether the quality of the materials and the characteristics of the devices meet the requirements. In addition, minority carrier lifetime is also a key factor affecting characteristics of high-voltage bipolar power devices such as SiC IGBTs, and for bipolar semiconductor devices that mainly rely on minority carrier transport (diffusion is the main) to operate, in order to ensure that minority carriers are combined as little as possible (to obtain a large current amplification factor) in the base region, the longer the minority carrier lifetime of the base region is required to be. While for IGBT switching devices the direct effect of minority carrier lifetime reduction is to reduce the conductance modulation effect. Therefore, the service life of minority carriers is improved, and the method is an important requirement for manufacturing high-voltage ultrahigh devices and has important significance for the development of semiconductor devices.
In order to reduce the on-loss when manufacturing a high-voltage ultrahigh device, it is necessary to generate conductivity modulation by injecting minority carriers by extending the carrier lifetime of the drift layer, thereby reducing the on-voltage. Therefore, in order to extend the carrier lifetime of the drift layer, it is necessary to reduce crystal defects existing in the epitaxial film, which cause the lifetime to be shortened. For example, as existing in an n-type SiC epitaxial film, so-called Z 1/2 Center and EH 6/7 The central point defect is a major crystal defect that leads to a reduction in carrier lifetime. These Z's are known from the literature (N.T.son, et al, phys.Rev.Lett.109 (2012) 187603) 1/2 Center and EH 6/7 The center is a crystal defect caused by a carbon (C) vacancy in the SiC epitaxial film. Therefore, in order to reduce crystal defects in the SiC epitaxial film, it is necessary to form the SiC epitaxial film with few carbon vacancies. As a method for reducing the carbon vacancies in the SiC epitaxial film, a method is proposed in which after the SiC epitaxial film is formed by a chemical vapor deposition method, carbon ion implantation and high-temperature annealing heat treatment or long-time high-temperature sacrificial oxidation are further performed.
The high-temperature annealing method after carbon implantation is easy to introduce new defects in the high-energy carbon ion implantation process; the damaged layer on the surface of the epitaxial layer can not be repaired after long-time annealing when the damage is serious, so that the use effect of the device is affected, and the effect is not ideal for thick-layer silicon carbide epitaxy due to the limitation of carbon implantation depth.
Disclosure of Invention
In view of the above, the invention aims to provide a preparation method of a silicon carbide epitaxial wafer for a high-voltage and ultrahigh-voltage device, which realizes effective restoration of carbon vacancies in the in-situ growth process, thereby achieving the purpose of prolonging the service life of carriers of a silicon carbide epitaxial layer.
The invention provides a preparation method of a silicon carbide epitaxial wafer for a high-voltage and ultrahigh-voltage device, which comprises the following steps of:
a carbon film is coated on the carbon surface of a silicon carbide substrate, the carbon film is placed in an epitaxial furnace reaction chamber, hydrogen is introduced, after the temperature is gradually increased to 1600-1650 ℃, a silicon source, a carbon source and a doping source are introduced, a buffer layer is grown on the silicon surface of the silicon carbide substrate, the flow values of various sources are regulated, the epitaxial layer is grown to a specified thickness, annealing is carried out, the temperature is reduced to the room temperature, the silicon surface blue film protection is carried out on a wafer, and the carbon film is polished, so that the silicon carbide epitaxial wafer for the high-voltage ultrahigh-voltage device is obtained.
In the present invention, the silicon carbide substrate is selected from silicon carbide having a silicon face biased toward the <11-20> direction by 1 DEG to 8 deg.
In the present invention, the thickness of the carbon film is 50 μm to 500 μm.
In the invention, the flow rate of the hydrogen is 80-120L/min, and the pressure of the introduced hydrogen into the reaction chamber is 80-200 mbar.
After the reaction chamber reaches the set temperature of 1600-1650 ℃, opening the air inlet valves of the precursor silicon source, the carbon source and the doping source, introducing various sources into an exhaust air path, setting the flow of the various sources through mass flow, enabling the flow to meet the flow requirement required by the growth of the buffer layer, keeping other parameters unchanged, and carrying out in-situ hydrogen etching treatment on the silicon carbide substrate for 5-15 minutes.
In the invention, before the silicon source, the carbon source and the doping source are introduced, the silicon carbide substrate is subjected to in-situ hydrogen etching treatment for 5-15 min.
In the present invention, the rate of growth of the buffer layer is 10 μm/hr; when the buffer layer grows, C/Si is more than or equal to 0.8 and less than or equal to 1.4;
the thickness of the buffer layer is 0.5-10 micrometers, and the doping concentration is 1-5 multiplied by 10 18 cm -3 。
In the present invention, the epitaxial layer is grown at a rate of greater than 80 microns/hour. The flow values of various sources are regulated before the epitaxial layer is grown, and the flow values are specifically as follows: and transferring the silicon source, the carbon source and the doping source to an external gas discharge path, keeping the pressure, the growth temperature and the hydrogen flow of the reaction chamber unchanged, and gradually changing the flow of various sources to the flow value required by rapid growth within 30 seconds.
In the present invention, the epitaxial layer may require a drift layer of 70-100 microns in thickness for 6500V and 10KV high voltage devices.
In the present invention, the carbon film is produced by vapor deposition;
or coating photoresist and oven drying.
In the present invention, the silicon source is selected from silane, dichlorosilane or trichlorosilane;
the carbon source is selected from methane, ethylene or propane.
In the present invention, the doping source is selected from N 2 And/or TMA (trimethylaluminum).
In the invention, after an epitaxial layer grows to a specified thickness, a silicon source, a carbon source and a doping source are transferred to an exhaust gas path, the pressure, the growth temperature and the hydrogen flow of a reaction chamber are kept unchanged, annealing is carried out until the temperature reaches 900 ℃, the whole epitaxial wafer is placed on a slide, argon is introduced, and the temperature is reduced to the room temperature.
In the invention, the annealing process is specifically as follows: preserving heat for 10-30 minutes at 1400-1600 ℃. The time of the annealing process can be prolonged according to the experimental effect, so that a better carbon vacancy repairing effect is obtained. In the invention, the temperature of the reaction cavity is slowly reduced until the temperature reaches 900 ℃, the wafer is taken out after the temperature is reduced to the room temperature, the front surface of the epitaxial layer is covered with a film for protection, the carbon film on the back surface of the epitaxial wafer is polished, and the carbon film is polished.
The invention provides a preparation method of a silicon carbide epitaxial wafer for a high-voltage and ultrahigh-voltage device, which comprises the following steps of: a carbon film is coated on the carbon surface of a silicon carbide substrate, the silicon carbide substrate is placed in a reaction chamber of an existing commercial epitaxial furnace, hydrogen is introduced, after the temperature is gradually raised to 1600-1650 ℃, a silicon source, a carbon source and a doping source are introduced, a buffer layer is grown on the silicon surface of the silicon carbide substrate, the flow values of various sources are regulated, the epitaxial layer is grown to a specified thickness, annealing is carried out, the temperature is reduced to room temperature, the silicon surface blue film protection is carried out on a wafer, and the carbon film on the back surface of the epitaxial wafer is polished, so that the silicon carbide epitaxial wafer for the required high-voltage ultrahigh-voltage device can be obtained.
The invention is based on the existing commercial epitaxial furnace, through the method of coating the carbon film on the substrate, through the migration of carbon atoms of the carbon film in the epitaxial and annealing processes, the carbon vacancy of the epitaxial layer is supplemented, thereby realizing the purpose of repairing the carbon vacancy, in addition, the annealing process parameters can be regulated to improve the density of the carbon vacancy and increase the service life of the carrier.
Drawings
FIG. 1 is a schematic diagram of the fabrication of a high minority carrier lifetime silicon carbide epitaxial wafer for a high voltage ultra high voltage device;
fig. 2 is a schematic diagram of a coated carbon film before manufacturing a silicon carbide epitaxial wafer with a high minority carrier lifetime for a high-voltage ultrahigh-voltage device according to an embodiment of the invention.
Detailed Description
In order to further illustrate the present invention, the following examples are provided to describe in detail a method for preparing silicon carbide epitaxial wafers for high voltage and ultra high voltage devices according to the present invention, but they should not be construed as limiting the scope of the present invention.
Example 1
(1) Selecting a silicon carbide substrate with the deflection of 4 degrees in the direction of <11-20> and uniformly growing a carbon film on the carbon surface of the silicon carbide substrate.
The carbon film is prepared by carbonizing photoresist;
(2) Placing the processed silicon carbide substrate in a graphite base, conveying the silicon carbide substrate into a reaction cavity by using a mechanical arm, introducing hydrogen into the reaction chamber, gradually increasing the flow rate of the hydrogen to 80-120L/min, setting the pressure of the reaction chamber to be 80-200 mbar, and gradually heating the reaction chamber to 1600-1650 ℃;
(3) After the set temperature is reached, opening an air inlet valve of a precursor silicon source, a carbon source and a doping source, introducing various sources into an exhaust air path, setting the flow of the various sources through mass flow, enabling the flow to meet the flow requirement required by the growth of the buffer layer in the step (4), keeping other parameters unchanged, and carrying out in-situ hydrogen etching treatment on the silicon carbide substrate for 5-15 minutes;
(4) Controlling the flow ratio of the silicon source and the hydrogen, controlling the flow of the carbon source to be less than or equal to 0.8 and the molar ratio of C/Si to be less than or equal to 1.4, introducing the silicon source, the carbon source and the doping source with set flow into the reaction chamber, and growing at the growth thickness of 0.5-10 microns and the doping concentration of 1-5 multiplied by 10 at the rate of less than 10 microns/hour 18 cm -3 A high doping concentration buffer layer of (a);
(5) Transferring the silicon source, the carbon source and the doping source to an external gas discharge path, keeping the pressure, the growth temperature and the hydrogen flow of the reaction chamber unchanged, and gradually changing the flow of each source to a flow value required by rapid growth within 30 seconds;
(6) Controlling the flow ratio of a silicon source and hydrogen, C/Si, introducing the silicon source, the carbon source and the doping source with set flow into a reaction chamber, growing an epitaxial layer according to the epitaxial thickness required by the voltage class of a high-voltage ultrahigh-voltage device at a rate of more than 80 microns/hour, for example, a drift layer with the thickness of 70-100 microns required by 6500V and 10KV high-voltage devices, and adjusting the flow of the doping source to ensure that the doping concentration of the drift layer meets the design doping concentration of the device;
(7) After the drift layer with the specified thickness grows, transferring a silicon source, a carbon source and a doping source to an exhaust gas path, keeping the pressure, the growth temperature and the hydrogen flow of a reaction chamber unchanged, slowly reducing the temperature of the reaction chamber until the temperature reaches 900 ℃, placing an epitaxial wafer to a slide, introducing argon, cooling to room temperature, and taking out the wafer;
(8) And (3) sticking a film on the front surface of the epitaxial wafer for protection, polishing the carbon surface, and grinding the coated carbon film.
The method can reduce Z which is caused by carbon vacancies originating in the silicon carbide single crystal epitaxial film and becomes a cause of shortened lifetime 1/2 Center and EH 6/7 And a center, thereby extending the carrier lifetime of the silicon carbide single crystal film.
As can be seen from the above embodiments, the method provided by the present invention adopts a method for manufacturing a silicon carbide epitaxial wafer with a high minority carrier lifetime for a high-voltage and ultra-high-voltage device, and mainly adopts a method that a carbon film is uniformly coated on a carbon surface before epitaxy; and then epitaxially growing an epitaxial layer required by the high-voltage ultrahigh-voltage device, and finally carrying out high-temperature annealing treatment on the obtained epitaxial wafer, wherein the purpose of eliminating carbon vacancies is achieved by utilizing the migration of carbon atoms under the thermodynamic equilibrium condition between the carbon film and the silicon carbide substrate and between the carbon film and the epitaxial layer in the epitaxial process and the annealing process, and the purpose of effectively repairing the carbon vacancies in the in-situ growth process is achieved, so that the purpose of prolonging the carrier life of the silicon carbide epitaxial layer is achieved. The epitaxial material grown by the epitaxial method provided by the invention does not need to utilize ion implantation or high-temperature oxidation post-treatment after the epitaxy is finished, the purpose of repairing the carbon vacancies can be realized in the existing commercial epitaxial furnace in the epitaxial reaction process, and the annealing process parameters can be regulated according to the carrier service life or the carbon vacancy density, so that the purpose of improving the manufacture of the epitaxial wafer with the high minority carrier service life for the high-voltage ultrahigh-voltage device is realized.
The foregoing is merely a preferred embodiment of the present invention and it should be noted that modifications and adaptations to those skilled in the art may be made without departing from the principles of the present invention, which are intended to be comprehended within the scope of the present invention.
Claims (6)
1. The preparation method of the silicon carbide epitaxial wafer for the high-voltage ultrahigh-voltage device comprises the following steps of:
a carbon film is coated on the carbon surface of a silicon carbide substrate, the silicon carbide substrate is placed in an epitaxial furnace reaction chamber, hydrogen is introduced, after the temperature is gradually increased to 1600-1650 ℃, a silicon source, a carbon source and a doping source are introduced, and in-situ hydrogen etching treatment is carried out on the silicon carbide substrate for 5-15 min; growing a buffer layer on the silicon surface of a silicon carbide substrate, adjusting the flow values of various sources, growing an epitaxial layer to a specified thickness, annealing, cooling to room temperature, performing silicon surface blue film protection on a wafer, and polishing a carbon film to obtain a silicon carbide epitaxial wafer for a high-voltage ultrahigh-voltage device;
the silicon carbide substrate is selected from silicon carbide with a silicon face biased towards the <11-20> direction by 1 DEG to 8 DEG;
the flow rate of the hydrogen is 80-120L/min, and the pressure of the introduced hydrogen into the reaction chamber is 80-200 mbar;
the rate of growth of the buffer layer was 10 microns/hour; the thickness of the buffer layer is 0.5-10 micrometers, and the doping concentration is 1-5 multiplied by 10 18 cm -3 。
2. The method of claim 1, wherein the epitaxial layer is grown at a rate greater than 80 microns/hour.
3. The method according to claim 1, wherein the carbon film is produced by sputtering or vapor deposition;
or coating photoresist and oven drying.
4. The method of claim 1, wherein the silicon source is selected from silane, dichlorosilane, or trichlorosilane;
the carbon source is selected from methane, ethylene or propane.
5. The method of claim 1, wherein after growing the epitaxial layer to a specified thickness, transferring the silicon source, the carbon source and the doping source to an exhaust gas path, maintaining the pressure of the reaction chamber, the growth temperature and the hydrogen flow, annealing until 900 ℃, placing the whole epitaxial wafer on a slide, introducing argon, and cooling to room temperature.
6. The method according to claim 1, wherein the annealing process is specifically: preserving heat for 10-30 minutes at 1400-1600 ℃.
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| US10541306B2 (en) * | 2012-09-12 | 2020-01-21 | Cree, Inc. | Using a carbon vacancy reduction material to increase average carrier lifetime in a silicon carbide semiconductor device |
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