CN114959650B

CN114959650B - Semiconductor device

Info

Publication number: CN114959650B
Application number: CN202210551680.0A
Authority: CN
Inventors: 周仁; 杨德赞; 吴飚; 荒见淳一
Original assignee: Jiangsu Leadmicro Nano Technology Co Ltd
Current assignee: Jiangsu Leadmicro Nano Technology Co Ltd
Priority date: 2022-05-18
Filing date: 2022-05-18
Publication date: 2023-10-20
Anticipated expiration: 2042-05-18
Also published as: CN114959650A; WO2023221738A1

Abstract

The present disclosure relates to a semiconductor device. In various embodiments, a semiconductor device includes: a first base having a front surface and a back surface and comprising a first main intake passage, a second main intake passage, a first bypass passage, and a first through hole; a second base connected to the back surface of the first base and including a first main intake passage, a second bypass passage, and a second through hole; and a base cover plate connected to the front surface of the first base and including a first main air intake passage, a second main air intake passage, a third flow dividing passage, and a third through hole, the base cover plate receiving the first gas via the first main air intake passage and the second gas via the second main air intake passage, wherein the first gas and the second gas are delivered to the front surface of the first base via the first through hole and the third through hole, and the first gas and the second gas are delivered to the back surface of the first base via the first through hole and the second through hole.

Description

Semiconductor device

Technical Field

The present disclosure relates generally to semiconductor devices, and more particularly to multi-chamber laminar flow type thin film deposition apparatus.

Background

The semiconductor device may perform a deposition coating process, such as atomic layer deposition (Atomic layer deposition, ALD) coating, chemical vapor deposition (chemical vapor deposition, CVD), plasma enhanced chemical vapor deposition (Plasma Enhanced Chemical Vapor Deposition, PECVD), and the like, on the wafer.

The thin film deposition apparatus or device may be vented with one or more reactive sources (which may also be referred to as reactive gases or process gases) to deposit a film on a wafer positioned in the thin film deposition apparatus or device.

Disclosure of Invention

Some embodiments of the present disclosure provide a semiconductor device, including: a first base having a front surface and a back surface and comprising a first main intake passage, a second main intake passage, a first bypass passage, and a first through hole; a second base connected to the back surface of the first base and including the first main intake passage, the second main intake passage, a second bypass passage, and a second through hole; and a base cover plate connected to the front surface of the first base and including the first main intake passage, the second main intake passage, a third split passage, and a third through hole, the base cover plate receiving a first gas via the first main intake passage and a second gas via the second main intake passage, wherein the first gas and the second gas are delivered to the front surface of the first base via the first through hole and the third through hole, and the first gas and the second gas are delivered to the back surface of the first base via the first through hole and the second through hole.

Other embodiments of the present disclosure provide a semiconductor device, including: a gas inlet configured to receive one or more gases; a cavity connected to the air inlet and comprising a plurality of susceptors; an exhaust port communicating to the plurality of susceptors in the cavity; and a heating device disposed in the plurality of susceptors of the cavity, the heating device comprising a plurality of chucks, wherein the plurality of chucks are disposed in correspondence with the plurality of susceptors such that the one or more gases flow through the plurality of susceptors and the plurality of chucks and then into the exhaust port.

It is to be understood that the broad forms of the disclosure and their respective features can be used in combination, interchangeably and/or independently and are not intended to limit reference to the broad forms alone.

Drawings

Aspects of the disclosure will be readily appreciated from the following detailed description when read in connection with the accompanying drawings. It should be noted that the various features may not be drawn to scale. In fact, the dimensions of the various features may be arbitrarily increased or decreased for clarity of discussion.

Fig. 1 illustrates a cross-sectional view of a semiconductor device according to some embodiments of the present disclosure.

Fig. 2 is a cross-sectional view of a semiconductor device according to other embodiments of the present disclosure.

Fig. 3A is a side view showing an external structure of a semiconductor device according to other embodiments of the present disclosure.

Fig. 3B shows a cross-sectional view of the semiconductor device shown in fig. 3A.

Fig. 3C is a schematic perspective view of a heater according to some embodiments of the present disclosure.

Fig. 3D shows a cross-sectional view of the heater shown in fig. 3C.

Fig. 3E is a schematic perspective view of a chamber according to some embodiments of the present disclosure.

Fig. 3F illustrates a cross-sectional view of a chamber and heater according to some embodiments of the present disclosure.

FIG. 3G illustrates another cross-sectional view of a chamber and heater according to certain embodiments of the present disclosure.

Fig. 3H illustrates a top view of a base in accordance with certain embodiments of the present disclosure.

Fig. 4 is a schematic diagram illustrating the operation of a semiconductor device according to some embodiments of the present disclosure.

Detailed Description

The following disclosure provides many different embodiments, or examples, for implementing different features of the provided subject matter. Specific examples of components and arrangements are described below. Of course, these are merely examples and are not intended to be limiting. In this disclosure, recitation of a first feature being formed on or over a second feature in the description that follows may include embodiments in which the first feature is formed in direct contact with the second feature, and may also include embodiments in which additional features may be formed between the first and second features, such that the first and second features may not be in direct contact. In addition, the present disclosure may repeat reference numerals and/or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed.

Embodiments of the present disclosure are discussed in detail below. However, it should be appreciated that many of the applicable concepts provided by the present disclosure can be embodied in a wide variety of specific contexts. The particular embodiments discussed are merely illustrative and do not limit the scope of the disclosure.

Referring to fig. 1, a semiconductor device 100 may include a cavity 101, for example. The interior of the cavity (101) may contain a chamber (121) and an inlet channel (131). One or more wafers (102) to be processed may be received in the chamber (121), and each wafer (102) may have upper and lower surfaces. The inner walls of the chamber (101) may be heated in any manner to form an inner wall heater to heat the wafer (102) in the chamber (121) to facilitate deposition of the coating.

The gas (11) (shown by the single arrow in fig. 1) may include one or more reaction sources (not shown in fig. 1) and may be introduced into the chamber (121) through an inlet channel (131) above the chamber (101). The gas (11) introduced into the chamber (121) can further circulate in the chamber (121) so as to diffuse to the upper and lower surfaces of each wafer (102) to be processed, and deposit a plating film on the upper and lower surfaces of each wafer (102). The residual gas (11) not deposited on the wafer (102) can be further exhausted from the chamber (121) through the exhaust port (141) below the chamber (101).

During the deposition coating process, the gas (11) does not have a forced flow at the upper and lower surfaces of each wafer (102), but the gas (11) is delivered to the upper and lower surfaces of each wafer (102) by diffusion of the gas. To ensure uniformity of the film, the residence time of the gas (11) in the chamber (121) may be suitably increased. Increasing the residence time of the gas in the chamber, such as, but not limited to, can extend the takt time of the deposition coating reaction.

Since the upper and lower surfaces of each wafer (102) to be processed are exposed to the gas (11), the semiconductor device (100) shown in fig. 1 is suitable for applications requiring coating of both the upper and lower surfaces of the wafer.

In addition, since the inner wall heater of the chamber (101) is used to heat the wafers, rather than providing independent heating for each wafer, the preheating time of the chamber (101) can be prolonged to further reduce the temperature difference at different locations on the same wafer surface and reduce the temperature difference between the wafers.

The semiconductor device 200 shown in fig. 2 may employ a cavity plate 201 and a cavity plate 202 to define a lateral airflow channel 211. Accordingly, the semiconductor device 200 may also be referred to as having a Cross-flow (Cross-flow) structure.

A single wafer (203) to be processed is placed on the cavity plate (202). Gas (21) (shown by the single arrow in fig. 2) may enter the lateral gas flow channel (211) from one side of the chamber (201) and exit the lateral gas flow channel (211) from the other side of the chamber (201).

In this way, the semiconductor device 200 shown in fig. 2 does not rely on gas diffusion of the gas 21 over the upper surface of the wafer 203, but forces the gas 21 to flow laterally across the upper surface of the wafer 203 in a single direction (e.g., left-to-right direction as shown in fig. 2), thereby depositing a coating film on the upper surface of the wafer 203. Therefore, in the semiconductor device 200 shown in fig. 2, the forced gas 21 can achieve more uniform deposition plating film on the upper surface of the wafer 203. The lower surface of the wafer (203) is not formed with a deposition plating film.

The throughput of the semiconductor device 200 shown in fig. 2 may be limited by processing only a single wafer 203.

The semiconductor device 300 may include a cavity 301, a cavity 302, and a shelf 303 for supporting the cavity 301 and the cavity 302.

The cavity (301) may have a cover plate (3011) and an air inlet (3012) into the interior of the cavity (301).

The cavity (302) may be connected to the cavity (301) by, for example, bolts, and communicate with the cavity (301). The cavity (302) may have a valve body (3021), a mechanism (3026), and an extraction port (3025).

It should be appreciated that the cavity (301) and the cavity (302) may also be implemented as a single cavity, and are not limited to the split structure shown in fig. 3A. The internal structure of the semiconductor device 300 shown in fig. 3A will be described in detail below.

Referring to fig. 3B, in the semiconductor device 300, a cavity 3013 may be included in the cavity 301, and a heater 3014 (as shown in a dotted frame of fig. 3B) may be accommodated in the cavity 3013. The heater (3014) may be connected to the mechanism (3026). The heater (3014) is movable by a mechanism (3026) into and out of the cavity (3013).

The cavity (3013) may be in communication with the gas inlet (3012) to receive gas from the gas inlet (3012). The cavity (3013) may be in communication with an extraction port (3025) to exhaust the gas. It should be appreciated that the cavity (3013) may be a multi-layer cavity. The heater (3014) may be a multi-layer heater.

The cavity (302) may contain a wafer port (3022). The cavity (302) may contain a lift rod (3024). The sheet transferring port (3022) can be opened or closed under the control of the valve body (3021). A wafer (not shown in fig. 3B) to be processed may be transferred into or out of the chamber 302 through the transfer port 3022.

When it is desired to transfer a wafer (not shown in fig. 3B) to or from the heater 3014, the heater 3014 may be moved by the mechanism 3026 to the vicinity of the transfer port 3022, and the wafer may be placed on the heater 3014 or lifted from the heater 3014 by means of the lift lever 3024.

An inner wall heater (3023) may be located on an inner wall of the cavity (301). An inner wall heater (3023) may be located on the inner wall of the cavity (301) and/or the cavity (302). An inner wall heater (3023) may be located on the inner wall of the cavity (301) and the cavity (302). An inner wall heater (3023) may provide heating to a wafer to be processed.

Referring to fig. 3C, the heater (3014) may have a chuck (3017) ₁ ) Chuck (3017) ₂ ) Chuck (3017) ₃ ) Chuck (3017) ₄ ) Chuck (3017) ₅ ) Chuck (3017) ₆ ) Chuck (3017) ₇ ) Chuck (3017) ₈ ) Chuck (3017) ₉ ) And chuck (3017) ₁₀ ). Chuck (3017) ₁ ) To the chuck (3017) ₁₀ ) A wafer may be placed on each of them.

Heating wire (3018) ₁ ) Heating wire (3018) ₂ ) Heating wire (3018) ₃ ) Heating wire (3018) ₄ ) Heating wire (3018) ₅ ) Heating wire (3018) ₆ ) Heating wire (3018) ₇ ) Heating wire (3018) ₈ ) Heating wire (3018) ₉ ) And heating wire (3018) ₁₀ ) Are respectively arranged on corresponding chucks (3017) ₁ ) To the chuck (3017) ₁₀ ) And (3) inner part. Heating wire (3018) ₁ ) Heating wire (3018) ₂ ) Heating wire (3018) ₃ ) Heating wire (3018) ₄ ) Heating wire (3018) ₅ ) Heating wire (3018) ₆ ) Heating wire (3018) ₇ ) Heating wire (3018) ₈ ) Heating wire (3018) ₉ ) And heating wire (3018) ₁₀ ) Are respectively arranged on corresponding chucks (3017) ₁ ) To the chuck (3017) ₁₀ ) Nearby. For example, a heating wire (3018) ₅ ) Can be arranged on a corresponding chuck (3017) ₅ ) In order to be placed on the chuck (3017) ₅ ) The upper wafer is heated. For example, a heating wire (3018) ₇ ) Can be arranged on a corresponding chuck (3017) ₇ ) In the vicinity of the chuck (3017) ₇ ) The upper wafer is heated.

Heating wire (3018) ₁ ) To the heating wire (3018) ₁₀ ) Each heating wire may be connected to an outgoing line (3015). Heating wire (3018) ₁ ) To the heating wire (3018) ₁₀ ) Each heating wire may be connected to an outgoing line (3016). Heating wire (3018) ₁ ) To the heating wire (3018) ₁₀ ) Each heater wire may receive a signal (e.g., a temperature control signal) via an outlet (3015). Heating wire (3018) ₁ ) To the heating wire (3018) ₁₀ ) Each heater wire may receive a signal (e.g., a temperature control signal) via an outlet (3016). The lead wires (3015) may extend to the surface of the heater (3014) to receive signals. The lead wires (3016) may extend to the surface of the heater (3014) to receive signals.

It should be appreciated that the heater wire (3018) ₁ ) To the heating wire (3018) ₁₀ ) Any other heating element may be substituted to heat the respective chuck and its wafer.

It should be appreciated that in other embodiments of the present disclosure, the heater (3014) may include 10 chucks (i.e., chucks (3017) ₁ ) To the chuck (3017) ₁₀ ) But may contain more than10 or less than 10 chucks. In other embodiments, each chuck may be provided with a corresponding heating element. In other embodiments, each chuck may be provided with a plurality of corresponding heating elements. In other embodiments, each of the plurality of chucks may be provided with a corresponding heating assembly.

Further, the heating wire may not be limited to the winding or forming manner shown in fig. 3C as long as the chuck can be heated.

In this way, the wafers to be processed can be heated and/or preheated not only as a whole by means of the chamber (301) and the inner wall heater (3023) on the inner wall of the chamber (302), but also each wafer can be independently heated by its respective chuck.

The independent heating structure shown in fig. 3C is beneficial to further improving the temperature uniformity of the same wafer surface and the temperature uniformity between wafers, thereby further improving the coating quality.

Fig. 3D shows a cross-sectional view of the heater shown in fig. 3C.

Referring to fig. 3D, a wafer (3019) ₁ )、(3019 ₂ )、(3019 ₃ )、(3019 ₄ )、(3019 ₅ )、(3019 ₆ )、(3019 ₇ )、(3019 ₈ )、(3019 ₉ ) And wafer (3019) ₁₀ ) Chucks (3017) respectively placed on heaters (3014) ₁ ) To the chuck (3017) ₁₀ ) And (3) upper part.

Due to the chuck (3017) ₁ ) To the chuck (3017) ₁₀ ) The inner parts are respectively provided with a heating wire (3018) ₁ ) To the heating wire (3018) ₁₀ ) Wafer (3019) ₁ ) To wafer (3019) ₁₀ ) Can be respectively made of heating wires (3018) ₁ ) To the heating wire (3018) ₁₀ ) And heating with independently controllable temperature.

The independent temperature control signal may be received via lead lines (3015) and lead lines (3016) leading to the upper surface of the heater (3014). In the embodiment shown in fig. 3D, the odd-layer chuck (3017 ₁ ) Chuck and chuck (3017) ₃ ) Chuck (3017) ₅ ) Chuck (3017) ₇ ) And chuck (3017) ₉ ) The heating wire in (a) can be led out through a lead-out wire (3015). At FIG. 3DIn the illustrated embodiment, even-layered chucks (3017 ₂ ) Chuck (3017) ₄ ) Chuck (3017) ₆ ) Chuck (3017) ₈ ) And chuck (3017) ₁₀ ) The heating wire in (a) can be led out through a lead-out wire (3016). However, it should be appreciated that in other embodiments, the heater filaments in each chuck of the heater (3014) may be drawn to other locations of the heater (3014) in any other manner.

Fig. 3E is a schematic perspective view of a chamber according to some embodiments of the present disclosure. The cavity (3013) shown in fig. 3E may house, for example, a heater (3014) as shown in fig. 3C.

Referring to fig. 3E, the cavity (3013) may include a base cover plate (3033) and a base (3013) ₁ ) Base (3013) ₂ ) Base (3013) ₃ ) Base (3013) ₄ ) Base (3013) ₅ ) Base (3013) ₆ ) Base (3013) ₇ ) Base (3013) ₈ ) Base (3013) ₉ ) And base (3013) ₁₀ ) Wherein the bases are connectable by means of, for example, bolts.

The air inlet (3012) may comprise an air inlet (3012) ₁ ) Air inlet (3012) ₂ ) Air inlet (3012) ₃ ). Gas (e.g., residual gas after the coating process is completed) may be exhausted from the chamber 3013 through the exhaust port 3025.

It should be appreciated that in other embodiments of the present disclosure, the cavity (3013) may include a different number of pedestals than that shown in FIG. 3E (i.e., pedestals (3013) ₁ ) To the base (3013) ₁₀ ))。

It should be appreciated that in other embodiments of the present disclosure, the cavity (3013) may be provided with a different number of air inlets than shown in FIG. 3E.

For example, the heater (3014) shown in fig. 3C or fig. 3D may be accommodated in the cavity (3013) shown in fig. 3E, and the accommodated cross-sectional view is shown in fig. 3F. Base (3013) of cavity (3013) ₁ ) To the base (3013) ₁₀ ) May be coupled to respective chucks (3017) in the heater (3014) (e.g., chucks (3017) in fig. 3D ₁ ) To the chuck (3017) ₁₀ ) Phase of (c)The upper surface should be substantially flush.

Gas (321) may be fed through gas inlets (3012) ₁ ) Flows into the cavity (3013). The gas (322) may be fed through the gas inlet (3012) ₂ ) Flows into the cavity (3013). The gas 321 and the gas 322 may be, for example, the same or different process gases, and may be represented by a single-headed arrow and a single-dashed arrow, respectively, as shown in fig. 3F.

Base (3013) ₁ ) To the base (3013) ₁₀ ) May include a main intake passage (3113) and a main intake passage (3123).

The main air inlet channel (3113) can longitudinally penetrate through the base cover plate (3033) and the base (3013) ₁ ) To the base (3013) ₉ ) And extends into the base (3013) ₁₀ ) And includes split channels (3113) each communicating with the main intake channel (3113) ₁ ) To the shunt channel (3113) ₆ ). Gas (321) flowing into the chamber (3013) can flow into the main inlet channel (3113) and the shunt channel (3113) ₁ ) To the shunt channel (3113) ₆ ) And through the through hole (320) ₁ ) To through hole (320) ₁₁ ) Flows to a heater (3014). Through hole (320) ₁ ) To through hole (320) ₁₁ ) Extending in a direction generally perpendicular to the page in the respective substrate. For example, through hole (320) ₁ ) Extends in the base cover (3033) in a direction perpendicular to the page (and also generally perpendicular to the main air inlet channel (3113)) and communicates with a row of capillary channels inclined downwardly. In this way, the gas (321) can flow through the main inlet channel (3113), the split channel (3113) ₁ ) Through hole (320) ₁ ) And its capillary transport to the base (3013) ₁ ) The corresponding wafer surface. It should be appreciated that the through hole (320 ₁ ) And its capillary channels are not limited to the form shown in fig. 3F, but may be arranged in any manner or any number as long as it is ensured that the flow is interrupted via the main intake channel (3113) and the shunt channel (3113) ₁ ) The inflowing gas (321) can be delivered to the base (3013) ₁ ) The corresponding wafer surface is just needed.

Similarly, the main intake channel (3123) may extend longitudinally through the base cover plate (3033) and the base (3013) ₁ ) To the base (3013) ₈ ) And extends into the base (3013) ₉ ) Parallel packingComprises a diversion channel (3123) which is communicated with the main air inlet channel (3113) ₁ ) To the shunt channel (3123) ₅ ). The gas (322) flowing into the cavity (3013) can flow into the main gas inlet channel (3123) and the diversion channel (3123) ₁ ) To the shunt channel (3123) ₅ ) And through the through hole (320) ₁ ) To through hole (320) ₁₁ ) Flows to a heater (3014). For example, through hole (320) ₂ ) At the base (3013) in a direction perpendicular to the paper surface (and also substantially perpendicular to the main intake passage (3123)) ₁ ) And communicates with two rows of capillary tubes, obliquely upward and obliquely downward. In this way, the gas (321) flows through the main inlet channel (3123), the shunt channel (3123 ₁ ) And through hole (320) ₁ ) The inflowing gas (322) can be delivered to the base (3013) via a row of capillary channels at an angle upwards ₁ ) The corresponding wafer surface, and on the other hand, is transported to the base (3013) via a row of capillary channels inclined downward ₂ ) The corresponding wafer surface. It should be appreciated that the through hole (320 ₂ ) And its two rows of differently oriented capillary channels are not limited to the form shown in fig. 3F, but may be arranged in any manner or number, as long as it is ensured that the flow through the primary air inlet channel (3123) and the shunt channel (3123 ₁ ) The inflowing gas (322) can be delivered to the base (3013) ₁ ) And base (3013) ₂ ) The corresponding wafer surface is just needed.

The gas (321) and gas (322) flowing into the chamber (3013) may further flow over the upper surface of the wafer (e.g., from left to right as shown in fig. 3F) above each chuck of the heater (3014), thereby performing uniform coating on the surface of the wafer. As an example, gas (321) may enter chamber (3013) prior to gas (322), and chamber (3013) may be purged to subsequently introduce gas (322). Similarly, gas (322) may enter chamber (3013) prior to gas (321), and chamber (3013) may be purged to subsequently vent gas (321). As another example, gas (321) may enter cavity (3013) simultaneously with gas (322). It should be appreciated that the above application scenario may be flexibly implemented according to actual needs.

The residual gas (321) may continue to flow in a single direction (e.g., laterally from left to right as shown in fig. 3F) until it exits the cavity (3013) from the extraction port (3025). The residual gas (322) may continue to flow in a single direction (e.g., laterally from left to right as shown in fig. 3F) until it exits the cavity (3013) from the extraction port (3025).

It should be understood that the manner of delivering the gas to the upper surfaces of the respective wafers is not limited to the distribution and combination of the gas (321) and the gas (322) along the distribution channels 3113 and 3123 as shown in fig. 3F, but the distribution and combination of the gas (321) and the gas (322) may be performed in any manner as long as the delivery of the gas (321) and the gas (322) to the upper surfaces of the respective wafers is ensured.

The heater (3014) shown in fig. 3C and 3D may be housed in the cavity (3013) shown in fig. 3G. Cavity (3013) base (3013) ₁ ) To the base (3013) ₁₀ ) May be coupled to respective chucks (3017) in the heater (3014) (e.g., chucks (3017) in fig. 3D ₁ ) To the chuck (3017) ₁₀ ) With the corresponding upper surface being substantially flush.

Gas (323) (shown by the single arrow in fig. 3G) may flow through the susceptor (3013) ₁ ) To the base (3013) ₁₀ ) Is provided (3213) and along the base (3013) ₁ ) To the base (3013) ₁₀ ) The entire outer perimeter of each flows (as will be detailed in fig. 3H and below), eventually exiting the cavity (3013) from the extraction port (3025). The gas 323 may be, for example, a purge gas.

The gas (323) can be used for the base (3013) ₁ ) To the base (3013) ₁₀ ) Purging is performed to avoid Particle (Particle) contamination in the chamber (3013) due to process gas leakage.

Due to the base (3013) ₁ ) To the base (3013) ₁₀ ) May have substantially the same structure, so fig. 3H only shows the base (3013) ₁ ) The top view of the base is illustrated as an example.

Referring to FIG. 3H, a gas (323), which may be, for example, a purge gas (as indicated by the single arrow in FIG. 3H)Shown) can flow through the through-base (3013) ₁ ) Is provided (3213) and along the base (3013) ₁ ) As indicated by the single arrow in fig. 3H), and thereby out of the cavity from the suction opening (3025).

Base (3013) ₁ ) The central gap (3413) may be used to house a heater (3014), such as shown in fig. 3C and 3D.

In this way, particles formed within the cavity due to process gas leakage may exit the cavity with the gas (323).

Referring to fig. 4, in the semiconductor device 400, the heater 4014 is longitudinally movable into and out of the cavity 4013 by a mechanism 4026 (as indicated by the up and down arrows in fig. 4).

First, the mechanism (4026) can move downwards to drive the heater (4014) to move out of the cavity (4013) and to the vicinity of the sheet conveying port (4022).

The wafer to be processed may then be transferred over the chuck of the heater 4014 via the transfer port 4022 and supported by the lift pins 4024 by, for example, but not limited to, a robot arm. Further, the lift pins (4024) are controlled to drop to smoothly place the wafer on the chuck surface. It should be appreciated that the above operations may be performed cyclically to transfer a plurality of wafers to be processed onto a plurality of chucks of the heater 4014.

After the wafers have all been moved into the heater (4014), the mechanism (4026) may move upward and drive the heater (4014) into the chamber (4013) to perform a wafer coating process.

After the wafer plating process is completed, the mechanism (4026) may be moved downward again to move the heater (4014) out of the cavity (4013) and to move it to the vicinity of the wafer transfer port (4022).

Next, the lift pins (4024) may be controlled to raise to lift the processed wafer off the chuck surface and remove the wafer from the wafer transfer port (4022) by, for example, but not limited to, a robotic arm (4014).

The semiconductor device provided by the embodiments of the present disclosure has a multi-layer cross-flow structure, which not only can greatly improve productivity, but also can keep the flow direction of the gas uniform, so that the wafer coating efficiency can be improved on the premise of ensuring the uniformity of the film.

Moreover, when the inner wall heater of the cavity is used for heating and/or preheating, the multi-layer heater structure provided by the embodiments of the disclosure can independently heat each wafer, so that the temperature uniformity among the wafers is greatly improved, and the uniformity of the thin film is further ensured.

At the same time, the multi-layer heater structure provided by the various embodiments of the present disclosure is particularly well suited for wafer single-surface coating applications because it is capable of providing a corresponding, separate heating chuck for each wafer such that only one side (e.g., the upper surface) of each wafer is exposed to the reactive gas.

As used herein, the terms "about," "substantially," "generally," and "about" are used to describe and contemplate small variations. When used in connection with an event or circumstance, the term can refer to instances where the event or circumstance occurs explicitly and instances where it is very close to the event or circumstance. As used herein with respect to a given value or range, the term "about" generally means within ±10%, 5%, 1% or 0.5% of the given value or range. Ranges can be expressed herein as from one endpoint to the other endpoint, or between two endpoints. Unless otherwise specified, all ranges disclosed herein include endpoints. The term "substantially coplanar" may refer to two surfaces that are positioned along a same plane within a few micrometers (μm), such as within 10 μm, within 5 μm, within 1 μm, or within 0.5 μm along the same plane. When referring to "substantially" the same value or feature, the term may refer to a value that is within ±10%, 5%, 1% or 0.5% of the mean of the values.

For example, when used in conjunction with a numerical value, the term can refer to a range of variation of less than or equal to ±10% of the numerical value, e.g., less than or equal to ±5%, less than or equal to ±4%, less than or equal to ±3%, less than or equal to ±2%, less than or equal to ±1%, less than or equal to ±0.5%, less than or equal to ±0.1%, or less than or equal to ±0.05%. For example, two values may be considered to be "substantially" or "about" the same if the difference between the two values is less than or equal to ±10% (e.g., less than or equal to ±5%, less than or equal to ±4%, less than or equal to ±3%, less than or equal to ±2%, less than or equal to ±1%, less than or equal to ±0.5%, less than or equal to ±0.1%, or less than or equal to ±0.05%) of the average value of the values. For example, "substantially" parallel may refer to a range of angular variation of less than or equal to ±10° relative to 0 °, for example, less than or equal to ±5°, less than or equal to ±4°, less than or equal to ±3°, less than or equal to ±2°, less than or equal to ±1°, less than or equal to ±0.5°, less than or equal to ±0.1°, or less than or equal to ±0.05°. For example, "substantially" perpendicular may refer to a range of angular variation of less than or equal to ±10° relative to 90 °, for example, less than or equal to ±5°, less than or equal to ±4°, less than or equal to ±3°, less than or equal to ±2°, less than or equal to ±1°, less than or equal to ±0.5°, less than or equal to ±0.1°, or less than or equal to ±0.05°.

For example, two surfaces may be considered to be coplanar or substantially coplanar if the displacement between the two surfaces is equal to or less than 5 μm, equal to or less than 2 μm, equal to or less than 1 μm, or equal to or less than 0.5 μm. A surface may be considered planar or substantially planar if the displacement of the surface relative to the plane between any two points on the surface is equal to or less than 5 μm, equal to or less than 2 μm, equal to or less than 1 μm, or equal to or less than 0.5 μm.

As used herein, the singular terms "a" and "an" may include plural referents unless the context clearly dictates otherwise. In the description of some embodiments, a component provided "on" or "over" another component may encompass the case where the former component is directly on (e.g., in physical contact with) the latter component, as well as the case where one or more intermediate components are located between the former component and the latter component.

As used herein, spatially relative terms such as "below," "lower," "above," "upper," "lower," "left," "right," and the like may be used herein for ease of description to describe one component or feature's relationship to another component or feature as illustrated in the figures. In addition to the orientations depicted in the figures, the spatially relative terms are intended to encompass different orientations of the device in use or operation. The apparatus may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly. It will be understood that when an element is referred to as being "connected" or "coupled" to another element, it can be directly connected or coupled to the other element or intervening elements may be present.

The foregoing has outlined features of several embodiments and detailed aspects of the present disclosure. The embodiments described in this disclosure may be readily used as a basis for designing or modifying other processes and structures for carrying out the same or similar purposes and/or obtaining the same or similar advantages of the embodiments introduced herein. Such equivalent constructions do not depart from the spirit and scope of the present disclosure and are susceptible to various changes, substitutions and alterations without departing from the spirit and scope of the present disclosure.

Claims

1. A semiconductor device, comprising:

a first base having a front surface and a back surface and comprising a first main intake passage, a second main intake passage, a first bypass passage, and a first through hole;

a second base connected to the back surface of the first base and including the first main intake passage, the second main intake passage, a second bypass passage, and a second through hole; and

a base cover plate connected to the front surface of the first base and including the first main intake passage, the second main intake passage, a third split passage, and a third through-hole, the base cover plate receiving a first gas via the first main intake passage and a second gas via the second main intake passage,

wherein the first gas and the second gas are delivered to the front surface of the first base via the first through hole and the third through hole, and the first gas and the second gas are delivered to the back surface of the first base via the first through hole and the second through hole.

2. The semiconductor device of claim 1, wherein the first and second main air intake passages extend through the base cover plate, the first base, and the second base.

3. The semiconductor device of claim 1, wherein the first via, the second via, and the third via communicate with the front surface and the back surface of the first pedestal via one or more capillary lines.

4. The semiconductor device of claim 1, further comprising a heating device comprising:

a first chuck having a first surface and a second surface opposite the first surface; and

a second chuck coupled to the first chuck and having a third surface and a fourth surface opposite the third surface, the third surface being separate from the second surface.

5. The semiconductor device of claim 4, wherein the first surface of the first chuck is configured to be coplanar with the front surface of the first pedestal.

6. The semiconductor device of claim 4, wherein the third surface of the second chuck is configured to be coplanar with the back surface of the first pedestal.

7. The semiconductor device of claim 4, further comprising:

a first heating element disposed in the first chuck; and

a second heating element disposed in the second chuck.

8. The semiconductor device of claim 7, wherein the first heating element and the second heating element are configured to independently heat the first chuck and the second chuck.

9. The semiconductor device of claim 7, wherein the first heating element and the second heating element are directed from the first surface of the first chuck.

10. The semiconductor device of claim 4 or 7, further comprising a first wafer disposed on the first surface of the first chuck.

11. The semiconductor device of claim 4 or 7, further comprising a second wafer disposed on the third surface of the second chuck.

12. A semiconductor device, comprising:

a gas inlet configured to receive one or more gases;

a chamber connected to the air inlet and comprising a plurality of susceptors, wherein the plurality of susceptors comprise the structure of the semiconductor device of claim 1;

an exhaust port communicating to the plurality of susceptors in the cavity; and

a heating device disposed in the plurality of susceptors of the cavity, the heating device comprising a plurality of chucks, wherein the plurality of chucks are disposed in correspondence with the plurality of susceptors such that the one or more gases flow through the plurality of susceptors and the plurality of chucks and then into the exhaust port.

13. The semiconductor device of claim 12, wherein the heating means further comprises a heating element in each of the plurality of chucks.

14. The semiconductor device of claim 12, wherein the heating device is configured to move relative to the cavity.

15. The semiconductor device of claim 13, wherein the heating element of each of the plurality of chucks is configured to independently heat the plurality of chucks.

16. The semiconductor device of any of claims 12-15, wherein the chamber includes a main gas inlet passage extending through the chamber and a shunt passage in communication with the main gas inlet passage, the one or more gases flowing through the plurality of susceptors and the plurality of chucks via the main gas inlet passage and the shunt passage and into the exhaust port.

17. The semiconductor device of any one of claims 12-15, wherein the cavity includes a purge channel therethrough, the one or more gases purging the plurality of susceptors via the purge channel and flowing into the exhaust port.

18. The semiconductor device of any one of claims 12-15, wherein the cavity further comprises an inner wall heater configured to preheat a wafer located in the heating device.

19. A method of semiconductor processing, comprising:

the use of the semiconductor device of claims 1-18 for processing the surfaces of a plurality of wafers.