CN114930457A - Method and device for repairing memory chip - Google Patents

Abstract

The application provides a method and a device for repairing a memory chip, and relates to the field of computers. The method comprises the following steps: and acquiring self-checking parameters of the chip, and repairing the chip according to the self-checking parameters, wherein the self-checking parameters comprise temperature and failure information, and the failure information comprises an address of a failure data unit and error detection information of the failure data unit. The chip is repaired correspondingly according to the self-checking parameters, so that the repairing effect can be better exerted, the repairing effect is improved, and the robustness of the chip is improved.

Description

Method and device for repairing memory chip Technical Field

The present application relates to the field of computers, and in particular, to a method and an apparatus for repairing a memory chip.

Background

The chip is a key component constituting a computer system, which can control the operation of the computer system and the reading of data. A Dynamic Random Access Memory (DRAM) is a large-capacity, high-density semiconductor memory. With the larger and larger scale of DRAM chips, the working frequency is higher and higher, and the chips have local failure probabilities of different degrees in the chip production process or in the chip working state. The repair of the DRAM failure unit plays an increasingly important role in the DRAM field as a basic technology capable of effectively improving the chip yield.

The DRAM repair technology often requires the chip to be in an off-line state before performing a self-test operation, which makes the repair technology unable to perform operations such as self-test and/or repair on a failure condition of the chip in a working state. In order to solve the problem, a method capable of repairing a DRAM chip online is provided in the existing scheme, which mainly detects a chip in an operating state, and replaces a failed data unit after the failed data unit is found, but since the failed data unit is continuously changed when the chip is in the operating state, and the repair capability of the replacement mode is limited, the existing scheme cannot cope with the failed data unit in the operating state, which is continuously changed when the chip is in the operating state.

Disclosure of Invention

The application provides a method and a device for repairing a memory chip, which can adjust a repairing mode according to the constantly changing failure condition of the chip in a working state, thereby fully utilizing repairing resources and improving the repairing effect of the chip.

In a first aspect, a method for repairing a memory chip is provided, the method including: and acquiring self-checking parameters of the chip, and repairing the chip according to the self-checking parameters, wherein the self-checking parameters comprise temperature and failure information, and the failure information comprises an address of a failure data unit and error detection information of the failure data unit.

In the technical scheme, different repairing operations can be performed on the chip according to the self-checking parameters of the chip, so that different repairing operations can be performed on different failure conditions, repairing resources can be fully utilized, a better repairing effect is achieved, repairing quality is improved, and robustness of the chip is improved.

The failure information may include information of the failed data unit, for example, an address of the failed data unit, and may further include error detection information of the failed data unit, which is further explained below.

The error detection information may include, for example, the number of times the failed data unit was detected as an error during the detection process, such as the number of times the error was detected using an ECC mechanism. The error detection information may include the cumulative number of times the failed data unit was detected as an error, the time at which the error was last detected, the number of times the failed data unit was detected as consecutive errors, and so forth.

Alternatively, a determination criterion of the failure, that is, an evaluation criterion of determining whether a certain data unit has failed, may be set. For example, an error count threshold may be set with the error count as a determination criterion, and when the number of operation errors such as reading and writing for a certain data unit is greater than or equal to the error count threshold, the data unit is determined to be invalid, whereas when the number of operation errors such as reading and writing for the data unit is less than the error count threshold, the data unit is determined to be normal.

With reference to the first aspect, in some implementations of the first aspect, when a chip is subjected to a repair operation according to a self-test parameter, the temperature may be compared with a set temperature threshold to perform different repair operations.

Alternatively, the refresh cycle of the chip may be shortened when the temperature is greater than or equal to the first temperature threshold, such that the failed data cell due to the temperature increase is no longer failed. After the temperature is obtained, whether the temperature is greater than or equal to a first temperature threshold value or not can be judged, and when the temperature is greater than or equal to the first temperature threshold value, a refresh cycle can be adjusted, so that the failure data unit caused by temperature rise does not fail any more. In this case, the temperature is higher than the first temperature threshold, and at this time, the failed data units in each component of the chip may be many failures caused by the temperature, and the failures can be solved by refreshing. In the implementation mode, the serious failure condition caused by overhigh temperature can be solved by shortening the refreshing period.

Since data of the memory chip is stored in the capacitor as electric charges, it is necessary to refresh the capacitor continuously to replenish the electric charges of the capacitor. The retention time of the electric charge in the capacitor can change along with the change of the temperature, and under some conditions, the higher the temperature is, the more easy the capacitor is to leak electricity, the quicker the electric charge is leaked, the stored data can disappear more quickly, and the refresh period is unchanged, so that the capacitor is not charged timely, and the data unit is invalid.

In the above implementation, the first temperature threshold may be determined by comparing the number of failed data units at different temperatures. For example, assuming that the number of failed data cells is 20 at a temperature of 30 ℃ and reaches 200 at a temperature of 75 ℃, it can be said that the failure rate due to the increase in temperature is large and is likely to have exceeded the maximum repair number of repair capabilities, and shortening the refresh period is effective to solve the more serious failure condition. In addition, the first temperature threshold value can be determined by comparing the difference value between the number of the failure data units at different temperatures and the number of the failure data units when the data units are shipped from a factory. In addition, the first temperature threshold may also be determined by comparing the difference between the number of failed data units at different temperatures and the maximum repair number corresponding to the maximum repair capability.

In the above implementation, the first temperature threshold may also be determined according to a temperature upper limit value of normal operation of the chip. For example, assuming that the upper limit of the temperature for normal operation of the chip is 85 ℃, the first temperature threshold may be set to a value between 70 ℃ and 80 ℃ to ensure that the chip can still operate normally through repair. It should be noted that the temperature parameters such as the normal operating temperature range of the chip, the upper limit value of the normal operating temperature, the lower limit value of the normal operating temperature, etc. all depend on the performance of the chip itself, and the temperature parameters of the chips for different purposes and the chips for different production processes may be different, for example, the upper limit value of the normal operating temperature of the chip may also be 90 ℃, 82 ℃, 100 ℃, 105 ℃, etc., and may also be other upper limit values or lower limit values of the temperature, which is not limited herein.

It should be noted that the data unit failure may be caused by temperature, and may also be caused by other factors, such as physical damage. But temperature does not typically shock, so for failures that are not caused by temperature (i.e., other factors) may often be discovered and repaired during self-testing before the temperature reaches the first threshold; and if the failure is caused by other factors occurring while the temperature is increased, the failure can still be discovered and repaired in the subsequent self-test. It can be understood that, assuming that the temperature has not reached the first temperature threshold at the previous self-test and the detected data unit a is normal, but the temperature has reached the first temperature threshold at the current self-test and the detected data unit a is failed, but at this time, the failure cause of the data unit a cannot be determined by the quality inspection at the same time as a result of the temperature increase, after the refresh period is shortened by the current time, even if the data unit a is not repaired, it can still be detected and repaired in the next or subsequent self-test process. It will also be appreciated that when a failed data unit is discovered, it is generally not necessary to determine the cause of its failure, so if a failure occurs that is not temperature induced, it will also be discovered and repaired during subsequent self-test and online repair. That is to say, in the embodiment of the present application, there is no limitation on the failure cause of the failed data unit, and the failed data unit can be discovered and repaired through continuous self-test.

That is, after the refresh period is shortened, data cells that are still failing may be detected in subsequent self-tests, and such failed data cells may be repaired further based on the failure information, for example. That is, for example, the failed data units that still fail after the refresh period is shortened may be selected to a certain extent, and a part of the failed data units may be selected to be repaired preferentially, or the failed data units may be repaired in a certain order. For example, part or all of the failed data units may be determined to be repaired according to the repair capability and the number of the actual failed data units, or, for example, the failed data units may be repaired in the order of the number of errors from a few to a few regardless of the repair number, that is, the failed data units with a large number of errors may be repaired preferentially, or, for example, the failed data units in a certain area of the chip may be repaired preferentially.

It should also be understood that in the current repair process, the partially failed data unit can be repaired according to the failure information while the refresh period is shortened. For example, while the refresh cycle is shortened, the failed data unit with the largest number of errors in the failure information may be repaired preferentially, or the failed data unit of some parts or specific areas of the chip may be repaired preferentially.

It should be further noted that the failure caused by the temperature may be understood as a "soft failure," that is, a failure that can be eliminated by changing chip parameters, and the embodiment of the present application mainly takes the "soft failure" caused by the temperature as an example for description, but the same method (parameter adjustment) may be also used for other "soft failures" to make the failed data unit no longer fail, and details are not described here again.

Optionally, the shortened refresh period may be extended or resumed when the temperature is less than or equal to a second temperature threshold, wherein the second temperature threshold is less than the first temperature threshold. When the temperature is less than or equal to the second temperature threshold, the parameter changed when the temperature is higher can be recovered, for example, the refresh period can be prolonged appropriately. That is, assuming that a case where the temperature is greater than or equal to the first temperature threshold value occurs during the detection at the previous time, an operation of, for example, shortening the refresh cycle is adopted so that the refresh cycle is shortened. And in the detection process of the current moment, if the temperature of the current moment is less than or equal to the second temperature threshold value, the shortened refresh cycle can be properly prolonged or restored to the value before the shortening.

With reference to the first aspect, in some implementations of the first aspect, it may also be determined to repair part or all of the failed data unit according to the failure information and/or the temperature when the temperature is less than the first temperature threshold. When the temperature is less than the first temperature threshold, whether the temperature is greater than a second temperature threshold can be further judged, and corresponding operation is executed. For example, when the temperature is greater than the second temperature threshold and less than the first temperature threshold, which indicates that the failed data unit to be repaired may not be repaired due to exceeding the repair capability at this time, a certain selection may be performed on the failed data unit detected in the self-checking process, and a part of the failed data units is selected to be repaired preferentially, or the failed data units are repaired in a certain order.

It should be noted that, the judgment on the relationship with the second temperature threshold may not be performed, but when the temperature is less than the first temperature threshold, the partial or all of the failed data units are determined to be repaired according to the failure information and/or the temperature, or the repair is performed according to the repair sequence of the failed data units.

With reference to the first aspect, in certain implementations of the first aspect, all failed data units may also be repaired when the temperature is less than or equal to the second temperature threshold. When the temperature is less than or equal to the second temperature threshold, the repair capability is equivalent to that the failed data unit which may appear is sufficiently repaired, and at this time, operations such as selecting the failed data unit and the like may not be performed, and it is equivalent to how many failed data units are repaired, but it should be understood that the failed data unit of the part which is processed preferentially may also be set at this time, and the repair effect is not affected. When the temperature is greater than the second temperature threshold, the failed data unit to be repaired can be selected from the failed data units to be repaired according to the failure information.

With reference to the first aspect, in some implementations of the first aspect, the determination criterion for determining whether the data unit fails may also be adjusted according to parameters such as temperature and refresh period. For example, the determination criterion may be set relatively more strictly in the case where the probability of occurrence of a failure is low, and may be set relatively more loosely in the case where the probability of occurrence of a failure is high.

In a second aspect, an apparatus for repairing a memory chip is provided, the apparatus comprising means for performing the method of any one of the implementations of the first aspect. The device comprises an acquisition unit and a processing unit.

In a third aspect, a chip is provided, where the chip includes the apparatus of any one of the implementation manners provided in the second aspect.

In a fourth aspect, a chip is provided, where the chip includes a processor and a data interface, and the processor reads an instruction stored in a memory through the data interface to execute the method in any one of the implementation manners in the first aspect.

Optionally, as an implementation manner, the chip may further include a memory, where instructions are stored in the memory, and the processor is configured to execute the instructions stored in the memory, and when the instructions are executed, the processor is configured to execute the method in any one of the implementation manners of the first aspect.

In a fifth aspect, a computer readable medium is provided, which stores program code for execution by a device, the program code comprising instructions for performing the method of any one of the implementations of the first aspect.

A sixth aspect provides a computer program product comprising instructions which, when run on a computer, cause the computer to perform the method of any one of the implementations of the first aspect.

Drawings

Fig. 1 is a schematic diagram of an application of a method for repairing a chip in the prior art.

Fig. 2 is an application schematic diagram of a method for repairing a chip according to an embodiment of the present application.

Fig. 3 is a schematic flowchart of a method for repairing a chip according to an embodiment of the present application.

Fig. 4 is a schematic flowchart of a repair operation performed on a chip according to a self-test parameter according to an embodiment of the present application.

Fig. 5 to fig. 8 are schematic diagrams illustrating a flow of repairing a chip according to a self-test parameter according to an embodiment of the present application.

Fig. 9 is a schematic block diagram of an apparatus for repairing a chip according to an embodiment of the present application.

Detailed Description

The technical solution of the embodiment of the present application is described below with reference to the accompanying drawings.

The method for repairing the chip provided by the embodiment of the application can be applied to repairing various chips, particularly to repairing a memory chip, wherein the memory chip can comprise a DRAM chip.

In some scenarios, functions in a chip may be divided into 1 or more dies (die), for example, into a logic die (logic die) and a memory die (memory die), where the memory die may be, for example, a DRAM die (DRAM die), and in the embodiment of the present application, the memory die is mainly described as a DRAM die.

In order to better understand the scheme of the embodiment of the present application, an application of the scheme of repairing a chip in the prior art and an application of the scheme of repairing a chip provided in the embodiment of the present application are described and compared with each other with reference to fig. 1 and fig. 2. Fig. 1 is a schematic application diagram of a scheme for repairing a chip in the prior art, and fig. 2 is a schematic application diagram of a scheme for repairing a chip provided in an embodiment of the present application.

In the application scenario shown in fig. 1, chip repair is implemented by a chip repair apparatus 100, where the apparatus 100 may include a control logic module 101, an address management module 102, a read-write data processing module 103, and a built-in self-test control module 104. The apparatus 100 may be provided in a logical slice for repairing failures in a DRAM slice.

In the application scenario shown in fig. 1, the apparatus 100 needs to perform operations such as self-inspection and repair when the chip is in an off-line state, that is, the chip needs to be in an inoperative state, for example, when the chip is inspected before being shipped from a factory, or when the chip is repaired after a problem such as a failure occurs in the chip. Assuming that the mode in which the chip repairing apparatus 100 detects and repairs the chip is referred to as a detection and repair mode of the chip, in this detection and repair mode, the built-in self-test control module 104 may initiate a self-test operation according to a configurable algorithm, and may find a failed data unit through, for example, an Error Checking and Correction (ECC) mechanism. When the built-in self-test control module 104 finds the failure data unit, the information of the failure data unit is reported to the test software. The test software is typically independent of the device 100 and is used to analyze the data or information obtained during the self-test to determine a repair strategy for the chip. And then, the test software issues the determined repair strategy to redundancy control registers of each component (bank) or sub-component (sub-bank) of the DRAM slice, and corresponding replacement units are configured for the failure data units. The redundancy control register may be a module disposed in a DRAM slice, and is used for repairing the DRAM according to a control signal sent by the control logic module 101 by the apparatus 100. After the repair, when the chip is used for normal work, when the read-write operation is carried out on the repaired failure address of the failure data unit, the redundancy control register controls the read-write operation to be carried out on the replacement unit corresponding to the failure data unit. That is, the device 100 performs on-chip replacement on the failure data unit, and when performing read-write operation on the failure data unit, the device performs read-write operation on the corresponding replacement unit through control conversion, so as to ensure the accuracy of chip read-write, but the outside of the chip does not sense that the failure data unit has been replaced.

Therefore, it can be seen that when the chip is in an operating state (or referred to as an operating mode), the apparatus 100 does not operate, that is, the chip cannot perform detection and repair operations, and when performing read/write operations on a failed data unit, the read/write operations can only be adjusted according to the repair policy previously determined when detecting the repair mode, but if a new failed data unit (that is, a failed data unit that has not been repaired) is read/written during the operating mode, there is no way to find a matching repair policy, so that the read/write still has errors.

The control logic 101 may be used to control the mode of the chip, for example, using a control bus to input instructions to the control logic 101, so as to switch and control the detection and repair mode and the operation mode of the chip. The address register module 102 may be used to store addresses. The built-in self-test control module 104 is used for sending a self-test instruction, performing self-test on the chip, and reporting the information of the detected failure data unit to the test software. The built-in self test control module 104 may be configured algorithmically by configuring the bus. The read-write data processing module 103 is configured to process the self-test data from the built-in self-test control module 104 and read data and write data from the chip.

It should be noted that, in the scheme shown in fig. 1, the redundant memory resources for failure recovery must be uniformly distributed in each component (bank) or sub-component (sub-bank) of the chip, for example, 16 replacement units of redundant rows are configured for every 2 thousand rows of data units. The minimum granularity of redundancy replacement may be rows, each of which may have 8 kilobit (bit) storage bits. The apparatus 100 may be provided on a logic chip of a chip. However, the setting is a hard reservation mode, and the situation that some replacement units are hardly used to cause resource waste easily occurs; it is also easy to have a situation that the corresponding replacement unit of some parts is insufficient, and so on. In contrast, in the solution of the embodiment of the present application, the replacement unit can be dynamically called, so that the above limitation is not imposed, that is, there is no need to set uniformly distributed redundant storage resources in each component of the chip.

Fig. 2 is an application schematic diagram of a scheme for repairing a chip according to an embodiment of the present application. The chip may be, for example, a memory chip, which may be, for example, a DRAM chip. In the application scenario shown in fig. 2, the chip repair is implemented by the chip repair apparatus 200. The apparatus 200 may include a control module 201, an address management module 202, a self-test module 203, a read-write management module 204, a failure adjustment module 205, and a failure repair module 206. The apparatus 200 may be disposed in a logic chip of a chip to perform a test repair on a memory chip (e.g., a DRAM chip) of the chip, and the apparatus 200 may also be used to perform a test repair on other memory chips than the DRAM.

The control module 201 may be used to set the mode or parameters of the chip, etc., for example, it is assumed that the mode in which the chip may be set includes an online detection mode and an operation mode. Two modes are described below.

In the online detection mode, the chip does not process or receive external access from the outside. That is, in the online detection mode, operations such as a read operation or a write operation cannot be performed from the outside to the chip. It should be noted that, the online detection mode is different from the detection and repair mode shown in fig. 1, and in the online detection mode, the chip is in a working state when viewed from the outside, which is equivalent to detecting the chip by using the working gap of the chip, and the chip does not need to be taken off line or even detached from the originally set position. The detection and repair mode shown in fig. 1 often occurs before the chip leaves the factory or when the chip returns to the factory for maintenance, while the online detection mode shown in fig. 2 is performed while the chip is still in use, and the chip does not necessarily need to be returned to the factory for maintenance. Such a repair of FIG. 2 may be referred to as an online repair or a dynamic repair. It should be understood that the chip described in fig. 2 may additionally include a check repair mode, that is, the chip described in fig. 2 may also perform the off-line repair described in fig. 1 or referred to as static repair.

In the on-line inspection mode, the chip can be inspected and repaired by the apparatus 200. Alternatively, the apparatus 200 may obtain self-test data generated during the self-test through, for example, the built-in online self-test control module 203, so as to find out whether each part of the chip has an abnormality. For example, a self-test operation may be initiated by the self-test module 203 in a configurable algorithm and a failed data unit is discovered by the ECC mechanism during the self-test.

In the working mode, the chip can receive and process accesses such as read operation and write operation from the outside. In the working mode, the chip can not be detected, but external access is not always continuously performed, so that the chip can still be detected by using the gap of the external access, which is equivalent to switching the chip to the online detection mode by using the gap of the external access. In other words, internal access, e.g., internal read and write operations, may be performed to the chip with gaps in external access, so that failed data units may be detected.

It should be noted that the online detection mode and the operation mode are for facilitating understanding of the technical solutions of the embodiments of the present application, and such a mode division process does not necessarily exist. In the embodiment of the present application, the mode division may be performed, but the mode division may not be performed, and instead, the online detection mode may be regarded as a response process when an access from a read/write operation inside the chip is received, and the operation mode may be regarded as a response process when an access from a read/write operation outside the chip is received.

Alternatively, the mode of the chip may be switched and controlled by the control module 201, and when the mode division is not performed, the mode division corresponds to control of whether the chip receives and processes internal access or receives and processes external access by the control module 201. For example, it may be set to initiate M internal accesses every time N external accesses are received, where M, N are positive integers. For further example, it may be set that 1 internal access is initiated every 4 external accesses are received; m, N may also be set to a variable value, such as setting to initiate 2 internal accesses every 5 external accesses received during a period of time, 3 internal accesses every 3 external accesses received during another period of time, and so on. In the embodiment of the present application, there is no limitation on the values of M and N, and they are not listed. For another example, the time interval may be set to control the mode of the chip, for example, the external access may be set to be received in the first time interval, the external access may not be received in the second time interval, and the like, the numerical relationship between the first time interval and the second time interval may be further set, and the time interval may be set to be a variable value, and the like, which are not listed herein.

Optionally, a control bus may be used to input an instruction to the control module 201 to implement real-time control of the mode, or a preset instruction is configured in the control module 201, so that the control module 201 may control the mode of the chip, or so that the control module 201 may control whether the chip receives and/or processes access such as internal and/or external read/write operations.

The address management module 202 may be configured to store addresses of data units, so as to find storage contents, such as data corresponding to a certain data unit, according to the address of the data unit.

The self-test module 203 may be configured to initiate a self-test request, perform a self-test on the chip, and send information of the detected failure data unit to the failure adjustment module 205, so that the failure adjustment module 205 may perform subsequent operations. In addition, the information of the detected failure data unit can be reported to the test software at the same time. The test software can be independent of the chip and can also be used for processing the detection result of the chip. It should be noted that, the self-test module 203 is different from the built-in self-test module 104 shown in fig. 1, the self-test module 203 can perform detection on a chip when the chip is in an online state, that is, the chip can be detected without performing offline detection on the chip, and the built-in self-test module 104 needs to perform detection on the chip when the chip is in an offline state. The introspection module 203 may obtain the error detection information and perform operations such as querying and updating on the failure recovery module 206, so that the recovery of the failed data unit can be adjusted in real time. The self-test module 203 may run when the chip is in an online state, may monitor the result of ECC error detection in real time, and the newly found failed data unit may be dynamically added to the failure repair module 206 to repair it.

Alternatively, the self-test module 203 may be configured with an algorithm, and the configuration of the algorithm may be a preset configuration, or the configuration of the algorithm may be set to be variable, and so on.

The read-write management module 204 may be configured to process self-test data from the self-test module 203, repair instructions and/or data of repaired failed data units from the failure repair module 206, and ECC detection result information from read data and write data of the chip. The read-write management module 204 may also be configured to send the generated error detection information of the failed data unit to the failure adjustment module 205.

The failure adjustment module 205 may be configured to monitor parameter information of each component of the chip in real time, and determine how to repair the chip according to the obtained parameter information, which is hereinafter referred to as a repair operation performed on the chip for convenience of description. The parameters may include temperature, failure information, refresh period, etc., and several of the parameters are described below.

Temperature refers to the temperature of the various components of the chip, such as the real-time temperature of the various components of the chip during operation. Alternatively, the temperature may be acquired using temperature sensors provided at respective portions of the chip.

The failure information may comprise information of the failed data unit, for example, may comprise an address of the failed data unit, and may further comprise error detection information of the failed data unit, which is further explained below.

The error detection information may include, for example, the number of times the failed data unit was detected as an error during the detection process, such as the number of times the error was detected using an ECC mechanism. The error detection information may include the cumulative number of times the failed data unit was detected as an error, the time at which the error was last detected, the number of times the failed data unit was detected as consecutive errors, and so forth.

Alternatively, a determination criterion for failure, that is, an evaluation criterion for determining whether a certain data unit has failed, may be set. For example, an error number threshold may be set with the error number as a determination criterion, and when the number of operation errors such as reading and writing for a certain data unit is greater than or equal to the error number threshold, the data unit is determined to be invalid, whereas when the number of operation errors such as reading and writing for the data unit is less than the error number threshold, the data unit is determined to be normal. For example, assuming that at a certain time T1, the accumulated number of read/write errors of the data unit a in a period of time before the time T1 reaches the error threshold, the data unit a may be considered to be failed at the time T1; and thereafter when the accumulated number of read/write operation errors for data unit a is less than the error threshold for a period of time before time T2 at another time T2, data unit a may be considered normal at time T2. This may be the case if the data unit a is repaired or it may be the case that the data unit a automatically recovers as the environmental parameters change without failure.

Alternatively or additionally, the number of times that the failed data unit has errors in the detection process or the number of times that the failed data unit has errors in the detection process is correct in succession may also be used to determine whether the data unit has failed. For example, it may be set that when P times of continuous reading and writing of a certain data unit are all error, the data unit is determined to be invalid, when Q times of continuous reading and writing of a certain data unit are all correct, the data unit is determined to be normal, and the like, wherein P, Q may be a positive integer.

Alternatively or additionally, it is also possible to determine whether a data unit has failed by combining the time interval between the time of the last error and the current time (the time at which the self-checking process of this time is started). For example, it may be set that a data unit is considered to be invalid when the accumulated error number is greater than or equal to 4; but it may be added that the data unit is considered to be invalid when the accumulated number of errors is between 2 and 4 and the time interval from the last error time to the current time is less than or equal to 1 minute.

It should be noted that, in the embodiment of the present application, the repair operation on the chip may include various operations, which may include, for example, repair in a conventional sense, that is, repair in a form of, for example, replacing a failed data unit; operations to adjust (change) other chip parameters may also be included, such as adjusting the refresh period of the chip.

The refresh cycle is the time interval from the end of the last refresh to the next full refresh of the chip. The refreshing of the chip is equivalent to a charging process, which can enable data on the chip to be "hardened" to prevent or reduce data loss. For example, DRAM can only hold data for a short period of time, and in order to hold data, DRAM uses capacitive storage and must be refreshed (refresh) once every other period of time, and if the memory cells are not refreshed in time, the stored information is lost. Therefore, it is generally considered that the shorter the refresh period is, the less likely the data is lost, and conversely, the longer the refresh period is, the more likely the data is lost. However, since the refresh requires energy and resources, the refresh cycle cannot be reduced without a lower limit because the refresh cycle is limited by the performance of the chip itself, and thus, unnecessary waste of energy and resources occurs due to the excessively frequent refresh.

In addition, because the refresh cycle of the chip does not change frequently in a normal situation, the refresh cycle of the chip does not need to be acquired every time when the chip is detected.

Since data of the memory chip is stored in the capacitor as electric charges, it is necessary to refresh the capacitor continuously to replenish the electric charges of the capacitor. The retention time of the electric charge in the capacitor can change along with the change of the temperature, under some conditions, the fact that the higher the temperature is, the more the capacitor is prone to electric leakage, the faster the electric charge is leaked, the faster the stored data disappear, and the refresh period is unchanged, which is equivalent to the situation that the capacitor is not charged timely, so that the data unit fails, at the moment, if the refresh period is shortened, the capacitor can be charged timely, the data can be refreshed timely, and the failed data unit does not fail any more.

The failure recovery module 206 may be configured to control a recovery operation performed on a chip, and may also be configured to update the failure information table online, that is, may be configured to determine how to recover the chip according to the self-test parameters such as the obtained failure information, for example, change parameters of the chip, such as a refresh period, according to the self-test parameters, determine a recovery sequence according to the self-test parameters, and modify the failure information table online in real time according to the obtained self-test parameters.

Alternatively, the failure information table of the failure recovery module 206 may be composed of a content addressable register (CAM) and a Static Random Access Memory (SRAM). The CAM can record the address of each invalid data unit for read-write address matching. The error detection information of the failed data unit can be recorded in the SRAM failure information table, for example, the number of times that each failed data unit is detected as an ECC error and the time of the last detection can be recorded in the SRAM failure information table. The failure recovery module 206 may be configured to receive a failure information updating instruction of the failure adjustment module 205, and perform add/delete operation on the failure information table. For example, when the error detection information of a certain failed data unit changes at a certain time, for example, the number of ECC errors and/or the last detected time of the failed data unit changes, the failure information in the failure information table may be updated.

Optionally, a self-checking module 203 may initiate a self-checking operation request to the control module 201, the control module 201 responds to the self-checking request, a control signal is used to perform a self-checking operation on the DRAM, that is, an operation of reading and writing data is performed on the DRAM, then the self-checking module 203 collects self-checking data generated in the self-checking process, and sends the self-checking data to the read-write management module 204, the read-write management module 204 processes the self-checking data and sends generated error detection information to the failure adjustment module 205, the failure adjustment module 205 receives the error detection information, determines a repair operation on the chip according to the error detection information and other acquired self-checking parameters such as temperatures and refresh cycles from other modules, and instructs the failure repair module 206 to perform a corresponding repair operation, and the failure repair module 206 changes parameters such as the refresh cycles or sends a repair instruction or a failure data unit to the read-write management module 204 according to an instruction from the failure adjustment module 205 And the corresponding repair data, so that the read-write management module 204 executes the corresponding repair operation on the failed data unit.

The following describes a flow of a method for repairing a chip according to an embodiment of the present application with reference to fig. 3 by taking the apparatus 200 shown in fig. 2 as an example. Fig. 3 is a schematic flow chart of a method for repairing a chip, which may be a memory chip, according to an embodiment of the present application. The steps of fig. 3 are described below.

301. And obtaining self-checking parameters of the chip.

Alternatively, a self-test operation request may be initiated by the self-test module 203 to the control module 201 according to a preconfigured algorithm, so that the apparatus 200 can perform a self-test on the chip to obtain self-test parameters of each component or each failure data unit of the chip.

Optionally, the self-test parameters may include temperature and failure information, wherein the failure information may include address and error detection information of a failed data unit, and the like.

It should be noted that, in general, the number of data units of a chip is large, and the arrangement of the temperature sensors is usually considered in terms of physical size, for example, the temperature sensors are arranged at different positions of the chip, but generally, the temperature sensors are not concentrated on each data unit, and therefore, a certain number of data units share the temperature detected by one temperature sensor. Assuming, for example, that the chip includes 4 components, each of which is provided with a temperature sensor, the temperature of each component can be used to represent the temperature of the data cells within each component.

It should also be understood that the frequency of acquisition of temperature and the frequency of acquisition of failure information may differ, that is, failure information may have been acquired 100 times over a period of time, only 10 times temperature data, etc. This is because the frequency of the self-test of the chip depends on the program and algorithm settings for the self-test operation and the performance of the chip itself, and the frequency of the temperature acquisition depends on the performance of the temperature sensor itself and the program and algorithm settings for the temperature acquisition operation of the temperature sensor, which may cause the difference between the acquisition frequencies. In addition, it is generally considered that self-test operations on a chip are more frequent, and each self-test may detect a failed data unit, but in contrast, the temperature does not suddenly change in a short time, so that the temperature may be acquired less frequently in a short time interval.

Optionally, the self-test parameters may also include other parameters such as refresh period. It should be noted that, in the using process of the chip, the refresh cycle of the chip often does not need to be changed frequently, or the refresh cycle of the chip can be considered to be changed rarely, so that it is a little redundant if the refresh cycle of the chip is obtained again every time of detection, and omitting this step can also reduce power consumption, and reduce resources and the like required by the chip to execute the process. For another example, when the chip changes the refresh cycle, the value of the changed refresh cycle may be synchronously saved, and only one refresh cycle needs to be read at the initial time when the chip starts to work. For further example, in the using process of the chip, after the chip is powered on or initialized, the relevant module sends the refresh period to, for example, the control module 201, and the control module 201 obtains the refresh period and sends the refresh period to the failure adjustment module 205, and in the process of performing self-test or normal operation on the subsequent chip, the control module 201 obtains and sends a new refresh period after the change only when the refresh period changes.

It should be understood that there is no limitation on the acquisition time for all parameters. That is, during the detection (self-test) of the chip initiated at the current time, only one or more parameters of the self-test parameters may be obtained, for example, temperature information of each component of the chip and/or failure information of each component of the chip may be obtained during the detection at the current time. For another example, the changed refresh cycle may be synchronously saved when the chip changes the refresh cycle, so that a new refresh cycle may be obtained when the chip performs the self-test for the first time after the refresh cycle is changed, and the refresh cycle may not be repeatedly obtained when the chip performs the self-test while the refresh cycle is not changed. For another example, if the time interval between several detections is small, the temperature will not change suddenly in normal conditions, and therefore, the temperature information may not be obtained during the several detections, and so on. That is, when acquiring the self-test parameters of the chip, it may be a partial acquisition or a complete acquisition, and when and how to acquire the parameters may be realized by the control module 201.

In addition, for the self-checking parameter acquisition of the chip, no limitation exists on the number of each component of the chip. That is, in a single detection process, part or all of the chip components may be detected, for example, each component may be divided into a plurality of groups, and detection is performed in turn according to the groups, and details are not described herein. It is assumed that the chip is not divided into components, and may also be configured to detect part or all of the data units, for example, the data units may be divided into multiple groups, and detection may be performed in turn according to the groups, and so on, which are not described herein again.

302. And repairing the chip according to the self-checking parameters.

Optionally, the chip may be repaired in different situations according to the obtained self-inspection parameters of the chip. It should be noted that, in the embodiment of the present application, the repairing operation may include various cases, which are exemplified below with reference to fig. 4.

Fig. 4 is a schematic flowchart of a repair operation performed on a chip according to a self-test parameter according to an embodiment of the present application. The chip may be, for example, a memory chip, which may be, for example, a DRAM chip. Reference will first be made to the terms referred to in figure 4.

Repairing capability: it is assumed that at the time of actual repair, a repair manner similar to conventional replacement is employed. That is, the read and write operations to the failed data unit are internally replaced with the read and write operations to the corresponding replacement unit, which is not sensed by the chip exterior. However, this repair capability is limited because the memory module for repairing data needs to be provided in the chip, and other resources may need to be allocated for performing the repair process, which makes it impossible to perform the repair of the data unit without limitation. Therefore, the repair capability of the chip may be evaluated to some extent, for example, the repair capability may be evaluated by a capability parameter of failed data units capable of being repaired simultaneously, further, for example, the repair capability may be represented by the maximum number of data units that can be repaired simultaneously, or the repair capability may be represented by the maximum number of repair data replacement units, or the repair capability may be represented by the storage space required by the failed data or the storage space of the repair data, for example, the repair capability may be represented by 4MB assuming that the maximum repair data can store 4 Megabytes (MB).

First temperature threshold: when the temperature is greater than or equal to the first temperature threshold, it may be considered that the repair capability is far from adequate to cope with the failure situation that may occur. In general, under the premise that other parameters are not changed, it may be considered that the higher the temperature is, the higher the possibility of the data unit failing is, for example, when it may be determined through experiments, simulations, or experiences that the temperature is higher than a certain value, the probability of the failed data unit occurring is very high, and at this time, the number of the failed data units is already much greater than the maximum number supported by the repair capability.

The second temperature threshold value: the second temperature threshold may be less than the first temperature threshold. When the temperature is greater than the second temperature threshold and less than the first temperature threshold, the number of failed data units may be greater than the maximum number supported by the repair capability, or the repair capability may not be exceeded. In this case, a part of the failed data units may be preferentially processed by certain selection or given certain rules. On the other hand, when the temperature is less than or equal to the second temperature threshold, the number of failed data units will not generally exceed the repair capability. In this case, operations such as selection of the failed data unit may not be performed, and the number of failed data units may be repaired as much as the number of failed data units. Of course, it can also be set to preferentially process partial invalid data units without affecting the repair effect.

In addition, in the above temperature threshold values, the temperature threshold value or values are equal to each other, and when the temperature threshold value or values are equal to each other, the processing may be performed in a case of being greater than the threshold value or in a case of being smaller than the threshold value, and there is no limitation, and therefore the above "greater than or equal to" and "less than or equal to" may not include "equal to". Furthermore, the first temperature threshold and the second temperature threshold are not necessarily both applied; in various embodiments of the present application, only one temperature threshold may be used, or both may be used.

401. The temperature is obtained.

Alternatively, the temperature information may be obtained by using the temperature sensor in the method provided above, and the description is not repeated here.

402. It is determined whether the temperature acquired in step 401 is greater than or equal to the first temperature threshold value, and step 403 is executed when the determination result is yes, and step 404 is executed when the determination result is no. It should be noted that only the case when the determination result is "yes" may be considered, only the case when the determination result is "no" may be considered, or both of them may be considered.

403. The parameters are adjusted so that the failed data unit is no longer failed.

As shown in fig. 4, after the temperature is obtained, it may be determined whether the temperature is greater than or equal to the first temperature threshold, and when the temperature is greater than or equal to the first temperature threshold, the refresh period may be adjusted so that the failed data unit caused by the temperature increase is no longer failed. That is to say, after the temperature is obtained, it may be determined whether the temperature is greater than or equal to the first temperature threshold, and when the temperature is greater than or equal to the first temperature threshold, the refresh period may be shortened, so that the failure data unit caused by the temperature increase is no longer failed. In this case, the temperature is higher than the first temperature threshold, and the failed data units in the components of the chip may be many failures caused by the temperature, and the failures can be solved by refreshing. In step 403, a relatively serious failure condition caused by an over-temperature can be effectively solved by adjusting parameters (e.g., shortening the refresh period).

Since data of the memory chip is stored in the capacitor as electric charges, it is necessary to refresh the capacitor continuously to replenish the electric charges of the capacitor. The retention time of the electric charge in the capacitor can change along with the change of the temperature, under some conditions, the fact that the higher the temperature is, the more the capacitor is prone to electric leakage, the faster the electric charge is leaked, the faster the stored data disappear, and the refresh period is unchanged, which is equivalent to the situation that the capacitor is not charged timely, so that the data unit fails, at the moment, if the refresh period is shortened, the capacitor can be charged timely, the data can be refreshed timely, and the failed data unit does not fail any more.

Alternatively, the first temperature threshold may be determined by comparing the number of failed data units at different temperatures. For example, assuming that the number of failed data cells is 20 at a temperature of 30 ℃ and reaches 200 at a temperature of 75 ℃, it can be shown that the failure rate caused by the temperature rise is large and is likely to have exceeded the maximum repair number of the repair capability, and shortening the refresh period can effectively solve the more serious failure condition. In addition, the first temperature threshold value can be determined by comparing the difference value between the number of the failure data units at different temperatures and the number of the failure data units when the data units are shipped from a factory. In addition, the first temperature threshold may also be determined by comparing the difference between the number of failed data units at different temperatures and the maximum repair number corresponding to the maximum repair capability.

Alternatively, the first temperature threshold may also be determined according to the fraction of failed data units in all failed data units due to temperature at different temperatures. For example, assuming that the above ratio is 30% when the temperature is 50 ℃, and 80% when the temperature is 75 ℃, 75 ℃ is set as the first temperature threshold value according to statistical data. Further, it may be set that the corresponding temperature is the first temperature threshold when the ratio reaches a certain value, and for example, it may be set that the corresponding temperature is set as the first temperature threshold when the ratio is greater than or equal to 60%.

Optionally, the first temperature threshold may also be determined according to an upper temperature limit value of normal operation of the chip. For example, assuming that the upper limit of the temperature for normal operation of the chip is 85 ℃, the first temperature threshold may be set to a value between 70 ℃ and 80 ℃ to ensure that the chip can still operate normally through repair. It should be noted that the temperature parameters such as the normal operating temperature range of the chip, the upper limit value of the normal operating temperature, the lower limit value of the normal operating temperature, etc. all depend on the performance of the chip itself, and the temperature parameters of the chips for different purposes and the chips for different production processes may be different, for example, the upper limit value of the normal operating temperature of the chip may also be 90 ℃, 82 ℃, 100 ℃, 105 ℃, etc., and may also be other upper limit values or lower limit values of the temperature, which is not limited herein.

For example, if the repair capability of a chip is evaluated by the number of data units that can be repaired at a time. For further example, assuming that at most 2 thousand failed data units can be repaired simultaneously by the chip each time, assuming that the first temperature threshold is 70 ℃, when the actual temperature obtained at a certain time is 75 ℃, an operation of shortening the refresh period may be performed to solve the failure problem. For another example, if experimental data show that when the temperature is higher than 80 ℃, the chip has at least 2 ten thousand data units failing, which is far beyond the repair capability of repairing 2 thousand failed data units at the same time, when the obtained temperature information shows that the temperature of most parts of the chip is about 80 ℃, at this time, there is no way to repair 2 ten thousand data units, so that the refresh period of the chip can be shortened, for example, the original refresh period is 2 milliseconds, and the refresh period is now modified to 1 millisecond, that is, by refreshing the data in time, the data does not disappear, and at this time, the chip does not need to be repaired. And assuming that the temperature of each part of the obtained chip is obviously reduced after a period of time, for example, to 30 ℃, experimental data show that when the temperature is about 30 ℃, the possibility of failure of each part of the chip is very low, the shortened refresh period can be readjusted to the original refresh period, or the originally shortened refresh period is properly increased.

It should be noted that the data unit failure may be caused by temperature, and may also be caused by other factors, such as physical damage. But temperature does not typically shock, so for failures that are not caused by temperature (i.e., other factors) may often be discovered and repaired during self-testing before the temperature reaches the first threshold; failure due to other factors occurring while the temperature is raised can still be discovered and repaired in subsequent self-tests. It can be understood that, assuming that the temperature has not reached the first temperature threshold at the previous self-test and the detected data unit a is normal, but the temperature has reached the first temperature threshold at the current self-test and the detected data unit a is failed, but at this time, the failure cause of the data unit a cannot be determined by the quality inspection at the same time as a result of the temperature increase, after the refresh period is shortened by the current time, even if the data unit a is not repaired, it can still be detected and repaired in the next or subsequent self-test process. It will also be appreciated that when a failed data unit is discovered, it is generally not necessary to determine the cause of its failure, so if a failure occurs that is not temperature induced, it will also be discovered and repaired during subsequent self-test and online repair. That is to say, in the embodiment of the present application, there is no limitation on the failure cause of the failed data unit, and the failure cause can be discovered and repaired through continuous self-checking.

That is, after the refresh period is shortened, data cells that are still failing may be detected in subsequent self-tests, and such failed data cells may be repaired further based on the failure information, for example. That is, for example, the failed data units that still fail after the refresh period is shortened may be selected to a certain extent, and a part of the failed data units may be selected to be repaired preferentially, or the failed data units may be repaired in a certain order. For example, part or all of the failed data units may be determined to be repaired according to the repair capability and the number of the actual failed data units, or, for example, the failed data units may be repaired in the order of the number of errors from a few to a few regardless of the repair number, that is, the failed data units with a large number of errors may be repaired preferentially, or, for example, the failed data units in a certain area of the chip may be repaired preferentially.

It should also be understood that in the current repair process, the partially failed data unit can be repaired according to the failure information while the refresh period is shortened. For example, while the refresh cycle is shortened, the failed data unit with the largest number of errors in the failure information may be repaired preferentially, or the failed data unit of some parts or specific areas of the chip may be repaired preferentially.

It should be further noted that the failure caused by the temperature may be understood as a "soft failure," that is, a failure that can be eliminated by changing a chip parameter, and the embodiment of the present application mainly takes the "soft failure" caused by the temperature as an example for introduction, but the same method (parameter adjustment) may be used for other "soft failures" so that the failure data unit does not fail any more, and is not described herein again.

Alternatively, after the refresh period is shortened, the shortened refresh period may be readjusted to the original refresh period according to the temperature, or the original shortened refresh period may be increased appropriately.

When the temperature is less than the first temperature threshold (i.e., "no" from step 402), steps 404 and beyond may be performed.

404. And judging whether the temperature is greater than a second temperature threshold value, executing the step 405 when the judgment result is yes, and executing the step 406 when the judgment result is no.

405. It is determined whether the failure condition exceeds the repair capability, and step 407 is executed when the determination result is yes, and step 406 is executed when the determination result is no.

406. All failed data units are repaired.

407. And repairing part of the failure data units according to the failure information.

As shown in fig. 4, when the temperature is less than the first temperature threshold, it may be further determined whether the temperature is greater than the second temperature threshold, and corresponding operations may be performed. For example, when the temperature is greater than the second temperature threshold and less than the first temperature threshold, which indicates that the failed data unit to be repaired may not be repaired due to exceeding the repair capability at this time, a certain selection may be performed on the failed data unit detected in the self-checking process, and a part of the failed data units is selected to be repaired preferentially, or the failed data units are repaired in a certain order.

It should be noted that, the judgment on the relationship with the second temperature threshold may not be performed, but when the temperature is less than the first temperature threshold, the partial or all of the failed data units are determined to be repaired according to the failure information and/or the temperature, or the repair is performed according to the repair sequence of the failed data units.

Alternatively, the repair order of the failed data units may be determined by using the failure information of the failed data units, and when a failure occurs, the failed data units may be repaired according to the repair order.

Alternatively, whether to repair the failed data unit may be determined according to the failure information of the failed data unit. For example, the repair order of the invalid data units may be sorted according to the error detection information, for example, the invalid data units with a large number of errors are preferentially processed, for example, the invalid data unit with the latest error occurrence time closest to the current time is preferentially processed, for example, the invalid data unit with the largest number of consecutive errors is preferentially processed, and the error number, the latest error occurrence time, the number of consecutive errors, and the like may be read from the error detection information.

Optionally, the failed data unit to be repaired may be comprehensively determined by combining the failure information and the repair capability. Alternatively, the failed data units may be repaired according to the repair order when the failure condition exceeds the repair capability, and all of the failed data units may be repaired when the failure condition does not exceed the repair capability. For example, assuming that the repair capability is represented by the maximum number of failed data units that can be processed simultaneously, it may be determined whether the number of failed data units at the current time is greater than the maximum repairable number supported by the repair capability, and then the corresponding operation is performed. For example, when the determination result is that the number of the failed data units at the current time is greater than the maximum repairable number supported by the repair capability, the same or similar method as above may be used to select the failed data unit to be preferentially processed, for example, the failed data unit with a larger number of errors or a time closer to the last error, from the failed data units to be processed according to the failure information. Further, a failure data unit or the like that preferentially handles a component having a high temperature may be provided. For another example, when the determination result is that the number of the failed data units at the current time is less than or equal to the maximum repairable number supported by the repairable capability, it indicates that the repairable capability is sufficient, and at this time, operations such as selecting the failed data units may not be performed, which is equivalent to how many failed data units are repaired, but it should be understood that the failed data units of the priority processing part may also be set at this time, and the effect of repairing is not affected.

That is, if the failure information of a certain data unit at a certain time indicates that the data unit has been failed once and the time when the error occurs is far from the current time, it may be determined whether to repair the data unit according to the number of currently failed data units and the repair capability. For example, assuming that the number of data units that need to be repaired at the present time is greater than the maximum number of repair capabilities, a failed data unit with a large number of errors may be preferentially processed, and may not be repaired for the data unit temporarily. For another example, if the number of data units that need to be repaired at the current time is less than the maximum number of repair capabilities, the data units can be repaired.

It should be noted that the repair operation on the chip may include repair in a conventional repair manner and may also include other operations, where the repair of the failed data unit, the shortening of the refresh cycle, the lengthening of the refresh cycle, and the like all belong to repair operations, where the repair of the failed data unit may refer to repair by using a conventional repair manner such as a replacement manner, and the operation on the refresh cycle is an operation example equivalent to using a changed chip parameter, that is, an operation that can use, for example, the above-mentioned adjustment of the refresh cycle, that is, adjustment (change, including shortening, lengthening, restoring, and resetting) of the refresh cycle all belong to the repair operations described in the embodiments of the present application. Adjusting the refresh period and changing the refresh period both refer to changing the refresh period. The shortening, lengthening, and resuming of the refresh period are exemplified below, assuming that the refresh period is 2 msec at time T1, the refresh period may be shortened to 1 msec at time T2 after time T1, or the refresh period may be lengthened to 4 msec at time T2 after time T1, while assuming that the refresh period at time T1 is shortened at time T2, the refresh period may be resumed to 2 msec at time T3 after time T2.

Optionally, the refresh period may also be adjusted according to the second temperature threshold, for example, the shortened refresh period may be extended or resumed when the temperature is less than or equal to the second temperature threshold. Assuming that the refresh period is again shortened by 2 ms, the refresh period is shortened to 1 ms when a temperature greater than or equal to the first temperature threshold is detected, and then the refresh period is lengthened to 1.5 ms, or restored to 2 ms, or lengthened to 3 ms, etc., after the temperature is decreased, for example, when a temperature less than or equal to the second temperature threshold is detected.

That is, the repair operation in the embodiment of the present application includes an operation of repairing a failed data unit, an operation of changing a parameter of a chip, a process of determining and performing a different operation according to a set temperature threshold, and the like.

In addition, in the flow shown in fig. 4, it may also be determined whether the temperature is less than or equal to the second temperature threshold, and when the temperature is less than or equal to the second temperature threshold, the repair capability is enough to repair the failed data unit that may appear at this time, and at this time, operations such as selecting the failed data unit may not be performed, and it is sufficient to repair how many failed data units appear, but it should be understood that, at this time, the failed data unit of the part may also be set to be processed preferentially, and the repair effect is not affected. When the temperature is greater than the second temperature threshold, the failed data unit to be repaired can be selected from the failed data units to be repaired according to the failure information.

In addition, when the temperature is less than or equal to the second temperature threshold, the parameter changed when the temperature is higher can be recovered, for example, the refresh period can be prolonged appropriately. That is, assuming that a case where the temperature is greater than or equal to the first temperature threshold value occurs during the detection at the previous time, an operation of, for example, shortening the refresh cycle is adopted so that the refresh cycle is shortened. And in the detection process of the current moment, if the temperature of the current moment is less than or equal to the second temperature threshold value, the shortened refresh cycle can be properly prolonged or restored to the value before the shortening.

It should be noted that, in the method shown in fig. 4, the temperature obtained in step 401 may be a plurality of temperatures of different regions (components) of the chip, so that the above steps may be respectively performed on the temperature of each region in steps 402 and 407, and details are not repeated herein. When the above steps are executed, the temperatures of the respective regions may also be comprehensively considered, for example, if it is found that the temperature of some regions of the chip is greater than the first temperature threshold at a certain self-test, and the temperature of some regions is less than the first temperature threshold, the operation of shortening the refresh cycle may be performed on the regions whose temperature is greater than the first temperature threshold, and for the regions whose temperature is less than the first temperature threshold, some or all of the failed data units may be repaired according to the failure information and/or the temperature. In this case, since the region where the refresh cycle is shortened does not occupy other repair resources, the repair resources can be preferentially used for the region where the repair temperature is lower than the first temperature threshold.

It should be noted that fig. 4 shows an example of a determination process that can be performed, but many other cases exist. Firstly, the judgment of the two temperature thresholds has no restriction of the sequence, and the judgment can be carried out simultaneously or successively. Second, the determination of multiple temperature thresholds may be performed simultaneously, e.g., whether the temperature is greater than or equal to the first temperature threshold and less than or equal to the second temperature threshold may be determined simultaneously. Furthermore, the determination of the temperature threshold may be performed only one or more, for example, only the first temperature threshold may be considered, only the second temperature threshold may be considered, both the first temperature threshold and the second temperature threshold may be considered, and the like, as long as the logic can be performed, and the determination is within the scope described in the embodiments of the present application. It should also be understood that other temperature thresholds may also be set. Some of the possible scenarios are described below in connection with fig. 5-8.

Fig. 5 to fig. 8 are schematic flow diagrams of performing a repairing operation on a chip according to a self-test parameter according to an embodiment of the present application. The chip may be, for example, a memory chip, which may be, for example, a DRAM chip.

The flow (a) in fig. 5 includes steps 501a to 505a, which are described below.

501a, acquiring the temperature.

502a, determining whether the temperature obtained in step 501a is less than or equal to a second temperature threshold, and executing step 504a when the determination result is yes.

503a, determining whether the temperature obtained in step 501a is greater than or equal to a first temperature threshold, and executing step 505a when the determination result is yes.

It should be noted that, the steps 502a and 503a are executed independently, and may be executed simultaneously or not simultaneously, and the execution order is not consecutive.

504a, extending the refresh period as appropriate.

It should be noted that the appropriate extension of the refresh period in step 504a does not presuppose that the refresh period has been shortened, that is, even if the refresh period has not been shortened before step 504a is executed, step 504a can still be executed.

505a, shortening the refresh period.

That is, in the flow shown in fig. 5 (a), the relationship between the temperature and the first temperature threshold and the relationship between the temperature and the second temperature threshold may be determined, when the temperature is greater than or equal to the first temperature threshold, the failed data unit is no longer failed by shortening the refresh cycle, and when the temperature is less than or equal to the second temperature threshold, the refresh cycle may be appropriately extended, especially if the previous refresh cycle is short, resources occupied by refresh may be reduced by appropriately extending the refresh cycle without affecting the repair effect. It is to be noted that, in this judgment, it is considered that the possibility of failure is high when the temperature is greater than or equal to the first temperature threshold value, resulting in insufficient restoration capability, and it is considered that the possibility of failure is relatively low when the temperature is less than or equal to the second temperature threshold value, and restoration capability is generally sufficient.

The flow (b) in fig. 5 includes steps 501b to 505b, which are described below.

501b, acquiring the temperature.

502b, determining whether the temperature obtained in the step 501b is greater than or equal to a first temperature threshold, executing the step 503b when the determination result is yes, and executing the step 504b when the determination result is no.

503b, shortening the refresh period.

504b, determining whether the temperature obtained in step 501b is less than or equal to the second temperature threshold, and executing step 505b when the determination result is yes.

505b, extending or resuming the shortened refresh period.

It should be noted that, in the flow shown in fig. 5 (b), the execution of step 502b and step 504b is sequential, and step 502b is executed first and then step 504b is executed.

That is, in the flow shown in (b) of fig. 5, the relationship between the temperature and the first temperature threshold is determined first, the refresh period is shortened when the temperature is greater than or equal to the first temperature threshold, and the relationship between the temperature and the second temperature threshold is continuously determined when the temperature is less than the first temperature threshold. And when the temperature is less than or equal to the second temperature threshold, prolonging or restoring the shortened refreshing period.

It can be seen that, in fig. 5, (a) and (b) both use the first temperature threshold and the second temperature threshold to decide what operation to perform subsequently, but the judgment process in the scheme (a) is not sequential, and the judgment process in the scheme (b) is sequential, and one is judged first and then the other is judged. It should be understood, however, that in the scenario (b) in fig. 5, the relationship between the temperature and the second temperature threshold may also be determined first, and then the relationship between the temperature and the first temperature threshold may be determined.

Steps 601 to 604 are included in fig. 6, which are described below.

601. The temperature is obtained.

602. It is determined whether the temperature acquired in step 601 is greater than or equal to the first temperature threshold, and step 603 is performed when the determination result is yes, and step 604 is performed when the determination result is no.

603. The refresh period is shortened.

604. And determining to repair part or all of the failed data units according to the failure information and/or the temperature.

That is, in the flow shown in fig. 6, the relationship between the temperature and the first temperature threshold may be determined, and when the temperature is greater than or equal to the first temperature threshold, the refresh period is shortened; and when the temperature is smaller than the first temperature threshold value, determining to repair part or all of the failed data units according to the failure information and/or the temperature. It should be noted that the failed data unit to be repaired may be determined only according to the failure information, or whether the temperature is smaller than the second temperature threshold may be further determined only according to the temperature, and when the temperature is smaller than the second temperature threshold, all the failed data units are repaired, or the failed data unit to be repaired may be determined comprehensively according to the failure information and the temperature.

For example, a part or all of the failed data units may be selected for repair based on the failure information and the maximum number of repairs that can be supported by the repair capability of the chip. It should be noted that, regardless of whether it is determined to repair part of the failed data units or determine to repair all the failed data units, the failed data units may be further repaired according to the repair order, or certainly, the failed data units may not be repaired according to the repair order, for example, the determined failed data units to be repaired may be repaired at the same time. The description of the repair according to the repair sequence may be described with reference to fig. 7.

For example, a part or all of the failed data units may be repaired according to the failure information and the temperature, the relationship between the temperature and the second temperature threshold may be determined first, so as to determine the failed data units to be repaired, when the temperature is less than or equal to the second temperature threshold, all of the failed data units may be repaired, when the temperature is greater than the second temperature threshold, the failed data units to be repaired may be determined by using the failure information, or the failed data units may be repaired in the repair order, and so on.

Steps 701 through 704 are included in fig. 7, which are described below.

701. The temperature is obtained.

702. It is determined whether the temperature acquired in step 701 is greater than or equal to a first temperature threshold value, and step 703 is executed when the determination result is yes, and step 704 is executed when the determination result is no.

703. The refresh period is shortened.

704. And repairing the failed data units according to the repairing sequence.

That is, in the flow shown in fig. 7, the relationship between the temperature and the first temperature threshold is determined, and when the temperature is greater than or equal to the first temperature threshold, the refresh period is shortened; and when the temperature is less than the first temperature threshold, the failed data units can be repaired according to the repair sequence.

Optionally, when the temperature is lower than the first temperature threshold, part or all of the failed data units may be repaired according to the repair sequence of the failed data units, part or all of the failed data units may be determined to be repaired according to the failure information and the repair capability, and part or all of the failed data units may be further determined to be repaired according to the temperature. The following examples are given.

For example, the repair order of the failed data units may be sorted according to the failure information, for example, priority sorting may be performed, data units with a large number of times of errors are repaired preferentially, or failed data units of certain specific areas or specific components are processed preferentially, or failed data units with errors occurring recently are processed preferentially, and the like. When repairing, the failed data unit can be repaired according to the determined repairing sequence.

The repair order may also be determined in conjunction with the temperature, for example, when the obtained temperature includes a plurality of temperature values of different portions of the chip, it may be set to preferentially repair the failed data unit corresponding to the portion with the lower temperature.

It should be understood that the repairing operation according to the repairing sequence may be combined with other operations, or may be performed independently, that is, when the chip is repaired according to the self-test parameters, the repairing operation may be performed according to the repairing sequence.

Steps 801 to 803 are included in fig. 8, and are described below.

801. The temperature is obtained.

802. It is determined whether the temperature acquired in step 801 is less than or equal to the second temperature threshold value, and step 803 is executed when the determination result is "yes".

803. All failed data units are repaired.

As shown in fig. 8, the temperature is acquired in step 801, it is determined in step 802 whether the temperature is less than or equal to the second temperature threshold, and when the determination result is "yes", step 803 is executed to repair all the failed data units. That is to say, the relationship between the temperature and the second temperature threshold is determined, and when the temperature is less than or equal to the second temperature threshold, the temperature is considered to be low, and the repair capability is generally not insufficient, so that all the failed data units can be repaired without considering which failed data units are repaired preferentially. At this time, all the failed data units may be repaired in accordance with the repair order.

For each type of situation, it is not listed and described herein.

Alternatively, when repairing the failed data unit, the following method may be used, where repairing may refer to a repairing method that uses a conventional replacing method, and is one of the repairing operations described above. For a write operation, the write data may be copied to the failure recovery module 206 and stored in the corresponding recovery data storage unit by the read/write management module 204. For a read operation, the failure repair control module 204 may be used to read data in a corresponding repair data storage unit and send the data to the read-write management module 204, and the read-write management module 204 performs data replacement and then sends the read data to an external data bus. The repair replacement operation for the failed data element is not perceptible outside the chip.

It should be understood that when not being repaired, there may be other ways of changing the chip parameters besides changing the chip refresh cycle, so that the failed data unit does not fail, for example, the temperature may be lowered by setting a cooling device, so as to reduce the possibility of failure, so that the possible number of failed data units can be within the maximum range that the repair capability can support.

Optionally, the determination criterion of the failure data unit may be adjusted according to a self-test parameter of the chip. This is equivalent to setting the decision criterion relatively more strictly in the case where the probability of occurrence of a failure is low, and relatively more loosely in the case where the probability of occurrence of a failure is high. For example, when the temperature is low, the probability of the occurrence of the failure is low, and the failure may be determined as occurring when at least 2 errors occur, and when the temperature is high, the probability of the occurrence of the failure is high, and the failure may be determined when at least 4 errors occur, or the failure may be determined when the time interval from the current time to the time when at least 2 errors occur and the last error occurs is less than a seconds, and a is a real number. It should be understood that the above description is by way of example only and that no limitations on numerical values or decision conditions exist.

In the repairing method provided in fig. 3, different repairing operations can be performed on the chip according to the self-checking parameter of the chip, so that the repairing resources are fully utilized, a better repairing effect is achieved, the repairing quality is improved, and the robustness of the chip is improved.

The method for repairing a chip according to the embodiments of the present application is described above with reference to the accompanying drawings, and the apparatus for repairing a chip according to the embodiments of the present application is described below with reference to the accompanying drawings. It should be understood that the apparatus for repairing a chip described hereinafter is capable of performing the respective processes of the method for repairing a chip of the embodiment of the present application, and the repeated description will be appropriately omitted when the apparatus for repairing a chip is described below.

Fig. 9 is a schematic block diagram of an apparatus for repairing a chip according to an embodiment of the present application. The chip may be, for example, a memory chip, which may be, for example, a DRAM chip. The apparatus 1000 for repairing a chip shown in fig. 9 includes an acquisition unit 1001 and a processing unit 1002.

The apparatus 1000 may be used to perform the steps of the method for repairing a chip of the embodiments of the present application. For example, the obtaining unit 1001 may be configured to perform step 301 in the method shown in fig. 3, and the processing unit 1002 may be configured to perform step 302 in the method shown in fig. 3.

Alternatively, the obtaining unit 1001 may be configured to obtain a self-test parameter of the chip, where the self-test parameter may include information such as temperature and failure information. The failure information may include an address of the failed data unit and error detection information of the failed data unit, and the error detection information may further include any one or more of information of the number of errors of the data unit, the time of the last error, the number of consecutive errors, and the like.

Optionally, the processing unit 1002 may be configured to perform a repair operation on the chip according to the obtained self-test parameter. For example, when the temperature is high, the refresh period is shortened so that a partially or fully failed data cell is converted to a non-failed data cell. For another example, when the number of the failed data units is greater than the maximum processable number of the processing unit 1002, the failed data units to be repaired may be selected from the failed data units to be repaired according to the failure information, that is, the repair policy may be adjusted according to the failure information. As another example, when the number of failed data units is less than or equal to the processing unit 1002 and the temperature is low, all detected failed data units may be repaired, and so on.

Alternatively, the obtaining unit 1001 may include the self-test module 203 of the apparatus 200 shown in fig. 2, that is, may implement the function of the self-test module 203; and/or, the obtaining unit 1001 may include a failure adjustment module 205, and may obtain self-test parameters such as temperature, failure information, refresh cycle, etc. by using the failure adjustment module 205.

Optionally, the processing unit 1002 may include the failure recovery module 206 and the read-write management module 204 of the apparatus 200 shown in fig. 2, and the processing unit 1002 may further include the control module 201 and the address management module 202.

Optionally, the apparatus 1000 may further include a storage unit for storing various types of data such as self-test parameters, and the storage unit may be independent of the obtaining unit 1001 and the processing unit 1002, or may be integrated in the processing unit 1002, for example, may be integrated in the failure adjustment module 205.

Alternatively, the apparatus 1000 may be provided in a logic component of a chip.

The embodiment of the application also provides a chip, and the chip comprises any device for repairing the chip provided by the embodiment of the application.

The embodiment of the present application further provides a computer-readable storage medium, on which instructions are stored, and when executed, the instructions perform the method for repairing a chip in the above method embodiment.

Embodiments of the present application further provide a computer program product containing instructions, where the instructions, when executed, perform the method for repairing a chip in the foregoing method embodiments.

Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.

It is clear to those skilled in the art that, for convenience and brevity of description, the specific working processes of the above-described systems, apparatuses and units may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.

In the several embodiments provided in the present application, it should be understood that the disclosed system, apparatus and method may be implemented in other ways. For example, the above-described apparatus embodiments are merely illustrative, and for example, the division of the units is only one type of logical functional division, and other divisions may be realized in practice, for example, multiple units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.

The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.

In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit.

The above description is only for the specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present application, and shall be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims (17)

1. A method of repairing a memory chip, comprising:

   acquiring self-checking parameters of a chip, wherein the self-checking parameters comprise temperature and failure information, and the failure information comprises an address of a failure data unit and error detection information of the failure data unit;

   and repairing the chip according to the self-checking parameters.
2. The method of claim 1, wherein performing a repair operation on the chip according to the self-test parameter comprises:

   and when the temperature is greater than or equal to a first temperature threshold value, shortening the refresh cycle of the chip.
3. The method of claim 2, wherein the method further comprises:

   and when the temperature is less than or equal to a second temperature threshold value, prolonging or recovering the shortened refresh cycle, wherein the second temperature threshold value is less than the first temperature threshold value.
4. The method of claim 2 or 3, wherein the performing a repair operation on the chip according to the self-test parameter comprises:

   and when the temperature is smaller than the first temperature threshold value, determining to repair part or all of the failed data unit according to the failure information and/or the temperature.
5. The method of any one of claims 1 to 4, wherein performing a repair operation on the chip according to the self-test parameter comprises:

   and repairing the failure data units according to the repair sequence of the failure data units, wherein the repair sequence is determined according to the failure information.
6. The method of any one of claims 1 to 5, wherein the performing a repair operation on the chip according to the self-test parameter comprises:

   and when the temperature is less than or equal to a second temperature threshold value, repairing all the failed data units.
7. The method of any of claims 1 to 6, further comprising: and adjusting the judgment standard for judging whether the data unit is invalid or not according to the temperature and/or the refresh cycle of the chip.
8. An apparatus for repairing a memory chip, comprising:

   the chip self-checking system comprises an acquisition unit, a detection unit and a processing unit, wherein the acquisition unit is used for acquiring self-checking parameters of a chip, the self-checking parameters comprise temperature and failure information, and the failure information comprises an address of a failure data unit and error detection information of the failure data unit;

   and the processing unit is used for carrying out repair operation on the chip according to the self-detection parameters.
9. The apparatus of claim 8, wherein the processing unit is specifically configured to shorten a refresh period of the chip when the temperature is greater than or equal to a first temperature threshold.
10. The apparatus of claim 9, wherein the processing unit is further to extend or resume the shortened refresh period when the temperature is less than or equal to a second temperature threshold, the second temperature threshold being less than the first temperature threshold.
11. The apparatus according to claim 9 or 10, wherein the processing unit is configured to determine to repair part or all of the failed data unit based on the failure information and/or the temperature, in particular when the temperature is less than the first temperature threshold.
12. The apparatus according to any of claims 8 to 11, wherein the processing unit is specifically configured to repair the failed data units according to a repair order of the failed data units, the repair order being determined according to the failure information.
13. The apparatus according to any of the claims 8 to 12, wherein the processing unit is specifically configured to repair all of the failed data units when the temperature is less than or equal to a second temperature threshold.
14. The apparatus according to any of claims 8 to 13, wherein the processing unit is further configured to adjust a criterion for determining whether a data unit is invalid based on the temperature and/or a refresh period of the chip.
15. A chip, characterized in that it comprises a device according to any one of claims 8 to 14.
16. A chip comprising a processor and a data interface, the processor reading instructions stored on a memory through the data interface to perform the method of any one of claims 1 to 7.
17. A computer-readable storage medium, characterized in that the computer-readable medium stores program code for execution by a device, the program code comprising instructions for performing the method of any of claims 1 to 7.

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