CN114927099B - Display panel, driving method thereof and display device - Google Patents
Display panel, driving method thereof and display device Download PDFInfo
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- CN114927099B CN114927099B CN202210681843.7A CN202210681843A CN114927099B CN 114927099 B CN114927099 B CN 114927099B CN 202210681843 A CN202210681843 A CN 202210681843A CN 114927099 B CN114927099 B CN 114927099B
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- 238000000034 method Methods 0.000 title claims abstract description 25
- 238000001514 detection method Methods 0.000 claims description 24
- 230000004044 response Effects 0.000 claims description 14
- 238000002834 transmittance Methods 0.000 claims description 4
- 230000000694 effects Effects 0.000 abstract description 4
- 238000010586 diagram Methods 0.000 description 6
- 238000004891 communication Methods 0.000 description 3
- 230000005540 biological transmission Effects 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 230000006978 adaptation Effects 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 230000002708 enhancing effect Effects 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 238000003384 imaging method Methods 0.000 description 1
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Classifications
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/02—Improving the quality of display appearance
- G09G2320/0233—Improving the luminance or brightness uniformity across the screen
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/06—Adjustment of display parameters
- G09G2320/0626—Adjustment of display parameters for control of overall brightness
Abstract
The disclosure relates to the technical field of display, and discloses a display panel, a driving method thereof and a display device. The display panel comprises a display area, wherein the display area comprises a first display area and a second display area at least partially surrounding the first display area, the first display area is used for displaying images and transmitting light, and the second display area is used for displaying images; a non-display area surrounding the display area; the display driving integrated circuit is positioned in the non-display area and is used for respectively acquiring a first gray scale voltage of a sub-pixel in the first display area and a second gray scale voltage of a sub-pixel in the second display area, determining a compensation voltage based on a voltage difference between the first gray scale voltage and the second gray scale voltage, and outputting the compensation voltage to the sub-pixel in the first display area. The display panel can make up the display brightness difference between the first display area and the second display area, and improves the display effect.
Description
Technical Field
The disclosure relates to the technical field of display, in particular to a display panel, a driving method thereof and a display device.
Background
With the development of the full-screen display technology in the forms of Liu Haibing, perforated screens, water drop screens, lifting screens and the like, the requirements of consumers on the full-screen display technology are higher.
The full screen generally places a sensor such as a camera on the side of the lower non-display surface of the display substrate, and the under-screen image pickup area has certain transmittance and a display function. In the related art, there is a difference between the display brightness of the under-screen image pickup area and the display brightness of the normal display area.
It should be noted that the information disclosed in the above background section is only for enhancing understanding of the background of the present disclosure and thus may include information that does not constitute prior art known to those of ordinary skill in the art.
Disclosure of Invention
The present disclosure aims to overcome the above-mentioned shortcomings of the prior art, and provides a display panel, a driving method thereof and a display device.
According to an aspect of the present disclosure, there is provided a display panel including: a display region comprising a first display region and a second display region at least partially surrounding the first display region, the first display region having a light transmittance greater than the second display region; a non-display area surrounding the display area; the display driving integrated circuit is positioned in the non-display area and is used for respectively acquiring a first gray scale voltage of a sub-pixel in the first display area and a second gray scale voltage of a sub-pixel in the second display area, determining a compensation voltage based on a voltage difference between the first gray scale voltage and the second gray scale voltage, and outputting the compensation voltage to the sub-pixel in the first display area.
In an exemplary embodiment of the present disclosure, the display panel further includes: the pixel driving circuits are positioned in the display area and are arranged in one-to-one correspondence with the sub-pixels of the display area, the pixel driving circuits comprise pixel driving modules, the control ends of the pixel driving modules are connected with first nodes, and the pixel driving modules are used for providing driving currents under the action of voltage signals of the first nodes; wherein the display driver integrated circuit is further configured to: and respectively acquiring the first gray-scale voltage through a first node of a pixel driving circuit in the first display area and acquiring the second gray-scale voltage through a first node of the pixel driving circuit in the second display area in the interval time of two adjacent frames of data.
In an exemplary embodiment of the present disclosure, the plurality of pixel driving circuits includes a plurality of first pixel driving circuits and a plurality of second pixel driving circuits, the first pixel driving circuits being located in the first display region, the second pixel driving circuits being located in the second display region; the display panel further includes: the detection driving circuit is positioned in the non-display area and is used for outputting a first switch control signal and a second switch control signal successively; the switch circuits are positioned in the non-display area and are arranged in one-to-one correspondence with the multiple columns of sub-pixels, the control ends of the switch circuits are connected with the detection driving circuits, the first ends of the switch circuits are connected with the driving circuits, the second ends of the switch circuits are respectively connected with a first node of a first pixel driving circuit and a first node of a second pixel driving circuit which are positioned in the same column, and the switch circuits respond to the first switch control signals to transmit the first gray-scale voltage to the display driving integrated circuits and respond to the second switch control signals to transmit the second gray-scale voltage to the display driving integrated circuits.
In an exemplary embodiment of the present disclosure, the detection driving circuit is further configured to output a first gate control signal before outputting the first switch control signal and to output a second gate control signal before outputting the second switch control signal; the display driving integrated circuit is also used for outputting a reference voltage signal; the first pixel driving circuit provides the first gray scale voltage through a first node thereof based on the reference voltage signal in response to the first gate control signal; the second pixel driving circuit supplies the second gray scale voltage through a first node thereof based on the reference voltage signal in response to the second gate control signal.
In an exemplary embodiment of the present disclosure, the detection driving circuit is further configured to output a first reset signal before outputting the first gate control signal and to output a second reset signal before outputting the second gate control signal; the display driving integrated circuit is also used for outputting an initialization signal; the first pixel driving circuit also resets a first node thereof with the initialization signal in response to the first reset signal; the second pixel driving circuit also resets its first node with the initialization signal in response to the second reset signal.
In an exemplary embodiment of the present disclosure, the display driving integrated circuit is further configured to: and determining a compensation voltage for the first pixel driving circuit based on the first gray scale voltage of the first pixel driving circuit and the second gray scale voltage of the second pixel driving circuit in the same column, and establishing a corresponding relation between pixel coordinates of the first pixel driving circuit and the compensation voltage.
In an exemplary embodiment of the present disclosure, the compensation voltage is output to the first pixel driving circuit based on a correspondence relationship between the pixel coordinates and the compensation voltage when gray scale display is performed.
In an exemplary embodiment of the present disclosure, the pixel resolution of the first display area is the same as the pixel resolution of the second display area.
According to a second aspect of the present disclosure, there is also provided a display panel driving method for driving a display panel according to any embodiment of the present disclosure, the method being performed by a display driving integrated circuit, the method comprising: respectively acquiring a first gray-scale voltage of a sub-pixel in a first display area and a second gray-scale voltage of a sub-pixel in a second display area; determining a compensation voltage based on the first gray scale voltage and the second gray scale voltage; and outputting the compensation voltage to the sub-pixels of the first display area when gray scale display is performed.
In an exemplary embodiment of the disclosure, before the acquiring the first gray scale voltage of the sub-pixel in the first display area and the second gray scale voltage of the sub-pixel in the second display area, the method further includes: and respectively providing reference voltage signals for the sub-pixels of the first display area and the sub-pixels of the second display area in the interval time of two adjacent frames of data, wherein the first gray scale voltage is a gray scale voltage provided by a pixel driving circuit in the first display area based on the reference voltage signals, and the second gray scale voltage is a gray scale voltage provided by a pixel driving circuit in the second display area based on the reference voltage signals.
In an exemplary embodiment of the disclosure, the acquiring the first gray scale voltage of the sub-pixel in the first display area and the second gray scale voltage of the sub-pixel in the second display area respectively includes: and respectively acquiring a first gray-scale voltage of the sub-pixel in the first display area and a second gray-scale voltage of the sub-pixel in the second display area which are positioned in the same column.
In an exemplary embodiment of the present disclosure, the determining the compensation voltage based on the first gray scale voltage and the second gray scale voltage includes: and determining the compensation voltage of the corresponding column of sub-pixels in the first display area based on the voltage difference between the first gray scale voltage of the sub-pixels in the first display area and the second gray scale voltage of the sub-pixels in the second display area in the same column.
In an exemplary embodiment of the present disclosure, after the determining the compensation voltage of the corresponding column of sub-pixels in the first display area based on the voltage difference between the first gray scale voltage of the sub-pixel in the first display area and the second gray scale voltage of the sub-pixel in the same column of the second display area, the method further includes: and establishing a corresponding relation between pixel coordinates of all sub-pixels in the first display area and the compensation voltage.
In an exemplary embodiment of the disclosure, the outputting the compensation voltage to the sub-pixel of the first display area when performing gray scale display includes: and outputting a data signal containing the compensation voltage to a pixel driving circuit of the first display area based on the corresponding relation between the pixel coordinates and the compensation voltage when gray scale display is performed.
According to a third aspect of the present disclosure, there is further provided a display device, including a display panel according to any embodiment of the present disclosure, and a photosensitive element located on a side of the display panel away from the display surface, where a projection of the photosensitive element on the display panel at least partially overlaps the first display area.
According to the display panel provided by the disclosure, the display driving integrated circuit can respectively acquire the gray scale voltages of the first display area and the second display area, and determine the voltage difference between the first display area and the second display area according to the gray scale voltages of the first display area and the second display area, wherein the voltage difference is the compensation voltage required to compensate the display brightness of the first display area, so that the display driving integrated circuit provides corresponding compensation voltage for each sub-pixel of the first display area before display so as to compensate the display brightness difference between the first display area and the second display area, and the display effect is improved.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the disclosure and together with the description, serve to explain the principles of the disclosure. It will be apparent to those of ordinary skill in the art that the drawings in the following description are merely examples of the disclosure and that other drawings may be derived from them without undue effort.
Fig. 1 is a schematic structural view of a display panel according to an embodiment of the present disclosure;
fig. 2 is a schematic circuit configuration diagram of a pixel driving circuit in a display panel according to an embodiment of the present disclosure;
FIG. 3 is an enlarged view of a portion of the sub-display section and the detection driving circuit in FIG. 1;
FIG. 4 is a schematic diagram showing the connection between the driving IC and a pixel driving circuit in FIG. 3;
FIG. 5 is a timing diagram of the operation of the detection drive circuit according to one embodiment of the present disclosure;
fig. 6 is a flowchart of a display driving method according to an embodiment of the present disclosure.
Detailed Description
Example embodiments will now be described more fully with reference to the accompanying drawings. However, the exemplary embodiments can be embodied in many forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of the example embodiments to those skilled in the art. The same reference numerals in the drawings denote the same or similar structures, and thus detailed descriptions thereof will be omitted. Furthermore, the drawings are merely schematic illustrations of the present disclosure and are not necessarily drawn to scale.
Although relative terms such as "upper" and "lower" are used in this specification to describe the relative relationship of one component of an icon to another component, these terms are used in this specification for convenience only, such as in terms of the orientation of the examples described in the figures. It will be appreciated that if the device of the icon is flipped upside down, the recited "up" component will become the "down" component. When a structure is "on" another structure, it may mean that the structure is integrally formed with the other structure, or that the structure is "directly" disposed on the other structure, or that the structure is "indirectly" disposed on the other structure through another structure.
The terms "a," "an," "the," "said" and "at least one" are used to indicate the presence of one or more elements/components/etc.; the terms "comprising" and "having" are intended to be inclusive and mean that there may be additional elements/components/etc. in addition to the listed elements/components/etc.; the terms "first," "second," and "third," etc. are used merely as labels, and do not limit the number of their objects.
In the related art, in order to achieve higher transmittance, a transparent conductive material is used for a pixel circuit connection line of an FDC (Full Display with camera, under-screen camera) area, and the wiring is lengthened due to avoidance of the FDC area, so that a difference exists between a load on the wiring and a normal display area, and a brightness difference exists between the FDC area and the normal display area.
The present disclosure provides a display panel to solve the above-described problems. Fig. 1 is a schematic structural diagram of a display panel according to an embodiment of the present disclosure, as shown in fig. 1, the display panel may include a display area AA and a non-display area, the non-display area may be disposed around the display area AA, the display area AA may include a first display area 100 and a second display area 200, the second display area 200 may be disposed at least partially around the first display area 100, the first display area 100 is used for displaying images and transmitting light, and the second display area 200 is used for displaying images. The display panel may further include a display driving integrated circuit (display driver integrated circuit, abbreviated as DDIC) located in the non-display region, the display driving integrated circuit DDIC being operable to acquire a first gray-scale voltage of the sub-pixel in the first display region 100 and a second gray-scale voltage of the sub-pixel in the second display region 200, respectively, determine a compensation voltage based on a voltage difference of the first gray-scale voltage and the second gray-scale voltage, and output the compensation voltage to the sub-pixel of the first display region 100.
The display panel provided by the disclosure, the display driving integrated circuit DDIC can respectively obtain the gray scale voltages of the first display area 100 and the second display area 200, and determine the voltage difference between the gray scale voltages of the first display area 100 and the second display area 200 according to the gray scale voltages of the first display area 100 and the second display area 200, wherein the voltage difference is the compensation voltage required to compensate the display brightness of the first display area 100, so that the display driving integrated circuit DDIC provides corresponding compensation voltage for each sub-pixel of the first display area 100 before displaying, so as to compensate the display brightness difference between the first display area 100 and the second display area 200, and improve the display effect.
As shown in fig. 1, in an exemplary embodiment, the display driving integrated circuit DDIC may supply data signals to the first display area 100 through a plurality of data lines D and collect gray scale voltages of the first display area 100 and collect gray scale voltages of the second display area 200 through a plurality of signal lines S.
As shown in fig. 1, in an exemplary embodiment, the first display region 100 may be an FDC region of a display panel, the second display region 200 may be a normal display region, and the position of the first display region 100 in the second display region 200 may be not limited, may be located at an upper or lower portion of the second display region 200, or may be located at an edge position of the second display region 200. In the present exemplary embodiment, the shape of the first display area 100 may be any one or more of the following in a plane parallel to the display substrate: square, rectangular, polygonal, circular, oval, etc., and optical devices such as a fingerprint recognition device, an image pickup device, or an optical sensor for 3D imaging may be disposed in the first display area 100. When the shape of the first display area 100 is a circle, the diameter of the circle may be about 2mm to 4mm, and when the shape of the first display area 100 is a rectangle, the side length of the rectangle may be about 2mm to 4mm, which is not limited herein.
The display panel can drive the light emitting device to perform light emitting display by supplying driving current to the light emitting device by the pixel driving circuit. It will be appreciated that the data signal voltage actually obtained by the drive transistor in the pixel drive circuit will have some loss due to the routing load. In an exemplary embodiment, the first gray-scale voltage may be understood as a data signal voltage actually obtained by the pixel driving circuit in the first display area 100 after the line loss, and the first gray-scale voltage determines the display brightness of the light emitting device in the first display area 100. Similarly, the second gray scale voltage can be understood as the data signal voltage actually obtained by the pixel driving circuit in the second display area 200 after the line loss, and the second gray scale voltage determines the display brightness of the light emitting device in the second display area 200. Obviously, in the case that the trace load of the first display area 100 is different from the trace load of the second display area 200, there is a difference between the first gray scale voltage and the second gray scale voltage.
It should be noted that the first gray scale voltage and the second gray scale voltage are gray scale voltages obtained by the pixel driving circuits of the two display areas after line loss for the same data signal, and thus, the difference of the first gray scale voltage and the second gray scale voltage substantially reflects the line loss difference of the pixel driving circuits of the two display areas. For example, since no pixel is driven to emit light during a blanking time between two adjacent frames of data, the present disclosure may use the blanking time to determine the compensation voltage for each sub-pixel of the first display area 100. For example, the display driving integrated circuit DDIC may output the same reference voltage signal to the pixel driving circuit of the first display area 100 and the pixel driving circuit of the second display area 200 at the corresponding position within the blank time between two adjacent frame data, and respectively obtain the first gray scale voltage actually obtained by the pixel driving circuit of the first display area 100 and the second gray scale voltage actually obtained by the pixel driving circuit of the second display area 200 at the corresponding position, so as to determine the compensation voltage according to the first gray scale voltage and the second gray scale voltage. The sub-pixels of the second display area 200 at the corresponding positions described herein may be understood as sub-pixels of the second display area 200 located in the same column as the sub-pixels of the first display area 100.
In general, the line load of the first display area 100 is greater than the line load of the second display area 200, and therefore, the first gray scale voltage is smaller than the second gray scale voltage, and the compensation voltage is a voltage difference between the second gray scale voltage and the first gray scale voltage, specifically, a voltage difference between the second gray scale voltage and the first gray scale voltage of the sub-pixels in the same column. The display driving integrated circuit DDIC of the present disclosure performs gray-scale voltage compensation on the first display area 100 by determining the compensation voltage of each sub-pixel in the first display area 100, and further performs gray-scale display by outputting a data signal superimposed with the compensation voltage, so that the first display area 100 has the same or similar gray-scale voltage as the second display area 200, thereby reducing or eliminating the display brightness difference between the first display area 100 and the second display area 200, and improving the display effect of the display panel.
The display region of the display panel of the present disclosure may include pixel units distributed in an array along a row-column direction, and each pixel unit may include a plurality of sub-pixels, which may include, for example, R, G, and B sub-pixels. One sub-pixel is correspondingly connected with a pixel driving circuit, and each sub-pixel can drive the sub-pixel to emit light and display by providing driving current for the sub-pixel through the corresponding pixel driving circuit. The pixel driving circuit in the display panel of the present disclosure may be a 4T1C, 5T2C, 6T1C, or 7T1C structure, or the like. In an exemplary embodiment of the present disclosure, the pixel driving circuit is in a 7T1C structure, and fig. 2 is a schematic circuit diagram of the pixel driving circuit in the display panel according to an embodiment of the present disclosure. The pixel driving circuit may include a pixel driving module 10, a data writing module 20, a transmitting module 30, a first reset module 40, a second reset module 50, a first light emitting control module 60, a second light emitting control module 70, and a storage module 80, wherein the pixel driving module 10 is connected to a first node N1, a second node N2, and a third node N3, and the pixel driving module 10 is operable to provide a driving current using a voltage difference of the second node N2 and the third node N3 in response to a voltage signal of the first node N1; the Data writing module 20 is connected to the Data signal terminal Data, the Gate signal terminal Gate and the third node N3, and the Data writing module 20 is configured to transmit a Data signal of the Data signal terminal Data to the third node N3 in response to a Gate control signal of the Gate signal terminal Gate; the transmission module 30 is connected to the first node N1, the second node N2 and the Gate signal terminal Gate, and the transmission module 30 is configured to respond to the signal of the Gate signal terminal Gate to conduct a communication path between the first node N1 and the second node N2; the first Reset module 40 is connected to the first node N1, the initial signal terminal Vinit and the Reset signal terminal Reset, and the first Reset module 40 can respond to the Reset signal of the Reset signal terminal Reset to transmit the initial signal of the initial signal terminal Vinit to the first node N1, and Reset the first node N1; the second reset module 50 is connected to the fourth node N4, the Gate signal terminal Gate and the initial signal terminal Vinit, and the second reset module 50 is configured to transmit an initial signal of the initial signal terminal Vinit to the fourth node N4 in response to a signal of the Gate signal terminal Gate; the first light emitting control module 60 is connected to the third node N3, the enable signal terminal EM and the first power terminal ELVDD, and the first light emitting control module 60 may be configured to turn on a communication path between the third node N3 and the first power terminal ELVDD in response to the enable signal of the enable signal terminal EM; the second light emitting control module 70 is connected to the second node N2, the enable signal end EM and the fourth node N4, and the second light emitting control module 70 is configured to respond to the enable signal of the enable signal end EM to conduct a communication path between the second node N2 and the fourth node N4; the memory module 80 is connected between the first node N1 and the first power terminal ELVDD, and the memory module 80 can be used to maintain the potential of the first node N1 stable.
In an exemplary embodiment, each functional module in the pixel driving circuit of the present disclosure may be implemented by a transistor. As shown in fig. 2, the pixel driving module 10 may include a driving transistor T3, the data writing module 20 may include a fourth transistor T4, the transmitting module 30 may include a second transistor T2, the first reset module 40 may include a first transistor T1, the second reset module 50 may include a seventh transistor T7, the first light emitting control module 60 may include a fifth transistor T5, the second light emitting control module 70 may include a sixth transistor T6, and the storage module 80 may include a capacitor Cst. Wherein, the first pole of the first transistor T1 is connected with the first node N1, the second pole is connected with the initial signal terminal Vinit, and the grid is connected with the Reset signal terminal Reset; the first pole of the second transistor T2 is connected with the first pole of the driving transistor T3, the second pole is connected with the first node N1, and the grid electrode is connected with the grid electrode driving signal end Gate; the gate of the driving transistor T3 is connected to the first node N1; the first pole of the fourth transistor T4 is connected with the Data signal end Data, the second pole is connected with the second pole of the driving transistor T3, and the grid electrode is connected with the grid electrode driving signal end Gate; a first pole of the fifth transistor T5 is connected to a second pole of the driving transistor T3, the second pole is connected to the first power terminal ELVDD, and the gate is connected to the enable signal terminal EM; the first pole of the sixth transistor T6 is connected with the first pole of the driving transistor T3, the second pole is connected with the fourth node N4, and the grid electrode is connected with the enabling signal end EM; the first pole of the seventh transistor T7 is connected to the fourth node N4, the second pole is connected to the initial signal terminal Vinit, and the Gate is connected to the Gate driving signal terminal Gate. The capacitor Cst is connected between the gate of the driving transistor T3 and the first power terminal ELVDD. The pixel driving circuit may be connected to a light emitting unit OLED for driving the light emitting unit OLED to emit light, and the light emitting unit OLED may be connected to the fourth node N4, i.e., between the second electrode of the sixth transistor T6 and the second power terminal ELVSS. The transistors T1 to T7 may be P-type transistors or N-type transistors, and fig. 2 only exemplifies that the first transistor T1 to the seventh transistor T7 are P-type transistors. It should be noted that, the transistors used in the embodiments of the present disclosure may be thin film transistors or field effect transistors or other devices with the same characteristics. In this specification, the first electrode may be a drain electrode, the second electrode may be a source electrode, or the first electrode may be a source electrode and the second electrode may be a drain electrode.
The pixel driving circuit of the first display area 100 of the present disclosure may be referred to as a first pixel driving circuit, and the pixel driving circuit of the second display area 200 may be referred to as a second pixel driving circuit, and both the first pixel driving circuit and the second pixel driving circuit may be the pixel driving circuits shown in fig. 2, that is, the first pixel driving circuit and the second pixel driving circuit have the same circuit structure, and the two are only different in the position of the display area. For convenience of description, hereinafter, only the first pixel driving circuit is referred to as a pixel driving circuit of the first display area 100, and the second pixel driving circuit is referred to as a pixel driving circuit of the second display area 200.
As shown in fig. 1, in an exemplary embodiment, the display panel may include a detection driving circuit 210, and the detection driving circuit 210 may be used to perform timing control on the first display area 100, so that the display driving integrated circuit DDIC can determine the compensation voltage for the first display area 100 within a blank time of two adjacent frames of data. For example, a sub-display area may be defined at a position corresponding to the first display area 100, where the sub-display area may be shown as a dashed frame in fig. 1, fig. 3 is a partial enlarged view of the sub-display area and the detection driving circuit in fig. 1, and as shown in fig. 3, the sub-display area includes m rows of sub-pixels and n columns of sub-pixels, all the sub-pixels in the first display area 100 and a part of the sub-pixels in the second display area 200 are located in the word display area, and each of the first pixel driving circuits has a second pixel driving circuit located in the same column and a second pixel driving circuit located in the same row. The detection driving circuit 210 may perform timing control on each first pixel driving circuit and a second pixel driving circuit located in the same column as the first pixel driving circuit and located in the sub-display area, so that the display driving integrated circuit DDIC may obtain the compensation voltage for the first display area 100 by outputting the reference voltage signal and then obtaining the gray scale voltage in the blank time of two frames of data.
As shown in fig. 3, the display panel may include a plurality of switch circuits TSW, where the plurality of switch circuits TSW may be disposed in one-to-one correspondence with a plurality of columns of sub-pixels included in the first display area 100, i.e., if the first display area 100 includes n columns of sub-pixels, the non-display area of the display panel may include n switch circuits TSW, and one switch circuit TSW connects a first pixel driving circuit and a second pixel driving circuit located in the same column. For example, fig. 4 is a schematic diagram illustrating connection between the driving integrated circuit and one pixel driving circuit in fig. 3, as shown in fig. 3 and 4, a control end of the switching circuit TSW may be connected to the detection driving circuit 210, a first end of the switching circuit TSW may be connected to the display driving integrated circuit DDIC, and a second end of the switching circuit TSW may be connected to the first node N1 of the first pixel driving circuit and the first node N1 of the second pixel driving circuit in the same column through the signal line S. Thus, the detection driving circuit 210 may enable the display driving integrated circuit DDIC to obtain the first gray scale voltage and the second gray scale voltage by performing timing control on the switching circuit TSW.
Fig. 5 is a timing chart of the operation of the detection driving circuit according to one embodiment of the present disclosure, as shown in fig. 5, in a blank time of two adjacent frames of Data, the display driving integrated circuit DDIC may output reference voltage signals to the Data signal terminal Data of the first pixel driving circuit and the Data signal terminal Data of the second pixel driving circuit in the same column, the detection driving circuit 210 may output the first Gate control signal Gate (N) to the Gate driving signal terminal Gate of the first pixel driving circuit, according to the operation principle of the above-mentioned display driving integrated circuit DDIC, the fourth transistor T4 of the first pixel driving circuit writes the reference voltage signal into the first node N1 through the compensation circuit formed by the driving transistor T3 and the second transistor T2, the detection driving circuit 210 may further output the first switch control signal SEN (N) to the switch circuit TSW, and the switch circuit TSW may transmit the voltage signal of the first node N1 in the first pixel driving circuit to the display driving integrated circuit DDIC in response to the first switch control signal SEN (N), thereby obtaining the first gray scale voltage of the display driving integrated circuit DDIC. Then, the detection driving circuit 210 may output the second Gate control signal Gate (n+1) to the Gate driving signal terminal Gate of the second pixel driving circuit of the same column, the fourth transistor T4 of the second pixel driving circuit writes the reference voltage signal into the first node N1 through the compensation circuit formed by the driving transistor T3 and the second transistor T2, the detection driving circuit 210 may further output the second switch control signal SEN (n+1) to the switching circuit TSW, and the switching circuit TSW may transmit the voltage signal of the first node N1 in the second pixel driving circuit to the display driving integrated circuit DDIC in response to the second switch control signal SEN (n+1), thereby the display driving integrated circuit DDIC obtains the second gray scale voltage. After the display driving integrated circuit DDIC obtains the first gray-scale voltage and the second gray-scale voltage, the compensation voltages of the first pixel driving circuits of each column can be calculated respectively.
In some embodiments, the display driving integrated circuit DDIC may further establish a correspondence between the compensation voltage and the pixel coordinates, in the correspondence, the pixel coordinates and the compensation voltage are in one-to-one correspondence, and the correspondence may be stored in a table or other manners through a Line buffer of the display driving integrated circuit DDIC, so that when the display panel performs light emitting display, the display driving integrated circuit DDIC may obtain the corresponding compensation voltage by searching the correspondence according to the coordinates of the sub-pixels in the first display area 100, and when the display driving integrated circuit DDIC provides the data signal to the first pixel driving circuit, the display driving integrated circuit DDIC may superimpose the corresponding compensation voltage according to the correspondence to implement gray scale voltage compensation of the first pixel driving circuit, so that the light emitting brightness of each sub-pixel in the first display area 100 is the same as that of the sub-pixel in the second display area 200 in the corresponding position. It should be understood that the display driving integrated circuit DDIC may also establish the correspondence between the pixel coordinates of the first display area 100 and the compensation voltage in other ways, which will not be described in detail herein.
As shown in fig. 5, in an exemplary embodiment, the detection driving circuit 210 may further output the first Reset signal Reset (N) to the Reset signal terminal Reset of the first pixel driving circuit before outputting the first Gate control signal Gate (N) to the Gate driving signal terminal Gate of the first pixel driving circuit to turn on the first transistor T1 in the first pixel driving circuit, transmit the initial signal to the first node N1 through the first transistor T1, and Reset the first node N1. Similarly, before outputting the second Gate control signal Gate (n+1) to the Gate driving signal terminal Gate in the second pixel driving circuit, the detection driving circuit 210 may also output the second Reset signal Reset (n+1) to the Reset signal terminal Reset in the second pixel driving circuit to turn on the first transistor T1 in the second pixel driving circuit, and transmit the initial signal to the first node N1 through the first transistor T1 to Reset the first node N1. It can be understood that the first pixel driving circuit and the first node N1 driven by the second pixel are reset, and then the reference voltage signal is written to obtain the first gray level voltage and the second gray level voltage, so that the influence of the residual signal of the previous frame on the voltage signal of the first node N1 can be eliminated, that is, the influence of the residual signal on the first gray level voltage and the second gray level voltage is eliminated, the accuracy of the first gray level voltage and the second gray level voltage is improved, and the accuracy of the obtained compensation voltage is further improved.
It will be appreciated that as shown in fig. 1, the pixel driving circuits of other display areas outside the dotted line frame may output the enable control signal using a conventional EM GOA circuit and the GATE control signal using a conventional GATE GOA circuit, which will not be described in detail herein.
The present disclosure also provides a display panel driving method, and fig. 6 is a flowchart of a display driving method according to an embodiment of the present disclosure, which may be performed by a display driving integrated circuit. As shown in fig. 6, the driving method may include the steps of:
s110, respectively acquiring a first gray scale voltage of a sub-pixel in a first display area and a second gray scale voltage of a sub-pixel in a second display area;
s120, determining a compensation voltage based on the first gray scale voltage and the second gray scale voltage;
and S130, outputting the compensation voltage to the sub-pixels of the first display area.
In step S110, the first gray scale voltage is the gray scale voltage actually written into the gate of the driving transistor in the pixel driving circuit in the first display area, and the driving transistor provides the driving current based on the gray scale voltage, and obviously, the first gray scale voltage determines the display brightness of the sub-pixels in the first display area. Similarly, the second gray scale voltage is the gray scale voltage actually written into the gate of the driving transistor in the second display area, in other words, the driving transistor in the second display area provides the driving current based on the second gray scale voltage, and obviously, the second gray scale voltage determines the display brightness of the sub-pixels in the second display area. The first gray scale voltage and the second gray scale voltage are different in voltage, so that display brightness of the first display area and display brightness of the second display area are different.
In an exemplary embodiment, the first gray scale voltage and the second gray scale voltage may be voltages of a first node in two pixel driving circuits located in the same column. That is, the first gray scale voltages of all the rows of sub-pixels included in the first display area and the second gray scale voltages of the corresponding rows of sub-pixels in the second display area are required to be obtained in this step. For example, when the first display area includes 40 columns of sub-pixels, the display driving integrated circuit needs to acquire the first gray scale voltages of the sub-pixels in the first display area of the 40 columns and the second gray scale voltages of the sub-pixels in the second display area of the corresponding columns, respectively.
In an exemplary embodiment, the first gray scale voltage and the second gray scale voltage may be obtained by pre-writing the reference voltage signal, and accordingly, in an exemplary embodiment, before step S110, the driving method may further include:
and respectively providing reference voltage signals for the sub-pixels of the first display area and the sub-pixels of the second display area in the interval time of two adjacent frames of data, wherein the first gray scale voltage is the gray scale voltage provided by the pixel driving circuit in the first display area based on the reference voltage signals, and the second gray scale voltage is the gray scale voltage provided by the pixel driving circuit in the second display area based on the reference voltage signals.
The display driving integrated circuit can determine the compensation voltage of each sub-pixel of the first display area in the blank time of two adjacent frames of data, and then the display driving integrated circuit can perform gray-scale voltage compensation on the first display area from the next frame of data. In the blank time of two adjacent frames of data, the display driving integrated circuit can output a reference voltage signal to the first pixel driving circuit in the first display area, and then the display driving integrated circuit acquires the voltage of the first node in the first pixel driving circuit through the switching circuit TSW shown in FIG. 3 to obtain a first gray scale voltage. The display driving integrated circuit outputs a reference voltage signal to the second pixel driving circuit in the same column, and then the display driving integrated circuit acquires the voltage of the first node in the second pixel driving circuit through the switching circuit TSW shown in fig. 3 to obtain a second gray scale voltage. It should be appreciated that the present disclosure may control the first and second pixel driving circuits by the detection driving circuit 210 shown in fig. 3 to write reference voltage signals to the first and second pixel driving circuits, respectively, and will not be described in detail herein. Obviously, the difference between the first gray scale voltage and the second gray scale voltage reflects the difference in display brightness of the first display area and the second display area.
In step S120, the display driving integrated circuit obtains a compensation voltage for the first display region by comparing the first gray scale voltage of the first display region with the second gray scale voltage of the second display region. Specifically, the display driving integrated circuit may compare the first gray scale voltage of any first pixel driving circuit of the first display area with the second gray scale voltage of the second pixel driving circuit of the same column, and use the voltage difference between the two as the compensation voltage for the column of sub-pixels in the first display area. It will be appreciated that in the case where the first display area includes a plurality of columns of sub-pixels, the display driving integrated circuit needs to compare the first gray scale voltages and the second gray scale voltages of the plurality of columns of sub-pixels respectively to obtain the compensation voltages of the sub-pixels.
In an exemplary embodiment, after determining the compensation voltage of each sub-pixel, the display driving integrated circuit may establish a correspondence between each sub-pixel in the first display area and the compensation voltage, where the correspondence may be stored in a table, for example, so that, during subsequent display, the display driving integrated circuit may directly obtain the compensation voltage of each sub-pixel in the first display area according to the correspondence, and write the compensation voltage together when writing the data signal, so as to perform gray scale voltage compensation on the sub-pixels in the first display area.
In step S130, when gray scale display is performed, the pixel driving module may write the compensation voltage determined in the above step and the gray scale voltage currently required to be written into the Data signal terminal Data of the pixel driving circuit of the first display area together, so as to perform gray scale voltage compensation on the sub-pixels of the first display area, so that the display brightness of the sub-pixels of the first display area is the same as or close to the display brightness of the sub-pixels of the same column of the second display area.
In addition, the disclosure further provides a display device, which includes the display panel according to any embodiment of the disclosure, and further includes a photosensitive element located on a side of the display panel away from the display surface, where a projection of the photosensitive element on the display panel at least partially overlaps the first display area. The display device may be, for example, a mobile phone, a Pad, etc., the photosensitive element may be, for example, a camera, and the first display area may be an FDC area. For example, the display device may be a mobile phone terminal, and the mobile phone terminal may include a front camera, where the front camera may be disposed in an FDC area below the screen, that is, an under-screen camera.
Other embodiments of the disclosure will be apparent to those skilled in the art from consideration of the specification and practice of the disclosure disclosed herein. This application is intended to cover any variations, uses, or adaptations of the disclosure following, in general, the principles of the disclosure and including such departures from the present disclosure as come within known or customary practice within the art to which the disclosure pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the disclosure being indicated by the following claims.
Claims (14)
1. A display panel, comprising:
a display region comprising a first display region and a second display region at least partially surrounding the first display region, the first display region having a light transmittance greater than the second display region;
a non-display area surrounding the display area;
the display driving integrated circuit is positioned in the non-display area and is used for respectively acquiring a first gray scale voltage of a sub-pixel in a first display area and a second gray scale voltage of a sub-pixel in a second display area, determining a compensation voltage based on a voltage difference between the first gray scale voltage and the second gray scale voltage, and outputting the compensation voltage to the sub-pixel in the first display area;
the pixel driving circuits are positioned in the display area and are arranged in one-to-one correspondence with the sub-pixels of the display area, the pixel driving circuits comprise pixel driving modules, the control ends of the pixel driving modules are connected with first nodes, and the pixel driving modules are used for providing driving currents under the action of voltage signals of the first nodes;
wherein the display driver integrated circuit is further configured to: and respectively acquiring the first gray-scale voltage through a first node of a pixel driving circuit in the first display area and acquiring the second gray-scale voltage through a first node of the pixel driving circuit in the second display area in the interval time of two adjacent frames of data.
2. The display panel of claim 1, wherein a pixel resolution of the first display area is the same as a pixel resolution of the second display area.
3. The display panel of claim 2, wherein the plurality of pixel drive circuits includes a plurality of first pixel drive circuits and a plurality of second pixel drive circuits, the first pixel drive circuits being located in the first display region and the second pixel drive circuits being located in the second display region;
the display panel further includes:
the detection driving circuit is positioned in the non-display area and is used for outputting a first switch control signal and a second switch control signal successively;
the switch circuits are located in the non-display area and are arranged in one-to-one correspondence with the first pixel driving circuits in multiple columns, the control ends of the switch circuits are connected with the detection driving circuits, the first ends of the switch circuits are connected with the display driving integrated circuits, the second ends of the switch circuits are respectively connected with the first nodes of the first pixel driving circuits and the first nodes of the second pixel driving circuits located in the same column, and the switch circuits respond to the first switch control signals to transmit the first gray-scale voltages to the display driving integrated circuits and respond to the second switch control signals to transmit the second gray-scale voltages to the display driving integrated circuits.
4. The display panel according to claim 3, wherein the detection driving circuit is further configured to output a first gate control signal before outputting the first switching control signal and to output a second gate control signal before outputting the second switching control signal;
the display driving integrated circuit is also used for outputting a reference voltage signal;
the first pixel driving circuit provides the first gray scale voltage through a first node thereof based on the reference voltage signal in response to the first gate control signal;
the second pixel driving circuit supplies the second gray scale voltage through a first node thereof based on the reference voltage signal in response to the second gate control signal.
5. The display panel according to claim 4, wherein the detection driving circuit is further configured to output a first reset signal before outputting the first gate control signal and to output a second reset signal before outputting the second gate control signal;
the display driving integrated circuit is also used for outputting an initialization signal;
the first pixel driving circuit also resets a first node thereof with the initialization signal in response to the first reset signal;
The second pixel driving circuit also resets its first node with the initialization signal in response to the second reset signal.
6. A display panel according to claim 3, wherein the display driver integrated circuit is further configured to: and determining a compensation voltage for the first pixel driving circuit based on the first gray scale voltage of the first pixel driving circuit and the second gray scale voltage of the second pixel driving circuit in the same column, and establishing a corresponding relation between pixel coordinates of the first pixel driving circuit and the compensation voltage.
7. The display panel of claim 6, wherein the display driver integrated circuit is further configured to: and outputting the compensation voltage to the first pixel driving circuit based on the corresponding relation between the pixel coordinates and the compensation voltage when gray scale display is performed.
8. A display panel driving method for driving the display panel of any one of claims 1-7, the method being performed by a display driving integrated circuit, the method comprising:
respectively acquiring a first gray-scale voltage of a sub-pixel in a first display area and a second gray-scale voltage of a sub-pixel in a second display area;
Determining a compensation voltage based on the first gray scale voltage and the second gray scale voltage;
and outputting the compensation voltage to the sub-pixels of the first display area when gray scale display is performed.
9. The method of claim 8, wherein prior to the separately acquiring the first gray scale voltage of the sub-pixel in the first display area and the second gray scale voltage of the sub-pixel in the second display area, the method further comprises:
and respectively providing reference voltage signals for the sub-pixels of the first display area and the sub-pixels of the second display area in the interval time of two adjacent frames of data, wherein the first gray scale voltage is a gray scale voltage provided by a pixel driving circuit in the first display area based on the reference voltage signals, and the second gray scale voltage is a gray scale voltage provided by a pixel driving circuit in the second display area based on the reference voltage signals.
10. The method of claim 9, wherein the separately obtaining the first gray scale voltage of the sub-pixel in the first display area and the second gray scale voltage of the sub-pixel in the second display area comprises:
and respectively acquiring a first gray-scale voltage of the sub-pixel in the first display area and a second gray-scale voltage of the sub-pixel in the second display area which are positioned in the same column.
11. The method of claim 10, wherein the determining a compensation voltage based on the first gray scale voltage and the second gray scale voltage comprises:
and determining the compensation voltage of the corresponding column of sub-pixels in the first display area based on the voltage difference between the first gray scale voltage of the sub-pixels in the first display area and the second gray scale voltage of the sub-pixels in the second display area in the same column.
12. The method of claim 11, wherein after determining the compensation voltage for the corresponding column of subpixels in the first display area based on the voltage difference between the first gray scale voltage of the subpixels in the first display area and the second gray scale voltage of the subpixels in the same column of the second display area, the method further comprises:
and establishing a corresponding relation between pixel coordinates of all sub-pixels in the first display area and the compensation voltage.
13. The method of claim 12, wherein outputting the compensation voltage to the sub-pixels of the first display area when gray scale display is performed comprises:
and outputting a data signal containing the compensation voltage to a pixel driving circuit of the first display area based on the corresponding relation between the pixel coordinates and the compensation voltage when gray scale display is performed.
14. A display device comprising the display panel of any one of claims 1-7 and a light-sensitive element located on a side of the display panel remote from the display surface, the projection of the light-sensitive element onto the display panel at least partially overlapping the first display area.
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