CN114911646A - Bit flipping checking method of special memory chip and memory system - Google Patents
Bit flipping checking method of special memory chip and memory system Download PDFInfo
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Abstract
A bit flipping checking method and a storage system of a special storage chip are provided. The invention stores the parameter data of the vehicle in the running process through the two storage units. Then, the data in the two storage units are checked for the first time through the exclusive-or unit, and possible bit flipping bits are obtained. And then, further screening more reliable storage data through the mutual matching of the coding verification unit and the output buffer, correcting the flip bit in the storage data and outputting the data. Therefore, the invention can ensure that the output data in the automobile storage system can not have bit inversion, thereby further ensuring the reliable operation of the automobile and simplifying the checking and eliminating common work of the accidentally-occurring inverted bit in the storage unit.
Description
Technical Field
The invention relates to the technical field of data storage and protection, in particular to a bit flipping checking method and a bit flipping checking storage system of a special storage chip.
Background
A large number of vehicle driving parameters need to be recorded in the special storage chip for the automobile, so that the special storage chip is particularly sensitive to bit overturning in the storage chip. Once the bit in the chip is turned over, the driving data of the automobile will have serious errors, and even the normal driving of the automobile is affected.
The existing chip storage mechanism can only realize that the bit of the stored data is used as check, and the driving parameter is judged to be correct or not by judging whether the check result is the same as the check bit stored with the driving parameter. However, this method cannot directly locate and correct the flipped bits, and thus still affects the driving experience of the vehicle.
Disclosure of Invention
The invention provides a bit reversal checking method and a bit reversal checking system for a special storage chip aiming at the defects of the prior art. The invention specifically adopts the following technical scheme.
Firstly, in order to achieve the above object, a bit flipping verification method for a dedicated memory chip is provided, which is characterized by comprising the following steps: after receiving data to be stored, synchronously storing the data to be stored into a first storage unit and a second storage unit according to the same storage rule; after receiving the data calling instruction, executing the following steps: the method comprises the steps that first storage data corresponding to a data calling instruction are read from a first storage unit synchronously according to the data calling instruction, and second storage data corresponding to the data calling instruction are read from a second storage unit; performing exclusive-or operation and code check on the read first storage data and second storage data, storing the storage data with correct code check in a first address field of an output cache, and storing the storage data with wrong code check in a second address field of the output cache; thirdly, correcting the storage data in the second address field according to the XOR result obtained by the XOR operation; and fourthly, outputting the storage data in the second address field when the data in the second address field is different from the first address field after correction, and otherwise, outputting the storage data in the first address field.
Optionally, in the bit flipping method for the dedicated memory chip, after receiving the data to be stored, the data to be stored is stored in the first and second storage units according to the following steps: c1, sequentially splitting the data to be stored according to a preset unit length L to obtain a plurality of data segments A1, A2, A3, … and An, wherein n represents the number of the data segments after sequential splitting; step c2, performing XOR on data segments ⌊ n/l ⌋ with serial numbers different from l according to a check interval l, and inserting a check bit obtained by the XOR into the l-th bit in the data to be stored, wherein the check interval l is more than or equal to 2; step c3, increasing the check interval l according to a fixed step length, repeating the step c2 until l is more than or equal to ⌊ n/2 ⌋, and obtaining actual storage data; and c4, sequentially storing the actual storage data obtained after all check bits are inserted according to the step c3 into the first storage unit and the second storage unit.
Optionally, in the method for verifying bit flipping of a dedicated memory chip, in the second step, the specific step of performing encoding verification on the read first stored data and the read second stored data includes: step d1, extracting the corresponding check bits in the first storage data and the second storage data according to the check intervals l in the step c3, respectively, and obtaining first data to be checked corresponding to the first storage data and second data to be checked corresponding to the second storage data; d2, sequentially splitting the first data to be verified according to a preset unit length L to obtain a plurality of verification data sections B1, B2, B3, … and Bn, and sequentially splitting the second data to be verified according to the preset unit length L to obtain a plurality of verification data sections C1, C2, C3, … and Cn; d3, respectively performing XOR on the ⌊ n/l ⌋ check data segments with numbers different by l according to the check intervals l in the d1, comparing whether the check value obtained by XOR is the same as the l-th bit in the first storage data, if so, storing the sequence of the check data segments in the second address segment of the output cache and storing the sequence of the verification data segments in the first address segment of the output cache; otherwise, the sequence of each check data segment is stored in the first address segment of the output cache and the sequence of each verification data segment is stored in the second address segment of the output cache.
Optionally, in the third step, the specific step of correcting the storage data in the second address field according to the xor result obtained by the xor operation includes: and performing exclusive-OR operation on the exclusive-OR result obtained by the exclusive-OR operation and the stored data in the second address field bit by bit.
Meanwhile, in order to achieve the above object, the present invention further provides a storage system, comprising: the first storage unit is used for storing data to be stored according to a storage rule; the second storage unit is used for synchronously storing the data to be stored with the first storage unit according to the same storage rule as the first storage unit; the exclusive-OR unit is used for receiving first storage data read from the first storage unit according to the data calling instruction and a second storage instruction read from the second storage unit, and carrying out exclusive-OR operation on the first storage data and the second storage data; the encoding checking unit is used for performing encoding checking on the first storage data and the second storage data received by the XOR unit; the output buffer is connected with the code checking unit, two mutually separated address fields for storing data are arranged in the output buffer, the first address field is used for storing the storage data with correct code checking, and the second address field is used for storing the storage data with wrong code checking; and the output interface is used for correcting the storage data in the second address field according to an exclusive OR result obtained by the exclusive OR unit exclusive OR operation, outputting the storage data in the second address field when the corrected data in the second address field is different from the first address field, and otherwise outputting the storage data in the first address field.
Optionally, in the storage system as described in any of the above, the first storage unit and the second storage unit are further connected to a storage data processing unit, and are configured to store data to be stored in the first storage unit and the second storage unit according to the following steps: c1, sequentially splitting the data to be stored according to a preset unit length L to obtain a plurality of data segments A1, A2, A3, … and An, wherein n represents the number of the data segments after sequential splitting; step c2, performing XOR on data segments ⌊ n/l ⌋ with serial numbers different from l according to a check interval l, and inserting a check bit obtained by the XOR into the l-th bit in the data to be stored, wherein the check interval l is more than or equal to 2; step c3, increasing the check interval l according to a fixed step length, repeating the step c2 until l is more than or equal to ⌊ n/2 ⌋, and obtaining actual storage data; and c4, sequentially storing the actual storage data obtained after all check bits are inserted according to the step c3 into the first storage unit and the second storage unit.
Optionally, in the storage system as described in any of the above, the encoding checking unit performs encoding checking on the first storage data and the second storage data received by the xor unit specifically according to the following steps: step d1, extracting corresponding check bits in the first storage data and the second storage data according to the check intervals l in the step c3, respectively, and obtaining first data to be checked corresponding to the first storage data and second data to be checked corresponding to the second storage data; d2, sequentially splitting the first to-be-verified data according to a preset unit length L to obtain a plurality of verified data sections B1, B2, B3, … and Bn, and sequentially splitting the second to-be-verified data according to the preset unit length L to obtain a plurality of verified data sections C1, C2, C3, … and Cn; d3, respectively performing XOR on the ⌊ n/l ⌋ check data segments with the serial numbers different by l according to the check intervals l in the d1, comparing whether the check value obtained by the XOR is the same as the l-th bit in the first storage data, if so, sequentially storing the check data segments in the second address segment of the output cache and sequentially storing the verification data segments in the first address segment of the output cache; otherwise, the sequence of each check data segment is stored in the first address segment of the output cache and the sequence of each verification data segment is stored in the second address segment of the output cache.
Optionally, in the storage system as described in any of the above, the output interface corrects the storage data in the second address field according to an xor result obtained by an xor unit xor operation, specifically according to the following steps: and performing exclusive-OR operation on the exclusive-OR result obtained by the exclusive-OR operation and the storage data in the second address field bit by bit.
Advantageous effects
The parameter data during the running process of the vehicle are stored simultaneously through the two storage units. Then, the data in the two storage units are checked for the first time through an exclusive-or unit, and possible bit flipping bits are obtained. And then, further screening more reliable storage data through the mutual matching of the coding verification unit and the output buffer, correcting the flip bit in the storage data and outputting the data. Therefore, the invention can ensure that the output data in the automobile storage system can not have bit inversion, thereby further ensuring the reliable operation of the automobile and simplifying the checking and eliminating common work of the accidentally-occurring inverted bit in the storage unit.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention.
Drawings
The accompanying drawings are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention and not to limit the invention. In the drawings:
FIG. 1 is a schematic diagram of a storage system of the present invention;
fig. 2 is a schematic diagram of an error correction process of the bit flipping checking method of the dedicated memory chip according to the present invention.
Detailed Description
In order to make the purpose and technical solution of the embodiments of the present invention clearer, the technical solution of the embodiments of the present invention will be clearly and completely described below with reference to the drawings of the embodiments of the present invention. It is to be understood that the embodiments described are only a few embodiments of the present invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the described embodiments of the invention without inventive step, are within the scope of protection of the invention.
It will be understood by those skilled in the art that, unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the prior art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.
FIG. 1 is a memory system according to the present invention, comprising:
the first storage unit is used for storing data to be stored according to a storage rule;
the second storage unit is used for being used as an alternative and a comparison, and synchronously storing the same data to be stored with the first storage unit according to the same storage rule as the first storage unit, so that correct data can be obtained through the other storage unit which is not overturned after any one of the two storage units is overturned;
the exclusive-OR unit is used for receiving first storage data read from the first storage unit and a second storage instruction read from the second storage unit according to the data calling instruction, carrying out exclusive-OR operation on the first storage data and the second storage data, and judging whether the data between the two storage units are different due to bit inversion;
the encoding and checking unit is used for carrying out encoding and checking on the first storage data and the second storage data received by the XOR unit and determining whether error data exists due to bit inversion of check bits;
the output buffer is connected with the code checking unit, two mutually separated address fields for storing data are arranged in the output buffer, the first address field is used for storing the storage data with correct code checking, and the second address field is used for storing the storage data with wrong code checking;
and the output interface is used for correcting the storage data in the second address field according to an exclusive OR result obtained by the exclusive OR unit exclusive OR operation, outputting the storage data in the second address field when the corrected data in the second address field is different from the first address field, and otherwise outputting the storage data in the first address field.
Because the probability of bit flipping of two memory cells at the same time is low, and the probability of bit flipping of two memory cells at the same time is almost zero. Therefore, once bit inversion exists, the invention can immediately know the abnormality through simple XOR operation, so as to correct the inverted data with code check error through the XOR result, and then further judge whether the data of another storage unit also has inversion according to whether the data after the code check is consistent with the data in another storage unit. Therefore, the invention can directly correct the turnover bit and output correct data, thereby avoiding accidents or alarms caused by the failure of vehicle operation parameter data.
Specifically, as shown in fig. 2, a detailed description is given of specific steps of the storage system for performing bit flipping verification on the vehicle-specific chip.
In fig. 2, after receiving the data to be stored of "10100111010", the storage system synchronously stores the data to be stored into the first storage unit and the second storage unit according to the same storage rule. The storage rules generally include the steps of generating corresponding parity bits and inserting the parity bits into the tape storage data.
In an implementation manner, the step of inserting the check bit may be performed as follows:
step c1, sequentially splitting the data to be stored according to a preset unit length L =3, obtaining a plurality of data segments a1=101, a2=001, A3=110, and a4=100, where n =1,2,3, and 4 represent numbers of the data segments after sequential splitting;
step c2, performing XOR on data segments ⌊ n/l ⌋ with serial numbers different by l according to a check interval l, and inserting a check bit obtained by the XOR into the l-th bit in the data to be stored;
step c3, gradually increasing the verification interval l from l =2 according to a fixed step length, and repeating the step c2 until l is more than or equal to ⌊ n/2 ⌋ to obtain actual storage data;
and c4, sequentially storing the actual storage data obtained after all check bits are inserted according to the step c3 into the first storage unit and the second storage unit.
During subsequent storage, the data bit is flipped to "10100111110 "is taken as an example. Thereafter, when a data fetch command is received, in order to verify whether a bit in a memory cell is inverted, the following steps are performed for correcting the inverted bit:
the method comprises the steps that first storage data corresponding to a data calling instruction are read from a first storage unit synchronously according to the data calling instruction, and second storage data corresponding to the data calling instruction are read from a second storage unit;
secondly, performing exclusive-or operation and code check on the read first storage data and the second storage data, storing the storage data with correct code check in a first address field of an output cache to obtain ' 10100111010 ', and storing the storage data with wrong code check in a second address field of the output cache to obtain ' 10100111110”；
Corresponding to the storage rule, in this step, the specific step of performing encoding verification on the read first storage data and the read second storage data may be performed according to an inverse operation of inserting a check bit during storage:
step d1, extracting the corresponding check bits in the first storage data and the second storage data according to the check intervals l in the step c3, respectively, and obtaining first data to be checked corresponding to the first storage data and second data to be checked corresponding to the second storage data;
d2, sequentially splitting the first to-be-verified data according to a preset unit length L to obtain a plurality of verified data sections B1, B2, B3, … and Bn, and sequentially splitting the second to-be-verified data according to the preset unit length L to obtain a plurality of verified data sections C1, C2, C3, … and Cn;
step d3, numbering according to check interval l in step d1 respectively and with difference of l
The check data segments are subjected to exclusive OR, whether a check value obtained by the exclusive OR is the same as the first bit in the first storage data or not is compared, if the check value is different, the check data segments are sequentially stored in the second address segment of the output cache, and the verification data segments are sequentially stored in the first address segment of the output cache; otherwise, the sequence of each check data segment is stored in the first address segment of the output cache and the sequence of each verification data segment is stored in the second address segment of the output cache.
Then, the third step is continuously executed: XOR result "00000000" obtained from XOR operation100 ' to rectify the stored data in the second address field to obtain ' 10100111010 ' in a mode of carrying out exclusive OR operation on the bits of the stored data in the second address field;
and fourthly, when the data in the second address field is different from the first address field after correction, judging that other bit inversions exist in the data stored in the first address field, or data errors occur due to the limitation of an exclusive-or operation check mode just after correction, and the check cannot be realized, directly outputting the stored data in the second address field as the most credible data, and otherwise, directly judging that the stored data '10100111010' in the first address field does not exist, and outputting the data which is not inversed.
The above are merely embodiments of the present invention, which are described in detail and with particularity, and therefore should not be construed as limiting the scope of the invention. It should be noted that, for those skilled in the art, various changes and modifications can be made without departing from the spirit of the present invention, and these changes and modifications are within the scope of the present invention.
Claims (6)
1. A bit flipping checking method of a special memory chip is characterized by comprising the following steps:
after receiving data to be stored, synchronously storing the data to be stored into a first storage unit and a second storage unit according to the same storage rule;
after receiving the data calling instruction, executing the following steps:
the method comprises the steps that first storage data corresponding to a data calling instruction are read from a first storage unit synchronously according to the data calling instruction, and second storage data corresponding to the data calling instruction are read from a second storage unit;
performing exclusive-or operation and code check on the read first storage data and second storage data, storing the storage data with correct code check in a first address field of an output cache, and storing the storage data with wrong code check in a second address field of the output cache;
thirdly, correcting the storage data in the second address field according to the XOR result obtained by the XOR operation;
and fourthly, outputting the storage data in the second address field when the data in the second address field is different from the first address field after correction, and otherwise, outputting the storage data in the first address field.
2. The bit flipping method for a dedicated memory chip according to claim 1, wherein after receiving the data to be stored, the data to be stored is stored in the first and second storage units according to the following steps:
c1, sequentially splitting the data to be stored according to a preset unit length L to obtain a plurality of data segments A1, A2, A3, … and An, wherein n represents the number of the data segments after sequential splitting;
step c2, numbering with difference of l according to check interval l
Performing XOR on each data segment, and inserting a check bit obtained by the XOR into the l-th bit in the data to be stored, wherein the check interval l is more than or equal to 2;
step c3, increasing the check interval l according to a fixed step length, and repeating the step c2 until l is more than or equal to 2
Obtaining actual storage data;
and c4, sequentially storing the actual storage data obtained after all check bits are inserted according to the step c3 into the first storage unit and the second storage unit.
3. The bit flipping checking method of the dedicated memory chip according to claim 2, wherein in the second step, the specific step of performing the code checking on the read first storage data and the read second storage data includes:
step d1, extracting corresponding check bits in the first storage data and the second storage data according to the check intervals l in the step c3, respectively, and obtaining first data to be checked corresponding to the first storage data and second data to be checked corresponding to the second storage data;
d2, sequentially splitting the first data to be verified according to a preset unit length L to obtain a plurality of verification data sections B1, B2, B3, … and Bn, and sequentially splitting the second data to be verified according to the preset unit length L to obtain a plurality of verification data sections C1, C2, C3, … and Cn;
step d3, numbering according to check interval l in step d1 respectively and with difference of l
The check data segments are subjected to XOR, whether a check value obtained by the XOR is the same as the first bit in the first storage data or not is compared, if the check value is different from the first bit in the first storage data, the check data segments are sequentially stored in a second address segment of an output cache, and the verification data segments are sequentially stored in the output cacheThe first address section of the cache; otherwise, the sequence of each check data segment is stored in the first address segment of the output cache and the sequence of each verification data segment is stored in the second address segment of the output cache.
4. The bit flipping method for dedicated memory chips according to claims 1 to 3, wherein in the third step, the specific step of rectifying the stored data in the second address field according to the XOR result obtained by the XOR operation comprises:
and performing exclusive-OR operation on the exclusive-OR result obtained by the exclusive-OR operation and the stored data in the second address field bit by bit.
5. A storage system, comprising:
the first storage unit is used for storing data to be stored according to a storage rule;
the second storage unit is used for synchronously storing the data to be stored with the first storage unit according to the same storage rule as the first storage unit;
the exclusive-OR unit is used for receiving first storage data read from the first storage unit according to the data calling instruction and a second storage instruction read from the second storage unit, and carrying out exclusive-OR operation on the first storage data and the second storage data;
the encoding checking unit is used for performing encoding checking on the first storage data and the second storage data received by the XOR unit;
the output buffer is connected with the code checking unit, two mutually separated address fields for storing data are arranged in the output buffer, the first address field is used for storing the storage data with correct code checking, and the second address field is used for storing the storage data with wrong code checking;
and the output interface is used for correcting the storage data in the second address field according to an exclusive OR result obtained by the exclusive OR unit exclusive OR operation, outputting the storage data in the second address field when the corrected data in the second address field is different from the first address field, and otherwise outputting the storage data in the first address field.
6. The storage system according to claim 5, wherein the first storage unit and the second storage unit are further connected with a storage data processing unit for storing data to be stored into the first storage unit and the second storage unit according to the following steps:
c1, sequentially splitting the data to be stored according to a preset unit length L to obtain a plurality of data segments A1, A2, A3, … and An, wherein n represents the number of the data segments after sequential splitting;
step c2, numbering with difference of l according to check interval l
Carrying out XOR on each data segment, and inserting a check bit obtained by the XOR into the ith bit in the data to be stored, wherein the check interval l is more than or equal to 2;
step c3, increasing the checking interval l according to a fixed step length, and repeating the step c2 until l is more than or equal to 2
Obtaining actual storage data;
step c4, storing the actual storage data obtained after inserting all the check bits according to step c3 into the first storage unit and the second storage unit in sequence
The storage system according to claim 6, wherein the encoding check unit performs encoding check on the first storage data and the second storage data received by the xor unit according to the following steps:
step d1, extracting corresponding check bits in the first storage data and the second storage data according to the check intervals l in the step c3, respectively, and obtaining first data to be checked corresponding to the first storage data and second data to be checked corresponding to the second storage data;
d2, sequentially splitting the first data to be verified according to a preset unit length L to obtain a plurality of verification data sections B1, B2, B3, … and Bn, and sequentially splitting the second data to be verified according to the preset unit length L to obtain a plurality of verification data sections C1, C2, C3, … and Cn;
d3, respectively performing XOR on the check data segments with serial numbers different by l according to the check intervals l in the step d1, comparing whether the check value obtained by the XOR is the same as the l-th bit in the first storage data, if so, storing the sequence of the check data segments in the second address segment of the output cache and storing the sequence of the verification data segments in the first address segment of the output cache; otherwise, storing the sequence of each check data segment in the first address segment of the output buffer and storing the sequence of each verification data segment in the second address segment of the output buffer
The memory system of claim 6, wherein the output interface corrects the stored data in the second address field based on the XOR result obtained by the XOR unit XOR operation according to: and performing exclusive-OR operation on the exclusive-OR result obtained by the exclusive-OR operation and the storage data in the second address field bit by bit.
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