CN114902331A - Storage device, bandwidth adjusting method and electronic equipment - Google Patents

Storage device, bandwidth adjusting method and electronic equipment Download PDF

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Publication number
CN114902331A
CN114902331A CN202080091846.4A CN202080091846A CN114902331A CN 114902331 A CN114902331 A CN 114902331A CN 202080091846 A CN202080091846 A CN 202080091846A CN 114902331 A CN114902331 A CN 114902331A
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memory
temperature
bandwidth
module
storage device
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张先富
王正波
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Huawei Technologies Co Ltd
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Huawei Technologies Co Ltd
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    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • G11C5/02Disposition of storage elements, e.g. in the form of a matrix array

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Abstract

A storage device, a bandwidth adjusting method and an electronic device are provided, wherein the storage device can comprise a temperature monitoring module, a bandwidth control module and M memory wafers, M is an integer greater than 1; the temperature monitoring module is used for monitoring the temperature of N memory wafers in the M memory wafers, wherein N is an integer which is greater than or equal to 1 and less than or equal to M; and the bandwidth control module is used for adjusting the bandwidth of the first memory wafer according to the temperature of the first memory wafer, and the first memory wafer is any one of the N memory wafers. The memory device can improve the flexibility of the memory.

Description

Storage device, bandwidth adjusting method and electronic equipment Technical Field
The embodiment of the invention relates to the technical field of chips, in particular to a storage device, a bandwidth adjusting method and electronic equipment.
Background
The memory is a storage unit for storing programs and various data information. For electronic equipment, the memory function of the memory can ensure normal operation. Thus, the memory is an essential component for the proper operation of the electronic device. The memory bandwidth (memory bandwidth) is an amount of information accessed to the memory per unit time, and is also referred to as a number of bits or bytes read/written from/to the memory per unit time. At present, before the memory is used, parameters of the memory can be preset, and the bandwidth of the memory can be determined according to the parameters when the memory is used. In the above manner, after the memory is used, the bandwidth can be determined according to the pre-configured parameters, but the bandwidth cannot be dynamically adjusted, so that the flexibility of the memory is reduced.
Disclosure of Invention
The embodiment of the invention discloses a storage device, a bandwidth adjusting method and electronic equipment, which are used for improving the flexibility of the storage device.
A first aspect discloses a memory device, which may include a temperature monitoring module, a bandwidth control (through control) module, and M memory dies (memory dies), where M is an integer greater than 1; the temperature monitoring module is used for monitoring the temperature of N memory wafers in the M memory wafers, wherein N is an integer which is greater than or equal to 1 and less than or equal to M; and the bandwidth control module is used for adjusting the bandwidth of the first memory wafer according to the temperature of the first memory wafer, and the first memory wafer is any one of the N memory wafers.
The storage device disclosed by the embodiment of the invention can monitor the temperature of N memory wafers in M memory wafers through the temperature monitoring module, namely, the temperature of part or all of the memory wafers can be monitored through the temperature monitoring module, and the bandwidth of each memory wafer can be adjusted according to the monitored temperature of each memory wafer, namely, when the temperature of the memory wafer is monitored to change, the bandwidth of the memory wafer can be adjusted according to the changed temperature. Therefore, the bandwidth of the memory wafer can be dynamically adjusted according to the temperature of the memory wafer, so that the dynamic adjustment of the bandwidth of the memory can be realized, and the flexibility of the memory can be improved. For example, in the case where the storage device is a memory, the flexibility of the memory can be improved, and in the case where the storage device includes a memory, the flexibility of the memory in the storage device can be improved, so that the flexibility of the storage device can be improved. In addition, because the bandwidth of the memory wafer can be dynamically adjusted according to the temperature of the memory wafer, the temperature of the memory wafer can be ensured not to be too high, namely the temperature of the memory can be ensured not to be too high, and the memory wafer can be prevented from being damaged due to the too high temperature. In addition, because what was monitored is the temperature of the memory die, and the bandwidth of the memory die adjusted according to the temperature of the memory die monitored, the adjustment is more pertinent.
As a possible implementation manner, the storage apparatus may further include a memory control module, and the memory control module is respectively coupled to the bandwidth control module and the M memory dies; the bandwidth control module is specifically used for generating bandwidth adjustment information according to the temperature of the first memory wafer and sending the bandwidth adjustment information to the memory control module; and the memory control module is used for adjusting the bandwidth of the first memory wafer according to the bandwidth adjustment information.
The memory device disclosed in the embodiment of the present invention further includes a memory control module (memory control) coupled to the bandwidth control module and the M memory dies, respectively, and the memory control module is configured to adjust a parameter of the memory dies, so that, when the bandwidth of the memory dies is adjusted according to the temperature by adjusting the parameter of the memory dies, the bandwidth control module may generate bandwidth adjustment information according to the monitored temperature, and then transmit the bandwidth adjustment information to the memory control module, and the memory control module adjusts the parameter of the memory dies according to the bandwidth adjustment information, so that the bandwidth of the memory dies can be adjusted by adjusting the parameter of the memory dies.
As a possible implementation, the temperature monitoring module may include K temperature sensors (T-sensors), where K is an integer greater than or equal to 1; the temperature monitoring module is specifically used for monitoring the temperature of N memory wafers in the M memory wafers by using L temperature sensors, wherein L is an integer which is greater than or equal to N and less than or equal to K.
In the storage device disclosed in the embodiment of the invention, the temperature monitoring module may include one or more temperature sensors, and one temperature sensor can monitor the temperature of only one position at a time. One or more temperature sensors can be used to monitor one memory cell simultaneously, the higher the accuracy and the greater the number of the temperature sensors monitoring one memory cell, the more accurate the monitored temperature, and thus the accuracy of bandwidth control can be improved.
As a possible implementation manner, the storage device may further include a temperature sensor mapping (T-sensor mapping) module, where the temperature sensor mapping module is respectively coupled to the K temperature sensors and the M memory dies; and the temperature sensor mapping module is used for controlling the first temperature sensor to monitor the second memory wafer according to the gating signal, the first temperature sensor is one of the L temperature sensors, and the second memory wafer is one of the N memory wafers.
The storage device disclosed by the embodiment of the invention further comprises a temperature sensor mapping module. Since one temperature sensor may be fixed for monitoring the temperature of one memory die and one temperature sensor may also monitor the temperature of any one of the plurality of memory dies, a user may set which service accesses which memory die or which portion of which memory die before each use of the memory, and thus, when the service accesses the storage device, the temperature sensor mapping module may control which temperature sensor monitors which memory die according to the strobe signal, or which temperature sensor operates according to the strobe signal, so that the temperatures of different memory dies may be monitored in real time according to the strobe signal.
As a possible implementation manner, the memory control module is further configured to send a control signal to the service module, where the control signal is used to instruct the service module to stop using the storage device, or is used to instruct the service module to use the storage device.
In the storage device disclosed in the embodiment of the present invention, the memory control module may have a function of sending a control signal to the service module, in addition to a function of modifying a parameter of the memory die, so that the service module may stop using the storage device according to the control signal, or use the storage device, which may improve the control capability of the storage device.
As a possible implementation manner, the memory control module is specifically configured to generate a first control signal and send the first control signal to the traffic module when an available bandwidth of the storage device is smaller than a threshold, where the first control signal is used to instruct the traffic module to stop using the storage device.
The storage device disclosed by the embodiment of the invention indicates that the current available bandwidth is less when the available bandwidth of the storage device is less than the threshold value, and can send the first control signal to the service module, so that the service module can stop using the storage device according to the first control signal, thereby reducing the bandwidth pressure of the storage device, and reducing the speed of continuously increasing the temperature of the storage device or slowing down the temperature increase of the storage device.
As a possible implementation manner, the memory control module is specifically configured to generate a second control signal and send the second control signal to the traffic module, where the second control signal is used to instruct the traffic module to use the storage device, when an available bandwidth of the storage device is greater than or equal to a threshold.
The storage device disclosed by the embodiment of the invention indicates that the current available bandwidth is more when the available bandwidth of the storage device is greater than or equal to the threshold value, and can send the second control signal to the service module, so that the service module can use the storage device according to the second control signal, and the utilization rate of the storage device can be improved.
As a possible implementation manner, when the bandwidth of the first memory die is adjusted according to the temperature of the first memory die, the Operation Per Second (OPS) of the first memory die may be adjusted according to the temperature of the first memory die, the Bit Per Second (BPS) of the first memory die may be adjusted according to the temperature of the first memory die, the refresh rate (refresh rate) of the first memory die may be adjusted according to the temperature of the first memory die, and the bandwidth of the first memory die may be adjusted according to the temperature of the first memory die and the service requirement.
In the memory device disclosed in the embodiment of the present invention, the OPS of the first memory die is the number of times the first memory die is accessed within a certain time window. The BPS of the first memory die is the number of bits (bits) that the first memory die is accessed within a certain time window. The refresh rate of the first memory die is the number of times the first memory die is refreshed within a certain time window, and the method is only applicable to memory dies that support refreshing.
A second aspect discloses a bandwidth adjustment method, which is applied to a storage device including M memory dies, M being an integer greater than 1, the method including:
monitoring the temperature of N memory dies of the M memory dies, wherein N is an integer greater than or equal to 1 and less than or equal to M;
adjusting a bandwidth of a first memory die according to a temperature of the first memory die, the first memory die being any one of the N memory dies.
As a possible implementation, the adjusting the bandwidth of the first memory die according to the temperature of the first memory die includes:
generating bandwidth adjustment information according to a temperature of the first memory die;
adjusting the bandwidth of the first memory die according to the bandwidth adjustment information.
As a possible implementation manner, the storage device further includes K temperature sensors, where K is an integer greater than or equal to 1;
the monitoring the temperature of N of the M memory dies comprises:
monitoring the temperature of N of the M memory dies using L temperature sensors, L being an integer greater than or equal to N and less than or equal to K.
As a possible implementation, the method further includes:
and controlling a first temperature sensor to monitor a second memory wafer according to a gating signal, wherein the first temperature sensor is one of the L temperature sensors, and the second memory wafer is one of the N memory wafers.
As a possible implementation, the method further includes:
and sending a control signal to a service module, wherein the control signal is used for indicating the service module to stop using the storage device or indicating the service module to use the storage device.
As a possible implementation manner, the sending a control signal to a service module, where the control signal is used to instruct the service module to stop using the storage apparatus, or is used to instruct the service module to use the storage apparatus includes:
and under the condition that the available bandwidth of the storage device is smaller than a threshold value, generating a first control signal, and sending the first control signal to a service module, wherein the first control signal is used for indicating the service module to stop using the storage device.
As a possible implementation manner, the sending a control signal to a service module, where the control signal is used to instruct the service module to stop using the storage apparatus, or is used to instruct the service module to use the storage apparatus includes:
and generating a second control signal and sending the second control signal to a service module when the available bandwidth of the storage device is greater than or equal to a threshold value, wherein the second control signal is used for indicating the service module to use the storage device.
As a possible implementation, the adjusting the bandwidth of the first memory die according to the temperature of the first memory die includes:
adjusting an OPS of a first memory die according to a temperature of the first memory die; or
Adjusting a BPS of a first memory die according to a temperature of the first memory die; or alternatively
Adjusting a refresh rate of a first memory die according to a temperature of the first memory die; or
Adjusting a bandwidth of a first memory die according to a temperature and a traffic demand of the first memory die.
A third aspect discloses a system-on-chip comprising the memory device disclosed in the first aspect or any one of the possible implementations of the first aspect. The soc chip may be formed of a memory device, or may include a memory device and other discrete devices.
A fourth aspect discloses an electronic device comprising the memory apparatus disclosed in the first aspect or any one of the possible implementation manners of the first aspect, and a discrete device coupled to the memory apparatus.
Drawings
FIG. 1 is a schematic structural diagram of an HBM according to an embodiment of the present invention;
FIG. 2 is a schematic structural diagram of a memory device according to an embodiment of the present invention;
FIG. 3 is a schematic structural diagram of another memory device according to an embodiment of the disclosure;
FIG. 4 is a schematic diagram of a temperature sensor mapping module according to an embodiment of the disclosure;
FIG. 5 is a diagram of a bandwidth control module according to an embodiment of the present invention;
FIG. 6 is a diagram of a memory control module according to an embodiment of the present disclosure;
FIG. 7 is a schematic structural diagram of another memory device according to an embodiment of the present disclosure;
fig. 8 is a schematic flow chart of a bandwidth adjustment method according to an embodiment of the present invention.
Detailed Description
The embodiment of the invention discloses a storage device, a bandwidth adjusting method and electronic equipment, which are used for improving the flexibility of the storage device. The embodiments of the present invention will be described below with reference to the drawings.
The terms "first," "second," "third," and "fourth," etc. in the description and claims of the invention and the accompanying drawings are used for distinguishing between different objects and not for describing a particular order. Furthermore, the terms "include" and "have," as well as any variations thereof, are intended to cover non-exclusive inclusions. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those steps or elements listed, but may alternatively include other steps or elements not listed, or inherent to such process, method, article, or apparatus.
Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the application. The appearances of the phrase in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. It is explicitly and implicitly understood by one skilled in the art that the embodiments described herein can be combined with other embodiments.
In order to better understand the storage device, the bandwidth adjusting method and the electronic device disclosed in the embodiments of the present invention, an application scenario used in the embodiments of the present invention is described below. A High Bandwidth Memory (HBM) is a high performance Dynamic Random Access Memory (DRAM) based on a three-dimensional (3D) stacking process, and is suitable for occasions with high memory bandwidth requirements, such as a Graphics Processing Unit (GPU), a network switching and forwarding device (e.g., a router, a switch, etc.). The HBM is smaller in size and power consumption than a Double Data Rate (DDR) and a fifth-version graphics double data rate (GDDR 5) memory. Referring to fig. 1, fig. 1 is a schematic structural diagram of an HBM according to an embodiment of the present invention. As shown in fig. 1, the HBM may include a plurality of DRAM dies (die) and a base die. The DRAM cells are stacked on a substrate die, and the DRAM cells and the substrate die may be connected by Through Silicon Vias (TSVs) and micro bumps (micro bumps). While the HBM is illustrated in fig. 1 as including four DRAM dies, the HBM may include five DRAM dies, and may include other numbers of DRAM dies, not limited thereto. A DRAM cell includes one or more channels, one channel including one or more banks (banks). At present, 3D memories such as HBM (hybrid binary arithmetic) only output one global temperature, and a memory control module only can perform coarse bandwidth control on the memory based on the temperature, so that the precision is low, and the utilization rate of the memory bandwidth is influenced. The memory control module may be disposed in the memory, or may be disposed outside the memory, for example, disposed in the processor, or may be partially disposed in the memory and partially disposed outside the memory.
The storage device, the bandwidth adjustment method, and the electronic device disclosed in the embodiments of the present invention may be applied to not only HBM and a DRAM stack structure similar to HBM, but also various memories and stack structures such as Static Random Access Memory (SRAM), Magnetic Random Access Memory (MRAM), and DDR, which are not limited herein.
In order to better understand the storage device, the bandwidth adjusting method and the electronic device disclosed in the embodiments of the present invention, the following description will be made on terms used in the embodiments of the present invention.
The memory is a component used for storing programs and data, and for a computer, the memory function is provided only when the memory is provided, so that the normal work can be ensured. The memory is divided into a main memory and an auxiliary memory according to its usage, and the main memory is also called an internal memory, which is called a memory for short. Peripheral storage refers to storage except for computer memory and CPU cache, and such storage can still store data after power failure. Common external memories include hard disks, floppy disks, optical disks, U-disks, and the like. All hardware with memory capability can be referred to as memory.
When data is to be read by a certain hardware, the required data is firstly searched from the Cache, if the required data is found, the data is directly executed, and if the required data is not found, the required data is found from a memory. Since caches run much faster than memory, the role of caches is to help the hardware run faster. Since the cache usually uses a Random Access Memory (RAM) (non-permanent storage that is lost when power is off), the file is sent to a memory such as a hard disk for permanent storage after the cache is used up.
A channel is a computer vocabulary, and belongs to an operation code, a counting section, a memory address section and the like. The data transmission between the memory and the external device can be completed. A processor which is independent of the special input/output (I/O) control of a Central Processing Unit (CPU) controls the equipment and the memory to directly exchange data. It has its own channel command, can be executed by CPU to start channel, and can send out interrupt signal to CPU when the operation is finished. The format of the channel instruction is generally represented by: operation code, counting segment, memory address segment and ending mark. Three types of channels can be set up in a system: byte multipath channel, array multipath channel, selection channel.
And (6) RAM. The memory can be accessed at will according to the requirement, and the access speed is independent of the position of the memory unit. Such a memory loses its memory contents when power is off, and is therefore mainly used for storing programs for a short time. Random access memories are further classified into SRAM and DRAM according to the information to be stored.
Referring to fig. 2, fig. 2 is a schematic structural diagram of a memory device according to an embodiment of the disclosure. As shown in fig. 2, the storage device may include a temperature monitoring module, a bandwidth control module, and M memory dies, M being an integer greater than 1;
the temperature monitoring module is used for monitoring the temperature of N memory wafers in the M memory wafers, wherein N is an integer which is greater than or equal to 1 and less than or equal to M;
and the bandwidth control module is used for adjusting the bandwidth of the first memory wafer according to the temperature of the first memory wafer, and the first memory wafer is any one of the N memory wafers.
The temperature monitoring module is configured to monitor a temperature of N of the M memory dies. The bandwidth control module may obtain the temperatures of the N memory dies from the temperature monitoring module in real time or periodically, and then may determine whether the temperature of the first memory die is greater than (or equal to) a first threshold, and in a case where the temperature of the first memory die is determined to be greater than (or equal to) the first threshold, indicating that the temperature of the first memory die is higher, the bandwidth of the first memory die may be adjusted according to the temperature of the first memory die, so as to control the rate at which the temperature of the memory die continues to increase or decrease the temperature of the memory die. In the case that the temperature of the first memory die is determined to be less than (or equal to) the first threshold, indicating that the temperature of the first memory die is low, the current bandwidth of the first memory die can be continuously maintained, i.e., the bandwidth of the first memory die does not need to be adjusted according to the temperature of the first memory die. The first memory die is any one of the N memory dies. The temperature monitoring module monitors the temperature of the memory wafer, can monitor the temperature of the memory wafer through the coupling memory wafer, can also monitor the temperature of the memory wafer near the memory wafer, and can monitor the temperature of other parts synchronous with the memory wafer.
The temperature greater than or equal to the first threshold may be divided into a plurality of temperature intervals, and different temperature intervals may correspond to different bandwidths. When the bandwidth of the first memory wafer is adjusted according to the temperature of the first memory wafer, the bandwidth corresponding to the temperature of the first memory wafer can be obtained according to the corresponding relation between the temperature interval and the bandwidth, and then the bandwidth of the first memory wafer is adjusted according to the obtained bandwidth. In the case where the current bandwidth of the first memory die is the same as the acquired bandwidth, no adjustment is required, and in the case where the current bandwidth of the first memory die is different from the acquired bandwidth, the bandwidth of the first memory die needs to be adjusted from the current bandwidth to the acquired bandwidth. The corresponding relationship between the temperature range and the bandwidth of different memory dies can be the same or different. The adjustment modes for adjusting the bandwidth of the memory dies corresponding to different temperature ranges of the same memory die may be the same or different. The higher the temperature that the temperature interval includes, the less the bandwidth that corresponds is, the lower the heat loss of its memory wafer that corresponds to can guarantee that the temperature of memory wafer can not be too high, thereby can avoid the memory wafer to damage because the temperature is too high.
Referring to fig. 3, fig. 3 is a schematic structural diagram of another memory device according to an embodiment of the disclosure. Wherein fig. 3 is optimized from fig. 2. As shown in fig. 3, the memory device may further include a memory control module, the memory control module respectively coupling the bandwidth control module and the M memory dies;
the bandwidth control module is specifically used for generating bandwidth adjustment information according to the temperature of the first memory wafer and sending the bandwidth adjustment information to the memory control module;
and the memory control module is used for adjusting the bandwidth of the first memory wafer according to the bandwidth adjustment information.
Because the parameter of the memory die is adjusted by the memory control module, when the bandwidth of the first memory die needs to be adjusted according to the temperature of the first memory die, and the bandwidth of the first memory die is adjusted according to the temperature of the first memory die by adjusting the parameter of the memory die, that is, when the bandwidth of the first memory die needs to be adjusted by adjusting the parameter of the first memory die, the bandwidth control module may first generate the bandwidth adjustment information according to the temperature of the first memory die, and then send the bandwidth adjustment information to the memory control module. After the memory control module receives the adjustment information from the bandwidth control module, the memory control module may adjust the parameter of the memory die according to the bandwidth adjustment information, so that the bandwidth of the first memory die may be adjusted by adjusting the parameter of the first memory die.
The bandwidth adjustment information may include a bandwidth of the first memory die, that is, a bandwidth corresponding to a current temperature of the first memory die, and the memory control module adjusts a parameter of the first memory die according to the bandwidth, so that the bandwidth of the adjusted first memory die is equal to the bandwidth. The manner of adjustment, i.e. adjusting which parameter is preset, may be stored in the memory control module.
The bandwidth adjustment information may also include a value of a certain parameter of the first memory die, and correspondingly, after the bandwidth control module acquires the bandwidth corresponding to the temperature of the first memory die according to the correspondence between the temperature interval and the bandwidth, it is further necessary to determine, according to the bandwidth, how much the value of the parameter needs to be adjusted, and if so, the bandwidth of the first memory die can be equal to the acquired bandwidth. The memory control module may adjust the value of this parameter of the first memory die to the value described above after receiving the adjustment information. The adjustment, i.e. adjusting which parameter is preset, may be stored in the bandwidth control module.
In one embodiment, the temperature monitoring module may include K temperature sensors, K being an integer greater than or equal to 1;
the temperature monitoring module is specifically used for monitoring the temperature of N memory wafers in the M memory wafers by using L temperature sensors, wherein L is an integer which is greater than or equal to N and less than or equal to K.
The temperature monitoring module may include one or more temperature sensors. Because one temperature sensor can only monitor the temperature of one position at a time, under the condition that the temperature monitoring module comprises one temperature sensor, the temperature of one memory wafer can only be monitored, so that the bandwidth of the memory wafer can only be adjusted according to the temperature of the memory wafer, and the bandwidth control precision is low. One temperature sensor may be used to monitor one memory die or multiple temperature sensors may be used to monitor one memory die at a time. Multiple temperature sensors may monitor different channels and/or different banks in a memory die. The higher the accuracy and the greater the number of the temperature sensors monitoring one memory wafer, the more accurate the monitored temperature and the higher the bandwidth control accuracy of the memory wafer, so that the bandwidth control accuracy can be improved.
In one embodiment, the memory device may further include a temperature sensor mapping module to couple the K temperature sensors and the M memory dies, respectively;
and the temperature sensor mapping module is used for controlling the first temperature sensor to monitor the second memory wafer according to the gating signal, the first temperature sensor is one temperature sensor in the L temperature sensors, and the second memory wafer is one memory wafer in the N memory wafers.
A temperature sensor may be fixed to monitor a memory cell or a location in a memory cell, and the temperature of the memory cell or the location in the memory cell that is not to be monitored may be controlled by controlling the operation or non-operation of the temperature sensor. One temperature sensor may also monitor the temperature of any one of the plurality of memory dies, i.e. there is a connection point between one temperature sensor and the plurality of memory dies, but since one temperature sensor can only monitor the temperature of one location at a time, it is necessary to control which one of the plurality of memory dies the temperature sensor monitors. A temperature sensor may also monitor multiple locations of a memory die, i.e. a temperature sensor has connection points with multiple locations such as channels, banks, etc. of the memory die, but since a temperature sensor can only monitor the temperature of one location at a time, it is necessary to control which location in the memory die the temperature sensor monitors. Therefore, before each use of the storage device, a user can set which service accesses which memory die or which part of which memory die, so that, when the service accesses the storage device, the temperature sensor mapping module can control which temperature sensor monitors which memory die or which position in the memory die according to the strobe signal, or control which temperature sensor operates according to the strobe signal, so that the temperatures of different positions of different memory dies can be monitored in real time according to the strobe signal.
For better explaining the working principle of the temperature sensor mapping module, please refer to fig. 4, and fig. 4 is a schematic diagram of a temperature sensor mapping module according to an embodiment of the present invention. As shown in fig. 4, the temperature sensor mapping module has stored therein a mapping table of temperature sensors to memory dies. The mapping of temperature sensors to memory dies is the one which temperature sensor makes a connection to which memory die or to which location in which memory die. The temperature sensor mapping module may determine which temperature sensor is operating and which temperature sensor monitors the temperature at which location based on a mapping table of temperature sensors to memory dies and the strobe signal when the memory device is being serviced. Specifically, the temperature sensor mapping module can determine which memory die or which portion of memory die needs to be accessed by the transaction according to the strobe signal, so as to determine which memory die or which portion of memory die in the storage device needs to be operated, and then determine which temperature sensors can monitor the memory die or the portion of memory die that needs to be operated according to the temperature sensor to memory die mapping table. And then controlling the temperature sensors to monitor the temperatures of the positions, acquiring the temperatures monitored by the temperature sensors, determining the acquired temperatures as selected temperatures and sending the selected temperatures to the bandwidth control module, so that the bandwidth control module can adjust the bandwidth of the storage device according to the selected temperatures. In addition, in order for the bandwidth control module to adjust the bandwidth of the storage device, the temperature sensor mapping module may also send monitored location information for each of the selected temperatures to the bandwidth control module, i.e., which of the selected temperatures is the temperature of which memory die or which portion of which memory die is sent to the bandwidth control module.
In some embodiments, the storage device may not include a temperature sensor mapping module, the functionality of which may be implemented by the bandwidth control module.
In order to better explain the operation principle of the bandwidth control module in the case that the storage device includes the temperature sensor mapping module, please refer to fig. 5, and fig. 5 is a schematic diagram of a bandwidth control module according to an embodiment of the present invention. As shown in fig. 5, the bandwidth control module stores a corresponding relationship between temperature and bandwidth, where the corresponding relationship between temperature and bandwidth may be a corresponding relationship between a temperature interval and bandwidth, or a corresponding relationship between a temperature value and bandwidth. The corresponding relationship between the temperature and the bandwidth may include the corresponding relationship between the temperature and the bandwidth of the memory wafer, the temperature of the memory wafer may be the whole temperature of the memory wafer, or may be the temperatures of different parts of the memory wafer, and the corresponding relationship between the temperature and the bandwidth of different parts of the same memory wafer may be the same or different. After receiving the selected temperature from the temperature sensor mapping module, the bandwidth control module may adjust the bandwidth of the storage device according to the selected temperature and the correspondence. Specifically, the bandwidth of the storage device may be adjusted according to the selected temperature, the monitored location information of the selected temperature, and the correspondence. Under the condition that the bandwidth of the memory wafer needs to be adjusted by adjusting the parameters of the memory wafer, the bandwidth control module can determine the selected bandwidth according to the selected temperature, the monitoring position information of the selected temperature and the corresponding relation, and send the selected bandwidth to the memory control module. In addition, information for the memory die corresponding to each of the selected bandwidths may also be sent to the memory control module. How to adjust in particular may refer to other descriptions of the bandwidth control module.
In one embodiment, the memory control module is further configured to send a control signal to the traffic module, where the control signal is used to instruct the traffic module to stop using the memory device or instruct the traffic module to use the memory device.
The memory control module may have a function of sending a control signal to the traffic module, in addition to the function of modifying the parameter of the memory die, so that the traffic module may stop using the memory device or use the memory device according to the control signal.
In an embodiment, the memory control module is specifically configured to generate a first control signal and send the first control signal to the traffic module when an available bandwidth of the memory device is smaller than a threshold, where the first control signal is used to instruct the traffic module to stop using the memory device.
In the case that the available bandwidth of the storage device is less than the threshold value, indicating that the current available bandwidth is less, a first control signal may be sent to the service module, so that the service module may stop using the storage device according to the first control signal, thereby reducing the bandwidth pressure of the storage device, and reducing the speed at which the temperature of the storage device continues to rise or the temperature of the storage device rises. The first control signal may be a back-pressure signal, or may be other signals having the same function.
In an embodiment, the memory control module is specifically configured to generate a second control signal and send the second control signal to the traffic module when an available bandwidth of the memory device is greater than or equal to a threshold, where the second control signal is used to instruct the traffic module to use the memory device.
When the available bandwidth of the storage device is greater than or equal to the threshold, it indicates that the current available bandwidth is more, and may send a second control signal to the service module, so that the service module may use the storage device according to the second control signal, thereby increasing the usage rate of the storage device. The second control signal may be a credit (credit) signal, and the service module uses the storage means once every time the credit signal is transmitted. The second control signal may also be another signal having an equivalent function. The storage means are not limited to the use of several times by the service module for transmitting a second control signal.
In one embodiment, adjusting the bandwidth of the first memory die according to the temperature of the first memory die comprises:
adjusting the OPS of the first memory die according to the temperature of the first memory die; or
Adjusting the BPS of the first memory die according to the temperature of the first memory die; or
Adjusting a refresh rate of the first memory die according to a temperature of the first memory die; or
The bandwidth of the first memory die is adjusted according to the temperature and traffic demand of the first memory die.
The OPS of the first memory die is the number of times the first memory die is accessed within a certain time window. The BPS of the first memory die is the number of bits that the first memory die is accessed within a certain time window. The bandwidth of the first memory die is adjusted according to the temperature and traffic demand of the first memory die. The service requirement may be a priority of the service. For example, since higher priority of traffic indicates more important traffic, in the case that the temperature of the first memory die is higher, it may be ensured that the traffic with higher priority preferentially uses the storage device, and for the traffic with lower priority, the time for using the storage device may be delayed, the traffic may be discarded, the traffic may be subjected to packet loss processing, and burst control (burst control) may also be performed. The three ways of adjusting the bandwidth of the first memory die are all independent of the parameters of the memory die, so that the bandwidth control module can adjust the bandwidth without the participation of the memory control module. The refresh rate of the first memory die is the number of times the first memory die is refreshed within a certain time window, the manner is only suitable for supporting refreshed memory dies, the manner is related to the number of times the first memory die is refreshed, and therefore, the memory control module is required to participate in adjusting the bandwidth.
In order to better explain the operation principle of the memory control module under the condition that the manner of adjusting the bandwidth of the memory dies is implemented by adjusting the parameters of the memory dies, please refer to fig. 6, where fig. 6 is a schematic diagram of a memory control module according to an embodiment of the present invention. As shown in fig. 6, the memory control module stores a bandwidth configuration table, where the bandwidth configuration table includes a corresponding relationship between the bandwidth of the memory dies and the parameters, and the corresponding relationship between different memory dies may be the same or different. After the memory control module receives the selected bandwidth from the bandwidth control module, parameters of the memory die may be adjusted according to the selected bandwidth and the bandwidth configuration table. Specifically, parameters of the die may be adjusted according to the selected bandwidth, information of the memory die corresponding to the selected bandwidth, and the bandwidth configuration table. How to adjust in particular may refer to other descriptions of the memory control module. As shown in fig. 6, before the bandwidth adjustment, whether the access control of the storage device is accessed is determined by the service, and after the bandwidth adjustment, whether the service can access the storage device is determined by the memory control module. In addition, the memory control module may also determine whether to send the flow control feedback according to the bandwidth of the storage device, such as the first control signal, the second control signal, and the like.
Referring to fig. 7, fig. 7 is a schematic structural diagram of another memory device according to an embodiment of the disclosure. As shown in fig. 7, the storage device may include a plurality of temperature sensors (8 are illustrated), a plurality of memory dies (4 are illustrated), each of which includes a plurality of lanes (6 are illustrated), and a base die including a temperature sensor mapping module, a bandwidth control module, and a memory control module. For a detailed description of each part of the storage device, reference may be made to the related description in the storage device embodiment described in fig. 2 to fig. 3, and details are not repeated here.
Referring to fig. 8, fig. 8 is a schematic flow chart illustrating a bandwidth adjustment method according to an embodiment of the present invention. Wherein the method is applied to the storage device shown in fig. 2, 3 and 7. The memory device may include M memory dies, M being an integer greater than 1. As shown in fig. 8, the bandwidth adjusting method may include the following steps.
801. The temperature of N of the M memory dies is monitored.
Wherein N is an integer greater than or equal to 1 and less than or equal to M.
802. The bandwidth of the first memory die is adjusted according to the temperature of the first memory die.
The first memory die is any one of the N memory dies.
Optionally, step 802 may include:
generating bandwidth adjustment information according to a temperature of the first memory die;
the bandwidth of the first memory die is adjusted according to the bandwidth adjustment information.
Optionally, the storage device may further include K temperature sensors, where K is an integer greater than or equal to 1;
step 801 may include:
monitoring the temperature of N memory cells of the M memory cells using L temperature sensors, L being an integer greater than or equal to N and less than or equal to K.
Optionally, the method may further include:
and controlling the first temperature sensor to monitor the second memory wafer according to the gating signal, wherein the first temperature sensor is one of the L temperature sensors, and the second memory wafer is one of the N memory wafers.
Optionally, the method may further include:
and sending a control signal to the service module, wherein the control signal is used for indicating the service module to stop using the storage device or indicating the service module to use the storage device.
Optionally, sending a control signal to the service module, where the control signal is used to instruct the service module to stop using the storage device, or the control signal is used to instruct the service module to use the storage device, and the method includes:
and under the condition that the available bandwidth of the storage device is smaller than a threshold value, generating a first control signal, and sending the first control signal to the service module, wherein the first control signal is used for indicating the service module to stop using the storage device.
As a possible implementation manner, sending a control signal to the service module, where the control signal is used to instruct the service module to stop using the storage device, or is used to instruct the service module to use the storage device includes:
and generating a second control signal and sending the second control signal to the service module when the available bandwidth of the storage device is greater than or equal to the threshold value, wherein the second control signal is used for indicating the service module to use the storage device.
As a possible implementation, step 802 may include:
adjusting an OPS of a first memory die according to a temperature of the first memory die; or alternatively
Adjusting a BPS of a first memory die according to a temperature of the first memory die; or
Adjusting a refresh rate of a first memory die according to a temperature of the first memory die; or
Adjusting a bandwidth of a first memory die according to a temperature and a traffic demand of the first memory die.
It should be noted that, for the related functions of the specific process in the bandwidth adjustment method described in the embodiment of the present invention, reference may be made to the related descriptions in the embodiments of the storage device described in fig. 2, fig. 3, and fig. 7, and details are not repeated here.
The above-mentioned embodiments, objects, technical solutions and advantages of the present invention are further described in detail, it should be understood that the above-mentioned embodiments are only exemplary embodiments of the present invention, and are not intended to limit the scope of the present invention, and any modifications, equivalent substitutions, improvements and the like made on the basis of the technical solutions of the present invention should be included in the scope of the present invention.

Claims (17)

  1. A storage device is characterized by comprising a temperature monitoring module, a bandwidth control module and M memory dies, wherein M is an integer greater than 1;
    the temperature monitoring module is used for monitoring the temperature of N memory wafers in the M memory wafers, wherein N is an integer which is greater than or equal to 1 and less than or equal to M;
    the bandwidth control module is configured to adjust a bandwidth of a first memory die according to a temperature of the first memory die, where the first memory die is any one of the N memory dies.
  2. The memory device of claim 1, further comprising a memory control module, the memory control module respectively coupling the bandwidth control module and the M memory dies;
    the bandwidth control module is specifically configured to generate bandwidth adjustment information according to a temperature of a first memory die, and send the bandwidth adjustment information to the memory control module;
    the memory control module is configured to adjust the bandwidth of the first memory die according to the bandwidth adjustment information.
  3. The storage device according to claim 1 or 2, wherein the temperature monitoring module comprises K temperature sensors, K being an integer greater than or equal to 1;
    the temperature monitoring module is specifically configured to monitor temperatures of N memory dies of the M memory dies using L temperature sensors, where L is an integer greater than or equal to N and less than or equal to K.
  4. The memory device of claim 3, further comprising a temperature sensor mapping module that respectively couples the K temperature sensors and the M memory dies;
    the temperature sensor mapping module is configured to control a first temperature sensor to monitor a second memory die according to a gating signal, where the first temperature sensor is one of the L temperature sensors, and the second memory die is one of the N memory dies.
  5. The storage device according to any of claims 2-4, wherein the memory control module is further configured to send a control signal to a traffic module, and the control signal is configured to instruct the traffic module to stop using the storage device or instruct the traffic module to use the storage device.
  6. The storage device according to claim 5, wherein the memory control module is specifically configured to generate a first control signal and send the first control signal to a traffic module when an available bandwidth of the storage device is smaller than a threshold, and the first control signal is used to instruct the traffic module to stop using the storage device.
  7. The storage device according to claim 5, wherein the memory control module is specifically configured to generate a second control signal and send the second control signal to a traffic module if an available bandwidth of the storage device is greater than or equal to a threshold, where the second control signal is used to instruct the traffic module to use the storage device.
  8. The memory device of claim 1, wherein said adjusting the bandwidth of the first memory die as a function of the temperature of the first memory die comprises:
    adjusting an Operand Per Second (OPS) of a first memory die according to a temperature of the first memory die; or
    Adjusting a bits per second BPS of a first memory die according to a temperature of the first memory die; or
    Adjusting a refresh rate of a first memory die according to a temperature of the first memory die; or
    Adjusting a bandwidth of a first memory die according to a temperature and a traffic demand of the first memory die.
  9. A bandwidth adjustment method applied to a storage device, the storage device including M memory dies, M being an integer greater than 1, the method comprising:
    monitoring the temperature of N memory dies of the M memory dies, wherein N is an integer greater than or equal to 1 and less than or equal to M;
    adjusting a bandwidth of a first memory die according to a temperature of the first memory die, the first memory die being any one of the N memory dies.
  10. The method of claim 9, wherein said adjusting the bandwidth of the first memory die according to the temperature of the first memory die comprises:
    generating bandwidth adjustment information according to a temperature of the first memory die;
    adjusting bandwidth of the first memory die according to the bandwidth adjustment information.
  11. The method of claim 9 or 10, wherein the storage device further comprises K temperature sensors, K being an integer greater than or equal to 1;
    the monitoring the temperature of N of the M memory dies comprises:
    monitoring the temperature of N of the M memory dies using L temperature sensors, L being an integer greater than or equal to N and less than or equal to K.
  12. The method of claim 11, further comprising:
    and controlling a first temperature sensor to monitor a second memory wafer according to a gating signal, wherein the first temperature sensor is one of the L temperature sensors, and the second memory wafer is one of the N memory wafers.
  13. The method according to any one of claims 10-12, further comprising:
    and sending a control signal to a service module, wherein the control signal is used for indicating the service module to stop using the storage device or indicating the service module to use the storage device.
  14. The method of claim 13, wherein the sending a control signal to a traffic module, the control signal being used to instruct the traffic module to stop using the storage device, or the control signal being used to instruct the traffic module to use the storage device comprises:
    and generating a first control signal and sending the first control signal to a service module when the available bandwidth of the storage device is smaller than a threshold, wherein the first control signal is used for indicating the service module to stop using the storage device.
  15. The method of claim 13, wherein the sending a control signal to a traffic module, the control signal being used to instruct the traffic module to stop using the storage device, or the control signal being used to instruct the traffic module to use the storage device comprises:
    and generating a second control signal and sending the second control signal to a service module when the available bandwidth of the storage device is greater than or equal to a threshold value, wherein the second control signal is used for indicating the service module to use the storage device.
  16. The method of claim 9, wherein said adjusting the bandwidth of the first memory die according to the temperature of the first memory die comprises:
    adjusting an Operand Per Second (OPS) of a first memory die according to a temperature of the first memory die; or
    Adjusting a bits per second BPS of a first memory die according to a temperature of the first memory die; or
    Adjusting a refresh rate of a first memory die according to a temperature of the first memory die; or
    Adjusting a bandwidth of a first memory die according to a temperature and a traffic demand of the first memory die.
  17. An electronic device, comprising:
    the memory device of any of claims 1-8, and a discrete device coupled to the memory device.
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