CN114864407A - Preparation method of zinc oxide-based thin film transistor - Google Patents
Preparation method of zinc oxide-based thin film transistor Download PDFInfo
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- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 title claims abstract description 97
- 239000011787 zinc oxide Substances 0.000 title claims abstract description 48
- 239000010409 thin film Substances 0.000 title claims abstract description 43
- 238000002360 preparation method Methods 0.000 title claims abstract description 14
- 239000000758 substrate Substances 0.000 claims abstract description 74
- 238000001259 photo etching Methods 0.000 claims abstract description 29
- 238000000034 method Methods 0.000 claims abstract description 26
- 239000010408 film Substances 0.000 claims abstract description 24
- 229910052751 metal Inorganic materials 0.000 claims abstract description 15
- 239000002184 metal Substances 0.000 claims abstract description 15
- 229910052782 aluminium Inorganic materials 0.000 claims abstract description 12
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims abstract description 12
- 238000005530 etching Methods 0.000 claims abstract description 10
- 238000001704 evaporation Methods 0.000 claims abstract description 8
- 238000005546 reactive sputtering Methods 0.000 claims abstract description 7
- 238000007781 pre-processing Methods 0.000 claims abstract description 3
- 238000004544 sputter deposition Methods 0.000 claims description 30
- 229920002120 photoresistant polymer Polymers 0.000 claims description 28
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 claims description 12
- LFQSCWFLJHTTHZ-UHFFFAOYSA-N Ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 claims description 10
- 238000001035 drying Methods 0.000 claims description 9
- 238000004140 cleaning Methods 0.000 claims description 8
- 238000005566 electron beam evaporation Methods 0.000 claims description 8
- 239000013077 target material Substances 0.000 claims description 7
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 6
- 239000008367 deionised water Substances 0.000 claims description 5
- 229910021641 deionized water Inorganic materials 0.000 claims description 5
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 5
- 238000004528 spin coating Methods 0.000 claims description 4
- 239000011521 glass Substances 0.000 claims description 3
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- 238000009210 therapy by ultrasound Methods 0.000 claims description 3
- 239000010410 layer Substances 0.000 description 53
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 11
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- 239000004065 semiconductor Substances 0.000 description 4
- 229910001930 tungsten oxide Inorganic materials 0.000 description 4
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- 230000008569 process Effects 0.000 description 3
- 239000011701 zinc Substances 0.000 description 3
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 description 2
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- 206010034972 Photosensitivity reaction Diseases 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66969—Multistep manufacturing processes of devices having semiconductor bodies not comprising group 14 or group 13/15 materials
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02551—Group 12/16 materials
- H01L21/02554—Oxides
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/0257—Doping during depositing
- H01L21/02584—Delta-doping
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/02631—Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
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- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/22—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIBVI compounds
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
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Abstract
The invention discloses a preparation method of a zinc oxide-based thin film transistor, which comprises the following steps: firstly, preprocessing a substrate, and preparing an aluminum film on the substrate as a gate electrode to obtain a first substrate; step two, preparing Ta on the gate electrode 2 O 5 The film is used as a gate dielectric layer to obtain a second substrate; etching an active layer area on the gate dielectric layer by a photoetching stripping method, and preparing WZO thin film as an active layer in the active layer area to obtain a third substrate; the method for preparing the WZO film comprises the following steps: adopting a metal W target and a ZnO target, and obtaining an WZO thin film by reactive sputtering; the purity of the W target is 99.99 percent, and the purity of the ZnO target is 99.99 percent99.99%; etching source and drain electrode areas on the active layer by a photoetching stripping method, and evaporating aluminum films in the source and drain electrode areas to be used as source and drain electrodes to obtain the transistor.
Description
Technical Field
The invention belongs to the technical field of semiconductor device preparation, and particularly relates to a preparation method of a zinc oxide-based thin film transistor.
Background
With the rapid development of the information age, the display field enters the flat panel display age, a Thin Film Transistor (TFT) is used as a core element in an AMLCD and an AMOLED, and has become an irreplaceable dominant technology in the flat panel display industry, the TFT is a field effect semiconductor device and comprises a substrate, an active layer, an insulating layer, a gate electrode, a source electrode, a drain electrode and other important components, wherein a semiconductor channel layer plays a vital role in the device performance and the manufacturing process, and the stability of the TFT and the level of each performance index can directly limit the imaging capability of the display. In recent decades, TFTs mainly made of amorphous silicon and polycrystalline silicon have been rapidly developed as driving elements in liquid crystal display devices with advantages of small size, light weight, high quality, and the like, and have become mainstream information display terminals. However, amorphous silicon has the disadvantages of low field effect mobility, strong photosensitivity, complex preparation process and the like. The development of flat panel displays has focused on finding new materials for fabricating high mobility, low cost, high performance thin film transistors to meet the trend of technology development.
Zinc oxide (ZnO) -based thin film materials have attracted much attention both at home and abroad as transparent oxide semiconductors for TFT channel layers. These oxide TFTs generally have a low off current, can effectively reduce power consumption, and have a high transmittance, so that they are advantageous in competition for a fully transparent display, and are easily fabricated on a large scale. However, the existence of ZnO intrinsic defects seriously degrades the performance of the TFT, compared to the conventional amorphous silicon-based thin film transistor. In order to solve the problem, extensive researchers try to dope metal ions into ZnO, inhibit intrinsic defects such as oxygen vacancies and zinc gaps by using the characteristics of the metal ions, and improve the performance of the device.
Disclosure of Invention
The invention aims to provide a preparation method of a zinc oxide-based thin film transistor, which is used for preparing WZO-TFT by co-sputtering a high-purity metal tungsten target and a high-purity zinc oxide target, so that a doped thin film not only keeps higher carrier concentration, but also has better conductivity, and the electrical and optical properties of a device are improved.
The invention adopts a double-target material co-sputtering method, and simultaneously controls the sputtering power of W and the sputtering power of ZnO to carry out proper doping, thereby further improving the electrical and optical properties of the device.
The technical scheme provided by the invention is as follows:
a preparation method of a zinc oxide-based thin film transistor comprises the following steps:
firstly, preprocessing a substrate, and preparing an aluminum film on the substrate as a gate electrode to obtain a first substrate;
step two, preparing Ta on the gate electrode 2 O 5 The film is used as a gate dielectric layer to obtain a second substrate;
etching an active layer area on the gate dielectric layer by a photoetching stripping method, and preparing WZO thin film as an active layer in the active layer area to obtain a third substrate;
the method for preparing the WZO film comprises the following steps: adopting a metal W target and a ZnO target to obtain an WZO thin film through reactive sputtering; the purity of the W target is 99.99%, and the purity of the ZnO target is 99.99%;
etching source and drain electrode areas on the active layer by a photoetching stripping method, and evaporating aluminum films in the source and drain electrode areas to be used as source and drain electrodes to obtain the transistor.
Preferably, in the first step, the substrate is pretreated, which includes the following steps:
step 1, putting a substrate into an acetone solution, and ultrasonically cleaning for 5-10 minutes at room temperature;
step 2, placing the substrate in an ethanol solution, and carrying out ultrasonic treatment for 5-10 minutes at room temperature;
step 3, placing the substrate in deionized water, and ultrasonically cleaning for 5-10 minutes at room temperature;
step 4, drying the substrate by using high-purity nitrogen, and drying for 3-5 minutes in a drying furnace at 90 ℃;
wherein, the substrate adopts a glass substrate.
Preferably, in the first step, the first substrate is obtained by evaporating an aluminum thin film by electron beam evaporation.
Preferably, in the second step, an oxide Ta is used 2 O 5 Target material, Ta obtained by reactive sputtering 2 O 5 A film;
preferably, the thickness of the gate dielectric layer is 280nm to 320 nm.
Preferably, in the third step, etching an active layer region on the gate dielectric layer, including the following steps:
step a, spin-coating photoresist on the gate dielectric layer of the second substrate;
b, pre-baking and hardening the second substrate coated with the photoresist for 5 minutes at 90 ℃;
step c, covering a photoetching plate with an active layer pattern on the grid dielectric layer coated with the photoresist, and placing the photoetching plate under a photoetching machine for exposure;
step d, pre-baking the exposed second substrate for 5 minutes again at 90 ℃;
step e, placing the second substrate subjected to prebaking again under a photoetching machine for bare exposure;
and d, placing the second substrate subjected to bare exposure in a developing solution, dissolving the photoresist in the region corresponding to the active layer pattern in the developing solution, and exposing the gate dielectric layer to obtain the active layer region.
Preferably, in the third step, the sputtering power of the ZnO target is 150W, the sputtering power of the metal W target is 1W-5W, the pressure is 3-20 mtorr, and Ar/O 2 The range is 9: 1-2: 1. The pressure range is 3 to 20mtorr, Ar/O 2 The range is 9: 1-2: 1.
Preferably, the thickness of the active layer is 35 to 150 nm.
Preferably, in the fourth step, etching the source and drain electrode regions on the active layer includes the following steps:
step S1, spin-coating photoresist on the third substrate;
step S2, pre-baking and hardening the third substrate coated with the photoresist for 5 minutes at 90 ℃;
step S3, covering a photoetching plate with patterns of the source electrode and the drain electrode on the hardened third substrate, and placing the third substrate under a photoetching machine for exposure;
and step S4, placing the exposed third substrate in a developing solution, and removing the photoresist in the area corresponding to the source and drain electrode patterns by dissolving in the developing solution to obtain the source and drain electrode areas.
Preferably, in the fourth step, after depositing an aluminum film on the source and drain electrode regions by an electron beam evaporation method, cleaning the photoresist to obtain the transistor;
wherein the thickness of the source electrode and the drain electrode is 50 nm.
The invention has the beneficial effects that:
(1) the preparation method of the zinc oxide-based thin film transistor can improve the intrinsic defect of ZnO by doping tungsten element.
(2) According to the preparation method of the zinc oxide-based thin film transistor, WZO-TFT is prepared by co-sputtering the high-purity metal tungsten target and the high-purity zinc oxide target, so that the doped thin film can keep higher carrier concentration and has better conductivity, and the electrical and optical properties of the device are improved.
(3) The invention adopts a double-target material co-sputtering method, and simultaneously controls the sputtering power of W and the sputtering power of ZnO to carry out proper doping, thereby further improving the electrical and optical properties of the device.
Drawings
Fig. 1 is a schematic side view of a second substrate according to the present invention.
Fig. 2 is a schematic diagram of an etched active layer region according to the present invention.
Fig. 3 is a top view of a third substrate according to the present invention.
Fig. 4 is a schematic side view of a third substrate according to the present invention.
Fig. 5 is a schematic diagram of etched source and drain electrode regions according to the present invention.
Fig. 6 is a top view of a transistor made in accordance with the present invention.
Fig. 7 is a schematic side view of a transistor made in accordance with the present invention.
Detailed Description
The present invention is further described in detail below with reference to the attached drawings so that those skilled in the art can implement the invention by referring to the description text.
The invention provides a preparation method of a zinc oxide-based thin film transistor, which comprises the following specific preparation processes:
first, pre-treating the substrate
Putting the hard substrate into an acetone solution, and ultrasonically cleaning for 5-10 minutes at room temperature to remove molecular contamination and the like on the surface of the substrate; then, placing the hard substrate in an ethanol solution, and carrying out ultrasonic treatment for 5-10 minutes at room temperature to remove residual acetone on the surface; and then ultrasonically cleaning the glass fiber by deionized water at room temperature for 5-10 minutes to remove ethanol, ionic contamination and the like, finally drying the glass fiber by high-purity nitrogen, and drying the glass fiber in a drying furnace for 3-5 minutes at 90 ℃.
In the present embodiment, a glass substrate having a size of 15mm by 15mm is used as the hard substrate.
Secondly, preparing a gate electrode
And placing the pretreated hard substrate in electron beam Evaporation (EB) equipment, and evaporating an aluminum film to be used as a gate electrode to obtain a first substrate.
Preferably, the thickness of the gate electrode is set to 100 nm.
Thirdly, preparing a gate dielectric layer
And placing the first substrate in a radio frequency magnetron sputtering device, and depositing a gate dielectric layer material on the gate electrode. The gate dielectric layer is made of Ta 2 O 5 Using an oxide Ta 2 O 5 Target material, Ta obtained by reactive sputtering 2 O 5 The film has a thickness of 280 nm-320 nm. After the gate dielectric layer is prepared, a second substrate as shown in fig. 1 is obtained.
Fourthly, preparing an active layer
And covering the photoetching plate with the active layer pattern on the gate dielectric layer of the second substrate, and etching the active layer pattern. Then, WZO thin film is deposited on the area corresponding to the source layer pattern, and the active layer is obtained. The photoetching plate is provided with a plurality of active layer patterns, so that a plurality of transistors can be prepared simultaneously.
The specific process for preparing the active layer is as follows:
(1) gluing: fixing the sample on a photoresist homogenizer, and dripping 0.2 ml-0.5 ml of photoresist at the middle position on the gate dielectric layer of the second substrate; and starting the photoresist homogenizer, wherein the rotating speed is 450-550 rpm, and the time is 30-120 seconds, so that the photoresist is uniformly coated on the gate dielectric layer.
(2) Pre-baking: prebaking and hardening at 90 ℃ for 5 minutes.
(3) Exposure: and covering the adhesive layer with a photoetching plate with an active layer pattern, and exposing for 15 seconds under a photoetching machine, wherein the part (except the active layer pattern) of the adhesive layer, which corresponds to the part not hollowed out on the photoetching plate, is not irradiated by light (unexposed).
(4) Pre-baking: prebaking and hardening at 90 ℃ for 5 minutes.
(5) Naked exposure: and (3) placing the sample under a photoetching machine for bare exposure for 15 seconds, wherein the part which is not hollowed out on the photoetching plate is exposed once.
(6) And (3) developing: and (3) placing the substrate in NaOH developing solution, dissolving the photoresist corresponding to the primary exposure part (active layer pattern) in the developing solution, and removing the photoresist to expose the gate dielectric layer, thereby obtaining an active layer region (as shown in fig. 2).
(7) Active layer deposition:
and placing the second substrate with the etched active layer region in a radio frequency magnetron sputtering device, and depositing an active layer material, wherein the active layer material is WZO. The WZO thin film material is obtained by reactive sputtering by adopting a high-purity metal W target and a high-purity oxide ZnO target. Wherein, the purity of the metal tungsten target is 99.99 percent and the purity of the ZnO target is 99.99 percent. The high-purity metal W target and the high-purity oxide ZnO target are adopted for sputtering, so that compared with the WZO film prepared by using a ceramic plate target of tungsten and zinc oxide alloy, the W and ZnO can be mixed more uniformly, and the doping proportion of the metal W can be controlled conveniently. The doped film not only keeps higher carrier concentration, but also has better conductivity, and the electrical and optical properties of the device are improved.
Preferably, the sputtering power of the ZnO target is set to 150W, and the sputtering power of the metal W target is set to 1W-5W. The temperature is room temperature, the pressure is 3-20 mtorr, Ar/O 2 The range is 9: 1-2: 1, the deposition time is 5-15 min, and the film thickness of WZO is 35-150 nm. By reasonably controlling the sputtering power of W and the sputtering power of ZnO, the doping amount of the metal W is controlled, and proper doping is carried out, so that the electrical and optical properties of the device can be further improved.
After the active layer is deposited, the sample is sequentially cleaned with acetone, alcohol and deionized water by ultrasonic for 10min to remove the unexposed photoresist, and a third substrate (as shown in fig. 3-4) is obtained.
Fifthly, preparing source and drain electrodes
And etching the island regions of the single thin film transistor devices of the active layer into source and drain electrode regions by a photoetching-stripping method. And then depositing the source and drain electrodes in the source and drain electrode regions.
The specific process for preparing the source electrode and the drain electrode is as follows:
(1) gluing: fixing the third substrate on a photoresist uniformizing instrument, and dripping 0.2-0.5 ml of photoresist at the middle position above the third substrate; and starting the spin coater, wherein the rotating speed is 450-550 rpm, and the time is 30-120 seconds, so that the photoresist is uniformly coated on the sample.
(2) Pre-baking: prebaking and hardening at 90 ℃ for 5 minutes.
(3) Exposure: covering the adhesive layer with a photoetching plate with a source electrode pattern and a drain electrode pattern, and placing the photoetching plate under a photoetching machine for exposure for 15 seconds, wherein the part (except the source electrode pattern and the drain electrode pattern) of the adhesive layer, which corresponds to the part of the photoetching plate without hollowing out, is not irradiated by light (unexposed);
each group of source electrode patterns and each group of drain electrode patterns are in one-to-one correspondence with each active layer region, and the source electrode patterns and the drain electrode patterns are located above the active layers.
(4) And (3) developing: placing the exposed sample in NaOH developing solution, dissolving the photoresist corresponding to the exposed part (source and drain electrode patterns) in the developing solution, removing to expose part of the active layer (WZO), and obtaining source and drain electrode regions (as shown in FIG. 5);
the channel width between the source electrode and the drain electrode can be set according to actual needs.
(5) And (3) depositing a source electrode and a drain electrode:
and placing the third substrate with the etched source and drain electrode regions in electron beam Evaporation (EB) equipment, and evaporating an aluminum film to be used as a source electrode and a drain electrode, wherein the thickness of the electrode is 50 nm. And ultrasonically cleaning the sample by using acetone, alcohol and deionized water for 10min in sequence to remove the photoresist, so as to obtain WZO thin film transistors (shown in FIGS. 6-7).
According to the invention, the active layer is prepared by adopting zinc oxide doped with tungsten element, the doped tungsten element can replace zinc in the active layer, and W is + 6-valent ions and the ionic radius is close to that of Zn, so that the doping efficiency is higher, the lattice distortion caused by doping can be reduced, the near-infrared optical transmittance of the thin film is increased, the performance of the thin film transistor device is improved, the electrical performance and the optical performance of the device, such as on-off ratio, threshold voltage, sub-threshold swing amplitude, light transmittance, and the like, can be improved, and the thin film transistor device is suitable for display technology.
When the WZO thin film is prepared by radio frequency magnetron sputtering, ceramic plate targets of tungsten and zinc oxide alloy are not used, high-purity (99.99%) metal tungsten targets and high-purity (99.99%) zinc oxide targets are respectively used for co-sputtering to prepare WZO-TFT, and proper amount of doping is carried out by simultaneously controlling the sputtering power of metal W and ZnO, so that the doped thin film not only keeps higher carrier concentration, but also has better conductivity, and the electrical and optical properties of the device are improved.
If the WZO film is prepared by adopting the ceramic plate target material of tungsten and zinc oxide alloy, the doping amount of W cannot be adjusted due to the limit of the proportion of the ceramic plate target material; but also causes poor mixing uniformity of W and ZnO in the prepared WZO film, and influences the electrical and optical properties of the device.
In addition, researches show that the average light transmittance of WZO thin films prepared by using the alloy target is 85 percent, while the average light transmittance of WZO thin films prepared by the method is 92 percent, so that the ceramic plate target made of tungsten and zinc oxide alloy can be better applied to transparent display devices. Meanwhile, compared with the existing positive glue process, the negative glue process adopted by the preparation process provided by the invention avoids using dilute hydrochloric acid to corrode the metal oxide active layer. The invention adopts double targets to effectively regulate and control the sputtering power, so that the sputtering power of the ZnO target is kept at 150W, and the sputtering power of W is controlled to be 1W-5W. When the sputtering power of W is too low, the plasma density in the sputtering cavity is low, the number of W atoms sputtered out is small, so that the doping effect of W is weak, the device performance improvement of the ZnO thin film transistor is weak,when the sputtering power of W is 0.7W, the current on-off ratio is about 1.36X 10 3 The subthreshold swing is 2.50V decade -1 (ii) a When the sputtering power of W is too high, the doping concentration of W is too high to inhibit the movement of carriers, defects are increased, scattering phenomenon can occur in the movement process of the carriers, and the current on-off ratio is reduced, and when the power of W is 8W, the on-off ratio is less than 1.25 multiplied by 10 2 The subthreshold swing is 11.78V decade -1 The driving switch of the device has poor effect; when the sputtering power of W is 1W, the current on-off ratio is 1.03X 10 4 The subthreshold swing is 1.61V decade -1 (ii) a When the sputtering power of W is 5W, the current on-off ratio is 2.05X 10 4 The subthreshold swing is 6.71V decade -1 (ii) a Meanwhile, when the sputtering power of W is 2W, the particle energy is maximum, the doping effect is enhanced, the surface migration is enhanced, and the current on-off ratio is 5.24 multiplied by 10 5 The subthreshold swing is 1.22V decade -1 The device performance will be better. In summary, the sputtering power of W is controlled between 1W and 5W, so that the on-state ratio of WZO-TFT can be greatly improved, the subthreshold swing of WZO-TFT can be reduced, and the performance of the device is effectively improved.
While embodiments of the invention have been described above, it is not limited to the applications set forth in the description and the embodiments, which are fully applicable in various fields of endeavor to which the invention pertains, and further modifications may readily be made by those skilled in the art, it being understood that the invention is not limited to the details shown and described herein without departing from the general concept defined by the appended claims and their equivalents.
Claims (10)
1. A preparation method of a zinc oxide-based thin film transistor is characterized by comprising the following steps:
firstly, preprocessing a substrate, and preparing an aluminum film on the substrate as a gate electrode to obtain a first substrate;
step two, preparing Ta on the gate electrode 2 O 5 The film is used as a gate dielectric layer to obtain a second substrate;
etching an active layer area on the gate dielectric layer by a photoetching stripping method, and preparing WZO thin film as an active layer in the active layer area to obtain a third substrate;
the method for preparing the WZO film comprises the following steps: adopting a metal W target and a ZnO target to obtain an WZO thin film through reactive sputtering; the purity of the W target is 99.99%, and the purity of the ZnO target is 99.99%;
etching source and drain electrode areas on the active layer by a photoetching stripping method, and evaporating aluminum films in the source and drain electrode areas to be used as source and drain electrodes to obtain the transistor.
2. The method for preparing a zinc oxide-based thin film transistor according to claim 1, wherein in the step one, the substrate is pretreated, comprising the steps of:
step 1, putting a substrate into an acetone solution, and ultrasonically cleaning for 5-10 minutes at room temperature;
step 2, placing the substrate in an ethanol solution, and carrying out ultrasonic treatment for 5-10 minutes at room temperature;
step 3, placing the substrate in deionized water, and ultrasonically cleaning for 5-10 minutes at room temperature;
step 4, drying the substrate by using high-purity nitrogen, and drying the substrate in a drying furnace at 90 ℃ for 3-5 minutes;
wherein, the substrate adopts a glass substrate.
3. The method of claim 2, wherein in the first step, the first substrate is obtained by evaporating an aluminum thin film by electron beam evaporation.
4. The method of claim 3, wherein in the second step, Ta is used as an oxide 2 O 5 Target material, Ta obtained by reactive sputtering 2 O 5 A film.
5. The method for preparing a zinc oxide-based thin film transistor according to claim 3 or 4, wherein the thickness of the gate dielectric layer is 280nm to 320 nm.
6. The method for preparing a zinc oxide-based thin film transistor according to claim 5, wherein in the third step, an active layer region is etched on the gate dielectric layer, and the method comprises the following steps:
step a, spin-coating photoresist on the gate dielectric layer of the second substrate;
b, pre-baking and hardening the second substrate coated with the photoresist for 5 minutes at 90 ℃;
step c, covering a photoetching plate covered with active layer patterns on the gate dielectric layer coated with the photoresist, and placing the photoetching plate under a photoetching machine for exposure;
step d, pre-baking the exposed second substrate for 5 minutes again at 90 ℃;
step e, placing the second substrate subjected to prebaking again under a photoetching machine for bare exposure;
and d, placing the second substrate subjected to bare exposure in a developing solution, dissolving the photoresist in the region corresponding to the active layer pattern in the developing solution, and exposing the gate dielectric layer to obtain the active layer region.
7. The method for preparing a zinc oxide-based thin film transistor according to claim 6, wherein in the third step, the sputtering power of the ZnO target is 150W, the sputtering power of the metal W target is 1W-5W, the pressure is 3-20 mtorr, and Ar/O 2 The range is 9: 1-2: 1.
8. The method for preparing a zinc oxide-based thin film transistor according to claim 7, wherein the thickness of the active layer is 35 to 150 nm.
9. The method for preparing a zinc oxide-based thin film transistor according to claim 8, wherein in the fourth step, the source and drain electrode regions are etched on the active layer, comprising the following steps:
step S1, spin-coating photoresist on the third substrate;
step S2, pre-baking and hardening the third substrate coated with the photoresist for 5 minutes at 90 ℃;
step S3, covering a photoetching plate with patterns of the source electrode and the drain electrode on the hardened third substrate, and placing the third substrate under a photoetching machine for exposure;
and step S4, placing the exposed third substrate in a developing solution, and removing the photoresist in the area corresponding to the source and drain electrode patterns by dissolving in the developing solution to obtain the source and drain electrode areas.
10. The method for preparing a zinc oxide-based thin film transistor according to claim 9, wherein in the fourth step, after evaporating an aluminum film on the source and drain electrode regions by an electron beam evaporation method, the photoresist is cleaned to obtain the transistor;
wherein the thickness of the source electrode and the drain electrode is 50 nm.
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