CN114860547A - Yield early warning and diagnostic analysis method and device - Google Patents

Yield early warning and diagnostic analysis method and device Download PDF

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Publication number
CN114860547A
CN114860547A CN202210594477.1A CN202210594477A CN114860547A CN 114860547 A CN114860547 A CN 114860547A CN 202210594477 A CN202210594477 A CN 202210594477A CN 114860547 A CN114860547 A CN 114860547A
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wafer
map
bin
analysis
module
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龚雁鹏
赵文政
刘林平
谢箭
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Shanghai Information Technology Co ltd
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/3003—Monitoring arrangements specially adapted to the computing system or computing system component being monitored
    • G06F11/302—Monitoring arrangements specially adapted to the computing system or computing system component being monitored where the computing system component is a software system
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/32—Monitoring with visual or acoustical indication of the functioning of the machine
    • G06F11/324—Display of status information
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67242—Apparatus for monitoring, sorting or marking
    • H01L21/67276—Production flow monitoring, e.g. for increasing throughput
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P90/00—Enabling technologies with a potential contribution to greenhouse gas [GHG] emissions mitigation
    • Y02P90/30—Computing systems specially adapted for manufacturing

Abstract

The invention belongs to the technical field of semiconductor manufacturing, and particularly relates to a yield early warning and diagnostic analysis method and device. According to the intelligent yield early warning and diagnosis analysis method in the semiconductor industry, the data in the database are analyzed, the wafers with bad analysis are counted, the abnormal wafers are early warned and automatically analyzed, the main root cause of the Wafer with the bad analysis is pointed out, so that the problems are found out more quickly, the yield of the wafers is improved, in the whole process, due to full automation, personnel do not need to participate in data input and manual calculation, the analysis speed is greatly improved, and meanwhile, the accuracy of the statistic analysis is guaranteed.

Description

Yield early warning and diagnostic analysis method and device
Technical Field
The invention relates to the field of semiconductor manufacturing, in particular to an intelligent yield early warning and diagnosis analysis method in the semiconductor industry.
Background
Yield is an important evaluation index of many manufacturing factories, and especially for the semiconductor wafer manufacturing industry, each silicon wafer can undergo a plurality of precise treatments, if an imperfect treatment occurs, the subsequent manufacturing process and product quality can be affected, and the wafer can be seriously scrapped and has a short success rate.
The yield of the semiconductor wafer is calculated based on the ratio of the defective wafer and the functional wafer. The yield of a wafer is conventionally defined as: . There is a special model in Wafer Bin Map (WBM) to determine if there is an anomaly in the Wafer fabrication process. I.e., the electrical characteristics of each die in the probe test wafer and its connections in the circuit. As a foundry for wafers, customers often require that the yield of wafer products reach 83% or more, otherwise the wafer products are determined to be waste, thereby causing return of goods or replacement of bad prices. Therefore, the yield of wafer products is a great benefit to the manufacturing industry.
The conventional analysis method in semiconductor manufacturing industry is to first perform manual screening to find out the types of the bad wafers and sort them according to the data with defects provided by each inspection point, and then sort them according to the sequence of the types of the defects. And manually processing the data of the defect class, manually pulling the data from the database and analyzing the bad root cause.
Because of this method, although it is based on computer system analysis, the human intervention is too much, and all parameters, especially massive data, cannot be considered when analyzing according to the reason, which makes the analysis time-consuming and labor-consuming. Moreover, the operator may make an error in the operation process, so that the analysis result may affect the final root cause.
Big data is a concept that has been widely used in enterprises for data analysis, business intelligence, and statistical applications over the past decade. Due to the rapid increase in data volume, the decrease in data storage cost, the advancement of software technology, and the maturity of cloud environments, data analysis of prior insights into historical data that have matured in the field can predict future results, and can even innovate, creating an unseen business model.
The concept of smart factories and industry 4.0 has recently attracted more and more attention in the global semiconductor industry. The semiconductor industry has a significant position in the global market, especially in the areas of wafer foundry, packaging and testing. Due to the global competition, implementing smart manufacturing to increase the efficiency of the production process, increase the automation level of the equipment, and enhance the data analysis capability is not only an option but also a necessary action.
The large data type in the semiconductor industry is characterized as 3 Vs: mass data (Volume), speed of generating data (Velocity), there are various types of data (Velocity). As semiconductor manufacturing technology advances, the process becomes longer and more complex, and a large amount of data is generated during the manufacturing process. Each machine of each workstation can generate data in each process step, and thus the speed of generating data is high. Data generated from different machines may be in different forms, such as images or numbers. A large number of production records and process parameter data are accumulated and must be analyzed.
Therefore, it is necessary to determine how to avoid yield loss or diagnose the cause of yield loss at an early stage, and optimize the current yield analysis so as to perform wafer yield analysis more quickly and accurately, thereby saving more money.
Disclosure of Invention
The invention aims to solve the problems in the prior art and provides a method and a device for yield early warning and diagnosis analysis.
In order to achieve the purpose, the invention adopts the following technical scheme:
a device for yield early warning and diagnosis analysis comprises a yield statistics & management control module, an alarm grouping module, an analysis module and a result front-end display output module, wherein the yield statistics & management control module comprises a Daily Bin Ratio management and control early warning module, a management and control early warning Base Line configuration module and a Daily yield statistics module, the alarm grouping module comprises a Bin Ratio correlation-based alarm grouping module and a Bin Map-based characteristic alarm grouping module, the analysis module comprises a Wafer Bin Ratio and numerical value/non-numerical value parameter correlation analysis module, a Bin Map characteristic similarity grouping module, a Bin Map and Site Map characteristic matching module, a Bin Map and Defect Map matching analysis module and a Wafer abnormal production process analysis module, the yield statistics & management control module is connected with the alarm grouping module, the Bin Ratio correlation-based alarm grouping module, the Bin Map characteristic-based alarm grouping module, the Wafer Ratio and numerical value/non-numerical value characteristic alarm grouping module, the Wafer abnormal production process analysis module and the Wafer Ratio characteristic matching analysis module are connected with the alarm grouping module The system comprises a Bin Map feature-based alarm grouping module, a Bin Map and Site Map feature matching module, a Bin Map and Defect Map matching analysis module and a Wafer abnormal production process analysis module, wherein the Bin Map feature-based alarm grouping module is respectively connected with the Bin Map feature similarity grouping module, the Bin Map and Site Map feature matching module, the Bin Map and Defect Map matching analysis module and the Wafer abnormal production process analysis module, and the analysis module is connected with a result front-end display output module.
Preferably, according to the object of the present invention, a method for performing yield analysis of semiconductor wafers by using an intelligent yield early warning and diagnosis analysis apparatus in the semiconductor industry is provided, which comprises the steps of:
1) counting the data every day, and performing early warning summary by combining the managed and controlled BaseLine configuration information to obtain the daily Ratio early warning information.
2) And integrating bins with spatial correlation into each wafer map every day as the input of a classifier, outputting the classification result and the characteristics of the bin group by the classifier, and storing bin map image information which is used as basic metadata for subsequent image similarity judgment.
3) Inputting each defect map into a classifier every day, outputting the classification result and the characteristics of the defect map by the classifier, and storing the image information of the defect map, wherein the classification result and the characteristics are used as basic metadata for judging the similarity of subsequent images.
4) Based on the daily Ratio warning information, the analysis is carried out in two types: based on the Ratio correlation analysis of the Wafer, based on the Wafer Bin Map (WBM) analysis.
5) And based on the wafer of the daily Ratio early warning, dividing each early warning case into groups according to the map type and the similarity coefficient of each early warning case. And takes the mode type of the wafer as its bin new type.
6) Based on the Wafer's Ratio correlation analysis, a numerical (Inline/WAT/WaitTime parameter) or non-numerical (Tool/Chamber/Dcool) correlation analysis is performed.
7) In the Wafer Bin Map (WBM) analysis, similarity retrieval is carried out on the early-warned Wafer and the abnormal Wafer Bin Map (WBM) based on the previous Wafer Bin Map (WBM) classification data and the abnormal Wafer Bin Map (WBM) classification data in the historical fixed time, and the Bad/Good data based on the Bin Map in the fixed time is obtained.
8) Based on Bad/Good data in a Bin Map fixed time, a numerical (Inline/WAT/WaitTime parameter) or non-numerical (Tool/Chamber/Dcool) correlation analysis is performed.
9) Performing analysis on the first N Inline parameters and the WAT parameters of the nearest neighbor of the centroid of the Wafer Bin Map (WBM) based on the Wafer Bin Map (WBM) abnormity (Die) early-warned by the daily Ratio.
10) Based on the abnormal (die) Wafer early-warned every day, searching the abnormal Wafer Bin Map (WBM) corresponding to the top N which is most similar to the top N, and performing similar search in a historical fixed time according to three dimensions of the same Wafer, the same product and a cross-product.
Compared with the prior art, the method and the device for yield early warning and diagnostic analysis have the advantages that:
according to the intelligent yield early warning and diagnosis analysis method in the semiconductor industry, the data in the database are analyzed, the wafers with bad analysis are counted, the abnormal wafers are early warned and automatically analyzed, the main root cause of the Wafer with the bad analysis is pointed out, so that the problems are found out more quickly, the yield of the wafers is improved, in the whole process, due to full automation, personnel do not need to participate in data input and manual calculation, the analysis speed is greatly improved, and meanwhile, the accuracy of the statistic analysis is guaranteed.
Drawings
Fig. 1 is a block diagram of a semiconductor industry intelligent yield early warning and diagnostic analysis method.
Fig. 2 is a flow chart of a daily warning analysis based on existing data.
Fig. 3 is a flowchart of constructing a feature library in the bin map image similarity search.
FIG. 4 is a flow chart of feature library construction in the similar search of the defect map image
FIG. 5 is a flow chart of map types and similar groupings based on daily Ratio early warning refer.
Fig. 6 is a flowchart of numerical (Inline/WAT/WaitTime parameter) correlation analysis based on daily Ratio warning information.
Fig. 7 is a flowchart of non-numerical (Tool) correlation analysis based on the daily Ratio warning information.
Fig. 8 is a flowchart of non-numerical (Chamber) correlation analysis based on daily Ratio warning information.
Fig. 9 is a flowchart of non-numerical value (Dcoll) correlation analysis based on the daily Ratio warning information.
FIG. 10 is a flow chart for screening out the Bad/Good data in a fixed time based on the early warning Bin Map.
FIG. 11 is a flowchart of numerical (Inline/WAT/WaitTime parameter) correlation analysis based on similarly retrieved refer corresponding to bad/good cases.
FIG. 12 is a flow chart of a pre-warning fail bin analyzing its relation between Inline parameters and bin ratio from the Map dimension.
FIG. 13 is a flow chart of a pre-warning fail bin analyzing its relationship between WAT parameters and bin ratio from the Map dimension.
Fig. 14 is a flowchart of searching for an abnormal Wafer Bin Map (WBM) corresponding to the most similar top N based on the early-warned abnormal (die) Wafer, and performing similar search within a historical fixed time according to three dimensions of the same Wafer/the same product/cross-product.
Detailed Description
As mentioned in the background art, the existing yield rate early warning and diagnosis analysis methods need to be manually involved in calculation and analysis, and inevitably need a lot of time, and have low analysis accuracy.
According to the intelligent yield early warning and diagnosis analysis method in the semiconductor industry, data are automatically pulled through a computer, statistical analysis is carried out on the data, and the cause of the bad analysis is automatically diagnosed, so that the final early warning and analysis result is quickly obtained, and the whole process does not need manual intervention operation, so that the method has a high analysis result.
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments.
Example one
A yield pre-warning and diagnostic analysis device, referring to FIG. 1, comprises a yield statistics & management module 1, an alarm grouping module 2, an analysis module 3 and a result front-end display output module 4, wherein the yield statistics & management module 1 comprises a Daily Bin Ratio management and pre-warning module 11, a management and pre-warning Base Line configuration module 12 and a Daily yield statistics module 13, the alarm grouping module 2 comprises a Bin Ratio-based correlation alarm grouping module 21 and a Bin Map-based characteristic alarm grouping module 22, the analysis module 3 comprises a Wafer Bin Ratio and numerical/non-numerical parameter correlation analysis module 31, a Bin Map characteristic similarity grouping module 32, a Bin Map and Site Map characteristic matching module 33, a Bin Map and Defect matching analysis module 34 and a Wafer abnormal production process analysis module, the yield statistics & management module 1 is connected with the alarm grouping module 2 for data transmission, the alarm grouping module 21 based on the Bin Ratio correlation is connected with the alarm grouping module 22 based on the Bin Map characteristic and the correlation analysis module 31 of the Wafer Bin Ratio and the numerical/non-numerical parameters respectively for data transmission, the alarm grouping module 22 based on the Bin Map characteristic is connected with the Bin Map characteristic similarity grouping module 32, the Bin Map and Site Map characteristic matching module 33, the Bin Map and Defect Map matching analysis module 34 and the Wafer abnormal production process analysis module respectively for data transmission, and the analysis module 3 is connected with the result front-end display output module 4 for data transmission and display.
Example two
The invention discloses an intelligent yield early warning and diagnosis analysis method in the semiconductor industry, which comprises the following steps:
the yield statistics & management and control module 1 generates daily Ratio warning information. As shown in fig. 2, Wafer data of the current day, yield benchmark data of historical fixed time, and description (type: G/B/O/S) data of Die are acquired, the data are preprocessed, a returned material inspection (RMA)/qualification rate Statistics (SYL)/statistical classification monitoring System (SBL) is calculated according to corresponding rules, and Wafer exceeding the benchmark is marked and early warned. And if the same product has a plurality of grains, early warning is carried out, the Wafer data of the product corresponding to the same day is found, correlation analysis is carried out according to a certain rule, and if the product is correlated, the correlation is combined into one piece of early warning information. And finally summarizing the daily Ratio early warning information.
And constructing a feature library in the similarity search of the bin map image. As shown in FIG. 3, each wafer map is integrated with bin with spatial correlation as the input of the classifier, the classifier outputs the classification result and its feature of the bin group, and saves the bin map image information, which is used as the basic metadata for the similarity judgment of the subsequent images.
And constructing a feature library for similarity search of the defectmap image. As shown in fig. 4, a classifier is input to each defect map every day, the classifier outputs the classification result of the defect map and the characteristics thereof, and stores the defect map image information, which is used as the basic metadata for the similarity judgment of the subsequent images.
And based on the wafer of the daily Ratio early warning, dividing each early warning case into groups according to the map type and the similarity coefficient of each early warning case. See fig. 5, and take the mode type of wafer as its bin new type.
And (4) carrying out numerical value (Inline/WAT/WaitTime parameter) correlation analysis based on the daily Ratio early warning information. As shown in fig. 6, the latest N wafers of the corresponding product name/type/bin grouping are found, where N is selected according to the parameter type. And querying corresponding parameter type (Inline/WAT/WaitTime) data by using the string table, performing correlation analysis by using a Spireman correlation coefficient to obtain Top N of an analysis result, performing format standardization, and storing the Top N in a database so as to be checked at any time.
And carrying out non-numerical value (Tool) correlation analysis based on the daily Ratio early warning information. As in FIG. 7, bin ratios within step are grouped according to the Tool parameter. A k-w test was performed for each group of bin ratio lists within each step and the P-value was calculated. Screening out step of Top N, calculating median and variance of bin ratio list in the screened step, descending order, screening out first Tool parameter corresponding to descending order of each step, namely Tool with worst bin ratio performance, carrying out format standardization, and storing into a database for viewing at any time.
Based on the daily Ratio warning information, non-numerical value (number) correlation analysis is performed. As in FIG. 8, the bin ratios within step are grouped by the number parameter. A k-w test was performed for each group of bin ratio lists within each step and the P-value was calculated. Screening steps of Top N, calculating median and variance of bin ratio list in the screened steps, descending the step, screening the first chamber parameter of descending order corresponding to each step, namely the chamber with the worst bin ratio, carrying out format standardization, and storing the chamber parameters into a database for viewing at any time.
Based on the daily Ratio warning information case, non-numerical value (Dcoll) correlation analysis is performed. As shown in fig. 9, a Tool device list corresponding to each case is obtained, a corresponding Dcoll table is searched according to the Tool list, the Dcoll tables are grouped according to the Dcoll table, and sub-analyses belonging to the same device type (with consistent Dcoll table names) in different cases are grouped into one group. Acquiring corresponding Dcol list data, tracking wafer data in a certain time of history, performing Pearson correlation calculation according to specific groups, reserving Top N parameters for Dcol of each Tool in each case, performing format standardization, and storing the parameters in a database so as to be checked at any time.
And screening the Bad/Good data within the fixed time of the early warning Bin Map in the Wafer Bin Map (WBM) analysis. As shown in fig. 10, based on the previous Wafer Bin Map (WBM) classification data and the abnormal Wafer Bin Map (WBM) classification data in the historical fixed time, the similarity between the early-warned Wafer and the early-warned Wafer is retrieved, and the Bad/Good data in the fixed time based on the Bin Map is obtained.
And (4) carrying out numerical value (Inline/WAT/WaitTime parameter) correlation analysis based on the similarly retrieved wafer corresponding to the case of the bad/good. As shown in fig. 11, the latest N wafers of the corresponding product name/type/bin grouping are found, where N is selected according to the parameter type. And querying corresponding parameter type (Inline/WAT/WaitTime) data by using the string table, performing correlation calculation on the bin Ratio and the parameter data by using a k-w algorithm to obtain Top N of an analysis result, performing format standardization, and storing the Top N into a database so as to be checked at any time.
And carrying out non-numerical value (Tool) correlation analysis based on the similarly retrieved wafers corresponding to the bad/good non-cross-product cases. Here, the bag lot number and good lot number of the corresponding tool of each case about the wafer list are respectively counted. And selecting the tool with the largest bad count under the step according to the statistic value of bad good corresponding to each tool under each step according to the lot, namely positioning the tool to the step. And sequencing according to the descending order of the bad lot quantity and the ascending order of the good lot quantity, acquiring the tool parameter of the Top N, standardizing the format, and storing the tool parameter into a database so as to be convenient to view at any time.
And performing non-numerical value (Chamber) correlation analysis based on similarly retrieved wafers corresponding to the cases of the bad/good non-cross-product. Here, the number of bad lots and good lots of the queue list corresponding to each case are counted respectively. And selecting the tool with the largest bad count under the step according to the statistical value of bad/good according to the lot corresponding to each chamber under each step, namely positioning to the chamber of the step. And sorting according to the descending order of the bad lot number and the ascending order of the good lot number, acquiring the chamber parameter of Top N, standardizing the format, and storing the standardized chamber parameter into a database so as to be checked at any time.
And carrying out non-numerical value (Dcol) correlation analysis based on the similarly retrieved wafers corresponding to the cases of the bad/good non-cross-product. As shown in fig. 9, a Tool device list corresponding to each case is obtained, a corresponding Dcoll table is searched according to the Tool list, the Dcoll tables are grouped according to the Dcoll table, and sub-analyses belonging to the same device type (with consistent Dcoll table names) in different cases are grouped into one group. Acquiring corresponding Dcol table data, tracking wafer data in a certain historical time, carrying out Pearson correlation calculation on a bin ratio value and parameter data according to specific groups, reserving Top N parameters for Dcol of each Tool under each case, carrying out format standardization, and storing the parameters into a database so as to be checked at any time.
The Inline site Map analyzes the relationship between Inline parameters and bin ratio from the Map dimension for each day's early-warning fail bins. As shown in fig. 12, according to the bin map early-warned every day, the inline parameter closest to the centroid of the bin map is found out, the failure rate of the bin historical time period and the nearest inline parameter are subjected to correlation analysis, the stronger correlation inline parameter of Top N is selected, and a scatter diagram and a biaxial trend diagram of the inline/bin ratio are drawn.
The WAT site Map analyzes the relationship between the WAT parameters and the bin ratio of the daily early-warning fail bin from the Map dimension. As shown in fig. 13, the method of combining numerical analysis of the fail bins that are primarily early-warned of the checkpoint to the bin map level (different from the above-mentioned pure numerical analysis) finds the WAT parameter that is closest to the bin map centroid and causes the corresponding fail bin, selects the stronger correlation inline parameter of Top N, and plots a scatter plot and a biaxial trend plot of inline/bin ratio. Thereby laying a foundation for finding out Tool/Chamber influencing corresponding bin for subsequent Module tube shooting (FDC/ESPC/Dcol/offline/Inline Defect).
Based on abnormal (die) wafers early warned every day, searching abnormal Wafer Bin Map (WBM) corresponding to the top N most similar to the top N, and performing similar search in historical fixed time according to three dimensions of the same Wafer, the same product and cross-product. For similar search to wafer, Pearson correlation coefficient is used to calculate the correlation coefficient between bin map and defect map based on feature, as shown in FIG. 14. For similar search of the same product/cross-product, minHashlSH is adopted to calculate the similarity of the bin map and the defect map, and product _ name is used to screen out similar search top10 data of the same product and the cross-product.
The invention provides early warning of abnormal production and helps to diagnose the abnormality on the basis of the manufacturing and process data collected in the wafer manufacturing process, thereby improving the yield. According to the semiconductor wafer manufacturing yield test data, a yield abnormity early warning and abnormal factor diagnosis analysis method is provided. The method can find out the type and yield change of the abnormal phenomenon as soon as possible, and then diagnose and analyze the abnormal yield factors to find out finally caused suspicious factors or problems. The contribution of the invention lies in developing an intelligent yield early warning and diagnosis analysis method in the semiconductor industry. The method can shorten the analysis time for searching the defect reasons, help engineers narrow the range of suspicious factors and improve the decision quality.
The above description is only for the preferred embodiment of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art should be able to cover the technical scope of the present invention and the equivalent alternatives or modifications according to the technical solution and the inventive concept of the present invention within the technical scope of the present invention.

Claims (10)

1. An intelligent yield early warning and diagnosis analysis device in the semiconductor industry comprises a yield statistics & management module (1), an alarm grouping module (2), an analysis module (3) and a result front end display output module (4), and is characterized in that the yield statistics & management module (1) comprises a Daily Bin Ratio management and control early warning module (11), a management and control early warning Base Line configuration module (12) and a Daily yield statistics module (13), the alarm grouping module (2) comprises a Bin Ratio-based correlation alarm grouping module (21) and a Bin Map-based characteristic alarm grouping module (22), the analysis module (3) comprises a Wafer Bin Ratio and numerical/non-numerical parameter correlation analysis module (31), a Bin Map characteristic similarity grouping module (32), a Bin Map and Site Map characteristic matching module (33) and a Bin Map and Defect Map matching analysis module (34), the yield statistics and management control module (1) is connected with the alarm grouping module (2), the alarm grouping module (21) based on Bin Ratio correlation is respectively connected with the alarm grouping module (22) based on Bin Map characteristics and the Wafer Bin Ratio and numerical/non-numerical parameter correlation analysis module (31), the alarm grouping module (22) based on Bin Map characteristics is respectively connected with the Bin Map characteristic similarity grouping module (32), the Bin Map and Site Map characteristic matching module (33) and the Bin Map and Defect Map matching analysis module (34), and the analysis module (3) is connected with the result front-end display output module (4).
2. The method as claimed in claim 1, wherein the method for performing semiconductor industry intelligent yield pre-warning and diagnostic analysis by using the semiconductor industry intelligent yield pre-warning and diagnostic analysis device is used for analyzing data in a database, counting the wafers with bad analysis, performing pre-warning notification on abnormal wafers, and automatically analyzing the abnormal wafers to indicate main causes of Wafer bad analysis, and comprises the following steps:
data statistics is carried out every day, early warning summary is carried out by combining control BaseLine configuration information, and Ratio early warning information is obtained.
And secondly, integrating bins with spatial correlation into each wafer map every day as the input of a classifier, outputting the classification result and the characteristics of the bin group by the classifier, and storing the bin map image information.
Inputting each defect map into a classifier every day, outputting the classification result and the characteristics of the defect map by the classifier, and storing the image information of the defect map.
And fourthly, analyzing the data according to two types based on the daily Ratio early warning information: the Ratio correlation analysis based on Wafer is based on Wafer Bin Map (WBM) analysis.
Fifthly, based on the wafer of the daily Ratio early warning, each early warning case is divided into groups according to the map type and the similarity coefficient of the case. And takes the mode type of the wafer as its bin new type.
Sixthly, performing numerical (Inline/WAT/WaitTime parameter) or non-numerical (Tool/number/Dcool) correlation analysis based on the Ratio correlation analysis of the Wafer.
And seventhly, in the Wafer Bin Map (WBM) analysis, based on the previous Wafer Bin Map (WBM) classification data and the abnormal Wafer Bin Map (WBM) classification data in the historical fixed time, carrying out similarity retrieval on the early-warned Wafer and the early-warned Wafer to obtain Bad/Good data in the fixed time based on the Bin Map.
Based on Bad/Good data in Bin Map fixed time, carry out correlation analysis of numerical value (Inline/WAT/WaitTime parameter) or non-numerical value (Tool/Chamber/Dcol).
Ninthly, analyzing the first N Inline parameters and the WAT parameters of the nearest neighbor of the centroid of the Wafer Bin Map (WBM) based on the Wafer Bin Map (WBM) abnormity (Die) early-warned by the daily Ratio.
And (3) searching abnormal Wafer Bin Map (WBM) corresponding to the most similar top N based on abnormal (die) wafers early warned every day, and performing similar search in a historical fixed time according to three dimensions of the same Wafer/the same product/cross-product.
3. The method of claim 2, wherein the semiconductor industry intelligent yield early warning and diagnostic analysis comprises: and counting according to daily data, and performing early warning summary by combining the managed and controlled BaseLine configuration information.
4. The method of claim 2, wherein the semiconductor industry intelligent yield early warning and diagnostic analysis comprises: and (4) integrating bins with spatial correlation into each wafer map every day as the input of a classifier, and outputting the classification result of the bin group and the characteristics of the bin group by the classifier.
5. The method of claim 2, wherein the semiconductor industry intelligent yield early warning and diagnostic analysis comprises: inputting each defect map into a classifier every day, and outputting the classification result and the characteristics of the defect map by the classifier.
6. The method of claim 2, wherein the semiconductor industry intelligent yield early warning and diagnostic analysis comprises: and based on the wafer of the daily Ratio early warning, dividing each early warning case into groups according to the map type and the similarity coefficient of each early warning case.
7. The method of claim 2, wherein the semiconductor industry intelligent yield early warning and diagnostic analysis comprises: based on the Ratio correlation analysis of Wafer, numerical (Inline/WAT/WaitTime parameter) or non-numerical (Tool/Chamber/Dcool) correlation analysis is performed.
8. The method of claim 2, wherein the semiconductor industry intelligent yield early warning and diagnostic analysis comprises: and (4) carrying out similarity retrieval on the early-warned Wafer to obtain Bad/Good data in a fixed time based on the Bin Map.
9. The method of claim 2, wherein the semiconductor industry intelligent yield early warning and diagnostic analysis comprises: and analyzing the first N Inline parameters and WAT parameter analysis of the nearest centroid of the Wafer Bin Map (WBM) according to the Bin Map site information.
10. The method of claim 2, wherein the semiconductor industry intelligent yield early warning and diagnostic analysis comprises: and (3) performing similar search in the history fixed time according to three dimensions of the same Wafer, the same product and a cross-product on the early-warned abnormal (die) Wafer, and searching for the abnormal Wafer Bin Map (WBM) corresponding to the most similar top N.
CN202210594477.1A 2022-05-27 2022-05-27 Yield early warning and diagnostic analysis method and device Pending CN114860547A (en)

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