CN114840359A - Failure protection system and method for handshake signals of car gauge chip - Google Patents

Failure protection system and method for handshake signals of car gauge chip Download PDF

Info

Publication number
CN114840359A
CN114840359A CN202210522775.XA CN202210522775A CN114840359A CN 114840359 A CN114840359 A CN 114840359A CN 202210522775 A CN202210522775 A CN 202210522775A CN 114840359 A CN114840359 A CN 114840359A
Authority
CN
China
Prior art keywords
signal
request
module
handshake
slave
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202210522775.XA
Other languages
Chinese (zh)
Inventor
王振
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nanjing Semidrive Technology Co Ltd
Original Assignee
Nanjing Semidrive Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nanjing Semidrive Technology Co Ltd filed Critical Nanjing Semidrive Technology Co Ltd
Priority to CN202210522775.XA priority Critical patent/CN114840359A/en
Publication of CN114840359A publication Critical patent/CN114840359A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0751Error or fault detection not based on redundancy
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/079Root cause analysis, i.e. error or fault diagnosis

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Health & Medical Sciences (AREA)
  • Biomedical Technology (AREA)
  • Debugging And Monitoring (AREA)

Abstract

A master computer sends a request signal to a slave computer, and if a response signal of the slave computer is not received within an overtime threshold value, an overtime interrupt signal is output; a slave, comprising: the request holding module with the enabling control receives and detects the request signal sent by the host, generates a request holding signal and sends the request holding signal to the slave handshake module; the slave handshake module is used for receiving the request holding signal and sending a response signal to the master; the request hold module with enable control includes: the synchronization module receives and detects the request signal and sends the generated synchronization request rising edge signal or synchronization request falling edge signal to the latch; and the latch generates the request holding signal according to the synchronous request rising edge signal or the synchronous request falling edge signal. The application also provides a failure protection method for the handshake signals of the gauge chip, which can find the abnormity of the handshake signals in time and prompt.

Description

Failure protection system and method for handshake signals of car gauge chip
Technical Field
The invention relates to the technical field of vehicle gauge chips, in particular to a system and a method for protecting handshake signals of the vehicle gauge chips from failure.
Background
The automobile gauge chip provides a higher-performance and safer hardware base and high performance for future intelligent automobiles and automatic driving, is embodied in more modules which can be integrated in the traditional automobile gauge chip, and can catch up with a consumer processor on the processing capacity of image and audio; the high reliability is embodied in that compared with the consumer electronics, the system can work in a wider high and low temperature range and a stricter functional safety design authentication process, and the service life of the system needs longer time than that of the consumer electronics.
In the prior art, a protection mode for handshake connection abnormality between modules of a car-code chip generally adopts timeout (timeout) protection of a watchdog Timer (Watch Dog Timer, wdt), and on one hand, the protection mode consumes more resources and has longer waiting time, and on the other hand, a request signal is lost due to abnormality of a request signal sender and is not easy to be found.
Disclosure of Invention
In order to solve the defects in the prior art, the purpose of the application is to provide a system and a method for protecting the failure of the handshake signals of the gauge chip, which can timely and effectively find the problem of the loss of the handshake signals possibly existing at the two ends of the connection and reduce the unnecessary resource consumption of the system caused by the handshake failure.
In order to achieve the purpose, the vehicle gauge chip handshake signal failure protection system provided by the application comprises,
the host machine sends a request signal to the slave machine, and if the response signal of the slave machine is not received within a timeout threshold value, an timeout interrupt signal is output;
a slave, comprising: the request holding module with the enabling control receives and detects the request signal sent by the host, generates a request holding signal and sends the request holding signal to the slave handshake module; the slave handshake module is used for receiving the request holding signal and sending a response signal to the host;
the request hold module with enable control includes:
the synchronization module receives and detects the request signal and sends the generated synchronization request rising edge signal or synchronization request falling edge signal to the latch;
and the latch generates the request holding signal according to the synchronous request rising edge signal or the synchronous request falling edge signal.
Further, the host comprises a host handshake module and an answer monitoring module with an enable control, wherein,
the response monitoring module with the enabling control starts enabling to carry out response monitoring and sets an overtime threshold value of response; if the response signal of the slave is not received within the overtime threshold value, outputting an overtime interrupt signal;
and the master handshake module is used for sending a request signal to the slave.
Further, the response monitoring module with the enable control starts timing after the enable is started, and calculates a timing duration, where the timing duration is a duration from the time when the host handshake module sends the request signal to the time when the response monitoring module receives the response signal sent by the slave handshake module; and when the timing duration is greater than or equal to the overtime threshold, sending an overtime interrupt signal.
Further, the response monitoring module with the enabling control does not send out an overtime interrupt signal when the timing duration is smaller than the overtime threshold, and meanwhile, the timing is cleared.
Still further, the request hold module with enable control further includes:
the exclusive-or gate circuit is used for respectively receiving the synchronous shielding signal sent by the synchronous module and the request holding signal sent by the latch and sending the generated setting signal to the interrupt generation module;
and the interrupt generating module receives the setting signal from the exclusive-OR gate circuit, generates and maintains an interrupt signal and outputs the interrupt signal.
In order to achieve the above object, the present application further provides a failure protection method for a handshake signal of a vehicle gauge chip, including:
the host starts enabling to carry out response monitoring and sets a response overtime threshold value, and sends a request signal to the slave;
the slave computer starts the enabling to carry out request holding, and receives and detects a request signal sent by the host computer;
the slave machine detects the abnormality of the request signal, returns a response signal to the host machine and outputs a holding interrupt signal;
and if the host does not receive the response signal of the slave within the timeout threshold, outputting a timeout interrupt signal.
Further, the step of receiving and detecting the request signal sent by the host further comprises,
the synchronization module of the slave machine receives and detects the request signal and generates a synchronization request rising edge signal or a synchronization request falling edge signal;
the latch generates the request holding signal according to the synchronous request rising edge signal or the synchronous request falling edge signal;
and the slave handshake module receives the request holding signal and outputs a response signal.
In order to achieve the above object, the present application further provides a car gauge chip, including the above-mentioned car gauge chip handshake signal failure protection system.
In order to achieve the above object, the present application provides an electronic device including the turning gauge chip as described above.
To achieve the above objects, the present application provides a computer readable storage medium having stored thereon computer instructions which, when executed, perform the steps of the gauge chip handshake signal failure protection method as described above.
According to the system and the method for protecting the handshake signals of the gauge chip, the slave computer can detect request abnormity of the host computer, report the request loss interruption, and the host computer can detect response abnormity of the slave computer; handshake failure protection is realized in the chip by consuming less resources, and the safety logic switch is controllable, so that the safety and the timeliness are ensured
Additional features and advantages of the application will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by the practice of the application.
Drawings
The accompanying drawings are included to provide a further understanding of the application and are incorporated in and constitute a part of this specification, illustrate embodiments of the application and together with the description serve to explain the principles of the application and not limit the application. In the drawings:
FIG. 1 is a schematic structural diagram of a vehicle gauge chip handshake signal failure protection system according to the present application;
FIG. 2 is a timing diagram illustrating a normal handshake of the vehicle gauge chip handshake signal failure protection system according to the subject application;
FIG. 3 is a timing diagram of the slave abnormality of the vehicle gauge chip handshake signal failure protection system according to the present application;
FIG. 4 is a timing diagram illustrating an exception occurring in the host of the vehicle gauge chip handshake signal fail safe system according to the present application;
FIG. 5 is a schematic structural diagram of an embodiment of a vehicle gauge chip handshake signal failure protection system according to the present application;
FIG. 6 is a timing diagram illustrating a normal handshake of an embodiment of a vehicle gauge chip handshake signal failure protection system according to the present application;
FIG. 7 is a timing diagram illustrating the occurrence of an anomaly in a slave according to an embodiment of the vehicle gauge chip handshake signal failure protection system of the present application;
FIG. 8 is a schematic structural diagram of a second embodiment of a vehicle gauge chip handshake signal failure protection system according to the present application;
FIG. 9 is a timing diagram of a normal handshake of an embodiment of a vehicle gauge chip handshake signal failure protection system according to the present application;
FIG. 10 is a timing diagram illustrating an exception occurring in the secondary host according to an embodiment of the vehicle gauge chip handshake signal failure protection system of the present application;
FIG. 11 is a schematic structural diagram of a third embodiment of a vehicle gauge chip handshake signal failure protection system according to the present application;
FIG. 12 is a schematic diagram of a request hold module with enable control according to the present application;
FIG. 13 is a normal timing diagram of the input request signals of the request hold module with enable control according to the present application;
FIG. 14 is a timing diagram illustrating an exception to the request hold module input request signal with enable control according to the present application;
FIG. 15 is a slave operational flow diagram of a gauge chip handshake signal failure protection system according to the present application;
FIG. 16 is a flow chart of the operation of the vehicle gauge chip handshake signal fail safe system host according to the present application.
Detailed Description
To make the objects, technical solutions and advantages of the present application more apparent, embodiments of the present application will be described in detail below with reference to the accompanying drawings. It should be noted that the embodiments and features of the embodiments in the present application may be arbitrarily combined with each other without conflict.
The steps shown in the flow chart of the figure may be performed in a terminal device such as a set of computer executable instructions. Also, while a logical order is shown in the flow diagrams, in some cases, the steps shown or described may be performed in an order different than here.
Fig. 1 is a schematic structural diagram of a vehicle-standard chip handshake signal failure protection system according to the present application, and as shown in fig. 1, the vehicle-standard chip handshake signal failure protection system 1 ' of the present application includes a master 10 ' and a slave 20 '. The master 10 'includes a master handshake module 11', and the slave 20 'includes a slave handshake module 21'. The handshake connection signal between the master handshake module 11 'and the slave handshake module 21' is formed by a set of request signal (req) and acknowledge signal (ack). First, the master handshake module 11 'of the master 10' transmits req to the slave 20 ', then the slave handshake module 21' of the slave 20 'receives the req and transmits ack to the master 10' based on its function logic, then the master handshake module 11 'of the master 10' receives the ack withdrawal pin and its corresponding req, and finally the slave handshake module 21 'of the slave 20' withdraws ack corresponding to the req, thereby completing one handshake. The normal handshake supports asynchronous processing of the master 10 'and the slave 20'.
Fig. 2 is a timing chart showing a normal handshake of the vehicle chip handshake signal fail-safe system according to the present application, where clk _ m denotes a clock pulse of the master 10 ', clk _ s denotes a clock pulse of the slave 20', and Bn denotes an nth pulse (i.e., a Bn time). For example, in a normal handshake situation, the master handshake module 11 ' of the master 10 ' sends req to the slave 20 ' at the start of the 3 rd pulse of clk _ m, then the slave handshake module 21 ' of the slave 20 ' sends ack to the master at the start of the 6 th pulse of clk _ s, then the master handshake module 11 ' cancels req at the start of the Bn th pulse of clk _ m, and finally the slave handshake module 21 ' cancels ack at the start of the Bn th pulse of clk _ s.
Fig. 3 is a timing diagram of a slave abnormality of the vehicle gauge chip handshake signal failure protection system according to the present application, and as shown in fig. 3, an ack that should be sent by the slave handshake module 21 'due to an abnormality of the slave 20' cannot be generated in time or even cannot be generated, and at this time, the handshake fails, and the system needs to report the abnormality.
Fig. 4 is a timing chart of the master of the vehicle specification chip handshake signal failure protection system according to the present application, and as shown in fig. 4, when an abnormality occurs in the master 10 ', a req message sent by the master handshake module 21 ' is temporarily set to one, and an ack sent by the slave handshake module 21 ' is not received and set to zero, and at this time, the handshake fails, and the system also needs to report the abnormality.
The current protection method for the abnormality of the slave 20' is timeout (timeout) protection of a watchdog Timer (Watch Dog Timer, wdt), and after a failure occurs, a system reset of wdt is waited. The protection mode consumes more resources and has longer waiting time. On the other hand, loss of req due to an abnormality of the host 10' is not easily found in the conventional design.
Example 1
Fig. 5 is a schematic structural diagram of an embodiment of a vehicle gauge chip handshake signal failure protection system according to the present application, and as shown in fig. 5, in this embodiment, a vehicle gauge chip handshake signal failure protection system 1A includes a master 10 and a slave 20. The master 10 comprises a master handshake module 11 and a response monitoring module 12 with an enabling control, and the slave 20 comprises a slave handshake module 21. The master handshake module 11 of the master 10 transmits req to the slave 20, and simultaneously transmits an on signal (default on) to the reply monitoring module 12 with enable control to notify the reply monitoring module 12 with enable control that req has been transmitted to the slave 20. The response monitoring module 12 with enable control starts timing after receiving the on signal, and calculates a timing length (i.e., a length from when the master handshake module 11 of the master 10 transmits req to the slave 20 to when ack transmitted from the slave 20 is received) and calculates the timing length. A timeout threshold Tth is preset in the response monitoring module 12 with enable control, and is used for comparing with the timing duration to determine whether timeout occurs. When the timed duration is less than the timeout threshold Tth, the response monitoring module 12 with enable control does not send out a timeout interrupt signal (timeout _ irq), and meanwhile, the timing is cleared, and a cancel signal is sent to the host handshake module 11. When the host handshake module 11 receives the retraction signal sent by the reply monitoring module 12 with enabled control, req is retracted. When the timing duration is greater than or equal to the timeout threshold Tth, the response monitoring module 12 with enable control sends out a timeout interrupt signal.
Fig. 6 is a timing diagram of a normal handshake according to an embodiment of the vehicle gauge chip handshake signal fail protection system of the present application, and as shown in fig. 6, the master handshake module 11 of the master 10 sends req to the slave 20 at the beginning of the 3 rd pulse of clk _ m, and simultaneously sends an on signal to the reply monitoring module 12 with enable control, so that the reply monitoring module 12 with enable control performs timing. When the counted time length is less than the timeout threshold Tth, if the master 10 receives ack (for example, the timeout threshold Tth is set to 6 pulse cycles, ack is sent from the slave handshake module 21 of the slave 20 to the master at the end of the 6 th pulse of clk _ m, and the confirmation synchronization signal (ack _ sync) is received by the master 10 at the start of the 8 th pulse of clk _ m), the response monitoring module 12 with enable control does not send out the timeout interrupt signal (timeout _ irq), and the counting is cleared. Then the master handshake module 11 cancels req at the beginning of the Bn-th pulse of clk _ m, and finally cancels ack from the slave handshake module 21 at the end of the Bn-th pulse of clk _ m. In the present embodiment, the timeout threshold Tth may be set to be greater than 6 pulse periods, for example, 10 pulse periods.
Fig. 7 is a timing diagram illustrating an abnormality of a slave according to an embodiment of the system for protecting a handshake signal of a vehicle gauge chip of the present application, and as shown in fig. 7, a master handshake module 11 of a master 10 sends req to the slave 20 at the beginning of the 3 rd pulse of clk _ m, and simultaneously sends a start signal to a response monitor module 12 with enable control, so that the response monitor module 12 with enable control performs timing. When the counted time length is equal to or greater than the timeout threshold Tth in the case where the host 10 has not received ack (that is, the slave 20 has not sent ack, and ack _ sync is always 0), the response monitoring module 12 having the enable control sends a timeout interrupt signal (timeout _ irq) for the user to know in time that the slave 20 is abnormal and to handle in time.
In the present embodiment, the example of the time counting by the response monitoring module 12 having the enable control is described, but the time counting by the timer may be separately provided to the host computer 10.
In this embodiment, the host 10 of the vehicle gauge chip handshake signal failure protection system 1A includes a host handshake module 11 and an enable-controlled response monitoring module 12; the response monitoring module 12 with the enabling control starts timing after receiving the starting signal, and calculates the timing duration; a timeout threshold value Tth is preset in the response monitoring module 12 with the enable control; when the timing duration is greater than or equal to the timeout threshold Tth, the response monitoring module 12 with enable control sends out a timeout interrupt signal, so that the master computer 10 can detect that the slave computer 20 is abnormal in holding, the slave computer 20 is short in abnormal detection time, and the duration can be matched. In addition, in the embodiment, the design is simple, the support protection logic switch is controllable, the consumed resources are less, and the safety and the timeliness are further ensured.
Example 2
Fig. 8 is a schematic structural diagram of a second embodiment of a vehicle gauge chip handshake signal failure protection system according to the present application, and as shown in fig. 8, in this embodiment, a vehicle gauge chip handshake signal failure protection system 1B includes a master 10 and a slave 20. A host 10 including a host handshake module 11; the slave 20 includes a slave handshake module 21 and a request hold module 22 with enable control. The master handshake module 11 of the master 10 transmits req to the slave 20, and at the same time transmits an on signal (default on) to the request holding module 22 with enable control to notify the request holding module 22 with enable control that req has been transmitted to the slave 20. When the request holding module 22 with enable control of the slave 20 detects a req (that is, req is 1) transmitted from the master 10, the request holding module 22 with enable control makes the received req one, and only after the slave handshake module 21 of the slave 20 transmits an ack, the request holding module 22 with enable control makes the req zero. The request hold module 22 with enable control issues a request hold interrupt (kp _ irq) signal when it detects that the host 10 has revoked a req.
FIG. 9 is a timing diagram illustrating a normal handshake of an embodiment of a vehicle gauge chip handshake signal fail protection system according to the present application, in which, as shown in FIG. 9, the master handshake module 11 of the master 10 sends req to the slave 20 at the end of the 2 nd pulse of clk _ s, and simultaneously sends a turn-on signal to the request hold module 22 with enable control. At the beginning of the 4 th pulse of clk _ s, the request hold module 22 sets req until the end of the Bn th pulse of clk _ s. Slave handshake module 21 of slave 20 sends an ack at the beginning of the 8 th pulse of clk _ s until slave handshake module 21 of slave 20 cancels the ack at the end of the Bn th pulse of clk _ s. At this time, the request hold module 22 with enable control does not issue a request hold interrupt (kp _ irq) signal.
Fig. 10 is a timing diagram illustrating an abnormality of the master according to the embodiment of the vehicle chip handshake signal fail protection system of the present application, and as shown in fig. 10, the master handshake module 11 of the master 10 sends req to the slave 20 at the end of the 2 nd pulse of clk _ s, and simultaneously sends a turn-on signal to the request hold module 22 with enable control. At the beginning of the 4 th pulse of clk _ s, the request hold module with enable control 22 sets req until the end of the Bn th pulse of clk _ s. The host handshake module 11 of the host 10 cancels req at the beginning of the 5 th pulse of clk _ s (i.e., req is lost due to an exception by the host 10). At this time, since the host handshake module 11 of the host 10 has deactivated req, the request hold module 22 with enable control issues a request hold interrupt (kp _ irq) signal at the start of the 6 th pulse of clk _ s. Slave handshake module 21 of slave 20 sends an ack at the beginning of the 8 th pulse of clk _ s until slave handshake module 21 of slave 20 cancels the ack at the end of the Bn th pulse of clk _ s.
The slave 20 of the gauge chip 1B according to the present embodiment includes a slave handshake module 21 and a request hold module with enable control 22 with enable control; after the request holding module 22 with enable control of the slave 20 detects the req sent by the master 10, the request holding module 22 with enable control makes the req one, and when the master 10 cancels the req, the request holding module 22 with enable control sends a request holding interrupt signal, thereby detecting the master 10 handshake abnormality by the slave 20, and effectively detecting the master 10 abnormality. In addition, in the embodiment, the design is simple, the support protection logic switch is controllable, the consumed resources are less, and the safety and the timeliness are further ensured.
Example 3
In the above-described embodiment, the case where the master includes the response monitor module 12 with the enable control alone, and the slave 20 includes the request holding module 22 with the enable control alone is explained. Fig. 11 is a schematic structural diagram of a third embodiment of a vehicle-standard chip handshake signal failure protection system according to the present application, and as shown in fig. 11, the vehicle-standard chip handshake signal failure protection system in the present embodiment may be composed of a master 10 including an answer monitoring module 12 with enable control and a slave 20 including a request holding module 22 with enable control.
Fig. 12 is a schematic structural diagram of a request holding module with enable control according to the present application, as shown in fig. 12, the request holding module with enable control 22 of the present application, including,
a synchronization module 220 for receiving the req signal from the host 10, transmitting the generated sync request rising edge signal (sync _ req pos) or sync request falling edge signal (sync _ req neg) to the latch 221, and transmitting the sync mask signal (req _ req neg) sync _ mask) to xor gate 222.
The latch 221 receives the synchronization request rising edge signal (sync _ req pos) or the synchronization request falling edge signal (sync _ req neg) from the synchronization block 220, and the ack signal, and transmits the request hold signal (req _ kp) to the exclusive-or gate 222 and the slave handshake block 21, respectively.
The exclusive-or gate 222 receives the synchronization mask signal of the synchronization block 220 and the request hold signal of the latch 221, and transmits the generated set signal (set) to the interrupt generation block 223.
The interrupt generation block 223 generates a hold interrupt signal output based on the set signal from the exclusive or gate circuit 222.
Fig. 13 is a normal timing diagram of an input request signal of a request hold module with enable control according to the present application, and fig. 14 is an abnormal timing diagram of an input request signal of a request hold module with enable control according to the present application, as shown in fig. 13 and 14, when the input request signal is normal, the synchronization module 220 generates a synchronization request rising edge signal to the latch 221 after receiving the request signal and sends the request signal to the xor gate circuit 222; latch 221 sends the request hold signal to exclusive-or gate 222 and slave handshake module 21, respectively, while interrupt generation module 223 does not generate a hold interrupt signal output. When the input request signal is abnormal, the synchronization module 220 outputs a synchronization mask signal to the exclusive-or gate 222, and simultaneously outputs a synchronization request falling edge signal to the latch 221; after receiving the output synchronization request falling edge signal, the latch 221 still sends the request holding signal to the xor gate 222 and the slave handshake module 21, respectively; the exclusive-or gate 222, upon receiving the synchronous mask signal, sends a set signal to the interrupt generation block 223, and causes the interrupt generation block 223 to generate and output a hold interrupt signal. In the embodiment of the present application, no matter whether the request signal detected by the synchronization module 220 is normal, the latch 221 generates a request holding signal to the slave handshake module 21, so that the slave handshake module 21 outputs an ack signal to the host; when the synchronization module 220 detects that the request signal is abnormal, a synchronization mask signal is output to the xor gate 222 to trigger the interrupt generation module 223 to generate and maintain the output of the interrupt signal, so that the user can timely know the req abnormality sent by the host and process the req abnormality.
In the embodiment of the present application, the xor gate circuit 222 is used to receive the synchronization masking signal output by the synchronization module 220 and the latch 221 outputs the request holding signal to trigger the interrupt generating module 223 to generate the holding interrupt signal, so that the circuit is simple and the size of the chip can be greatly reduced.
Example 4
Fig. 13 is a flow chart of a slave operation of the lathe gauge chip handshake signal failure protection system according to the present application, and the following describes in detail the flow chart of the slave operation of the lathe gauge chip handshake signal failure protection system according to the present application with reference to fig. 13.
In step 101, the master handshake module 11 of the master 10 transmits req to the slave 20, and simultaneously transmits an on signal (default on) to the reply monitoring module 12 with enable control of the master 10 to notify that the reply monitoring module 12 with enable control has transmitted req to the slave 20.
In step 102, the response monitor module 12 with enable control starts timing after receiving the on signal (i.e., starts timing when the master handshake module 11 of the master 10 transmits req time to the slave 20). The response monitoring module 12 with enable control is preset with a timeout threshold Tth, which is used for comparing with the timing duration to determine whether timeout occurs.
In step 103, after receiving req of master 10, slave handshake module 21 of slave 20 sends ack to response monitor module 12 with enable control of master 10.
At step 104, the reply monitoring module with enable control 12 calculates a timing length (i.e., a length from when the req is transmitted from the master handshake module 11 to when the ack transmitted from the slave 20 is received) from the timing of the received ack.
In step 105, the response monitoring module with enable control 12 determines whether the time duration is greater than or equal to the timeout threshold Tth. When the timing duration is greater than or equal to the timeout threshold Tth, executing step 105; when the counted time length is less than the time-out threshold value Tth, step 106 is executed.
At step 106, the reply monitoring module 12 with enabled control issues a timeout interrupt signal (timeout irq).
At step 107, the reply monitoring module 12 with enable control does not issue a timeout interrupt signal while the timer is cleared.
Example 5
Fig. 14 is a flowchart of a host work flow of the vehicle-specification chip handshake signal failure protection system according to the present application, and the following describes in detail the host work flow of the vehicle-specification chip handshake signal failure protection system according to the present application with reference to fig. 14.
In step 201, the master handshake module 11 of the master 10 transmits req to the slave 20, and at the same time transmits an on signal (default on) to the request holding module 22 with enable control to notify the request holding module 22 with enable control that req has been transmitted to the slave 20.
In step 202, after the request holding module 22 with enable control of the slave 20 detects the req transmitted by the master 10, the request holding module 22 with enable control is activated, and the request holding module 22 with enable control sets the received req to one.
At step 203, the request holding module with enable control 22 determines whether the req of the host 10 is revoked. When the request holding module 22 with the enable control determines that the req of the host 10 has been revoked, step 204 is executed; when the request holding module 22 with the enabled control determines that the req of the host computer 10 is not revoked, step 205 is performed.
At step 204, upon detecting that the req of the host 10 has been revoked, the request hold module with enable control 22 issues a request hold interrupt (kp _ irq) signal.
In step 205, the request holding module with enable control 22 zeroes req after the slave handshake module 21 of the slave 20 sends an ack.
Example 6
In this embodiment, a lathe gauge chip is further provided, including the lathe gauge chip handshake signal failure protection system of the above-mentioned embodiment.
Example 7
In this embodiment, an electronic device is further provided, which includes the car gauge chip in the above embodiment.
Example 8
In this embodiment, a computer readable storage medium is further provided, where computer instructions are stored, and when the computer instructions are executed, the steps of the rule chip handshake signal failure protection method of the foregoing embodiment are executed.
Those of ordinary skill in the art will understand that: although the present application has been described in detail with reference to the foregoing embodiments, it will be apparent to those skilled in the art that modifications may be made to the embodiments described in the foregoing embodiments, or equivalents may be substituted for elements thereof. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims (10)

1. A failure protection system for handshake signals of a gauge chip is characterized by comprising,
the host machine sends a request signal to the slave machine, and if the response signal of the slave machine is not received within a timeout threshold value, an timeout interrupt signal is output;
a slave, comprising: the request holding module with the enabling control receives and detects the request signal sent by the host, generates a request holding signal and sends the request holding signal to the slave handshake module; the slave handshake module is used for receiving the request holding signal and sending a response signal to the host;
the request hold module with enable control includes:
the synchronization module receives and detects the request signal and sends the generated synchronization request rising edge signal or synchronization request falling edge signal to the latch;
and the latch generates the request holding signal according to the synchronous request rising edge signal or the synchronous request falling edge signal.
2. The gauge chip handshake signal failure protection system of claim 1, wherein the host includes a host handshake module and an answer monitor module with enable control, wherein,
the response monitoring module with the enabling control starts enabling to carry out response monitoring and sets an overtime threshold value of response; if the response signal of the slave is not received within the overtime threshold value, outputting an overtime interrupt signal;
and the master handshake module is used for sending a request signal to the slave.
3. The gauge chip handshake signal failure protection system according to claim 2, wherein the answer monitoring module with enable control starts timing after enabling, and calculates a timing duration, the timing duration being a duration from the master handshake module sending a request signal to the answer monitoring module receiving the answer signal sent by the slave handshake module; and when the timing duration is greater than or equal to the overtime threshold, sending an overtime interrupt signal.
4. The vehicle gauge chip handshake signal failure protection system according to claim 2, wherein the answer monitoring module with enable control does not send out an timeout interrupt signal when the timing duration is less than the timeout threshold, and clears the timing.
5. The gauge chip handshake signal failure protection system of claim 1, wherein the request hold module with enable control further comprises:
the exclusive-or gate circuit is used for respectively receiving the synchronous shielding signal sent by the synchronous module and the request holding signal sent by the latch and sending the generated setting signal to the interrupt generation module;
and the interrupt generating module receives the setting signal from the exclusive-OR gate circuit, generates and maintains an interrupt signal and outputs the interrupt signal.
6. A failure protection method for handshake signals of a vehicle gauge chip comprises the following steps:
the host starts enabling to carry out response monitoring and sets a response overtime threshold value, and sends a request signal to the slave;
the slave computer starts the enabling to carry out request holding, and receives and detects a request signal sent by the host computer;
the slave machine detects the abnormality of the request signal, returns a response signal to the host machine and outputs a holding interrupt signal;
and if the host does not receive the response signal of the slave within the timeout threshold, outputting a timeout interrupt signal.
7. The gauge chip handshake signal failure protection method according to claim 6, wherein the step of receiving and detecting a request signal sent by the host further comprises,
the synchronization module of the slave machine receives and detects the request signal and generates a synchronization request rising edge signal or a synchronization request falling edge signal;
the latch generates the request holding signal according to the synchronous request rising edge signal or the synchronous request falling edge signal;
and the slave handshake module receives the request holding signal and outputs a response signal.
8. A gauge chip, characterized in that it comprises a gauge chip handshake signal failure protection system according to any one of claims 1 to 5.
9. An electronic device, characterized in that the electronic device comprises the vehicle gauge chip of claim 8.
10. A computer readable storage medium having stored thereon computer instructions which, when executed, perform the steps of the gauge chip handshake signal failure protection method of claim 6 or 7.
CN202210522775.XA 2022-05-13 2022-05-13 Failure protection system and method for handshake signals of car gauge chip Pending CN114840359A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202210522775.XA CN114840359A (en) 2022-05-13 2022-05-13 Failure protection system and method for handshake signals of car gauge chip

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202210522775.XA CN114840359A (en) 2022-05-13 2022-05-13 Failure protection system and method for handshake signals of car gauge chip

Publications (1)

Publication Number Publication Date
CN114840359A true CN114840359A (en) 2022-08-02

Family

ID=82569590

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202210522775.XA Pending CN114840359A (en) 2022-05-13 2022-05-13 Failure protection system and method for handshake signals of car gauge chip

Country Status (1)

Country Link
CN (1) CN114840359A (en)

Similar Documents

Publication Publication Date Title
US7714619B2 (en) High-frequency clock detection circuit
US8996927B2 (en) Electronic control device with watchdog timer and processing unit to diagnose malfunction of watchdog timer
US9645898B2 (en) Storage control device and control device for detecting abnormality of signal line
US9783138B2 (en) Vehicle control device
CN110690894A (en) Clock failure safety protection method and circuit
CN114817110B (en) Data transmission method and device
US8392643B2 (en) Data processing device, semiconductor integrated circuit device, and abnormality detection method
US7925913B1 (en) CDR control architecture for robust low-latency exit from the power-saving mode of an embedded CDR in a programmable integrated circuit device
CN107533533B (en) Communication between integrated circuits
US9432545B2 (en) Information processing apparatus, method of controlling the same, and storage medium for controlling transition to a sleep mode and setting of an interrupt setting in accordance with reception of data
WO2011106016A1 (en) Restoring stability to an unstable bus
CN114840359A (en) Failure protection system and method for handshake signals of car gauge chip
US11023023B2 (en) Start-and-stop detecting apparatus and method for I3C bus
JP2007526670A (en) Lossless transfer of events between clock domains
CN111522757A (en) I2C bus-based interrupt reading and clearing control method
EP3905047B1 (en) Semiconductor device and system using the same
US20210109887A1 (en) I3c pending read with retransmission
EP3321814A1 (en) Method and apparatus for handling outstanding interconnect transactions
JPH07288516A (en) Serial data transmission reception circuit
US20090265573A1 (en) Data transmission/reception circuit
TW201810059A (en) Host devices and methods for transmitting data
US11764771B2 (en) Event detection control device and method for circuit system controlled by pulse wave modulation signal
US20230222086A1 (en) I2c wakeup circuit, wakeup method and electronic device
CN112291128B (en) Bus-based communication system, system on chip and method therefor
JP3652910B2 (en) Device status monitoring method

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination