CN114836716A - No top electrode centre gripping HfO 2 Preparation method and application of base film material - Google Patents

No top electrode centre gripping HfO 2 Preparation method and application of base film material Download PDF

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CN114836716A
CN114836716A CN202210292866.9A CN202210292866A CN114836716A CN 114836716 A CN114836716 A CN 114836716A CN 202210292866 A CN202210292866 A CN 202210292866A CN 114836716 A CN114836716 A CN 114836716A
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hfo
base film
sputtering
top electrode
film material
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CN114836716B (en
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张斗
陈海燕
袁晰
罗行
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Central South University
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Abstract

The invention discloses a top electrode clamping-free HfO 2 The preparation method and the application of the base film material comprise the following steps: cleaning the surface of Si by adopting a standard RCA process by taking the Si as a substrate; sputtering a metal Ti layer on the Si substrate by a direct-current magnetron sputtering method; placing Ti/Si into an Atomic Layer Deposition (ALD) system for HfO 2 Depositing a base film; deposited HfO 2 Annealing the base film/Ti/Si; after the annealing is finished, HfO is added 2 Putting the base film/Ti/Si into magnetron sputtering, and carrying out top electrode sputtering by adopting a mask to obtain top electrode clamping-free HfO 2 A base film material. The method not only can weaken the decisive action of the top electrode on the ferroelectricity of the film, but also can ensure HfO 2 The base film material has strong ferroelectric property and stability, can avoid the etching process of a top electrode in the preparation process of the FeFET, ensures clean interface quality, and realizes the simplification and the low cost of the process.

Description

No top electrode centre gripping HfO 2 Preparation method and application of base film material
Technical Field
The invention relates to the technical field of ferroelectric films, in particular to a top-electrode-free clamping HfO 2 A preparation method and application of the base film material.
Background
With the iterative update of information technology and the rapid development of the internet of things, big data and the like, electronic components follow the development rule of moore's law and develop towards the direction of miniaturization, integration and high-speed performance. Ferroelectric field effect transistors (fefets) have the advantages of non-volatile storage, fast operation speed, and low power consumption, and are an important research direction in the field of new-generation information technology. The ferroelectric film is used as a core functional material, and the key to obtaining the high-performance FeFET is that the ferroelectric film has good ferroelectricity and interface quality.
Hafnium oxide (HfO) 2 ) As a novel ferroelectric thin film material, the material has the advantages of simple components, ultrathin thickness (10nm) and high polarization intensity (2P) r :30~60μC/cm 2 ) The FeFET has the advantages of compatibility with a CMOS process, excellent chemical stability and the like, is very suitable for the miniaturization and the integration preparation of the FeFET, and therefore has attracted extensive attention. HfO at normal temperature and pressure 2 The stable phase of the base film being a symmetrical monoclinic phase P2 1 C, does not have ferroelectricity; however, under certain conditions (e.g., surface energy and stress clamping), HfO 2 An asymmetric ferroelectric quadrature phase Pca2 is generated 1 And a larger ferroelectric polarization can be obtained. The orthorhombic phase is reported to consist of a high temperature tetragonal phase P4 2 The/nmc transformation is mainly caused by the clamping stress generated by the top electrode during the rapid annealing cooling process. During the fabrication of fefets, researchers often utilize top electrode clamping (i.e., first top electrode fabrication and then annealing) to obtain good ferroelectric HfO 2 The ferroelectric film is removed by physical/chemical etching and then is subsequently processed, thereby ensuring HfO 2 The ferroelectric properties of the base film, but this approach severely affects the ferroelectric/semiconductor interface quality and the stability of device performance in fefets. Thus, top electrode-less clamping of HfO is achieved 2 The strong ferroelectric property of the base film ensures HfO 2 The interface quality of the base film becomes an important problem to be solved at present.
Disclosure of Invention
In order to solve the problems in the prior art, the invention provides a simple HfO clamping device capable of realizing top electrode-free clamping 2 The preparation method and the application of the strong ferroelectric property of the base film can weaken the decisive action of the top electrode on the ferroelectric property of the film and ensure HfO 2 The base film material has strong ferroelectric property and stability, can avoid the etching process of a top electrode in the preparation process of the FeFET, ensures clean interface quality, realizes the simplification and the low cost of the process, and solves the problems mentioned in the background technology.
In order to achieve the purpose, the invention provides the following technical scheme: no top electrode centre gripping HfO 2 The preparation method of the base film material comprises the following steps:
s1, taking Si as a substrate, and cleaning the surface of the substrate by adopting a standard RCA process;
s2, sputtering a metal Ti layer on the Si substrate by adopting a direct-current magnetron sputtering method;
s3, placing Ti/Si into an atomic layer deposition ALD system, heating to a high temperature (200 ℃ -300 ℃), stabilizing for a period of time (the holding time is 5-10 min), and oxidizing in-situ a part (1/3) of Ti to generate TiO 2
S4 HfO directly in ALD 2 Depositing a base film;
s5, finishing depositionHfO of 2 Annealing the base film/Ti/Si;
s6, after annealing, HfO is added 2 Putting the base film/Ti/Si into magnetron sputtering, and carrying out top electrode sputtering by adopting a mask to obtain top electrode clamping-free HfO 2 A base film material.
Preferably, in the DC magnetron sputtering of the step S2, the background vacuum is lower than 5.0 × 10 -3 Pa, the vacuum degree during sputtering is 0.3Pa, the sputtering power is 100w, the pre-sputtering time is 1min, the sputtering time is 20s, and the temperature is room temperature.
Preferably, HfO is performed in the step S4 2 In the deposition of the base film, the deposition temperature is 250 ℃, the deposition thickness is 15nm, and the deposition source materials are a hafnium source, a zirconium source and high-purity water.
Preferably, the hafnium source is hafnium tetradimethylamide; the zirconium source is tetradimethylamine zirconium.
Preferably, the annealing temperature in the annealing of the step S5 is 450 ℃, and the annealing time is 30S.
Preferably, the top electrode in the top electrode sputtering in step S6 is one of Ta, Ti, and Pt.
Preferably, in the magnetron sputtering in the step S6, the background vacuum is lower than 5.0 × 10 -3 Pa, the vacuum degree during sputtering is 0.3Pa, the sputtering power is 100w, the pre-sputtering time is 1min, the sputtering time is 60s, and the temperature is room temperature.
In addition, in order to realize the purpose, the invention also provides the following technical scheme: no top electrode centre gripping HfO 2 The application of the base film material in a ferroelectric field effect transistor (FeFET).
The invention has the beneficial effects that: in the invention, when the Ti metal is in the ALD high-temperature state, in-situ oxidation of part of the Ti layer is expected to generate TiO with high dielectric constant 2 (ii) a Meanwhile, the Ti formed by magnetron sputtering is very thin, so that TiO is formed 2 Will not be very strong and will eventually achieve fine grain nucleation, TiO 2 Can be used as a seed layer template for thin film growth. At this time, HfO is added 2 Deposition of base film on TiO 2 The ferroelectric thin film will follow the TiO 2 Crystal ofLattice-preferential nucleation and oriented growth, then HfO 2 The lattice parameter of the base film is not so large and relatively small grains are formed, so that the small size induces large surface energy and the seed layer is coupled with HfO 2 The orientation stress of the base film can promote the asymmetry of the internal structure of the base film, and after rapid annealing, HfO with good ferroelectric property can be obtained without clamping a top electrode 2 A base film. Second, TiO 2 The dielectric constant of the material is much higher than that of the TiON, so that the sharing of an applied electric field can be effectively avoided, and the energy consumption can be saved; when the FeFET is applied, the TiN top electrode does not need to be etched any more, and the TiN can be directly etched on the HfO 2 Subsequent processing is carried out on the base film/Ti/Si, so that the process flow is simplified; and secondly, the conventional Si substrate is adopted, so that the existing industrial production requirements can be met.
Drawings
FIG. 1 is a diagram of HfO in the prior art 2 A technical scheme for base film preparation;
FIG. 2 is a HfO of the present invention 2 A technical scheme for base film preparation;
FIG. 3 is a HfO of the present invention 2 Transmission electron micrographs of the base film;
FIG. 4 is a ferroelectric hysteresis curve for Ti-Ta capacitor testing with the top electrode being Ta;
FIG. 5 is a ferroelectric hysteresis curve for Ti-Ti capacitor testing with Ti as the top electrode;
FIG. 6 is a ferroelectric hysteresis curve of a Ti-Pt capacitor test with Pt as the top electrode.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In the prior art, HfO is currently induced 2 The ferroelectric property of the base film is usually obtained by first covering the top of the base film with a layer of low thermal expansion systemSeveral top electrodes are then annealed quickly to produce great tensile stress inside the film and promote the formation of ferroelectric o phase as one asymmetrical structure, with TiN being the most common top electrode. For subsequent FeFET processing, all that should be done first is to remove the top electrode TiN. The process route is shown in figure 1.
However, in this method, HfO 2 The ferroelectricity of the base film strongly depends on the clamping stress of the TiN top electrode, and HfO 2 The TiN and the TiN can generate chemical reaction to generate TiON with low dielectric constant, so that defects at the interface are enriched and the stability of the film is not facilitated; secondly, the TiN top electrode needs to be etched firstly in the process of preparing the FeFET, and the process is undoubtedly complex, accurate etching is difficult to realize, and no top TiN residue is difficult to ensure, so that the interface quality is poor, and the performance of the device is not favorably improved.
The technical route of the invention is to anneal the film and then sputter the electrode (various electrodes can be adopted, not only TiN is adopted), in the invention, HfO 2 The ferroelectricity of the base film is derived from the base TiO 2 The seed layer induced oriented growth has different technical routes and principles, as shown in fig. 2, and the prepared film is in a nanometer level in thickness by adopting an industrialized atomic layer deposition method, so that the requirements of micro devices can be met, the automation capability can be greatly improved, and the manual error can be reduced.
No top electrode centre gripping HfO 2 The preparation method of the base film material comprises the following specific steps:
1. the method comprises the following steps of (1) adopting common and low-cost p-type (100) Si as a substrate, and firstly cleaning the surface of the substrate by adopting a standard RCA process;
2. sputtering a metal Ti layer on the Si substrate by a direct current magnetron sputtering method, wherein the background vacuum is lower than 5.0 multiplied by 10 - 3 Pa, the vacuum degree during sputtering is 0.3Pa, the sputtering power is 100w, the pre-sputtering time is 1min, the sputtering time is 20s, and the working temperature is room temperature;
3. HfO by directly placing Ti/Si into Atomic Layer Deposition (ALD) system 2 Depositing the base film at 250 deg.CThe deposition thickness is 15nm, the deposition source material is tetra (dimethylamine) hafnium, tetra (dimethylamine) zirconium and high-purity water, and the hafnium source and the zirconium source are sequentially circulated to obtain Hf 0.5 Zr 0.5 O 2 The carrier gas during deposition of the hafnium source and the zirconium source is high-purity nitrogen, the flow rate is 120sccm, the pulse time is 1.6s, and the purging time after deposition is 6.0 s; the carrier gas during the deposition of the high-purity water oxide is high-purity nitrogen, the flow rate is 150sccm, the pulse time is 0.1s, and the purging time after deposition is 8.0 s.
4. Deposited Hf 0.5 Zr 0.5 O 2 Directly putting the Ti/Si into a rapid annealing furnace for annealing, wherein the annealing parameter is 450 ℃/30 s;
5. hf with annealing completion 0.5 Zr 0.5 O 2 Putting Ti/Si into magnetron sputtering again, adopting mask plate to carry out top electrode sputtering, selecting three different top electrodes (Ta, Ti and Pt), keeping the sputtering process consistent, and making background vacuum lower than 5.0X 10 - 3 Pa, the vacuum degree during sputtering is 0.3Pa, the sputtering power is 100w, the pre-sputtering time is 1min, the sputtering time is 60s, and the working temperature is room temperature.
HfO thereof 2 The transmission electron microscope image of the base film is shown in fig. 3, in order to test the structural characteristics and the electrical properties of the film, the following are ferroelectric hysteresis curves obtained by testing three different top electrodes, wherein Ti-Ta, Ti-Ti and Ti-Pt respectively represent that the bottom electrode is Ti, the top electrode is a capacitor structure of Ta, Ti and Pt, and the ferroelectric hysteresis curves are respectively shown in fig. 4, 5 and 6.
No top electrode centre gripping HfO 2 The application of the base film material in the FeFET can avoid the etching process of the top electrode in the FeFET preparation process and can directly perform the etching process on the HfO 2 The subsequent processing is carried out on the base film/Ti/Si, thereby simplifying the process flow, ensuring the clean interface quality and realizing the simplification and the low cost of the process.
Although the present invention has been described in detail with reference to the foregoing embodiments, it will be apparent to those skilled in the art that various changes in the embodiments and/or modifications of the invention can be made, and equivalents and modifications of some features of the invention can be made without departing from the spirit and scope of the invention.

Claims (8)

1. No top electrode centre gripping HfO 2 The preparation method of the base film material is characterized by comprising the following steps:
s1, taking Si as a substrate, and cleaning the surface of the Si by adopting a standard RCA process;
s2, sputtering a metal Ti layer on the Si substrate by adopting a direct-current magnetron sputtering method;
s3, placing Ti/Si into an ALD system, heating to a high temperature, stabilizing for a period of time, and oxidizing a part of Ti in situ to generate TiO 2
S4 HfO directly in ALD 2 Depositing a base film;
s5, depositing HfO 2 Annealing the base film/Ti/Si; s6, after annealing, HfO is added 2 Putting the base film/Ti/Si into magnetron sputtering, and carrying out top electrode sputtering by adopting a mask to obtain top electrode clamping-free HfO 2 A base film material.
2. The topless electrode clamping HfO of claim 1 2 The preparation method of the base film material is characterized by comprising the following steps: in the DC magnetron sputtering of the step S2, the background vacuum is lower than 5.0X 10 -3 Pa, the vacuum degree during sputtering is 0.3Pa, the sputtering power is 100w, the pre-sputtering time is 1min, the sputtering time is 20s, and the temperature is room temperature.
3. The topless electrode clamping HfO of claim 1 2 The preparation method of the base film material is characterized by comprising the following steps: performing HfO in the step S4 2 In the deposition of the base film, the deposition temperature is 250 ℃, the deposition thickness is 15nm, and the deposition source materials are a hafnium source, a zirconium source and high-purity water.
4. The topless electrode clamping HfO of claim 3 2 The preparation method of the base film material is characterized by comprising the following steps: the hafnium source is hafnium tetradimethylamide; the zirconium source is tetradimethylamine zirconium.
5. The topless electrode clamping HfO of claim 1 2 The preparation method of the base film material is characterized by comprising the following steps: the annealing temperature in the annealing of the step S5 is 450 ℃, and the annealing time is 30S.
6. The topless electrode clamping HfO of claim 1 2 The preparation method of the base film material is characterized by comprising the following steps: in the step S6, the top electrode in the top electrode sputtering is any one of Ta, Ti, and Pt.
7. The topless electrode-clamped HfO of claim 1 or 6 2 The preparation method of the base film material is characterized by comprising the following steps: in the magnetron sputtering in the step S6, the background vacuum is lower than 5.0 x 10 -3 Pa, the vacuum degree during sputtering is 0.3Pa, the sputtering power is 100w, the pre-sputtering time is 1min, the sputtering time is 60s, and the temperature is room temperature.
8. The topless clamped HfO prepared according to the preparation method of any one of claims 1 to 7 2 The application of the base film material in a ferroelectric field effect transistor (FeFET).
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