CN113540254B - Neodymium-doped zirconia thin film transistor and preparation method and application thereof - Google Patents

Neodymium-doped zirconia thin film transistor and preparation method and application thereof Download PDF

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CN113540254B
CN113540254B CN202110639473.6A CN202110639473A CN113540254B CN 113540254 B CN113540254 B CN 113540254B CN 202110639473 A CN202110639473 A CN 202110639473A CN 113540254 B CN113540254 B CN 113540254B
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陆旭兵
李长灏
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South China Normal University
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    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
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    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
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    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
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Abstract

The invention belongs to the technical field of thin film transistors, and particularly relates to a neodymium-doped zirconia thin film transistor, which comprises a substrate, a zirconium neodymium oxide dielectric thin film layer covered on the substrate, an indium oxide semiconductor layer covered on the dielectric thin film layer and a metal source drain electrode, wherein the thickness of the dielectric layer is 10-100 nm, and the molar ratio of Zr to Nd in the zirconium neodymium oxide dielectric thin film is 100-x:x, wherein x=0-10; the thickness of the semiconductor film layer is 1-50 nm, and the thickness of the metal source-drain electrode is 10-50 nm. The preparation process of the thin film transistor prepared by the full solution method is simple, the equipment requirement is simple, the operation condition is mild, and the cost is low, so that the industrialized production can be realized more effectively, simply and efficiently.

Description

Neodymium-doped zirconia thin film transistor and preparation method and application thereof
Technical Field
The invention relates to the technical field of thin film transistors, in particular to a neodymium-doped zirconia thin film transistor and a preparation method and application thereof.
Background
Thin Film Transistors (TFTs) are one of the core technologies in the field of microelectronics, in particular display engineering. Whether Active Matrix Liquid Crystal Displays (AMLCDs) which are the absolute dominant active matrix in the current advanced display market, or AMOLED (active matrix organic light emitting diode display) which represents a trend in future flexible displays, TFT devices occupy a critical position in the pixel driving unit therein. In addition, the TFT device is widely researched and applied in aspects of biological sensing, ultraviolet searchlighting and the like. Therefore, the development and development of the TFT device have important significance, and the dielectric layer is taken as an important part of the TFT, so that the transistor performance such as the starting voltage, the semiconductor growth morphology and the like are greatly influenced.
At present, the transistor is commonly made of SiO 2 Is a dielectric layer, but SiO 2 The dielectric constant (k=3.9) is low, resulting in a transistor with a large operating voltage. Meanwhile, to meet the demands of society for device miniaturization, siO in TFTs 2 The physical thickness of the dielectric layer is thinner and thinner, and the problems of rapid increase of electric leakage and increase of power consumption of the device occur. If the TFT uses high-K dielectric material as the dielectric layer, larger capacitance can be provided under the same physical thickness, leakage current and working voltage can be reduced, the device can work under low voltage, and the overall power consumption of the device is reduced. The rare earth element can control oxygen vacancy, improve interface quality and promoteHigh crystallization temperature and dielectric constant and energy band control are often used to dope high K materials to improve their performance.
At present, most of high-K dielectric materials are prepared by pulse laser deposition, magnetron sputtering, atomic layer deposition and other methods, and the preparation methods are required to be carried out under the vacuum environment or inert gas protection, so that the operation is complex and the cost is high. The chemical liquid phase method can be used for preparing the high-K dielectric film in an air environment with low cost and large area, provides a dielectric layer film with high dielectric constant and low leakage current for further preparation of the TFT, and shows good electrical performance.
Zirconia is a material with a relatively high dielectric constant, and the application of the zirconia to a transistor as a dielectric layer can effectively reduce the working voltage required by a device. Nevertheless, zirconium oxide alone as a dielectric layer still exists to form low dielectric constant SiO with Si substrates 2 The dielectric constant is insufficient, and the zirconia film prepared by the solution method at low temperature has large electric leakage.
Disclosure of Invention
In order to achieve the above purpose, the present invention provides the following technical solutions:
a neodymium-doped zirconia thin film transistor comprises a substrate, a zirconium neodymium oxide dielectric thin film layer covered on the substrate, an indium oxide semiconductor layer covered on the dielectric thin film layer and a source electrode and a drain electrode, wherein the thickness of the dielectric layer is 10-100 nm, the molar ratio of Zr to Nd in the zirconium neodymium oxide dielectric thin film is 100-x (x=0-10), the thickness of the semiconductor thin film layer is 1-50 nm, and the thickness of the metal electrode is 10-50 nm.
As a preferred embodiment, x is 7.5.
Preparation of a neodymium-doped zirconia thin film transistor: and preparing a neodymium doped dielectric film and an indium oxide film by adopting a full solution method in an air environment, wherein the neodymium doped dielectric film and the indium oxide film are respectively used as a dielectric layer and an active layer of the thin film transistor.
Comprising the following steps:
1. preparation of dielectric film: dissolving zirconium acetylacetonate and neodymium acetylacetonate in an organic solvent, coating a zirconium neodymium oxide precursor solution obtained by sequentially carrying out oxygen introduction, sealing and water bath stirring heating treatment on a substrate, and carrying out heat treatment to obtain the zirconium neodymium oxide dielectric film.
2. Preparation of active layer: and (3) dissolving indium nitrate in an organic solvent, coating an indium oxide precursor solution obtained by sequentially sealing, stirring in a water bath and heating on a dielectric layer, and then carrying out heat treatment to obtain the indium oxide film.
3. Preparing a source electrode and a drain electrode: depositing copper electrode on the indium oxide active layer by thermal evaporation method with thickness of 10-50 nm, deposition rate of 0.02nm/s, and high vacuum deposition under air pressure of 8X10 -4 Pa。
As a preferable technical scheme, in the step S1, spin-coating is carried out on the substrate at a rotation speed of 500rpm for 5 seconds, spin-coating is carried out on the substrate at a rotation speed of 2000-4000 rpm for 20-40 seconds, annealing is carried out on a hot plate at 40-80 ℃ for 5 minutes, and annealing is carried out on a hot plate at 120 ℃ for 10 minutes, so that a layer of Nd-doped ZrO prepared on the substrate is obtained 2 The precursor film is sequentially and repeatedly subjected to spin coating and hot plate annealing treatment for two times, so that three layers of Nd-doped ZrO are prepared on the substrate 2 Precursor films.
As a preferable technical scheme, three layers of Nd-doped ZrO are prepared 2 And (3) carrying out high-temperature densification treatment on the precursor film: spin-coated Nd-doped ZrO 2 The precursor film is sequentially subjected to heating, heat preservation and cooling annealing treatment: wherein the temperature rising process is that 120s is heated to 400 ℃, and when the temperature rises to 400 ℃, the heat is preserved for 3600s; when the temperature is reduced, the temperature is reduced by 60-80 ℃ every 120s through program setting, and the temperature is kept for 120s when the temperature is reached, until the temperature is reduced to room temperature.
Compared with the prior art, the invention has the beneficial effects that:
1. the preparation process of the thin film transistor by adopting the full solution method is simple, the equipment requirement is simple, the operation condition is mild, and the cost is low, so that the industrialized production can be realized more effectively, simply and efficiently.
2. The neodymium doped zirconia film is used as a dielectric layer, and the roughness of the neodymium doped zirconia film is smaller than that of the undoped zirconia film. The roughness is reduced along with the increase of the neodymium doping concentration, when the neodymium doping content is 10%, the root mean square roughness is reduced from 562.77pm to 333.87pm, the growth of a subsequent active layer is facilitated, and the quality of an interface is improved.
3. In the aspect of dielectric property, the electronegativity of neodymium is smaller than that of zirconium, and the adsorption capacity of neodymium on oxygen ions is stronger, so that the oxygen diffusion can be effectively inhibited, the oxygen vacancy density is reduced, the boundary trap charge is reduced, and the neodymium element can inhibit an interface low dielectric constant substance SiO 2 Thereby having higher relative dielectric constant, better breakdown characteristics, and lower leakage current density. Compared with an undoped zirconia film, the dielectric layer with the neodymium doping concentration of 7.5% has the advantages that the breakdown field strength is increased from 5.5MV/cm to 7MV/cm, and the relative dielectric constant is increased from 10.8 to 11.8. As the doping concentration increases to 10%, the film breakdown field strength decreases to 6MV/cm and the relative dielectric constant decreases to 11.3. But still higher than the undoped zirconia film.
4. TFTs fabricated using neodymium-doped zirconia films as dielectric layers have excellent electrical properties, such as a switching ratio of 2.94X10 when compared to TFTs using 7.5% neodymium-doped zirconia films as dielectric layers 4 Lifting to 4.38X10 7 The threshold voltage is reduced from 0.84V to 0.62V, and the field efficiency mobility reaches 25.87cm 2 /(v·s). The TFT prepared by the method and taking the neodymium-doped zirconia film as the dielectric layer has good application prospect in the future display and electronic fields.
Drawings
Fig. 1 is a schematic structural diagram of a thin film transistor using neodymium doped zirconia as a dielectric layer.
Fig. 2 is a flow chart of the fabrication of a thin film transistor with neodymium doped zirconia as a dielectric layer.
Fig. 3 is a schematic diagram of the principle of neodymium doped zirconia.
Fig. 4 is an AFM image of the surface of dielectric films of different neodymium doping concentrations.
FIG. 5 shows JE characteristics of dielectric films with different neodymium doping concentrations.
FIG. 6 shows dielectric films ε with different neodymium doping concentrations r -F characteristic curve.
FIG. 7 shows ZrO doping levels of different Neodymium 2 The Id-Vg transfer characteristic of a transistor with a thin film as the dielectric layer.
FIG. 8 shows ZrO at different neodymium doping concentrations of (a) 0% and (b) 7.5% 2 The Id-Vd output characteristic curve of the transistor with the thin film as the dielectric layer.
Detailed Description
The technical solutions of the present invention will be clearly and completely described in conjunction with the embodiments of the present invention, and it is apparent that the described embodiments are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention. The specific conditions are not noted in the examples and are carried out according to conventional conditions or conditions recommended by the manufacturer. The reagents or apparatus used were conventional products commercially available without the manufacturer's attention.
Example 1
1. Preparing a precursor solution: preparing a mixed solution in a glove box according to a proportion by taking zirconium acetylacetonate and neodymium acetylacetonate as solutes and N, N-dimethylamide as a solvent; control of Nd in mixed solution 3+ :Zr 4+ Molar ratio: x is 100-x, wherein x=0-10, and then the prepared mixed solution is sequentially subjected to oxygen introducing, sealing and water bath stirring and heating treatment to obtain Nd-doped ZrO 2 A precursor solution; preparing a solution in a glove box by taking indium nitrate as a solute and 2-ME (2-mercaptoethanol) as a solvent, and sequentially sealing, stirring in a water bath and heating to obtain an indium oxide precursor solution.
Wherein, oxygen is introduced: will be filled with 5ml ZrO 2 The glass bottle of the precursor solution was filled with oxygen for 30min at a flow rate of 60ml/min. Sealing, stirring in a water bath: sequentially wrapping the glass bottle filled with the precursor solution with waxed paper and tinfoil, and then coating the glass bottle with ZrO 2 Precursor solution and In 2 O 3 The precursor solution was stirred at 80℃for 12h.
2. Precursor solution pretreatment: cooling the treated precursor solution to room temperature, taking out, respectively loading into 1.5ml centrifuge tubes, putting into a centrifuge, centrifuging at a speed of 1000-2000 r/min for 10min, and taking supernatant for later use;
3. processing a substrate: selecting P-type heavily doped silicon, manufacturing a square sheet with the size of 15mm multiplied by 15mm as a substrate, carrying out ultrasonic cleaning on the substrate, sequentially putting the substrate into acetone, isopropanol, deionized water, absolute ethyl alcohol and the like for cleaning to remove impurities such as surface organic matters, soaking the substrate with hydrofluoric acid with the mass concentration of 1% to remove silicon dioxide on the surface, washing the substrate cleanly, soaking the substrate with concentrated sulfuric acid to remove organic residues, hydrophilizing the surface of the substrate, blow-drying the substrate with nitrogen, and carrying out irradiation treatment on the substrate subjected to spin coating with ultraviolet light at the temperature of 0-40 ℃ for 5 minutes for later use;
4. preparation of Nd-doped ZrO 2 Dielectric layer film: filtering the mixed precursor solution of zirconia and neodymium oxide by using a spin-coating technology and adopting a filter tip with the size of 0.22 mu m, spin-coating the mixed precursor solution on a cleaned substrate at a rotation speed of 500rpm for 5 seconds, spin-coating the mixed precursor solution on the substrate at a rotation speed of 2000-4000 rpm for 20-40 seconds, annealing the mixed precursor solution on a hot plate at 40-80 ℃ for 5 minutes, and annealing the mixed precursor solution on a hot plate at 120 ℃ for 10 minutes to obtain a layer of Nd-doped ZrO on the substrate 2 The precursor film is sequentially and repeatedly subjected to spin coating and hot plate annealing treatment for two times, so that three layers of Nd-doped ZrO are prepared on the substrate 2 Precursor film, then high temperature densification treatment is carried out;
5. high-temperature densification treatment: spin-coated Nd-doped ZrO 2 The precursor film is put into a high-temperature rapid annealing furnace (RTP), and the running program of the RTP is set, so that the sample is subjected to annealing treatment of heating, heat preservation and cooling in the RTP annealing furnace in sequence. Wherein the temperature rising process is that 120s is raised to 400 ℃, when the temperature is raised to 400 ℃, the heat is preserved for 3600s, the residual organic solvent in the mixed precursor solution is fully volatilized, and compact Nd-doped ZrO is generated 2 A film; when the temperature is reduced, the temperature is reduced by 60-80 ℃ every 120s through program setting, and the temperature is kept for 120s when the temperature is reached, until the temperature is reduced to room temperature.
6. Preparation of an indium oxide active layer: the indium oxide precursor solution was filtered using a spin-coating technique using a filter having a size of 0.22 μm, and then spin-coated on a cleaned substrate at 500rpm for 5 seconds, spin-coated on a substrate at 3000rpm for 40 seconds, and then annealed on a hot plate at 100 c for 10 minutes to obtain a layer of indium oxide film prepared on the dielectric layer.
7. Preparing a metal copper top electrode: depositing 20nm copper top electrode on the indium oxide film by vacuum thermal evaporation technology, controlling the deposition rate to be 0.02nm/s, and performing the deposition under high vacuum with the air pressure of 8 multiplied by 10 -4 Pa。
Example 1 will be described with reference to the accompanying drawings:
fig. 1 is a schematic structural diagram of a thin film transistor with neodymium-doped zirconia as a dielectric layer, which comprises a heavily doped silicon substrate, a neodymium-doped zirconia dielectric film, an indium oxide active layer and a copper source/drain electrode sequentially stacked on the surface of the substrate.
Fig. 2 is a flow chart of a process for preparing a thin film transistor with neodymium doped zirconia as a dielectric layer, wherein a film is formed on a heavily doped silicon substrate by spin coating a mixed precursor solution, then a hot plate annealing and rapid annealing process are carried out to form a neodymium doped zirconia dielectric layer, then a film is formed on the dielectric layer by spin coating an indium oxide precursor solution, then a hot plate annealing is carried out to form an indium oxide active layer, and finally a mask plate with a certain pattern is used for thermal evaporation to prepare a source electrode and a drain electrode.
Fig. 3 is a schematic diagram of the principle of neodymium doped zirconia, where the mixed precursor solution is spin coated on a substrate to form a film, then heat treated, and the organic solvent volatilizes with the film gradually densifying. The radius of neodymium is equal to that of zirconium ions, the radius of neodymium ions is slightly larger, and the neodymium ions randomly replace the positions of zirconium in the film forming process, so that the neodymium ions are uniformly distributed in the film to realize doping.
FIG. 4 is an AFM image of the surface of a dielectric film with different neodymium doping concentrations, wherein the roughness of the film gradually decreases as the neodymium doping concentration increases, and when the neodymium doping concentration of the zirconia dielectric layer increases from 0% to 10%, the root mean square roughness of the film decreases from 562.77pm to 333.87pm, which is more beneficial to the growth of subsequent active layers and improves the quality of interfaces.
FIG. 5 shows JE characteristics of dielectric films with different neodymium doping concentrationsIt can be seen that the breakdown field strength increases and then decreases with increasing neodymium doping concentration, and the reason is probably that the electronegativity of neodymium is smaller than that of zirconium, and the adsorption capacity to oxygen ions is stronger, so that oxygen diffusion can be effectively inhibited, the oxygen vacancy density is reduced, and the boundary trap charge is reduced, thereby improving the breakdown characteristic. As the Nd doping concentration further increases, nd—o component formed due to the doping of Nd element increases, and Nd 2 O 3 Has a dielectric constant less than ZrO 2 Resulting in a reduction of the breakdown field strength. The doping ratio of Nd element in a certain proportion can effectively improve oxygen vacancy or reduce interface defect, and under the condition of keeping higher proportion of M-O-M as much as possible, the dielectric constant is compromised in a small extent so as to obtain the dielectric film with higher comprehensive performance. However, with the increase of the doping proportion, the problems of the reduction of the dielectric constant, the grain boundary defects among the defects of the dielectric film and the like are easily caused, so that the leakage current becomes large and the breakdown field intensity is reduced.
FIG. 6 shows dielectric films ε with different neodymium doping concentrations r F characteristic curve, the capacitance of the neodymium doped zirconia dielectric layer increases, the dielectric constant at 100KHZ is 10.33 (0%), 10.77 (5%), 11.25 (10%), respectively.
FIG. 7 shows ZrO doping levels of different Neodymium 2 The Id-Vg transfer characteristic of the transistor with the film as a dielectric layer shows that the doping of the neodymium element can slightly reduce the hysteresis loop, probably because the neodymium doped zirconia film is smoother, so that the defects in the film are reduced. The doping of the neodymium element can obviously reduce the drain current of the transistor in the off state, increase the drain current of the transistor in the on state and lead the switching ratio of the transistor to be 10 when the neodymium element is doped from 0 percent 4 To 10 at 7.5% neodymium doping 7 . The increase in drain current when the transistor is on may be due to an increase in carrier mobility due to better ZrO after Nd doping 2 -In 2 O 3 The interface may reduce interfacial coulomb scattering from impurities and traps, while the drain current reduction in the transistor off-state may be due to ZrO after Nd doping 2 And (3) reducing the leakage current of the film. According to the saturation drain current equationCalculated 7.5% neodymium doping concentration ZrO 2 Carrier mobility μ=25.87 cm for transistors with thin films as dielectric layers 2 Higher than 0% neodymium doping concentration ZrO 2 Carrier mobility of transistor with thin film as dielectric layer 14.86cm 2 The threshold voltage is also 0.62V, which is lower than 0.84V when undoped.
In patent 202010571464.3, the same test means are used to obtain a 10% ce on-off ratio of 10 6 Threshold voltage 0.82V,1% Ce switching ratio 3.24x10 4 Threshold voltage 1.1V, carrier mobility of 1% cerium doped zirconia film 0.35cm 2 /(V·s)。
FIG. 8 shows ZrO at different neodymium doping concentrations of 0% and (b) 7.5% 2 The Id-Vd output characteristic curve of the transistor with the thin film as the dielectric layer. FIG. 7 shows ZrO doping levels of different Neodymium 2 Id-Vd output characteristic curve of transistor with film as dielectric layer, (a) 0% neodymium doping concentration ZrO 2 Id-Vd output characteristic of transistor with film as dielectric layer, (b) 7.5% neodymium doping concentration ZrO 2 The Id-Vd output characteristic curve of the transistor with the thin film as the dielectric layer. The upper graph shows that at 2V gate voltage, compared with a transistor with doped neodymium concentration of 0%, the transistor with doped neodymium concentration of 7.5% has better output characteristics when the maximum output current is increased from 0.07mA to 0.2mA, and the transistor with doped neodymium concentration of 7.5% is obviously increased.
The embodiments of the present invention have been described in detail above, but the present invention is not limited to the described embodiments. It will be apparent to those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, and yet fall within the scope of the invention.

Claims (3)

1. A neodymium-doped zirconia thin film transistor comprises a substrate, a zirconium neodymium oxide dielectric thin film layer covered on the substrate, an indium oxide semiconductor layer covered on the dielectric thin film layer and a metal source-drain electrode, and is characterized in that the zirconium neodymium oxide dielectric thin film layer is used as a dielectric layer, the thickness of the dielectric layer is 10-100 nm, and the molar ratio of Zr to Nd in the zirconium neodymium oxide dielectric thin film is 100-x:x, wherein x=7.5; the thickness of the semiconductor film layer is 1-50 nm, and the thickness of the metal source-drain electrode is 10-50 nm; the neodymium doped zirconia thin film transistor comprises the following steps:
s1, preparing a dielectric film: dissolving zirconium acetylacetonate and neodymium acetylacetonate in an organic solvent, coating a zirconium neodymium oxide precursor solution obtained by sequentially carrying out oxygen introduction, sealing and water bath stirring heating treatment on a substrate, and carrying out heat treatment to obtain a zirconium neodymium oxide dielectric film;
s2, preparation of an active layer: dissolving indium nitrate in an organic solvent, coating an indium oxide precursor solution obtained by sequentially sealing, stirring in a water bath and heating on a dielectric layer, and then carrying out heat treatment to obtain an indium oxide film;
s3, preparing a source electrode and a drain electrode: depositing a copper electrode on the indium oxide active layer by adopting a thermal evaporation method;
spin-coating on the substrate at 500rpm for 5 seconds, spin-coating on the substrate at 2000-4000 rpm for 20-40 seconds, annealing on a hot plate at 40-80 ℃ for 5 minutes, and annealing on a hot plate at 120 ℃ for 10 minutes to obtain a layer of Nd-doped ZrO on the substrate 2 The precursor film is sequentially and repeatedly subjected to spin coating and hot plate annealing treatment for two times, so that three layers of Nd-doped ZrO are prepared on the substrate 2 A precursor film;
three layers of Nd-doped ZrO are prepared 2 And (3) carrying out high-temperature densification treatment on the precursor film: spin-coated Nd-doped ZrO 2 The precursor film is sequentially subjected to heating, heat preservation and cooling annealing treatment: wherein the temperature rising process is that 120s is heated to 400 ℃, and when the temperature rises to 400 ℃, the heat is preserved for 3600s; and (3) when the temperature is reduced, reducing the temperature by 60-80 ℃ every 120 seconds through program setting, and preserving the heat for 120 seconds after each time of temperature reduction until the temperature is reduced to the room temperature.
2. The neodymium-doped zirconia thin film transistor according to claim 1, wherein the thickness of the deposited copper electrode in the step S3 is 10-50 nm, the deposition rate is controlled to be 0.02nm/S, and the deposition is performed under high vacuumThe air pressure is 8 multiplied by 10 -4 Pa。
3. Use of a neodymium doped zirconia thin film transistor according to claim 1 for the manufacture of a light emitting display.
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CN108232013A (en) * 2017-11-29 2018-06-29 华南师范大学 The method for preparing zirconia film and flexible transistor
CN111128748A (en) * 2019-12-17 2020-05-08 西交利物浦大学 Preparation method of dual-element high-dielectric-constant insulating layer based on self-combustion method

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