CN114818582A - Method for distinguishing golden finger schematic diagrams of PAD (PAD-package) and substrate of packaged chip based on LISP (laser induced plasma) - Google Patents
Method for distinguishing golden finger schematic diagrams of PAD (PAD-package) and substrate of packaged chip based on LISP (laser induced plasma) Download PDFInfo
- Publication number
- CN114818582A CN114818582A CN202210481009.3A CN202210481009A CN114818582A CN 114818582 A CN114818582 A CN 114818582A CN 202210481009 A CN202210481009 A CN 202210481009A CN 114818582 A CN114818582 A CN 114818582A
- Authority
- CN
- China
- Prior art keywords
- pad
- lisp
- golden finger
- distinguishing
- intersection points
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/39—Circuit design at the physical level
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Evolutionary Computation (AREA)
- Geometry (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Wire Bonding (AREA)
Abstract
The invention discloses a method for distinguishing a packaging chip PAD and a substrate golden finger schematic diagram based on LISP, which belongs to the field of computer program processing and comprises the following steps: s1: compiling a CAD-LISP language, and establishing a multi-segment line selection set for a drawing in the chip packaging process; s2: establishing a straight line selection set; s3: calculating the number of intersection points of different sets, and positioning coordinates of all the intersection points; s4: screening out PAD and golden finger which do not have intersection points with the bonding wires, and filling the PAD and the golden finger; s5: outputting a LISP command with a suffix of lsp, and opening CAD software to execute the LISP command; s6: and (5) selecting the whole image in a frame, inputting a LISP command, and finishing the distinguishing of the PAD without the bonding wire and the golden finger. The PAD and the golden finger are distinguished by combining LISP secondary development language in CAD software and utilizing a filling mode, so that the errors of wrong filling, missing filling and the like can be avoided, and the working efficiency is very high; the method has strong adaptability and compatibility, and solves the defect that each PAD and each golden finger needs to be selected by being observed by human eyes.
Description
Technical Field
The invention relates to the technical field of computer program processing, in particular to a method for distinguishing a PAD of a packaged chip and a golden finger schematic diagram of a substrate based on LISP.
Background
The chip has dozens to thousands of PADs according to different types, the substrate also has a plurality of corresponding golden fingers, and when the PADs and the golden fingers are exported to a bonding wire diagram in a CAD format from Cadence or other design software, all the PADs and the golden fingers are in an unfilled state.
In order to facilitate actual production, the bonding wire diagram is ensured to correspond to an object, so that the PAD and the golden finger without bonding wires are required to be filled with marks. In the actual filling operation process, the problems of wrong filling, missing filling and the like can be caused by manually selecting filling by a manual visual inspection method, and the error probability is high.
In the actual production process, in order to ensure that the welding line graph corresponds to an actual object, PAD and golden fingers which are actually not welded need to be filled and marked in the CAD, so that the production is facilitated.
The PAD and the golden finger of the non-bonding wire are observed by human eyes, the PAD and the golden finger are manually selected and then filled, the existing operation flow is tedious, the PAD and the golden finger of the non-bonding wire are selected from dozens to thousands of the PAD and the golden finger, the difficulty is high, the problems of missing filling, wrong filling and the like easily occur, the drawing delivery time is influenced, and even the product is caused to make mistakes. Even if the design is designed by a very experienced engineer, the 100% accuracy cannot be guaranteed after the design is finished, and other personnel are required to be arranged for recheck.
Disclosure of Invention
The invention aims to solve the defects in the prior art, and provides a method for distinguishing a PAD of a packaged chip and a golden finger schematic diagram of a substrate based on LISP.
In order to achieve the purpose, the invention adopts the following technical scheme:
a method for distinguishing a PAD of a packaged chip from a golden finger schematic diagram of a substrate based on LISP comprises the following steps:
s1: compiling a CAD-LISP language, and establishing a multi-segment line selection set for a drawing in the chip packaging process;
s2: establishing a straight line selection set;
s3: calculating the number of intersection points of different sets, and positioning coordinates of all the intersection points;
s4: screening out PAD and golden finger which do not have intersection points with the bonding wires, and filling the PAD and the golden finger;
s5: outputting a LISP command with a suffix of lsp, and opening CAD software to execute the LISP command;
s6: and (5) selecting the whole image in a frame, inputting a LISP command, and finishing the distinguishing of the PAD without the bonding wire and the golden finger.
Further, in step S1, a CAD-LISP language is written, and a multi-segment selection set including PAD and gold finger is created for the drawing in the chip packaging process.
Further, in step S2, the creation of the line selection set is primarily directed to the wire bonding object.
Further, in step S3, using the different selection set intersection points, the step of locating the coordinates of all the intersection points is used to distinguish the presence or absence of a wire.
Further, in step S5, the CAD software is any suitable CAD software compatible with the LISP language, including but not limited to AutoCAD, and hayen CAD.
Further, in step S6, when the PAD and the gold finger without bonding wire are automatically searched, the PAD and the gold finger are determined to be filled by determining the states of the bonding wires on the PAD and the gold finger.
Further, in step S6, after the LISP command is input, all the objects are selected at a time to realize automatic filling, and the non-bonding PAD and the gold finger are distinguished by filling.
Compared with the prior art, the invention has the beneficial effects that: determining whether to fill or not by judging the states of bonding wires on the PAD and the golden finger by combining LISP secondary development language in CAD software;
after the command is input, all objects can be selected at one time to realize automatic filling, the PAD and the golden finger are distinguished by using a filling mode, errors such as wrong filling and missing filling can be avoided, and the working efficiency is very high;
furthermore, the LISP language may be compatible with a variety of CAD software, such as: the system has the advantages that the system can be directly used in a plurality of CAD software, has strong adaptability and compatibility, and solves the defect that each PAD and golden finger needs to be selected by human eye observation.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention and not to limit the invention.
FIG. 1 is a flowchart illustrating steps of a method for distinguishing a PAD of a packaged chip from a golden finger of a substrate based on LISP according to the present invention;
FIG. 2 is a logic diagram of a method for distinguishing a PAD of a packaged chip from a golden finger of a substrate based on LISP according to the present invention;
FIG. 3 is a schematic diagram of a packaged chip, a PAD and a golden finger of a substrate according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of an embodiment of the present invention showing the PAD and gold fingers without wires in an unfilled state;
fig. 5 is a schematic diagram of the PAD and the gold finger without bonding wires in a filled state according to the embodiment of the invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments.
Referring to fig. 1-2, a method for distinguishing a golden finger schematic diagram of a package chip PAD and a substrate based on LISP includes the following steps:
s1: compiling a CAD-LISP language, and establishing a multi-segment line selection set for a drawing in the chip packaging process;
s2: establishing a straight line selection set;
s3: calculating the number of intersection points of different sets, and positioning coordinates of all the intersection points;
s4: screening out PAD and golden finger which do not have intersection points with the bonding wires, and filling the PAD and the golden finger;
specifically, whether bonding wires exist on the PAD and the golden finger or not is automatically judged by a CAD software program, and automatic filling is realized.
S5: outputting a LISP command with a suffix of lsp, and opening CAD software to execute the LISP command;
s6: and (5) selecting the whole image in a frame, inputting a LISP command, and finishing the distinguishing of the PAD without the bonding wire and the golden finger.
Referring to fig. 3-4, in the embodiment of the present application, in step S1, a CAD-LISP language is written, and a multi-segment line selection set is created for a drawing in a chip packaging process, where the multi-segment line selection set includes a PAD and a gold finger.
Specifically, the LISP language is used to simplify the drawing processing in the chip packaging process.
In the specific embodiment of the present application, in step S2, the creation of the line selection set is mainly directed to the wire bonding object.
In a specific embodiment of the present application, in step S3, using different selection set intersection points, the step of locating the coordinates of all intersection points is used to distinguish the presence or absence of a wire.
In a specific embodiment of the present application, in step S5, the CAD software is any suitable CAD software compatible with the LISP language, including but not limited to AutoCAD, haohne CAD.
Specifically, the LISP language command can be directly used by a plurality of CAD software, and the LISP language command can be directly opened by the CAD software.
Referring to fig. 5, in the embodiment of the present application, in step S6, when the PAD and the gold finger are automatically found without bonding wires, the PAD and the gold finger are determined to be filled by determining the states of the bonding wires on the PAD and the gold finger;
after an LISP command is input, all objects are selected at one time to realize automatic filling, and the PAD without bonding wires and the golden finger are distinguished through filling.
The above description is only for the preferred embodiment of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art should be considered to be within the technical scope of the present invention, and the technical solutions and the inventive concepts thereof according to the present invention should be equivalent or changed within the scope of the present invention.
Claims (7)
1. A method for distinguishing a PAD of a packaged chip from a golden finger of a substrate based on LISP is characterized by comprising the following steps:
s1: compiling a CAD-LISP language, and establishing a multi-segment line selection set for a drawing in the chip packaging process;
s2: establishing a straight line selection set;
s3: calculating the number of intersection points of different sets, and positioning coordinates of all the intersection points;
s4: screening out PAD and golden finger which do not have intersection points with the bonding wires, and filling the PAD and the golden finger;
s5: outputting a LISP command with a suffix of lsp, and opening CAD software to execute the LISP command;
s6: and (5) selecting the whole image in a frame, inputting a LISP command, and finishing the distinguishing of the PAD without the bonding wire and the golden finger.
2. The method for distinguishing between PAD and golden finger of a packaged chip based on LISP of claim 1, wherein in step S1, the CAD-LISP language is written, and a multi-segment line selection set is created for drawings during the chip packaging process, wherein the multi-segment line selection set comprises PAD and golden finger.
3. The method for LISP-based differentiation of die PAD and substrate golden finger schematics according to claim 2, wherein in step S2 the creation of the selection set of straight lines is mainly directed to the wire bonding object.
4. The method for LISP-based differentiation of bond PAD and substrate golden finger schematics of a packaged chip as claimed in claim 3, wherein in step S3, using different selection set intersection points, the step of locating the coordinates of all intersection points is used for differentiating the presence or absence of bond wires.
5. The method for distinguishing between packaged chip PAD and substrate golden finger schematics based on LISP as claimed in claim 4, wherein in step S5, the CAD software is any suitable CAD software compatible with LISP language, including but not limited to AutoCAD, haochen CAD.
6. The method of claim 5, wherein in step S6, when no bonding wire is found on the PAD and the golden finger, the PAD and golden finger are automatically determined to be filled by determining the bonding wire status on the PAD and golden finger.
7. The method as claimed in claim 6, wherein in step S6, after the LISP command is inputted, all the objects are selected at one time to realize automatic filling, and the PAD without bonding wire and the golden finger are distinguished by filling.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210481009.3A CN114818582A (en) | 2022-05-05 | 2022-05-05 | Method for distinguishing golden finger schematic diagrams of PAD (PAD-package) and substrate of packaged chip based on LISP (laser induced plasma) |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210481009.3A CN114818582A (en) | 2022-05-05 | 2022-05-05 | Method for distinguishing golden finger schematic diagrams of PAD (PAD-package) and substrate of packaged chip based on LISP (laser induced plasma) |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN114818582A true CN114818582A (en) | 2022-07-29 |
Family
ID=82510873
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202210481009.3A Pending CN114818582A (en) | 2022-05-05 | 2022-05-05 | Method for distinguishing golden finger schematic diagrams of PAD (PAD-package) and substrate of packaged chip based on LISP (laser induced plasma) |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN114818582A (en) |
-
2022
- 2022-05-05 CN CN202210481009.3A patent/CN114818582A/en active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR100442697B1 (en) | Integrated Management System for automated wire bonding processes | |
| EP1149385B1 (en) | Ic test software system for mapping logical functional test data of logic integrated circuits to physical representation | |
| CN107203473A (en) | The automatization test system and method for automatic expansion interface test case | |
| CN114861581B (en) | Auxiliary programming design method of programmable logic device based on image recognition | |
| CN112507649A (en) | Method for mapping digital-to-analog pins of analog layout to digital layout | |
| CN114970441B (en) | Automatic wiring method for IC chip package | |
| CN114818582A (en) | Method for distinguishing golden finger schematic diagrams of PAD (PAD-package) and substrate of packaged chip based on LISP (laser induced plasma) | |
| JP5873611B2 (en) | Method for teaching target eye points for wire bonding and related semiconductor processing operations | |
| CN108052771A (en) | The recognition methods of optical reference point, system, computer readable storage medium and equipment | |
| JP2020537358A (en) | Component polarity detection methods, systems, computer-readable storage media and devices | |
| CN113850041A (en) | Automatic correction system and method for integrated circuit timing design | |
| CN114297980A (en) | AutoCAD (auto computer aided design) -based wiring drawing design automation software system and design method | |
| KR100548795B1 (en) | Bonder viewer system of auto wire bonding system | |
| JP2008084897A (en) | System and program for designing/manufacturing semiconductor package | |
| JP2963328B2 (en) | Method and apparatus for creating wafer map for semiconductor wafer | |
| CN112100974A (en) | Test point checking method based on ALLEGRO software | |
| CN112149377A (en) | Method and device for rapidly generating FPD layout and readable storage medium | |
| CN103456650B (en) | Eyespot training method for wire bond and relevant semiconductor processing operation | |
| CN110376506B (en) | Testing method of fragment chip | |
| TWI822117B (en) | Examination method and system for engineering drawing | |
| KR100295415B1 (en) | How to Check the Wire Bonding Status of Semiconductor Packages | |
| US6363293B1 (en) | Video wire bonded system and method of operation | |
| CN106777519A (en) | The output intent and system of a kind of graphic documentation | |
| CN115774969A (en) | Method for integrally and automatically replacing same circuit module device | |
| CN109460569A (en) | The efficient RDL design method of integrated circuit back-end semi-custom designs |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination |