CN114818572A - High-frequency equivalent circuit, modeling method and modeling device for high-frequency equivalent circuit - Google Patents
High-frequency equivalent circuit, modeling method and modeling device for high-frequency equivalent circuit Download PDFInfo
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Abstract
The embodiment of the invention discloses a high-frequency equivalent circuit, a modeling method and a modeling device of the high-frequency equivalent circuit. The circuit includes: the equivalent resistor, the equivalent capacitor and the drain electrode parasitic inductor are connected in series and are connected in parallel with an absorption circuit formed by the parasitic inductor, the absorption resistor and the absorption capacitor in series, and then the upper tube is connected in series with the equivalent resistor, the power loop parasitic inductor, the direct current link equivalent series resistor, the power supply, the power loop resistor and the shunt resistor. The invention solves the problems of serious voltage overshoot, extra power loss, electromagnetic interference noise, even device breakdown and system reliability reduction caused by larger oscillation of the Cascode GaN device under high switching frequency in the related technology, and achieves the technical effects of quantitatively inhibiting the switching oscillation and matching the parameters of inhibiting the oscillation, ensuring the safe and reliable operation of the GaN device and fully playing the high-frequency switching characteristics of the GaN power device.
Description
Technical Field
The invention relates to the technical field of device power conversion, in particular to a high-frequency equivalent circuit, a modeling method and a modeling device of the high-frequency equivalent circuit.
Background
In recent years, power devices made of the third generation wide bandgap semiconductor material gallium nitride (GaN) have grown in high speed and high power density power electronics applications. GaN power devices have higher switching frequencies, smaller on-resistances and smaller gate charges than Si, SiC, which means GaN devices have significant advantages in terms of high power density and high efficiency converters.
Since the depletion type GaN device is a normally-open type device, driving and fault protection are not easy to implement, and the depletion type GaN device is not suitable for application of a bridge type converter. In order to solve the problem, a Cascode type gallium nitride (called Cascode type GaN for short) and an enhancement type GaN are introduced, so that the GaN switch has the characteristic of a normally-off device. The Cascode GaN is formed by connecting a low-voltage silicon MOSFET and a high-voltage depletion GaN in series, as shown in fig. 1, all junction capacitances and parasitic inductances are marked in fig. 1, and the structure can realize the normally-off of the device, relieve the Miller effect, improve the switching speed and reduce the turn-off loss under the condition of large current. Therefore, Cascode-type GaN devices are promising candidates for high power and high frequency switching applications. However, the connection between the silicon elements Si MOSFET and GaN device leads to an increase in parasitic inductance, leading to excessive ringing effects at high switching frequencies, limiting high frequency operation. Furthermore, during high current turn-off, the inherent capacitance between Si and GaN devices and parasitic inductance may cause large oscillations during turn-off. A plurality of parasitic elements in the Cascode type GaN device and parasitic inductance in an external circuit may cause large oscillation at a high switching frequency, thereby causing serious voltage overshoot, additional power loss, Electromagnetic Interference (EMI) noise, and even device breakdown, and reducing the reliability of the system. The complex structure of the Cascode type GaN device and the coupling between multiple parasitic parameters make modeling of switching oscillations very difficult.
Currently, research on GaN power device oscillation modeling is mainly focused on depletion mode GaN and enhancement mode GaN switching oscillation modeling, and these switching oscillation modeling methods are not fully applicable to Cascode type GaN power devices. For example, a circuit model based on an enhanced GaN device is established by quantifying the influence of circuit parameters on switching characteristics through a double-pulse test experiment, and the model only reflects the influence of various parameters of a switching process on the switching process and loss. In addition, the switching oscillation of the Cascode type GaN device is closely related to the interaction between the low-voltage MOSFET and the high-voltage depletion type GaN, the enhanced GaN does not have a Cascode structure, and the modeling method is not suitable for the Cascode type GaN power device. For example, in the study on the oscillation problem and stability of the GaN-based circuit, a method for adding an RC buffer circuit is provided to provide a flow path for a high-frequency signal so as to suppress oscillation, and two different sets of RC values are respectively taken to simulate the oscillation suppression effect. For another example, in the characteristics and application research of the Cascode type gallium nitride power device, the parasitic inductance and capacitance of the Cascode type GaN circuit are estimated by an actual measurement method, a simulation circuit is built, and the problem of switching oscillation of the Cascode type GaN device is explored. Therefore, there is little research on the oscillation modeling method of the Cascode type GaN bridge converter.
Aiming at the problems that the Cascode type GaN device in the related technology causes larger oscillation under high switching frequency, thereby causing serious voltage overshoot, extra power loss, electromagnetic interference noise, even device breakdown and reducing the reliability of the system, an effective solution is not provided yet.
Disclosure of Invention
The embodiment of the invention provides a high-frequency equivalent circuit, a modeling method of the high-frequency equivalent circuit and a modeling device, which at least solve the technical problems that a Cascode type GaN device in the related technology causes larger oscillation under high switching frequency, so that serious voltage overshoot, extra power loss, electromagnetic interference noise, even device breakdown are caused, and the reliability of a system is reduced.
According to an aspect of an embodiment of the present invention, there is provided a high frequency equivalent circuit including: the power supply comprises an equivalent resistor, an equivalent capacitor, a drain electrode parasitic inductor, a parasitic inductor, an absorption resistor, an absorption capacitor, an upper tube conduction equivalent resistor, a power loop parasitic inductor, a direct current link equivalent series resistor, a power supply, a power loop resistor and a shunt resistor, wherein the equivalent resistor, the equivalent capacitor and the drain electrode parasitic inductor are connected in series and are connected in parallel with an absorption circuit formed by the parasitic inductor, the absorption resistor and the absorption capacitor in series, and then the upper tube conduction equivalent resistor, the power loop parasitic inductor, the direct current link equivalent series resistor, the power supply, the power loop resistor and the shunt resistor are connected in series.
Optionally, the first end of the equivalent resistor is connected to the second end of the drain parasitic inductor, the second end of the equivalent resistor is connected to the first end of the equivalent capacitor, the first end of the drain parasitic inductor is connected to the second end of the upper tube turn-on equivalent resistor, and the second end of the equivalent capacitor is connected to the second end of the shunt resistor.
Optionally, a first end of the parasitic inductor is connected to a line between the drain parasitic inductor and the upper tube conduction equivalent resistor, a second end of the parasitic inductor is connected to a first end of the absorption resistor, a second end of the absorption resistor is connected to a first end of the absorption capacitor, and a second end of the absorption capacitor is connected to a line between the equivalent capacitor and the shunt resistor.
Optionally, the first end of the upper tube on equivalent resistor is connected to the second end of the parasitic inductor of the power loop, the first end of the parasitic inductor of the power loop is connected to the second end of the equivalent series resistor of the dc link, the first end of the equivalent series resistor of the dc link is connected to the first end of the power supply, the second end of the power supply is connected to the first end of the power loop resistor, and the second end of the power loop resistor is connected to the first end of the shunt resistor.
The embodiment of the invention provides a modeling method of a high-frequency equivalent circuit, which is applied to any one of the circuits and comprises the following steps: establishing a high-order switch oscillation circuit model with parasitic parameters, wherein the parasitic parameters at least comprise: internal cascade parasitic parameters of a cascode type gallium nitride device, and half-bridge circuit distribution parameters and absorption circuit parameters in a bridge converter comprising the cascode type gallium nitride device; and extracting key parasitic parameters of the high-order switch oscillation circuit model by using the switch characteristics, and determining a high-frequency equivalent circuit model corresponding to the high-order switch oscillation circuit model in a circuit equivalent transformation mode, wherein the key parasitic parameters are parasitic parameters influencing the switch oscillation of the cascode-connected gallium nitride device.
Optionally, determining a high-frequency equivalent circuit model corresponding to the high-order switching oscillation circuit model in a circuit equivalent transformation manner includes: determining an initial high-frequency equivalent circuit model corresponding to the high-order switch oscillation circuit model; carrying out star delta transformation on the initial high-frequency equivalent circuit model to obtain a transformed initial high-frequency equivalent circuit model, wherein the star delta transformation is used for converting a triangular connection network corresponding to the junction capacitance of a silicon element and high-voltage depletion type gallium nitride in the initial high-frequency equivalent circuit model into a star network; and carrying out network real part and imaginary part separation processing on the transformed initial high-frequency equivalent circuit to obtain a high-frequency equivalent circuit model corresponding to the high-order switch oscillation circuit model.
Optionally, the internal cascade parasitic parameters at least include device junction capacitance, device parasitic inductance, bonding wire parasitic inductance, and bonding wire resistance; the half-bridge circuit distribution parameters at least comprise parasitic inductance of a grid driving loop; the absorption circuit parameters at least comprise equivalent series resistance of a direct current link, power loop resistance, shunt resistance, parasitic inductance of the power loop and parasitic inductance of the absorption circuit.
The embodiment of the invention provides a modeling device of a high-frequency equivalent circuit, which is applied to any one of the circuits and comprises: the device comprises an establishing module, a calculating module and a calculating module, wherein the establishing module is used for establishing a high-order switch oscillation circuit model with parasitic parameters, and the parasitic parameters at least comprise: internal cascade parasitic parameters of a cascode type gallium nitride device, and half-bridge circuit distribution parameters and absorption circuit parameters in a bridge converter comprising the cascode type gallium nitride device; and the processing module is used for extracting key parasitic parameters of the high-order switch oscillation circuit model by utilizing the switch characteristics and determining a high-frequency equivalent circuit model corresponding to the high-order switch oscillation circuit model in a circuit equivalent transformation mode, wherein the key parasitic parameters are parasitic parameters influencing the switch oscillation of the cascode-connected gallium nitride device.
An embodiment of the present invention provides an electronic device, including: a processor; a memory for storing processor-executable instructions; wherein the processor is configured to perform the steps of the method of any of the above.
An embodiment of the present invention provides a computer-readable storage medium, on which instructions are stored, which when executed by a processor implement the steps of the method of any one of the above.
In an embodiment of the present invention, the high frequency equivalent circuit includes: the power supply comprises an equivalent resistor, an equivalent capacitor, a drain electrode parasitic inductor, a parasitic inductor, an absorption resistor, an absorption capacitor, an upper tube conduction equivalent resistor, a power loop parasitic inductor, a direct current link equivalent series resistor, a power supply, a power loop resistor and a shunt resistor, wherein the equivalent resistor, the equivalent capacitor and the drain electrode parasitic inductor are connected in series and are connected in parallel with an absorption circuit formed by the parasitic inductor, the absorption resistor and the absorption capacitor in series, and then the upper tube conduction equivalent resistor, the power loop parasitic inductor, the direct current link equivalent series resistor, the power supply, the power loop resistor and the shunt resistor are connected in series. Therefore, the high-frequency equivalent circuit in the embodiment of the invention can accurately reflect the voltage oscillation of the Cascode type GaN in the bridge converter under the high-frequency condition, can be used for analyzing the voltage oscillation of the Cascode type GaN in the bridge converter at the moment of high-current turn-off, further solves the problems that the Cascode type GaN device in the related technology causes larger oscillation under high switching frequency, thereby causing serious voltage overshoot, extra power loss, electromagnetic interference noise, even device breakdown and reducing the reliability of the system, achieves the technical effects of quantitatively inhibiting the switching oscillation and matching the parameters of inhibiting the oscillation, ensuring the safe and reliable operation of the GaN device and fully playing the high-frequency switching characteristics of the GaN power device.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the invention and together with the description serve to explain the invention without limiting the invention. In the drawings:
FIG. 1 is a schematic diagram of a Cascode type GaN device circuit with parasitic elements according to the present invention;
fig. 2 is a schematic diagram of a high-frequency equivalent circuit according to an embodiment of the present invention;
fig. 3 is a flowchart of a modeling method of a high-frequency equivalent circuit according to an embodiment of the present invention;
FIG. 4 is a diagram of a dual pulse test circuit including parasitic parameters according to an alternative embodiment of the present invention;
FIG. 5 is a schematic diagram illustrating a derivation process of a Cascode-type GaN high-frequency equivalent circuit according to an alternative embodiment of the invention;
FIG. 6 is a comparison of experimental and simulation results provided by an alternative embodiment of the present invention;
fig. 7 is a schematic diagram of a modeling apparatus of a high frequency equivalent circuit according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention will be described in further detail below with reference to the accompanying drawings and examples. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention. In addition, the technical features involved in the embodiments of the present invention described below may be combined with each other as long as they do not conflict with each other.
In order to make the technical solutions of the present invention better understood, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It should be noted that the terms "first", "second", and the like in the description and claims of the present invention and the accompanying drawings are used for distinguishing different objects, and are not used for limiting a specific order.
According to an aspect of the embodiment of the present invention, there is provided a high frequency equivalent circuit, and fig. 2 is a schematic diagram of the high frequency equivalent circuit provided by the embodiment of the present invention, as shown in fig. 2, the high frequency equivalent circuit includes: the power supply circuit comprises an equivalent resistor Req, an equivalent capacitor Ceq, a drain parasitic inductor LD, a parasitic inductor Lsn, an absorption resistor Rsn, an absorption capacitor Csn, an upper tube conduction equivalent resistor RDS (ON), a power loop parasitic inductor Lloop, a direct current link equivalent series resistor RESR, a power supply v (t), a power loop resistor Rloop and a shunt resistor Rsens, wherein the equivalent resistor Req, the equivalent capacitor Ceq and the drain parasitic inductor LD are connected in series, are connected in parallel with an absorption circuit formed by the parasitic inductor Lsn, the absorption resistor Rsn and the absorption capacitor Csn in series, and are connected in series with the upper tube conduction equivalent resistor RDS (ON), the power loop parasitic inductor Lloop, the direct current link equivalent series resistor RESR, the power supply v (t), the power loop resistor Rloop and the shunt resistor.
The high-frequency equivalent circuit described above is equivalent to a circuit generated by a bridge converter based on a Cascode-type GaN device.
It should be noted that the high-frequency equivalent circuit in the embodiment of the present invention can accurately reflect the voltage oscillation of the Cascode GaN switch in the bridge converter under the high-frequency condition, and can be used for analyzing the voltage oscillation of the Cascode GaN in the bridge converter at the time of turning off a large current, so as to solve the problem that the Cascode GaN device in the related art causes a large oscillation at a high switching frequency, thereby causing a serious voltage overshoot, an extra power loss, an electromagnetic interference noise, even a device breakdown, and reducing the reliability of the system, so as to achieve the technical effects of quantitatively suppressing the switch oscillation and matching the parameters of suppressing the oscillation, ensuring the safe and reliable operation of the GaN device, and fully playing the high-frequency switching characteristics of the GaN power device.
In an alternative embodiment, the equivalent resistance R eq First end and drain parasitic inductance L D Is connected to the equivalent resistance R eq Second terminal and equivalent capacitor C eq Is connected with the first end of the drain electrode parasitic inductance L D First end and upper tube turn-on equivalent resistance R DS Is connected to the second terminal of the equivalent capacitor C eq Second terminal and shunt resistor R sens Is connected to the second end of the first housing.
In an alternative embodiment, the parasitic inductance L sn Is connected to the drain parasitic inductance L D Equivalent resistance R connected with upper tube DS On the line therebetween, parasitic inductance L sn Second terminal and absorption resistor R sn Is connected to the first end of the absorption resistor R sn Second terminal and absorption capacitor C sn Is connected to the first terminal of the absorption capacitor C sn Is connected to the equivalent capacitor C eq And a shunt resistor R sens On the line between.
In an alternative embodiment, the upper transistor conduction equivalent resistance R DS(ON) First terminal and power loop parasitic inductance L loop Is connected to the parasitic inductance L of the power loop loop First terminal of (2) and DC link equivalent series resistance R ESR Is connected with the DC link equivalent series resistance R ESR Is connected with a first end of a power supply v (t), a second end of the power supply v (t) is connected with a power loop resistor R loop Is connected to a power loop resistor R loop Second terminal and shunt resistor R sens Is connected to the first end of the first housing.
An embodiment of the present invention provides a modeling method for a high-frequency equivalent circuit, which is applied to a high-frequency equivalent circuit in the foregoing embodiment, and fig. 3 is a flowchart of the modeling method for a high-frequency equivalent circuit provided in the embodiment of the present invention, as shown in fig. 3, the modeling method for a high-frequency equivalent circuit provided in the embodiment of the present invention includes the following steps:
s302, establishing a high-order switch oscillation circuit model with parasitic parameters, wherein the parasitic parameters at least comprise: internal cascade parasitic parameters of the cascade-connected gallium nitride device, and distribution parameters and absorption circuit parameters of a half-bridge circuit in a bridge converter comprising the cascade-connected gallium nitride device;
optionally, a high-order switch oscillation circuit model with parasitic parameters can be established for internal cascade parasitic parameters formed by cascading a low-voltage Si MOSFET and a high-voltage depletion type GaN in a Cascode type GaN device, and parameters of a plurality of distribution parameters of a half-bridge circuit in a bridge converter formed by the device and an RC absorption circuit.
S304, extracting key parasitic parameters of the high-order switch oscillation circuit model by using the switch characteristics, and determining a high-frequency equivalent circuit model corresponding to the high-order switch oscillation circuit model in a circuit equivalent transformation mode, wherein the key parasitic parameters are parasitic parameters influencing the switch oscillation of the cascode-connected gallium nitride device.
Optionally, in a bridge circuit, the lower tube Q b Drain-source voltage V at full turn-off ds Oscillation is most severe, analyzing lower tube Q b High frequency characteristics of the circuit when turned off; upper tube Q to be conducted a Regarded as equivalent resistance R DS(ON) The lower tube which is turned off is equivalent to the junction capacitance of the high-voltage depletion type GaN by using a low-voltage Si MOSFET; in a high-frequency circuit, the impedance of a direct current bus supporting capacitor is far less than the equivalent series resistance R of the direct current bus supporting capacitor ESR Considering only the equivalent series resistance R ESR 。
Optionally, for a high-order switch oscillation circuit model containing parasitic parameters of the internal circuit and the external circuit of the device, key parasitic parameters influencing the switch oscillation of the device are extracted through switch characteristic analysis, and then a circuit equivalent transformation method is applied to realize the equivalence of the high-order circuit model which is difficult to solve by the quantitatively-solvable low-order model.
The key parasitic parameter may be any one or more of an internal cascade parasitic parameter of the cascode-type gallium nitride device, a half-bridge circuit distribution parameter and an absorption circuit parameter in a bridge converter including the cascode-type gallium nitride device.
In the embodiment of the invention, a high-order switch oscillation circuit model with parasitic parameters needs to be established, key parasitic parameters of the high-order switch oscillation circuit model are extracted by utilizing the switching characteristics, a high-frequency equivalent circuit model corresponding to the high-order switch oscillation circuit model is determined in a circuit equivalent transformation mode, a high-frequency equivalent circuit designed according to the high-frequency equivalent circuit model can accurately reflect voltage oscillation of a Cascode type GaN switch in a bridge converter under a high-frequency condition, can be used for voltage oscillation analysis of the Cascode type GaN at a high-current turn-off moment in the bridge converter, and further solves the problems that a Cascode type GaN device in the related technology causes larger oscillation under a high switching frequency, so that serious voltage overshoot, extra power loss, electromagnetic interference noise, even device breakdown are caused, and the reliability of the system is reduced, and the problems that the parameters of quantitatively inhibiting the switch oscillation and matching the oscillation are achieved, The safe and reliable operation of the GaN device is ensured, and the technical effect of the high-frequency switching characteristic of the GaN power device is fully exerted.
It should be noted that, due to the complex structure of the Cascode GaN device, a high-frequency equivalent circuit model needs to be established, and then the high-frequency equivalent circuit model is applied to a high-frequency equivalent circuit. In addition, the high-frequency equivalent circuit model couples the internal parasitic parameters of the device and the external circuit parasitic parameters, is suitable for high-frequency oscillation analysis of the Cascode type GaN device bridge converter, and can be used for determining the optimal RC buffer parameters of the Cascode type GaN device bridge converter.
In an optional implementation manner, determining a high-frequency equivalent circuit model corresponding to the high-order switching oscillation circuit model by means of circuit equivalent transformation includes: determining an initial high-frequency equivalent circuit model corresponding to the high-order switch oscillation circuit model; carrying out star delta transform on the initial high-frequency equivalent circuit model to obtain a transformed initial high-frequency equivalent circuit model, wherein the star delta transform is used for converting a triangular connection network corresponding to a junction capacitor of a silicon element and high-voltage depletion type gallium nitride in the initial high-frequency equivalent circuit model into a star network; and carrying out network real part and imaginary part separation processing on the transformed initial high-frequency equivalent circuit to obtain a high-frequency equivalent circuit model corresponding to the high-order switch oscillation circuit model.
The silicon devices include, but are not limited to, low-voltage Si MOSFETs, etc., and are not described in detail herein.
Alternatively, the delta connection network of junction capacitance of the Si MOSFET and the high-voltage depletion mode GaN can be changed by two star delta conversionsIs a star network; and the complex impedance network is equivalent to contain parasitic inductance L by a method of separating the real part and the imaginary part of the network D Resistance R eq And a capacitor C eq The high-order switch oscillation circuit model with the parasitic parameters is equivalent to a high-frequency equivalent circuit model with a quantitatively solvable low order.
In an alternative embodiment, the internal cascade parasitic parameters include at least device junction capacitance, device parasitic inductance, bonding wire parasitic inductance, and bonding wire resistance; the half-bridge circuit distribution parameters at least comprise parasitic inductance of a grid driving loop; the absorption circuit parameters at least comprise equivalent series resistance of a direct current link, power loop resistance, shunt resistance, parasitic inductance of the power loop and parasitic inductance of the absorption circuit.
Optionally, the internal cascade parasitic parameter includes, but is not limited to, device junction capacitance C GD-Si 、C GS-Si 、C DS-Si 、C GD-GaN 、C GSGaN 、C DS-GaN Parasitic inductance L of the device G 、L D 、L S Parasitic inductance L of bonding wire int1 、L int2 、L int3 Bonding wire resistance R int2 、R int3 (ii) a The half-bridge circuit distribution parameter includes, but is not limited to, the gate drive loop parasitic inductance L Ge (ii) a The absorption circuit parameter, also called external circuit parasitic parameter, includes but is not limited to dc link equivalent series resistance R ESR Power loop resistance R loop Shunt resistance R sens Parasitic inductance L of power loop P 、L n And absorption circuit parasitic inductance L sn Is coupled.
An alternative embodiment of the invention is illustrated below.
In order to solve the above technical problem, an alternative embodiment of the present invention provides a high-frequency equivalent circuit model of a bridge converter based on a Cascode GaN device and a modeling method thereof. Aiming at the complexity of the complex structure of the Cascode type GaN device and the coupling of a plurality of parasitic parameters, main parameters are extracted through the analysis of switch characteristics, and the equivalent circuit conversion is simplified into a high-frequency equivalent circuit model with a low order and capable of being solved quantitatively.
Since the oscillation mechanism of the Cascode GaN bridge converter is the same as that found in the double pulse test, the oscillation of the Cascode GaN device is studied by the double pulse test, fig. 4 is a circuit diagram of the double pulse test including parasitic parameters according to an alternative embodiment of the present invention, as shown in fig. 4, a high frequency equivalent circuit model is built by the circuit, and the Q-factor is studied with emphasis b On-off Q b Voltage V of drain and source DS The oscillation of (2), which is most severe.
Firstly, a bridge circuit lower tube Q is arranged b Is an ideal switch that is completely closed and all parasitic elements are considered external elements. Then analyzing Q b High frequency characteristics of the circuit at shutdown: 1) once Q is turned on b Turn-off, commutation of current occurs, with current in inductor L vs Q a Charging of the output capacitor, V GD Increase, beyond threshold voltage, Q a Conduction is started. Q operating in the active region at this time a In the high frequency equivalent circuit, it can be regarded as the on-resistance R DS(ON) (ii) a 2) Off-state lower tube Q b Carrying out equivalence on junction capacitance of a Si MOSFET and high-voltage depletion type GaN; 3) the high-frequency impedance of the DC bus supporting capacitor is far less than the equivalent series resistance R of the DC bus supporting capacitor ESR Considering only R in a high frequency circuit ESR 。
Fig. 5 is a schematic diagram showing a derivation process of a Cascode-type GaN high-frequency equivalent circuit according to an alternative embodiment of the present invention, and fig. 5 shows a high-frequency equivalent circuit obtained based on the above-mentioned high-frequency characteristic analysis as shown in (a) of fig. 5.
Then through the formula
C is to be GD-Si 、C GS-Si And C DS-Si Is changed into a star connection and is represented by the formula L G′ ＝L G +L Ge 、L loop ＝L p +L n +L D +L S The simplified circuit is shown in fig. 5 (b).
C is represented by the following formula GD-GaN 、C GS-GaN And C DS-GaN The delta connection around the center node B is changed to a star connection, resulting in the circuit shown in (c) of fig. 5.
In the above equation, ω OFF In the formula, s ═ j ω OFF Is the resonant frequency of the turn-off transient loop.
Z AB 、Z AC And Z BC Are the impedances between nodes a and B, A and C and B and C, respectively. Similarly, the equivalent impedance is derived by a delta-star transformation. Z AB 、Z AC And Z BC Each can be obtained by the following formula.
Z AB ＝sL int1 +Z CD_Si +Z CS_GaN
Z BC ＝sL int2 +Z CG_GaN +R int2
Z AC ＝sL int3 +Z CS_Si +R int3
Z shown in (c) in FIG. 5 A 、Z B And Z C Can be obtained by the following formula.
Z G ＝R G +s(L G +L Ge )+Z CG_Si +Z A
In (d) of FIG. 5, the bridge circuit lower tube Q b Is converted into three impedances Z O 、Z B 、Z CD_GaN And L S Are connected in series. By extracting the real and imaginary parts of the impedance, Q is made b Equivalent is resistance and electric capacity, and its equivalent resistance and electric capacity are:
R eq ＝Re(Z B +Z O +Z CD_GaN )
fig. 5 (d) shows the high-frequency oscillation equivalent circuit of the final Cascode GaN bridge converter.
To verify the above-described embodiment of the present invention, a double pulse test experiment was performed on a bridge circuit based on Cascode type GaN, and the device under test was TP65H035WS (650V Cascode type GaN device) manufactured by Transphorm, the gate driver was Si8273AB-IS1 manufactured by Silicon Lab, the current shunt was 0.1 Ω SSDN-414, the bandwidth was 2GHz, the voltage probe was TPP1000, and the bandwidth was 1 GHz.
The accuracy of the proposed high-frequency equivalent circuit model is verified. Model predicted V without adding RC absorption circuit ds And I ds The oscillations were compared to the experimental results. FIG. 6 is a comparison of experimental and simulation results provided by an alternative embodiment of the present invention, as shown in FIG. 6, (a) is V ds Vibration of corresponding experimental and simulation resultsAn oscillating waveform, (b) is I ds The corresponding oscillation waveform of the experiment and simulation result can show the actually measured V ds And I ds The oscillating waveform substantially coincides with the predicted oscillating waveform. Therefore, the model has higher precision.
An embodiment of the present invention provides a modeling apparatus for a high-frequency equivalent circuit, which is applied to the high-frequency equivalent circuit in the above-mentioned embodiment, and fig. 7 is a schematic diagram of the modeling apparatus for a high-frequency equivalent circuit according to the embodiment of the present invention, and as shown in fig. 7, the modeling apparatus for a high-frequency equivalent circuit includes: a setup module 72 and a processing module 74. The following describes the modeling apparatus of the high frequency equivalent circuit in detail.
An establishing module 72, configured to establish a high-order switching oscillation circuit model with parasitic parameters, where the parasitic parameters at least include: internal cascade parasitic parameters of the cascade-connected gallium nitride device, and distribution parameters and absorption circuit parameters of a half-bridge circuit in a bridge converter comprising the cascade-connected gallium nitride device; and the processing module 74 is connected to the establishing module 72, and is configured to extract a key parasitic parameter of the high-order switching oscillation circuit model by using the switching characteristic, and determine a high-frequency equivalent circuit model corresponding to the high-order switching oscillation circuit model by using a circuit equivalent transformation manner, where the key parasitic parameter is a parasitic parameter affecting switching oscillation of the cascode-connected gallium nitride device.
In the above embodiment, the modeling apparatus of the high-frequency equivalent circuit may establish a high-order switch oscillation circuit model with parasitic parameters, extract key parasitic parameters of the high-order switch oscillation circuit model by using switching characteristics, and determine the high-frequency equivalent circuit model corresponding to the high-order switch oscillation circuit model by means of circuit equivalent transformation, the high-frequency equivalent circuit designed according to the high-frequency equivalent circuit model can accurately reflect voltage oscillation when Cascode GaN switches in the bridge converter under high-frequency conditions, and can be used for voltage oscillation analysis of Cascode GaN in the bridge converter at the moment of high-current turn-off, thereby solving the problem that Cascode GaN devices in the related art cause large oscillation at high switching frequency, thereby causing serious voltage overshoot, extra power loss, electromagnetic interference noise, even device breakdown, and reducing system reliability, the technical effects of quantitatively inhibiting the parameters of the switch oscillation and matching the parameters of the switch oscillation are achieved, the safe and reliable operation of the GaN power device is ensured, and the high-frequency switch characteristic of the GaN power device is fully exerted.
It should be noted here that the above-mentioned creating module 72 and the processing module 74 correspond to steps S302 to S304 in the method embodiment, and the above-mentioned modules are the same as the examples and application scenarios realized by the corresponding steps, but are not limited to the disclosure of the above-mentioned method embodiment.
Optionally, the processing module 74 includes: the determining unit is used for determining an initial high-frequency equivalent circuit model corresponding to the high-order switch oscillation circuit model; the transformation unit is used for carrying out star delta transformation on the initial high-frequency equivalent circuit model to obtain a transformed initial high-frequency equivalent circuit model, wherein the star delta transformation is used for transforming a triangular connection network corresponding to a silicon element and a junction capacitor of high-voltage depletion type gallium nitride in the initial high-frequency equivalent circuit model into a star network; and the processing unit is used for carrying out network real part and imaginary part separation processing on the transformed initial high-frequency equivalent circuit to obtain a high-frequency equivalent circuit model corresponding to the high-order switch oscillation circuit model.
Optionally, the internal cascade parasitic parameters at least include a device junction capacitance, a device parasitic inductance, a bonding wire parasitic inductance, and a bonding wire resistance; the half-bridge circuit distribution parameters at least comprise parasitic inductance of a grid driving loop; the absorption circuit parameters at least comprise equivalent series resistance of a direct current link, power loop resistance, shunt resistance, parasitic inductance of the power loop and parasitic inductance of the absorption circuit.
An embodiment of the present invention provides an electronic device, including: a processor; a memory for storing processor-executable instructions; wherein the processor is configured to perform the steps of the method of any of the above.
The embodiment of the invention provides electronic equipment, which comprises a processor, a memory and a program which is stored on the memory and can run on the processor, wherein the processor executes the program and realizes the following steps: establishing a high-order switch oscillation circuit model with parasitic parameters, wherein the parasitic parameters at least comprise: internal cascade parasitic parameters of the cascade-connected gallium nitride device, and distribution parameters and absorption circuit parameters of a half-bridge circuit in a bridge converter comprising the cascade-connected gallium nitride device; and extracting key parasitic parameters of the high-order switch oscillation circuit model by utilizing the switch characteristics, and determining a high-frequency equivalent circuit model corresponding to the high-order switch oscillation circuit model in a circuit equivalent transformation mode, wherein the key parasitic parameters are parasitic parameters influencing the switch oscillation of the cascode-type gallium nitride device.
Optionally, determining a high-frequency equivalent circuit model corresponding to the high-order switching oscillation circuit model in a circuit equivalent transformation manner includes: determining an initial high-frequency equivalent circuit model corresponding to the high-order switch oscillation circuit model; carrying out star delta transform on the initial high-frequency equivalent circuit model to obtain a transformed initial high-frequency equivalent circuit model, wherein the star delta transform is used for converting a triangular connection network corresponding to a junction capacitor of a silicon element and high-voltage depletion type gallium nitride in the initial high-frequency equivalent circuit model into a star network; and carrying out network real part and imaginary part separation processing on the transformed initial high-frequency equivalent circuit to obtain a high-frequency equivalent circuit model corresponding to the high-order switch oscillation circuit model.
Optionally, the internal cascade parasitic parameters at least include a device junction capacitance, a device parasitic inductance, a bonding wire parasitic inductance, and a bonding wire resistance; the half-bridge circuit distribution parameters at least comprise parasitic inductance of a grid driving loop; the absorption circuit parameters at least comprise equivalent series resistance of a direct current link, power loop resistance, shunt resistance, parasitic inductance of the power loop and parasitic inductance of the absorption circuit.
Embodiments of the present invention provide a computer-readable storage medium having stored thereon instructions which, when executed by a processor, implement the steps of the method of any one of the above.
Optionally, in this embodiment, the computer-readable storage medium may be located in any one of a group of computer terminals in a computer network and/or in any one of a group of mobile terminals, and the computer-readable storage medium includes a stored program.
Optionally, the program when executed controls an apparatus in which the computer-readable storage medium is located to perform the following functions: establishing a high-order switch oscillation circuit model with parasitic parameters, wherein the parasitic parameters at least comprise: internal cascade parasitic parameters of the cascade-connected gallium nitride device, and distribution parameters and absorption circuit parameters of a half-bridge circuit in a bridge converter comprising the cascade-connected gallium nitride device; and extracting key parasitic parameters of the high-order switch oscillation circuit model by utilizing the switch characteristics, and determining a high-frequency equivalent circuit model corresponding to the high-order switch oscillation circuit model in a circuit equivalent transformation mode, wherein the key parasitic parameters are parasitic parameters influencing the switch oscillation of the cascode-type gallium nitride device.
Optionally, determining a high-frequency equivalent circuit model corresponding to the high-order switching oscillation circuit model in a circuit equivalent transformation manner includes: determining an initial high-frequency equivalent circuit model corresponding to the high-order switch oscillation circuit model; carrying out star delta transform on the initial high-frequency equivalent circuit model to obtain a transformed initial high-frequency equivalent circuit model, wherein the star delta transform is used for converting a triangular connection network corresponding to a junction capacitor of a silicon element and high-voltage depletion type gallium nitride in the initial high-frequency equivalent circuit model into a star network; and carrying out network real part and imaginary part separation processing on the transformed initial high-frequency equivalent circuit to obtain a high-frequency equivalent circuit model corresponding to the high-order switch oscillation circuit model.
Optionally, the internal cascade parasitic parameters at least include a device junction capacitance, a device parasitic inductance, a bonding wire parasitic inductance, and a bonding wire resistance; the half-bridge circuit distribution parameters at least comprise parasitic inductance of a grid driving loop; the absorption circuit parameters at least comprise equivalent series resistance of a direct current link, power loop resistance, shunt resistance, parasitic inductance of the power loop and parasitic inductance of the absorption circuit.
The above description is only a preferred embodiment of the present invention, and is not intended to limit the scope of the present invention.
Claims (10)
1. A high frequency equivalent circuit, comprising: the power supply comprises an equivalent resistor, an equivalent capacitor, a drain electrode parasitic inductor, a parasitic inductor, an absorption resistor, an absorption capacitor, an upper tube conduction equivalent resistor, a power loop parasitic inductor, a direct current link equivalent series resistor, a power supply, a power loop resistor and a shunt resistor, wherein the equivalent resistor, the equivalent capacitor and the drain electrode parasitic inductor are connected in series and are connected in parallel with an absorption circuit formed by the parasitic inductor, the absorption resistor and the absorption capacitor in series, and then the upper tube conduction equivalent resistor, the power loop parasitic inductor, the direct current link equivalent series resistor, the power supply, the power loop resistor and the shunt resistor are connected in series.
2. The circuit of claim 1, wherein a first terminal of the equivalent resistor is connected to a second terminal of the parasitic drain inductor, a second terminal of the equivalent resistor is connected to a first terminal of the equivalent capacitor, a first terminal of the parasitic drain inductor is connected to a second terminal of the upper transistor turn-on equivalent resistor, and a second terminal of the equivalent capacitor is connected to a second terminal of the shunt resistor.
3. The circuit of claim 1, wherein a first terminal of the parasitic inductor is connected to a line between the parasitic drain inductor and the upper tube on-resistance equivalent resistor, a second terminal of the parasitic inductor is connected to a first terminal of the absorption resistor, a second terminal of the absorption resistor is connected to a first terminal of the absorption capacitor, and a second terminal of the absorption capacitor is connected to a line between the equivalent capacitor and the shunt resistor.
4. The circuit of claim 1, wherein a first end of the upper tube conduction equivalent resistor is connected to a second end of the parasitic inductor of the power loop, a first end of the parasitic inductor of the power loop is connected to a second end of the equivalent series resistor of the dc link, a first end of the equivalent series resistor of the dc link is connected to a first end of the power source, a second end of the power source is connected to a first end of the power loop resistor, and a second end of the power loop resistor is connected to a first end of the shunt resistor.
5. A modeling method of a high frequency equivalent circuit applied to the circuit of any one of claims 1 to 4, comprising:
establishing a high-order switch oscillation circuit model with parasitic parameters, wherein the parasitic parameters at least comprise: internal cascade parasitic parameters of a cascode type gallium nitride device, and half-bridge circuit distribution parameters and absorption circuit parameters in a bridge converter comprising the cascode type gallium nitride device;
and extracting key parasitic parameters of the high-order switch oscillation circuit model by using the switch characteristics, and determining a high-frequency equivalent circuit model corresponding to the high-order switch oscillation circuit model in a circuit equivalent transformation mode, wherein the key parasitic parameters are parasitic parameters influencing the switch oscillation of the cascode-connected gallium nitride device.
6. The method of claim 5, wherein determining the high-frequency equivalent circuit model corresponding to the high-order switching oscillation circuit model by means of circuit equivalent transformation comprises:
determining an initial high-frequency equivalent circuit model corresponding to the high-order switch oscillation circuit model;
carrying out star delta transform on the initial high-frequency equivalent circuit model to obtain a transformed initial high-frequency equivalent circuit model, wherein the star delta transform is used for converting a triangular connection network corresponding to junction capacitors of a silicon element and high-voltage depletion type gallium nitride in the initial high-frequency equivalent circuit model into a star network;
and carrying out network real part and imaginary part separation processing on the transformed initial high-frequency equivalent circuit to obtain a high-frequency equivalent circuit model corresponding to the high-order switch oscillation circuit model.
7. The method of claim 5,
the internal cascade parasitic parameters at least comprise device junction capacitance, device parasitic inductance, bonding lead parasitic inductance and bonding lead resistance;
the half-bridge circuit distribution parameters at least comprise parasitic inductance of a grid driving loop;
the absorption circuit parameters at least comprise equivalent series resistance of a direct current link, power loop resistance, shunt resistance, parasitic inductance of the power loop and parasitic inductance of the absorption circuit.
8. A modeling apparatus of a high frequency equivalent circuit applied to the circuit according to any one of claims 1 to 4, comprising:
the device comprises an establishing module, a calculating module and a calculating module, wherein the establishing module is used for establishing a high-order switch oscillation circuit model with parasitic parameters, and the parasitic parameters at least comprise: internal cascade parasitic parameters of a cascode type gallium nitride device, and half-bridge circuit distribution parameters and absorption circuit parameters in a bridge converter comprising the cascode type gallium nitride device;
and the processing module is used for extracting key parasitic parameters of the high-order switch oscillation circuit model by utilizing the switch characteristics and determining a high-frequency equivalent circuit model corresponding to the high-order switch oscillation circuit model in a circuit equivalent transformation mode, wherein the key parasitic parameters are parasitic parameters influencing the switch oscillation of the cascode-connected gallium nitride device.
9. An electronic device, comprising:
a processor;
a memory for storing processor-executable instructions;
wherein the processor is configured to perform the steps of the method of any one of claims 5 to 7.
10. A computer readable storage medium having instructions stored thereon, wherein the instructions, when executed by a processor, implement the steps of the method of any of claims 5 to 7.
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| CN115021525A (en) * | 2022-08-10 | 2022-09-06 | 山东大学 | Multi-active-bridge converter transient oscillation suppression method and circuit considering parasitic parameters |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN115021525A (en) * | 2022-08-10 | 2022-09-06 | 山东大学 | Multi-active-bridge converter transient oscillation suppression method and circuit considering parasitic parameters |
| CN116131581A (en) * | 2023-04-17 | 2023-05-16 | 湖南大学 | Power module and method for integrating oscillation suppression circuit |
| CN117572088A (en) * | 2023-10-30 | 2024-02-20 | 北京天兵科技有限公司 | Method, device, medium and equipment for calculating natural frequency of liquid oxygen delivery system |
| CN117313623A (en) * | 2023-11-22 | 2023-12-29 | 长鹰恒容电磁科技(成都)有限公司 | Power device electromagnetic interference characteristic parameter determining method based on RC absorption loop |
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