CN114816307B - Multi-screen display method and device, electronic equipment and computer readable storage medium - Google Patents
Multi-screen display method and device, electronic equipment and computer readable storage medium Download PDFInfo
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- G06F3/14—Digital output to display device ; Cooperation and interconnection of the display device with other functional units
- G06F3/1423—Digital output to display device ; Cooperation and interconnection of the display device with other functional units controlling a plurality of local displays, e.g. CRT and flat panel display
- G06F3/1438—Digital output to display device ; Cooperation and interconnection of the display device with other functional units controlling a plurality of local displays, e.g. CRT and flat panel display using more than one graphics controller
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Abstract
The embodiment of the invention discloses a multi-screen display method and device, electronic equipment and a computer readable storage medium. The method comprises the following steps: receiving a wake-up instruction of the multi-synchronous DPU, and waking up the multi-synchronous DPU; setting a path selection strategy, a picture processing strategy, a picture reading strategy and a picture display strategy of the multi-synchronization DPU according to a preset bootstrap program; reading a picture to be displayed according to a picture reading strategy, and processing the picture to be displayed according to a picture processing strategy; and determining a multi-screen display channel of the processed picture according to the path selection strategy, inputting the processed picture into display equipment connected with each multiplexer through each multiplexer, and performing multi-screen display according to the picture display strategy. According to the method, the complexity of codes required by multi-screen display is reduced, and meanwhile, each display device is not required to be provided with an independent display control unit, so that the cost of multi-screen display is reduced.
Description
Technical Field
The present invention relates to the field of display technologies, and in particular, to a method and an apparatus for multi-screen display, an electronic device, and a computer-readable storage medium.
Background
Currently, there is a general need for multi-screen display in a single chip solution that supports multi-screen display. For example, when a system in which multiple-screen displays are located is in cold start, if each display device needs to quickly display a boot screen, it is necessary to consider that control over a complex display device is implemented before an operating system is started, or to optimize the start of the operating system, so as to advance initialization of a driver of each display device.
Disclosure of Invention
The embodiment of the invention provides a multi-screen display method and device, electronic equipment and a computer readable storage medium, which are used for solving the technical problems of high code complexity, large software workload and higher cost in the process of realizing multi-screen display in the prior art.
In a first aspect, an embodiment of the present invention provides a multi-screen display method, which is applied to a system on chip, where the system on chip includes a multiple synchronous DPU, the multiple synchronous DPU is connected to a multiplexer, and each display device is connected to one multiplexer through a corresponding interface; the method comprises the following steps:
receiving a wake-up instruction of the multi-synchronous DPU, and waking up the multi-synchronous DPU;
setting a path selection strategy, a picture processing strategy, a picture reading strategy and a picture display strategy of the multi-synchronization DPU according to a preset bootstrap;
reading a picture to be displayed according to the picture reading strategy, and processing the picture to be displayed according to the picture processing strategy to obtain a processed picture;
and determining a multi-screen display channel of the processed picture according to the path selection strategy, inputting the processed picture into the display equipment connected with each multiplexer through the multiplexers, and performing multi-screen display according to the picture display strategy.
In a second aspect, an embodiment of the present invention provides a multi-display apparatus, which is disposed in a system on chip, where the system on chip includes a multiple synchronous DPU, the multiple synchronous DPU is connected to a multiplexer, and each display device is connected to one multiplexer through a corresponding interface; the multi-screen display device comprises:
a first receiving unit, configured to receive a wake-up instruction of the multi-synchronous DPU, and wake up the multi-synchronous DPU;
the device comprises a first setting unit, a second setting unit and a control unit, wherein the first setting unit is used for setting a path selection strategy, a picture processing strategy, a picture reading strategy and a picture display strategy of the multi-synchronization DPU according to a preset bootstrap program;
the processing unit is used for reading the picture to be displayed according to the picture reading strategy and processing the picture to be displayed according to the picture processing strategy to obtain a processed picture;
and the multi-screen display unit is used for determining a multi-screen display channel of the processed picture according to the path selection strategy, inputting the processed picture into the display equipment connected with each multiplexer through the multiplexers, and performing multi-screen display according to the picture display strategy.
In a third aspect, an embodiment of the present invention further provides an electronic device, which includes a memory, a processor, and a computer program stored in the memory and executable on the processor, where the processor executes the computer program to implement the multi-screen display method according to the first aspect.
In a fourth aspect, an embodiment of the present invention further provides a computer-readable storage medium, where the computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the processor is caused to execute the method for multi-screen display according to the first aspect.
The embodiment of the invention provides a multi-screen display method and device, electronic equipment and a computer readable storage medium. The method comprises the steps of awakening a multi-synchronization DPU, and setting a path selection strategy, a picture processing strategy, a picture reading strategy and a picture display strategy of the multi-synchronization DPU according to a bootstrap program; after a path selection strategy, a picture processing strategy, a picture reading strategy and a picture display strategy of a multi-synchronous DPU are completed, a picture to be displayed is read according to the picture reading strategy, and the picture to be displayed is processed according to the picture processing strategy to obtain a processed picture; and simultaneously determining a multi-screen display channel of the processed picture according to a path selection strategy, inputting the processed picture into each display device through a multi-path selector, and performing multi-screen display according to the picture display strategy. The multi-synchronous DPUs are added to the system on chip, and each display device is connected with the multi-synchronous DPUs only through the multi-path selector and the display device interface, so that when the multi-synchronous DPUs are awakened, the multi-screen display of the pictures is realized only by setting the path selection strategy, the picture processing strategy, the picture reading strategy and the picture display strategy of the multi-synchronous DPUs according to the bootstrap program, the complexity of codes required by the multi-screen display is reduced, and meanwhile, each display device is not required to be provided with an independent display control unit, so that the cost of the multi-screen display is reduced.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a flowchart illustrating a multi-screen display method according to an embodiment of the present invention;
FIG. 2 is a flowchart illustrating a multi-screen displaying method according to an embodiment of the present invention;
FIG. 3 is a flowchart illustrating a multi-screen displaying method according to an embodiment of the present invention;
FIG. 4 is a flowchart illustrating a multi-screen displaying method according to an embodiment of the present invention;
FIG. 5 is a schematic block diagram of a multi-screen display apparatus provided by an embodiment of the present invention;
fig. 6 is a schematic block diagram of an electronic device provided in an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be obtained by a person skilled in the art without making any creative effort based on the embodiments in the present invention, belong to the protection scope of the present invention.
It will be understood that the terms "comprises" and/or "comprising," when used in this specification and the appended claims, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
It is also to be understood that the terminology used in the description of the invention herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used in the specification of the present invention and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.
It should be further understood that the term "and/or" as used in this specification and the appended claims refers to and includes any and all possible combinations of one or more of the associated listed items.
The multi-screen display method is applied to a System-on-a-chip (SOC), the SOC comprises a multi-synchronous DPU, the multi-synchronous DPU is connected with a multiplexer, the multi-synchronous DPU can be connected with a plurality of multiplexers, and each multiplexer connected with the multi-synchronous DPU is connected with a display device and is connected with the display device through an interface of the display device. After waking up the multiple synchronous DPUs, the multiple synchronous DPUs can be set through a boot sequence, so that a Direct Memory Access (DMA) in the multiple synchronous DPUs reads videos or pictures for display, and the read videos or pictures are input into each display device through a multiplexer, thereby not only reducing the complexity of codes required for realizing multiple-screen display, but also avoiding the need of providing an independent display control unit for each display device, and further reducing the cost of multiple-screen display. In the above embodiment, the multi-screen display method is applied to a scene of a vehicle-mounted device, the electronic device is a vehicle equipped with an on-chip system, and a multi-screen display implementation vehicle is taken as an example for explanation, but the invention is not limited thereto.
It should be noted that the application scenario of the foregoing embodiment is only an example, and the service and scenario described in the embodiment of the present invention are for more clearly illustrating the technical solution of the embodiment of the present application, and do not constitute a limitation to the technical solution provided in the embodiment of the present application, and it is known by a person of ordinary skill in the art that the technical solution provided in the embodiment of the present application is also applicable to similar technical problems with the evolution of a system and the occurrence of a new service scenario. The following are detailed descriptions. It should be noted that the following description of the embodiments is not intended to limit the preferred order of the embodiments.
The multi-screen display method will be described in detail below.
Referring to fig. 1, fig. 1 is a flowchart illustrating a multi-screen display method according to an embodiment of the invention. As shown in FIG. 1, the method includes the following steps S110 to S140.
And S110, receiving a wake-up instruction of the multi-synchronization DPU, and waking up the multi-synchronization DPU.
Specifically, the multiple synchronous DPUs (syncmulti DPUs) are processors for implementing multi-screen display of the system on chip, and when the system on chip is powered on from an off state to enter an operating state to implement cold start, the system on chip receives a wake-up instruction of the multiple synchronous DPUs, and according to the wake-up instruction, the multiple synchronous DPUs in the system on chip can be woken up, so that multi-screen display is implemented through the multiple synchronous DPUs.
In another embodiment, before step S110, the method further includes the steps of: and receiving instruction information of the system on chip for entering cold start from the power-on state, and acquiring the preset bootstrap program.
Specifically, when the soc is powered on from a shutdown state to a working state to realize cold start, a boot loader (BootLoader) is loaded from a memory, and frequency configuration, board level configuration, DDR initialization, and the like are completed through the boot loader to realize cold start of the soc.
And S120, setting a path selection strategy, a picture processing strategy, a picture reading strategy and a picture display strategy of the multi-synchronization DPU according to a preset bootstrap program.
Specifically, after waking up the multi-synchronous DPU, the boot program may perform corresponding configuration on the multi-synchronous DPU, so that the multi-synchronous DPU may read and process the picture to be subjected to multi-screen display from the memory, and then implement multi-screen display of the picture. The Path selection policy (Path select policy) is a scheme of a channel through which the multi-synchronization DPU performs multi-screen display on the read and processed picture, the picture processing policy is a scheme through which the multi-synchronization DPU performs corresponding processing on the read picture, the picture reading policy is a scheme through which the multi-synchronization DPU reads the picture from the memory, and the picture display policy is a scheme through which the multi-synchronization DPU displays the processed picture in each display device. Meanwhile, in the process of configuring the path selection strategy, the picture processing strategy, the picture reading strategy and the picture display strategy of the multi-synchronization DPUs, the bootstrap program has the functions of configuring the path selection strategy, the picture processing strategy, the picture reading strategy and the picture display strategy of the multi-synchronization DPUs.
The path selection strategy can be selectively multi-screen display in the set display equipment, and can also be multi-screen display in all the display equipment. For example, if there are six display devices in the system on chip, the routing policy of the multi-synchronization DPU may be to enable only the first display device, the third display device, and the sixth display device to perform multi-screen display.
In another embodiment, as shown in fig. 2, step S120 includes sub-steps S121 and S122.
S121, acquiring configuration information of each display device, and setting the path selection strategy through the bootstrap program;
and S122, acquiring screen parameters of each display device, and setting the picture processing strategy through the bootstrap program.
In this embodiment, the configuration information includes attribute information of the display device itself, and interaction information and connection information with the system on chip, for example, information such as location information, location path, dependency access interface, and the like of the display device, and the screen parameters include information such as resolution, format, and the like of the display device. After the configuration information of each display device is acquired, a connection channel between each display device and the multi-synchronous DPU can be acquired, the path selection strategy of the multi-synchronous DPU is configured correspondingly through the bootstrap program, and then the read video or picture is input into each display device, so that multi-screen display is achieved. And meanwhile, the bootstrap program configures the picture processing strategy of the multi-synchronization DPU according to the screen parameters of each display device, so that the multi-synchronization DPU can process the read video or picture, and the picture or video displayed in each display device is matched with the corresponding display device.
S130, reading the picture to be displayed according to the picture reading strategy, and processing the picture to be displayed according to the picture processing strategy to obtain a processed picture.
Specifically, the image reading policy includes a loop reading policy, a continuous reading policy, a selective reading policy, and the like. After the boot program completes corresponding configuration of the multiple synchronous DPUs, videos or pictures for multi-screen display are directly read from a memory through a DMA of the multiple synchronous DPUs, and meanwhile, in the process of reading the videos or the pictures from the DMA memory, a picture reading strategy is adopted to read the videos or the pictures, so that the picture or the video is played in each display device before the system on chip finishes cold start, wherein when the DMA reads the corresponding videos from the memory, the videos are read in a mode of continuously reading images of each frame of the video, and the pictures are read, if a series of pictures need to be played in the display device, each picture in the picture sequence is continuously read; and if only one picture needs to be played in the display equipment, circularly reading the picture.
S140, determining a multi-screen display channel of the processed picture according to the path selection strategy, inputting the processed picture into the display equipment connected with each multiplexer through the multiplexers, and performing multi-screen display according to the picture display strategy.
In this embodiment, the picture display policy includes synchronous display and alternate display in sequence by taking a frame as a unit, the system on chip is connected with six display devices, each display device is connected with the multiple synchronous DPUs through a single multiplexer, the connection between each display device and the multiple synchronous DPUs is a channel, wherein the four display devices are connected with one multiplexer through a dp (display port) interface, and the other two display devices are connected with one multiplexer through a dsi (display Serial interface) interface. After the multi-screen display channel of the processed picture is determined through the path selection strategy, the processed picture can be input into each display device through the multiplexer, and can be synchronously displayed in each display device or sequentially displayed in turn by taking a frame as a unit.
In another embodiment, as shown in fig. 3, after step S140, steps S150 and S160 are further included.
And S150, receiving awakening instructions of the at least two DPUs, and awakening the at least two DPUs.
And S160, cutting off a channel between each multiplexer and the multi-synchronous DPU, and opening a channel between each DPU and each multiplexer to finish cold start of the system on chip.
In this embodiment, the system on chip further includes a first DPU, a second DPU, a third DPU, and a fourth DPU, where the first DPU and the second DPU are each connected to a separate multiplexer, the third DPU and the fourth DPU are each connected to two separate multiplexers, each multiplexer is connected to a separate display device, the four display devices are connected to one multiplexer through a dp (display port) interface, the other two display devices are connected to one multiplexer through a dsi (display Serial interface) interface, and the multiple synchronous DPU is connected to each multiplexer. After each display device completes multi-screen synchronous display, only the connecting channels between the multi-synchronous DPUs and each multiplexer are needed to be disabled, the first DPU, the second DPU, the third DPU and the fourth DPU are simultaneously started, and the control right of the multi-synchronous DPUs on multi-screen display of the display device can be taken over through the connecting channels between the first DPU, the second DPU and the multiplexers, so that the whole vehicle-mounted system enters a normal working mode.
In another embodiment, as shown in fig. 4, step S160 includes sub-steps S161 and S162.
S161, controlling each multiplexer and outputting a switching signal to a multi-path switch;
and S162, cutting off a channel between the multi-synchronous DPU and each multiplexer according to the multi-way switch, and cutting off a channel for reading pictures by the multi-synchronous DPU.
In this embodiment, a single or common multiplexer is connected between each multiplexer, and the multiplexer is also connected to the multiple synchronous DPUs. After waking up the rest DPUs in the system on chip, each multiplexer can be controlled to execute the switching action, and the switching signals are output to the multi-way switches, so that the connecting channels between the multi-synchronous DPUs and each multiplexer are closed through the multi-way switches, meanwhile, the connecting channels between the multi-way switches and the rest DPUs are opened, and the switching between the multi-synchronous DPUs and the rest DPUs in the system on chip is realized. Meanwhile, in order to prevent the multi-synchronization DPUs from continuously reading the pictures or videos in the memory, the multi-way switch needs to close the operation of reading the videos or pictures of the multi-synchronization DPUs, so that the whole vehicle-mounted system enters a normal working mode.
In the multi-screen display method provided by the embodiment of the invention, the multi-synchronization DPUs are awakened by receiving the awakening instruction of the multi-synchronization DPUs; setting a path selection strategy, a picture processing strategy, a picture reading strategy and a picture display strategy of the multi-synchronization DPU according to a preset bootstrap; reading a picture to be displayed according to the picture reading strategy, and processing the picture to be displayed according to the picture processing strategy to obtain a processed picture; and determining a multi-screen display channel of the processed picture according to the path selection strategy, inputting the processed picture into the display equipment connected with each multiplexer through the multiplexers, and performing multi-screen display according to the picture display strategy. The invention only needs to add one multi-synchronous DPU in the system on chip, and simultaneously, each display device is only connected with the multi-synchronous DPU through the interface of the multi-path selector and the display device, when the multi-synchronous DPU is awakened, the multi-synchronous DPU only needs to be set according to the path selection strategy, the picture processing strategy, the picture reading strategy and the picture display strategy of the multi-synchronous DPU to realize the multi-screen display of the pictures, thereby not only reducing the complexity of codes required by the multi-screen display, but also not needing to arrange an independent display control unit for each display device, and reducing the cost.
The embodiment of the invention also provides a multi-screen display device 100, which is used for executing any embodiment of the multi-screen display method.
Specifically, referring to fig. 5, fig. 5 is a schematic block diagram of a multi-screen display apparatus 100 according to an embodiment of the invention.
As shown in fig. 5, the apparatus 100 for multi-screen display is disposed in a system on chip, where the system on chip includes a multi-synchronous DPU, the multi-synchronous DPU is connected to a multiplexer, and each display device is connected to one multiplexer through a corresponding interface. The device includes: a first receiving unit 110, a first setting unit 120, a processing unit 130, and a multi-screen display unit 140.
A first receiving unit 110, configured to receive a wake-up instruction of the multi-synchronous DPU, and wake up the multi-synchronous DPU.
In another embodiment of the present invention, the apparatus 100 for multi-screen display further includes: and a second receiving unit.
And the second receiving unit is used for receiving instruction information of the system on chip which is powered on from a closed state and enters cold start, and acquiring the preset bootstrap program.
A first setting unit 120, configured to set a path selection policy, a picture processing policy, a picture reading policy, and a picture display policy of the multiple synchronous DPUs according to a preset bootstrap.
In another embodiment of the present invention, the first setting unit 120 includes: a second setting unit and a third setting unit.
The second setting unit is used for acquiring the configuration information of each display device and setting the path selection strategy through the bootstrap program; and the third setting unit is used for acquiring the screen parameters of each display device and setting the picture processing strategy through the bootstrap program.
And the processing unit 130 is configured to read a picture to be displayed according to the picture reading policy, and process the picture to be displayed according to the picture processing policy to obtain a processed picture.
The multi-screen display unit 140 is configured to determine a multi-screen display channel of the processed picture according to the path selection policy, input the processed picture to the display device connected to each multiplexer through the multiplexer, and perform multi-screen display according to the picture display policy.
In another embodiment of the present invention, the apparatus 100 for multi-screen display further includes: a third receiving unit and a first cutting unit.
A third receiving unit, configured to receive wake-up instructions of the at least two DPUs, and wake up the at least two DPUs.
And the first cutting unit is used for cutting off a channel between each multiplexer and the multi-synchronous DPUs and opening a channel between each DPU and each multiplexer so as to finish the cold start of the system on chip.
In another embodiment of the present invention, the first cutting unit includes: a control unit and a second cutting unit.
A control unit for controlling each of the multiplexers and outputting a switching signal to a multiplexer; and the second cutting unit is used for cutting off the channel between the multi-synchronous DPU and each multiplexer according to the multi-way switch and cutting off the channel for reading pictures by the multi-synchronous DPU.
The multi-screen display device 100 according to the embodiment of the present invention is configured to execute the wake-up instruction for receiving the multi-synchronization DPU, and wake up the multi-synchronization DPU; setting a path selection strategy, a picture processing strategy, a picture reading strategy and a picture display strategy of the multi-synchronization DPU according to a preset bootstrap; reading a picture to be displayed according to the picture reading strategy, and processing the picture to be displayed according to the picture processing strategy to obtain a processed picture; and determining a multi-screen display channel of the processed picture according to the path selection strategy, inputting the processed picture into the display equipment connected with each multiplexer through the multiplexers, and performing multi-screen display according to the picture display strategy.
It should be noted that, as can be clearly understood by those skilled in the art, the specific implementation processes of the multi-screen display apparatus 100 and the units described above can refer to the corresponding descriptions in the foregoing method embodiments, and for convenience and brevity of description, no further description is provided herein.
The apparatus for multi-screen display may be implemented in a form of a computer program, which can be run on the electronic device as shown in fig. 6.
Referring to fig. 6, fig. 6 is a schematic block diagram of an electronic device according to an embodiment of the present disclosure. This electronic device 500 may be a terminal, wherein the terminal may be an electronic device having a communication function, such as a smart phone, a tablet computer, a notebook computer, a desktop computer, a personal digital assistant, and a wearable device.
Referring to fig. 6, the electronic device 500 includes a processor 502, a memory, and a network interface 505 connected by a system bus 501, wherein the memory may include a non-volatile storage medium 503 and an internal memory 504.
The non-volatile storage medium 503 may store an operating system 5031 and a computer program 5032. The computer programs 5032 include program instructions that, when executed, cause the processor 502 to perform a method for multi-screen display.
The processor 502 is used to provide computing and control capabilities to support the operation of the overall electronic device 500.
The internal memory 504 provides an environment for the operation of the computer program 5032 in the non-volatile storage medium 503, and when the computer program 5032 is executed by the processor 502, the processor 502 can execute a multi-screen display method.
The network interface 505 is used for network communication with other devices. Those skilled in the art will appreciate that the configuration shown in fig. 6 is a block diagram of only a portion of the configuration associated with the present application, and does not constitute a limitation on the electronic device 500 to which the present application is applied, and that a particular electronic device 500 may include more or less components than those shown, or combine certain components, or have a different arrangement of components.
Wherein the processor 502 is configured to run the computer program 5032 stored in the memory to implement the following steps: receiving a wake-up instruction of the multi-synchronous DPU, and waking up the multi-synchronous DPU; setting a path selection strategy, a picture processing strategy, a picture reading strategy and a picture display strategy of the multi-synchronization DPU according to a preset bootstrap; reading a picture to be displayed according to the picture reading strategy, and processing the picture to be displayed according to the picture processing strategy to obtain a processed picture; and determining a multi-screen display channel of the processed picture according to the path selection strategy, inputting the processed picture into the display equipment connected with each multiplexer through the multiplexers, and performing multi-screen display according to the picture display strategy.
In an embodiment, before implementing the receiving of the wake-up instruction of the multi-synchronization DPU, the processor 502 specifically implements the following steps: and receiving instruction information of the system on chip for entering cold start from the power-on state, and acquiring the preset bootstrap program.
In an embodiment, when implementing the setting of the path selection policy, the picture processing policy, the picture reading policy, and the picture display policy of the multi-synchronization DPU according to the preset bootstrap, the processor 502 specifically implements the following steps: acquiring configuration information of each display device, and setting the path selection strategy through the bootstrap program; and acquiring screen parameters of each display device, and setting the picture processing strategy through the bootstrap program.
In an embodiment, when the processor 502 implements the multi-screen display according to the picture display policy, the following steps are specifically implemented: and synchronously displaying the processed pictures in each display device.
In an embodiment, when the processor 502 implements the multi-screen display according to the picture display policy, the following steps are specifically implemented: and sequentially displaying the processed pictures in turn by taking a frame as a unit in each display device.
In one embodiment, the system on chip further comprises at least two DPUs, each DPU having one of the multiplexers connected thereto, each multiplexer being connected to the multiple synchronized DPUs; after the processor 502 performs the multi-screen display on the processed picture according to the picture display policy, the following steps are specifically implemented: receiving wake-up instructions of the at least two DPUs, and waking up the at least two DPUs; cutting off a channel between each of the multiplexers and the multi-synchronous DPUs, and opening a channel between each of the DPUs and each of the multiplexers to complete a cold boot of the system-on-chip.
In an embodiment, the processor 502 implements the following steps in implementing the cutting of the channel between each multiplexer and the multi-synchronous DPU: controlling each of the multiplexers and outputting a switching signal to a multiplexer; and cutting off a channel between the multiple synchronous DPUs and each multiplexer according to the multi-way switch, and cutting off a channel for reading pictures by the multiple synchronous DPUs.
It should be understood that in the embodiment of the present Application, the Processor 502 may be a Central Processing Unit (CPU), and the Processor 502 may also be other general-purpose processors, Digital Signal Processors (DSPs), Application Specific Integrated Circuits (ASICs), Field Programmable Gate Arrays (FPGAs) or other Programmable logic devices, discrete Gate or transistor logic devices, discrete hardware components, and the like. Wherein a general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.
It will be understood by those skilled in the art that all or part of the flow of the method implementing the above embodiments may be implemented by a computer program instructing associated hardware. The computer program includes program instructions, and the computer program may be stored in a storage medium, which is a computer-readable storage medium. The program instructions are executed by at least one processor in the computer system to implement the flow steps of the embodiments of the method described above.
Accordingly, the present invention also provides a storage medium. The storage medium may be a computer-readable storage medium. The storage medium stores a computer program, wherein the computer program comprises program instructions. The program instructions, when executed by the processor, cause the processor to perform the steps of: receiving a wake-up instruction of the multi-synchronous DPU, and waking up the multi-synchronous DPU; setting a path selection strategy, a picture processing strategy, a picture reading strategy and a picture display strategy of the multi-synchronization DPU according to a preset bootstrap; reading a picture to be displayed according to the picture reading strategy, and processing the picture to be displayed according to the picture processing strategy to obtain a processed picture; and determining a multi-screen display channel of the processed picture according to the path selection strategy, inputting the processed picture into the display equipment connected with each multiplexer through the multiplexers, and performing multi-screen display according to the picture display strategy.
In an embodiment, before the processor executes the program instructions to implement the receiving of the wake-up instruction of the multi-synchronous DPU, the following steps are specifically implemented: and receiving instruction information of the system on chip for entering cold start from the power-on state, and acquiring the preset bootstrap program.
In an embodiment, the processor implements the setting of the path selection policy, the picture processing policy, the picture reading policy, and the picture display policy of the multi-synchronization DPU according to a preset bootstrap program by executing the program instructions, and specifically implements the following steps: acquiring configuration information of each display device, and setting the path selection strategy through the bootstrap program; and acquiring screen parameters of each display device, and setting the picture processing strategy through the bootstrap program.
In an embodiment, the processor executes the program instructions to implement the multi-screen display according to the picture display policy, and specifically implements the following steps: and synchronously displaying the processed pictures in each display device.
In an embodiment, the processor executes the program instruction to implement the multi-screen display according to the picture display policy, and specifically implements the following steps: and sequentially displaying the processed pictures in turn by taking a frame as a unit in each display device.
In one embodiment, the system on chip further comprises at least two DPUs, each DPU being connected to one of the multiplexers, each multiplexer being connected to the multiple synchronous DPUs; after the processor executes the program instruction to implement the multi-screen display of the processed picture according to the picture display policy, the following steps are specifically implemented: receiving wake-up instructions of the at least two DPUs, and waking up the at least two DPUs; cutting off a channel between each of the multiplexers and the multi-synchronous DPUs, and opening a channel between each of the DPUs and each of the multiplexers to complete a cold boot of the system-on-chip.
In one embodiment, the processor, when executing the program instructions, implements the cutting of the channel between each multiplexer and the multi-synchronous DPU by: controlling each of the multiplexers and outputting a switching signal to a multiplexer; and cutting off a channel between the multi-synchronous DPU and each multiplexer according to the multi-way switch, and cutting off a channel for reading pictures by the multi-synchronous DPU.
The storage medium may be a usb disk, a removable hard disk, a Read-Only Memory (ROM), a magnetic disk, or an optical disk, which can store various computer readable storage media.
Those of ordinary skill in the art will appreciate that the elements and algorithm steps of the examples described in connection with the embodiments disclosed herein may be embodied in electronic hardware, computer software, or combinations of both, and that the components and steps of the examples have been described in a functional general in the foregoing description for the purpose of illustrating clearly the interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.
In the several embodiments provided in the present invention, it should be understood that the disclosed apparatus and method may be implemented in other manners. For example, the above-described apparatus embodiments are merely illustrative. For example, the division of each unit is only one logic function division, and there may be another division manner in actual implementation. For example, various elements or components may be combined or may be integrated into another system, or some features may be omitted, or not implemented.
The steps in the method of the embodiment of the invention can be sequentially adjusted, combined and deleted according to actual needs. The units in the device of the embodiment of the invention can be merged, divided and deleted according to actual needs. In addition, functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit.
The integrated unit, if implemented in the form of a software functional unit and sold or used as a separate product, may be stored in a storage medium. Based on such understanding, the technical solution of the present invention essentially or partially contributes to the prior art, or all or part of the technical solution can be embodied in the form of a software product, which is stored in a storage medium and includes instructions for causing an electronic device (which may be a personal computer, a terminal, or a network device) to execute all or part of the steps of the method according to the embodiments of the present invention.
While the invention has been described with reference to specific embodiments, the invention is not limited thereto, and various equivalent modifications and substitutions can be easily made by those skilled in the art within the technical scope of the invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (9)
1. A multi-screen display method is applied to a system-on-chip before cold start, wherein the system-on-chip comprises a multi-synchronous DPU and at least two DPUs, the multi-synchronous DPU comprises a DMA, the multi-synchronous DPU is connected with a multiplexer, and each display device is connected with one multiplexer through a corresponding interface; each DPU is connected with one multiplexer, and each multiplexer is connected with the multiple synchronous DPUs; the method comprises the following steps:
receiving a wake-up instruction of the multi-synchronous DPU, and waking up the multi-synchronous DPU;
setting a path selection strategy, a picture processing strategy, a picture reading strategy and a picture display strategy of the multi-synchronization DPU according to a preset bootstrap;
reading a picture to be displayed according to the picture reading strategy, and processing the picture to be displayed according to the picture processing strategy to obtain a processed picture;
determining a multi-screen display channel of the processed picture according to the path selection strategy, inputting the processed picture into the display equipment connected with each multiplexer through the multiplexers, and performing multi-screen display according to the picture display strategy;
receiving wake-up instructions of the at least two DPUs, and waking up the at least two DPUs;
cutting off a channel between each of the multiplexers and the multiple synchronous DPUs, and opening a channel between each of the DPUs and each of the multiplexers to complete a cold boot of the system-on-chip.
2. A method for multi-display as defined in claim 1, wherein prior to the receiving the wake-up instruction of the multi-synchronous DPU, further comprising:
and receiving instruction information of the system on chip for entering cold start from the power-on state, and acquiring the preset bootstrap program.
3. A multi-screen display method as recited in claim 1, wherein the setting of the path selection policy, the picture processing policy, the picture reading policy, and the picture display policy of the multi-synchronization DPU according to a preset bootstrap includes:
acquiring configuration information of each display device, and setting the path selection strategy through the bootstrap program;
and acquiring screen parameters of each display device, and setting the picture processing strategy through the bootstrap program.
4. A multi-screen display method according to claim 1, wherein the multi-screen display according to the picture display policy includes:
and synchronously displaying the processed pictures in each display device.
5. A multi-screen display method according to claim 1, wherein the multi-screen display according to the picture display policy includes:
and sequentially displaying the processed pictures in turn by taking a frame as a unit in each display device.
6. A method for a multi-screen display as recited in claim 1, wherein the cutting off the channel between each of the multiplexers and the multi-synchronous DPU comprises:
controlling each of the multiplexers and outputting a switching signal to a multiplexer;
and cutting off a channel between the multiple synchronous DPUs and each multiplexer according to the multi-way switch, and cutting off a channel for reading pictures by the multiple synchronous DPUs.
7. A multi-screen display device is characterized in that the multi-screen display device is arranged in a system on chip and is applied to the system on chip before cold start, the system on chip comprises a multi-synchronization DPU and at least two DPUs, the multi-synchronization DPUs comprise a DMA (direct memory access), the multi-synchronization DPUs are connected with a multiplexer, and each display device is connected with one multiplexer through a corresponding interface; each DPU is connected with one multiplexer, and each multiplexer is connected with the multiple synchronous DPUs; the multi-screen display device comprises:
a first receiving unit, configured to receive a wake-up instruction of the multi-synchronous DPU, and wake up the multi-synchronous DPU;
the device comprises a first setting unit, a second setting unit and a third setting unit, wherein the first setting unit is used for setting a path selection strategy, a picture processing strategy, a picture reading strategy and a picture display strategy of the multi-synchronization DPU according to a preset bootstrap;
the processing unit is used for reading the picture to be displayed according to the picture reading strategy and processing the picture to be displayed according to the picture processing strategy to obtain a processed picture;
the multi-screen display unit is used for determining a multi-screen display channel of the processed picture according to the path selection strategy, inputting the processed picture into the display equipment connected with each multiplexer through the multiplexers, and performing multi-screen display according to the picture display strategy;
a third receiving unit, configured to receive wake-up instructions of the at least two DPUs and wake up the at least two DPUs;
and the first cutting unit is used for cutting off a channel between each multiplexer and the multi-synchronous DPUs and opening a channel between each DPU and each multiplexer so as to finish the cold start of the system on chip.
8. An electronic device comprising a memory and a processor; the memory stores an application program, and the processor is configured to execute the application program in the memory to perform the operations of the multi-screen display method according to any one of claims 1 to 6.
9. A computer-readable storage medium, wherein a computer program is stored on the computer-readable storage medium, and the computer program is executed by a processor to implement the multi-screen display method according to any one of claims 1 to 6.
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