CN114815422A - Display panel, metal layer thereof and manufacturing method - Google Patents

Display panel, metal layer thereof and manufacturing method Download PDF

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Publication number
CN114815422A
CN114815422A CN202210472327.3A CN202210472327A CN114815422A CN 114815422 A CN114815422 A CN 114815422A CN 202210472327 A CN202210472327 A CN 202210472327A CN 114815422 A CN114815422 A CN 114815422A
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metal
layer
electrode potential
buffer layer
display panel
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CN202210472327.3A
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CN114815422B (en
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谭芳
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TCL Huaxing Photoelectric Technology Co Ltd
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TCL Huaxing Photoelectric Technology Co Ltd
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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/50—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/401—Multistep manufacturing processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42372—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/495—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a simple metal, e.g. W, Mo
    • H01L29/4958—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a simple metal, e.g. W, Mo with a multiple layer structure

Abstract

The embodiment of the application discloses a display panel, a metal layer of the display panel and a manufacturing method of the metal layer, wherein the metal layer comprises a main body layer and a buffer layer. The metal layer is formed at least from a first metal. The buffer layer is attached to one surface of the main body layer and is at least formed by a second metal and a third metal doped into the second metal, the electrode potential of the second metal is smaller than that of the first metal, the electrode potential of the third metal is larger than that of the first metal, and the electrode potential of the buffer layer is equal to that of the main body layer. This application is higher than the third metal of bulk layer through doping electrode potential in the buffer layer, makes the electrode potential of buffer layer and the electrode potential of bulk layer equal, guarantees not to have the electrode potential difference between the two-layer, then just can not take place electrochemical corrosion when the etching, has just solved among the prior art as the buffer layer of buffering easily corroded technical problem when the etching.

Description

Display panel, metal layer thereof and manufacturing method
Technical Field
The application relates to the field of display, in particular to a display panel, a metal layer of the display panel and a manufacturing method of the display panel.
Background
In the display field, with the increasing popularity of large-size and high-driving-frequency products, the wiring technology of some low-resistance metals (such as copper) has been receiving more and more attention. However, since these low-resistance metal (e.g., copper) thin films have a problem of poor contact adhesion with glass and semiconductor layers, it is necessary to use a metal (e.g., molybdenum) in good contact with glass and semiconductor layers as a buffer layer before forming low-resistance metal (e.g., copper) wiring. However, the two metals have different properties, and the buffer layer is easily corroded in the metal etching process of the structure.
Disclosure of Invention
The embodiment of the application provides a display panel, a metal layer of the display panel and a manufacturing method of the display panel, and can solve the technical problem that a buffer layer used as a buffer is easy to corrode in etching in the prior art.
The embodiment of the application provides a metal layer, is applied to in display panel, the metal layer includes: a main body layer formed at least of a first metal; the buffer layer is attached to one surface of the main body layer, the buffer layer is formed by at least adopting second metal and third metal doped in the second metal, the electrode potential of the second metal is smaller than that of the first metal, the electrode potential of the third metal is larger than that of the first metal, and the electrode potential of the buffer layer is equal to that of the main body layer.
In some embodiments of the present application, the first metal comprises copper and the second metal comprises molybdenum.
In some embodiments of the present application, the third metal comprises gold.
In some embodiments of the present application, the third metal comprises at least one metal of silver, rhodium, ruthenium, and palladium.
In some embodiments of the present application, the third metal comprises a mixture of gold and at least one of silver, rhodium, ruthenium, and palladium.
In some embodiments of the present application, the thickness of the body layer is above 1000 angstroms.
In some embodiments of the present application, the buffer layer has a thickness between 100 and 300 angstroms.
In some embodiments of the present application, the metal layer is etched with a pattern that extends through the body layer and the buffer layer.
Accordingly, an embodiment of the present application further provides a display panel, where the display panel includes: a metal layer as described above; and the substrate layer is connected with the metal layer and arranged on one side of the buffer layer, which is deviated from the main body layer.
Correspondingly, the embodiment of the application also provides a manufacturing method of the display panel, which comprises the following steps: forming a buffer layer on the substrate plate by using a second metal; doping a third metal into the buffer layer; and adopting a first metal, forming a main body layer on one surface of the buffer layer, which is deviated from the substrate plate, wherein the electrode potential of the first metal is higher than that of the second metal and lower than that of the third metal, and the electrode potential of the buffer layer is equal to that of the main body layer.
In the embodiment of the application, the doped electrode potential in the buffer layer is higher than the third metal of the main body layer, so that the electrode potential of the buffer layer is equal to that of the main body layer, and the electrode potential difference between the two layers is ensured to be absent, so that electrochemical corrosion can not occur during etching, and the technical problem that the buffer layer serving as the buffer layer is easy to corrode during etching in the prior art is solved.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a display panel provided in an embodiment of the present application.
Fig. 2 is a schematic structural diagram of a metal layer provided in an embodiment of the present application.
Description of reference numerals:
100. a substrate board; 200. a metal layer; 210. a body layer; 220. a buffer layer.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application. Furthermore, it should be understood that the detailed description and specific examples, while indicating exemplary embodiments of the invention, are given by way of illustration and explanation only, and are not intended to limit the scope of the invention. In the present application, unless indicated to the contrary, the use of the directional terms "upper" and "lower" generally refer to the upper and lower positions of the device in actual use or operation, and more particularly to the orientation of the figures of the drawings; while "inner" and "outer" are with respect to the outline of the device.
The embodiment of the application provides a display panel, a metal layer 200 thereof and a manufacturing method. The following are detailed below. It should be noted that the following description of the embodiments is not intended to limit the preferred order of the embodiments.
The present application provides a display panel that can be mounted in various products having a display function. For example, the electronic product may be a smart terminal, a notebook computer, a photographing device, a wearable device, an electronic scale, a vehicle-mounted display, a television, and the like.
Referring to fig. 1 and 2, the display panel includes a substrate 100 and a metal layer 200. The metal layer 200 is disposed on one surface of the substrate board 100.
The substrate 100 is used for supporting the film elements in the display panel, and is typically made of a transparent and wear-resistant material such as glass to protect the film elements supported thereon.
The metal layer 200 may be a gate layer, a source layer, a drain layer, a common electrode layer, a pixel electrode layer, and the like in the display panel. As long as the display panel is a film formed by metal, the structure of the metal layer 200 in the present application can be adopted, and the gate layer attached to the substrate 100 will be described as an example in the following embodiments of the present application.
In an embodiment of the present application, the metal layer 200 includes a body layer 210 and a buffer layer 220.
The main body layer 210 is disposed on a side of the buffer layer 220 away from the substrate board 100, and is attached to the buffer layer 220, and is formed by at least a first metal. The main layer 210 is the main layer of the metal layer 200 for transmitting current signals, and has a thickness greater than that of the buffer layer 220, typically greater than 1000 angstroms.
The buffer layer 220 is attached to the substrate 100 and is formed at least of a second metal and a third metal doped into the second metal. The buffer layer 220 is a film layer for increasing adhesion between the body layer 210 and a film layer made of glass or semiconductor, such as the substrate 100 and an insulating layer, and has a thickness smaller than that of the body layer 210, typically between 100 angstroms and 300 angstroms.
The distribution of the third metal particles 221 in the buffer layer 220 should be as uniform as possible, as shown in fig. 2, to ensure that the electrode potential at all positions of the buffer layer 220 is approximately equal to that of the body layer 210, so as to avoid galvanic corrosion where the third metal in the buffer layer 220 does not diffuse.
In the embodiment of the present application, the electrode potential of the second metal is smaller than the electrode potential of the first metal, and the electrode potential of the third metal is larger than the electrode potential of the first metal, so that after doping the third metal into the second metal, the electrode potential of the doped metal mixture is equal to the electrode potential of the first metal, that is, the electrode potential of the buffer layer 220 is equal to the electrode potential of the body layer 210, so that electrochemical corrosion does not occur in the metal layer 200 during etching, and the technical problem that the buffer layer 220 serving as a buffer during etching in the prior art is easily corroded is solved.
In some embodiments of the present application, the first metal comprises copper, which is a resistive substrate, and the material of the body layer 210 does not cause excessive power loss. Correspondingly, the second metal includes molybdenum, and the molybdenum has a strong adhesion with the substrate board 100, the insulating layer, and other film layers made of glass and semiconductor, so that the metal layer 200 can be firmly attached to the substrate board 100.
The third metal may include at least one metal of gold, silver, rhodium, ruthenium, and palladium. The standard electrode potential of these metals is between 0.799V and 1.692V, 0.337V greater than that of copper and-0.22V greater than that of molybdenum. Doping the above metal into the buffer layer 220 made of molybdenum can increase the electrode potential of the buffer layer 220, so that the electrode potential of the buffer layer 220 and the electrode potential of the body layer 210 are kept uniform. Generally, the ratio of the third metal to the positive buffer layer 220 in the buffer layer 220 is controlled to be between 3 and 5.
In some embodiments of the present application, the third metal comprises at least one of silver, rhodium, ruthenium, and palladium. The standard electrode potentials of the metals are all around 0.8V, the standard electrode potential of palladium is 0.83V, the standard electrode potential of rhodium is 0.8V, the standard electrode potential of ruthenium is 0.8V, and the standard electrode potential of silver is 0.799. The electrode potential is greater than the standard electrode potential of copper by 0.337V and that of molybdenum by-0.22V. Doping the above metal into the buffer layer 220 made of molybdenum can increase the electrode potential of the buffer layer 220, so that the electrode potential of the buffer layer 220 and the electrode potential of the body layer 210 are kept uniform. Meanwhile, the addition of the platinum group metal and the silver can improve the wear resistance, the corrosion resistance and the conductivity of the buffer layer 220, so that the buffer layer 220 is less prone to wear and corrosion during the etching process. Meanwhile, the current loss flowing through the buffer layer 220 can be reduced, the overall resistance of the whole metal layer 200 is reduced, and the overall conductivity of the whole metal layer 200 is improved.
In other embodiments of the present application, the third metal comprises gold. The standard electrode potential of gold is 1.692V, which is twice the standard electrode potential of the metals such as silver, rhodium, ruthenium, and palladium. The doping of gold into the buffer layer 220 can reduce the ratio of the doped third metal, so that more molybdenum with strong adhesion is in the buffer layer 220 to increase the overall adhesion of the metal layer 200.
In still other embodiments of the present application, the third metal is an alloy comprising a mixture of gold and at least one of silver, rhodium, ruthenium, and palladium. The standard electrode potential of metals such as silver, rhodium, ruthenium, and palladium is about 0.8V, and the standard electrode potential of gold is 1.692V. The addition of gold can reduce the proportion of the doped third metal, so that more molybdenum with strong adhesion is in the buffer layer 220, so as to increase the overall adhesion of the metal layer 200, and the addition of silver can improve the conductivity of the buffer layer 220, so that the buffer layer 220 has the same electrode potential as the body layer 210, and at the same time, has the characteristics of low resistance and high conductivity similar to those of the body layer 210.
In some embodiments of the present application, the metal layer 200 is etched with a pattern that extends through the body layer 210 and the buffer layer 220.
Etching a pattern on the metal layer 200 may improve various properties of the metal layer 200 to achieve different functions. For example, the pretilt angle and the deflection angle of the liquid crystal molecules can be controlled by etching a pattern on the pixel electrode. The patterns can be arranged according to actual needs, and can be crossed grooves, a plurality of strip-shaped grooves arranged at equal intervals along one direction, round hole grooves arranged in an array and the like, and the patterns are not limited herein.
In the embodiment of the present application, the electrode potential of the second metal is smaller than the electrode potential of the first metal, and the electrode potential of the third metal is larger than the electrode potential of the first metal, so that after doping the third metal into the second metal, the electrode potential of the doped metal mixture is equal to the electrode potential of the first metal, that is, the electrode potential of the buffer layer 220 is equal to the electrode potential of the body layer 210, so that electrochemical corrosion does not occur in the metal layer 200 during etching, and the technical problem that the buffer layer 220 serving as a buffer during etching in the prior art is easily corroded is solved.
The present application also provides a method for manufacturing a display panel, including:
a buffer layer is formed on the substrate plate using a second metal.
And doping a third metal into the buffer layer.
And adopting a first metal, forming a main body layer on one surface of the buffer layer, which is deviated from the substrate plate, wherein the electrode potential of the first metal is higher than that of the second metal and lower than that of the third metal, and the electrode potential of the buffer layer is equal to that of the main body layer.
And etching the main body layer and the buffer layer on the surface of the main body layer, which is far away from the buffer layer, according to a preset pattern.
In the embodiment of the present application, the second metal is used as a material to form the buffer layer 220 on the carrying surface of the substrate board 100, the buffer layer 220 is doped with a third metal to form the final buffer layer 220 with an increased electrode potential, the first metal is used as a material to form the body layer 210 on the surface of the buffer layer 220 away from the substrate layer, the body layer 210 and the buffer layer 220 jointly form the metal layer 200, and finally, the metal layer 200 is etched on the body layer 210 side of the metal layer 200 according to a predetermined pattern to form a trench pattern penetrating through the body layer 210 and the buffer layer 220.
In forming the buffer layer 220, a film may be formed by brushing, electroplating, or vapor deposition. When the third metal is doped into the buffer layer 220, the third metal particles 221 may be uniformly distributed in the buffer layer 220 as much as possible by ion implantation or surface diffusion, so that the electrode potential at each position of the buffer layer 220 is substantially equal to that of the body layer 210. In forming the body layer 210, a film may be formed by brushing, plating, or vapor deposition. During the etching, a mask having a predetermined pattern to be etched may be disposed on a surface of the body layer 210 facing away from the buffer layer 220, and the pattern etched on the metal layer 200 is defined by the mask during the photolithography process. The predetermined pattern may be arranged according to actual needs, and may be a cross-shaped groove, a plurality of strip-shaped grooves arranged at equal intervals in one direction, circular hole grooves arranged in an array, and the like.
In the embodiment of the present application, the electrode potential of the second metal is smaller than the electrode potential of the first metal, and the electrode potential of the third metal is larger than the electrode potential of the first metal, so that after doping the third metal into the second metal, the electrode potential of the doped metal mixture is equal to the electrode potential of the first metal, that is, the electrode potential of the buffer layer 220 is equal to the electrode potential of the body layer 210, so that electrochemical corrosion does not occur in the metal layer 200 during etching, and the technical problem that the buffer layer 220 serving as a buffer during etching in the prior art is easily corroded is solved.
The display panel, the metal layer 200 thereof, and the manufacturing method thereof provided by the embodiments of the present application are described in detail above, and the principles and embodiments of the present application are explained herein by applying specific examples, and the description of the above embodiments is only used to help understand the method and the core idea of the present application; meanwhile, for those skilled in the art, according to the idea of the present application, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present application.

Claims (10)

1. A metal layer for use in a display panel, the metal layer comprising:
a main body layer formed at least of a first metal;
the buffer layer is attached to one surface of the main body layer, at least a second metal and a third metal doped into the second metal are adopted for forming the buffer layer, the electrode potential of the second metal is smaller than that of the first metal, the electrode potential of the third metal is larger than that of the first metal, and the electrode potential of the buffer layer is equal to that of the main body layer.
2. The metal layer of claim 1, wherein the first metal comprises copper and the second metal comprises molybdenum.
3. The metal layer of claim 2, wherein the third metal comprises gold.
4. The metal layer of claim 2, wherein the third metal comprises at least one metal of silver, rhodium, ruthenium, and palladium.
5. The metal layer of claim 2, wherein the third metal comprises a mixture of gold and at least one of silver, rhodium, ruthenium, and palladium.
6. The metal layer of claim 1, wherein the body layer has a thickness of greater than 1000 angstroms.
7. The metal layer of claim 6, wherein the buffer layer has a thickness between 100 and 300 angstroms.
8. The metal layer of claim 1, wherein the metal layer has a pattern etched through the body layer and the buffer layer.
9. A display panel, comprising:
the metal layer of any of claims 1 to 8;
and the substrate layer is connected with the metal layer and arranged on one side of the buffer layer, which is deviated from the main body layer.
10. A method for manufacturing a display panel, comprising:
forming a buffer layer on the substrate plate by using a second metal;
doping a third metal into the buffer layer;
and adopting a first metal, forming a main body layer on one surface of the buffer layer, which is deviated from the substrate plate, wherein the electrode potential of the first metal is higher than that of the second metal and lower than that of the third metal, and the electrode potential of the buffer layer is equal to that of the main body layer.
CN202210472327.3A 2022-04-29 2022-04-29 Display panel and manufacturing method thereof Active CN114815422B (en)

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TW202143421A (en) * 2020-05-14 2021-11-16 友達光電股份有限公司 Circuit of electronic device
CN114156395A (en) * 2020-09-07 2022-03-08 京东方科技集团股份有限公司 Array substrate, preparation method thereof, display panel and backlight module

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