CN1147933C - High speed and high-capacity flash solid memory structure and manufacture process - Google Patents
High speed and high-capacity flash solid memory structure and manufacture processInfo
- Publication number
- CN1147933C CN1147933C CNB021168806A CN02116880A CN1147933C CN 1147933 C CN1147933 C CN 1147933C CN B021168806 A CNB021168806 A CN B021168806A CN 02116880 A CN02116880 A CN 02116880A CN 1147933 C CN1147933 C CN 1147933C
- Authority
- CN
- China
- Prior art keywords
- memory
- data
- memory bank
- automated programming
- data load
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Landscapes
- Read Only Memory (AREA)
Abstract
The present invention relates to a structure of a flash solid memory with a high speed and a high capacity and a production method thereof, which belongs to the technical field of electronic information. The present invention is composed of a piece of control module and a plurality of memory modules which use laminated modular constructions according to the corresponding values of memory capacity values, wherein the control module takes DSP as a center and comprises a programmable chip control circuit, a 1394 interface, an RS encipheror/decoder, a buffer FIFO, an EPROM storage program and an SRAM data storage chip. The memory module uses a nonvolatile FLASH memory chip as a storage medium. In the production method of the memory, the memory chip is written according to the following two steps of a data loading step (a) and a programming phase (b), wherein in step a, data is first written into a page register by taking ns as a unit, in step b, the data of the page register is transmitted into a memory cell, and alternate production line work is formed after the process of data loading and auto-programming. Compared with former multiway parallel writing technology, the present invention greatly saves writing time and hardware cost, and the memory made by the production method has the function of storing data with a high speed and a high capacity.
Description
(1) technical field
The invention belongs to electronic information technical field, specially refer to a kind of high speed and high-capacity flash solid memory spare.
(2) background technology
Memory as one of important component part of computer system, it can be regarded as the warehouse of computer external storage data, in prior art, main external memory has the soft or hard disc unit, magnetic tape station and CD player, they all are the mechanism that is based upon storage data on the magnetosphere, only because of medium (or claiming medium) difference of storage data, structure is different and have different characteristics separately and be used in different occasions, but these memories are not broken away from the weakness of magnetic medium, they are subjected to the influence of ambient temperature big, cannot stand the vibration and the impact of machinery, as memory,, its memory capacity and speed influenced its application prospect widely thereby all being subjected to bigger restriction.And emerging solid-state memory, it with semiconductor memory as memory media.Owing to there is not a mechanical moving element, so the variation that it more can bearing temperature than traditional disk/band machine or CD player, and the vibration and the impact of machinery, and read or write speed is than disk or the fast several magnitude of tape.Thereby opened up application prospects.
Generally use DRAM (dynamic RAM) and two kinds of devices of FLASH MEMORY (flash memory) on the solid-state memory at present, the FLASH MEMORY of Wen Shiing non-volatile because of having (data are not lost after the power down) then, and the little characteristics of power consumption are arranged, and it is very good to use situation.But the shortcoming of FLASH chip is writing speed slow (mainly being that program speed is slow) and needs erase operation, increased difficulty on technology realizes.
Domestic existing capacity is in the Mb level, and access speed is at the solid-state memory product of kb/s level.But this also can not satisfy the industry requirement that develop rapidly far away, this development group is exactly for further the capacity and the storage speed of raising memory are the research aim, the deficiency that integrated design and control corresponding optimization by hardware and software has remedied the FLASH device, make access rate all reach 300Mb/s, and realized large-capacity data memory function (can expand) at 32Gb to 320Gb part.
(3) summary of the invention
In order to overcome many defectives such as existing solid-state memory storage speed is slow, memory capacity is big inadequately, and develop fast, the capacious solid-state memory of a kind of storage speed again.Purpose of the present invention realizes by the following technical solutions, a kind of manufacture method of high speed and high-capacity flash solid memory, comprise data load and data automated programming, it is characterized in that data load and data automated programming are operated by the pipeline parallel method mode, and the step of write memory chip is, a data load step, with data is that unit carries out with ns, writes page register, the b programming phases, to memory cell, its time is that unit carries out with m with the transfer of data of page register; Adopt the streamline writing mode, concrete operations are, with first memory bank loading data, even enter the automated programming stage with the 1st memory bank behind the loaded; Meanwhile also load the 2nd memory bank, after data load finished, the 2nd memory bank entered the automated programming stage, meanwhile, loaded the 3rd memory bank; So successively the 3rd is operated to n memory bank; After n memory bank data load is intact, the automated programming of the 1st memory bank also finishes, begin the 2nd loads the 1st memory bank with taking turns, data load finishes, the 1st memory bank the 2nd enters the automated programming stage with taking turns, move in circles, data load and automated programming form alternative expression parallel pipeline working method.It loads than the serial of adopting in the prior art and the mode of programming has made full use of effective time, has obviously accelerated speed.In the said write process, carry out the whether ready inspection and the inspection of success or not at any time.
The invention has the beneficial effects as follows,, saved the write time widely than serial wrting method in the past; Save spending of hardware widely than the multichannel technology that writes arranged side by side, can finish the write operation of multi-disc memory bank with a cover hardware circuit rapidly.The function that has high-speed big capacity storage data with the made memory of this mode of operation.
(4) description of drawings
Fig. 1 is the structural representation of this flash solid memory,
Fig. 2 forms block diagram for this solid-state memory,
Fig. 3 is this memory middle controller circuit diagram 1,
Fig. 4 is this memory middle controller circuit diagram 2,
Fig. 5 is a storage area circuit diagram in this memory,
Fig. 6 writes the operation pipeline working method for this memory.
(5) embodiment
With reference to Fig. 1, represent the cordwood system type stepped construction schematic diagram of this solid-state memory, be that 8 memory banks are stacked together in the present embodiment, form high speed and high-capacity flash solid memory, Fig. 2 expresses the block diagram that memory is made up of control module and memory module, and wherein control module comprises the acceptance/transmission part of data, the veritification of data and the buffering of data, it is by DSP, controller, 1394 interfaces, RS volume/decoder, buffering FIFO, EPROM deposits program and the SRAM store data constitutes.Wherein DSP adopts the TMS320C3X of 32bits, controller is realized (ISPLS2192VE) with programmable chip, the device that meets the IEEE1394-1995 standard is selected in I/O for use, and (device is received/sent out to physical layer with TSB41LV03 three port cables, link layer TSB12LV01A high-speed serial bus link layer controller), the RS coding integrated circuit (IC) chip AHA4013/4011 that error correction and error detection are selected for use.Buffering FIFO selects IDT72V3652 for use, and EPROM (be used to deposit program and comprise write operation streamline working procedure) selects AM27C010 for use, and SRAM (being used to deposit routine data) selects EDI8L32512C for use.Memory module adopts KM29U128T (128Mb Flash storage chip), and each memory module memory capacity is designed to 32Gb (using 256 Flash storage chips), can need carry out the expansion of memory module by user capacity, can reach 8 at most.
Above execution mode makes the access rate of flash solid memory reach 300Mb/s, and has realized big capacity (can expand between 32Gb to 320Gb).
Claims (2)
1, a kind of manufacture method of high speed and high-capacity flash solid memory, comprise data load and data automated programming, it is characterized in that data load and data automated programming are operated by the pipeline parallel method mode, and the step of write memory chip is, a data load step, with data is that unit carries out with ns, writes page register, the b programming phases, to memory cell, its time is that unit carries out with ms with the transfer of data of page register; Adopt the streamline writing mode, concrete operations are, with first memory bank loading data, even enter the automated programming stage with the 1st memory bank behind the loaded; Meanwhile also load the 2nd memory bank, after data load finished, the 2nd memory bank entered the automated programming stage, meanwhile, loaded the 3rd memory bank; So successively the 3rd is operated to n memory bank; After n memory bank data load is intact, the automated programming of the 1st memory bank also finishes, begin the 2nd loads the 1st memory bank with taking turns, data load finishes, the 1st memory bank the 2nd enters the automated programming stage with taking turns, move in circles, data load and automated programming form alternative expression parallel pipeline working method.
2, manufacture method according to claim 3 is characterized in that, in the said write process, carry out the whether ready inspection and the inspection of success or not at any time.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CNB021168806A CN1147933C (en) | 2002-04-22 | 2002-04-22 | High speed and high-capacity flash solid memory structure and manufacture process |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CNB021168806A CN1147933C (en) | 2002-04-22 | 2002-04-22 | High speed and high-capacity flash solid memory structure and manufacture process |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1375873A CN1375873A (en) | 2002-10-23 |
CN1147933C true CN1147933C (en) | 2004-04-28 |
Family
ID=4744273
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB021168806A Expired - Fee Related CN1147933C (en) | 2002-04-22 | 2002-04-22 | High speed and high-capacity flash solid memory structure and manufacture process |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN1147933C (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN100365599C (en) * | 2005-07-15 | 2008-01-30 | 中国船舶重工集团公司第七○九研究所 | Flash array storage method and module for real-time data record in digital signal processor |
US7640390B2 (en) | 2006-05-31 | 2009-12-29 | Hitachi, Ltd. | Flash memory storage system |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7962683B2 (en) * | 2007-08-15 | 2011-06-14 | Silicon Motion, Inc. | Flash memory, and method for operating a flash memory |
KR101177278B1 (en) * | 2007-10-08 | 2012-08-24 | 삼성전자주식회사 | Programming method of non-volatile memory cell |
CN101458960B (en) * | 2007-12-13 | 2011-12-07 | 中芯国际集成电路制造(上海)有限公司 | Capacity overlapping memory and control method therefor |
CN101246450B (en) * | 2008-03-26 | 2010-04-21 | 普天信息技术研究院有限公司 | Flash memory and memory space managing method thereof |
CN101930407B (en) * | 2009-06-26 | 2012-06-20 | 群联电子股份有限公司 | Flash memory control circuit and memory system and data transmission method thereof |
CN103514939A (en) * | 2012-06-21 | 2014-01-15 | 苏州工业园区新宏博通讯科技有限公司 | Data storage circuit |
CN103019620A (en) * | 2012-11-30 | 2013-04-03 | 中国科学院上海技术物理研究所 | Storage circuit system based on flash memory-SRAM (Static Random Access Memory) flow line |
CN109408402B (en) * | 2018-10-09 | 2021-06-01 | 长江存储科技有限责任公司 | Data writing method of flash memory and flash memory |
-
2002
- 2002-04-22 CN CNB021168806A patent/CN1147933C/en not_active Expired - Fee Related
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8924637B2 (en) | 2001-01-21 | 2014-12-30 | Hitachi, Ltd. | Flash memory storage system |
CN100365599C (en) * | 2005-07-15 | 2008-01-30 | 中国船舶重工集团公司第七○九研究所 | Flash array storage method and module for real-time data record in digital signal processor |
US7640390B2 (en) | 2006-05-31 | 2009-12-29 | Hitachi, Ltd. | Flash memory storage system |
US7899981B2 (en) | 2006-05-31 | 2011-03-01 | Hitachi, Ltd. | Flash memory storage system |
US8166235B2 (en) | 2006-05-31 | 2012-04-24 | Hitachi, Ltd. | Flash memory storage system |
US8359426B2 (en) | 2006-05-31 | 2013-01-22 | Hitachi, Ltd. | Flash memory storage system |
Also Published As
Publication number | Publication date |
---|---|
CN1375873A (en) | 2002-10-23 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US12113054B2 (en) | Non-volatile dynamic random access memory | |
CN101957726B (en) | Phase transition storage in dual inline memory module | |
CN102292778B (en) | Memory devices and methods for managing error regions | |
US20100061153A1 (en) | Refresh Method for a Non-volatile Memory | |
US20140237169A1 (en) | Hot memory block table in a solid state storage device | |
CN104681072A (en) | NAND flash memory having C/A pin and flash memory system including the same | |
CN1147933C (en) | High speed and high-capacity flash solid memory structure and manufacture process | |
CN103559146B (en) | A kind of method improving NAND flash controller read or write speed | |
CN102177556A (en) | Translation layer in a solid state storage device | |
KR102271117B1 (en) | memory operations on data | |
CN206557758U (en) | A kind of NAND FLASH storage chip array control unit expansible based on FPGA | |
CN105138470A (en) | Multi-channel nand flash controller | |
US20100325343A1 (en) | Memory system | |
CN109217876B (en) | Serializer and memory device including the same | |
CN107527642A (en) | Storage component part and memory module including buffer storage | |
CN111158579A (en) | Solid state disk and data access method thereof | |
CN107204197A (en) | Memory module and its storage system and operating method | |
CN104409099B (en) | High speed eMMC array control units based on FPGA | |
CN103019624B (en) | Phase change memory device | |
CN110489050A (en) | The programmed method of data memory device and system information | |
CN102362263A (en) | SSD controller, and method for operating an SSD controller | |
CN102332296A (en) | Data reading method and data writing method of memory circuit | |
CN109920467B (en) | Method for testing multiple memory chips | |
US7791949B2 (en) | Refresh method for a non-volatile memory | |
CN103456354A (en) | Method and device of differential storage grids of nonvolatile memory |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C17 | Cessation of patent right | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20040428 Termination date: 20100422 |