CN114784782A - Inter-line direct current power flow controller, control method and multi-terminal direct current system - Google Patents

Inter-line direct current power flow controller, control method and multi-terminal direct current system Download PDF

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CN114784782A
CN114784782A CN202110085796.5A CN202110085796A CN114784782A CN 114784782 A CN114784782 A CN 114784782A CN 202110085796 A CN202110085796 A CN 202110085796A CN 114784782 A CN114784782 A CN 114784782A
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current
bridge circuit
converter station
line
direct current
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徐千鸣
拓超群
黄昕昱
纪勇
汪亮
王子见
庞贤瑞
郑丹阳
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Hunan University
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J1/00—Circuit arrangements for dc mains or dc distribution networks
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H9/00—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
    • H02H9/02—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess current
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J3/00—Circuit arrangements for ac mains or ac distribution networks
    • H02J3/36—Arrangements for transfer of electric power between ac networks via a high-tension dc link

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Abstract

The invention discloses an interline direct current power flow controller, a control method and a multi-terminal direct current system.A first bypass switch and a second bypass switch are disconnected when in a power flow control state, the output direct current voltage of the interline direct current power flow controller is adjusted by controlling the duty ratio of power devices in a first H-bridge circuit and a second H-bridge circuit, and the adjustment of the current and the direct current capacitor voltage of a direct current transmission line is realized by time-sharing control, so that the redistribution of power flow is realized; when the voltage protection upper limit of the direct current capacitor is reached, the first bypass switch and the second bypass switch are conducted, bypass of the first H-bridge circuit and the second H-bridge circuit is realized, and the self-protection function of the line-to-line direct current flow controller is realized.

Description

Inter-line direct current power flow controller, control method and multi-terminal direct current system
Technical Field
The invention belongs to the technical field of direct current transmission, and particularly relates to an inter-line direct current power flow controller with fault current limiting and self-protection functions, a control method and a multi-terminal direct current system.
Background
In recent years, due to the shortage of fossil fuels and environmental protection, various countries are working on changing the energy structure to efficiently generate electricity using renewable energy such as solar energy, hydraulic energy, and wind energy. However, the renewable energy has the disadvantages of low use efficiency, unbalanced distribution, volatility, intermittence and the like. The multi-terminal high-voltage direct-current transmission is an effective technical scheme for long-distance large-capacity transmission. However, the dc power transmission system is limited in its development because of its weak power flow control capability and small degree of freedom. The introduction of the direct current power flow controller can not only increase the degree of freedom of system control, but also improve the power flow control capability of the multi-terminal direct current transmission system. At present, a great deal of research is carried out on direct current power flow controllers at home and abroad.
The existing direct current power flow controller is divided into two types in principle: varistor type and transformer type. Although the structure and the control method of the variable-resistance direct-current power flow controller are simple and intuitive, the rated power is low, the power flow control range is limited by a resistance value, and the resistance is a consumable device, so the variable-resistance direct-current power flow controller is poor in economy, can only adjust the power flow size but not the power flow direction mostly, is insufficient in freedom degree of power flow control, and is not high in flexibility.
The variable voltage type direct current power flow controller is divided into a DC/DC converter type, a series voltage source type and an inter-line direct current power flow controller. The DC/DC converter type is characterized in that a direct current transformer is connected in series in a circuit to modulate a port voltage into a two-port voltage, and has the advantages of large capacity, large cost and loss, complex structure and control and high system complexity; the series voltage source type utilizes an adjustable direct current voltage source to adjust current, generally needs an additional power supply, and has high cost and complex structure and control; the inter-line direct current power flow controller performs power flow control by exchanging energy between the two lines, can realize bidirectional power flow regulation, does not need external energy acquisition, and has low cost and low loss.
The existing inter-line direct current power flow controller has the following structures:
based on magnetic coupling: (1) inductive coupling: two capacitors are respectively connected into the two lines, then a bypass switch is respectively connected in parallel, the capacitors are communicated by using a switching device and the inductors, and the power flow is controlled by energy exchange between the inductors and the capacitors; (2) transformer coupling: extra voltage is added into a circuit to change the voltage drop of the circuit, and the alternating current side is connected with an alternating current transformer to carry out self power balance, so that the energy is prevented from being connected with an external alternating current system to obtain energy; (3) based on capacitive coupling: a capacitor is connected into two different lines in a time-sharing mode to adjust the tide, and the device is simple in structure and low in cost.
In summary, the inter-line dc power flow controller is one of the effective solutions to improve the power flow control capability of the dc power transmission system. When a direct current power grid fails, due to the low resistance of the direct current power grid, the fault current can be increased to dozens of times of rated current within 10ms, and the safe operation of converter station devices and the whole direct current system is endangered. At present, the current limiting function of a fault line is realized mostly through a special fault current limiter, and the design difficulty and the cost are increased.
Disclosure of Invention
The invention aims to provide an inter-line direct current power flow controller, a control method and a multi-terminal direct current system, and aims to solve the problems that most of the existing power flow controllers do not have fault current limiting capability, and the design difficulty and the cost are high due to the fact that a special fault current limiter is needed during fault.
The invention solves the technical problems through the following technical scheme: an inter-line direct current power flow controller comprises a first H-bridge circuit, a second H-bridge circuit, a direct current capacitor, a first bypass switch and a second bypass switch; the first bypass switch is connected with the output end of the first H-bridge circuit, and the second bypass switch is connected with the output end of the second H-bridge circuit; the first H-bridge circuit is connected with the second H-bridge circuit through a direct current capacitor;
when the power flow is in a power flow control state, controlling the duty ratio of power devices in the first H-bridge circuit and the second H-bridge circuit and the on-off of the first bypass switch and the second bypass switch to realize the redistribution of direct-current line current; and when the circuit is in a short-circuit fault state, the on-off of power devices in the first H-bridge circuit and the second H-bridge circuit and the on-off of the first bypass switch and the second bypass switch are controlled, so that the fault current of the direct current circuit is reduced, and the current limitation and the self-protection are realized.
In the invention, in a power flow control state, the first bypass switch and the second bypass switch are disconnected, and the adjustment of the output direct current voltage of the line-to-line direct current power flow controller is realized by controlling the duty ratio of power devices in the first H-bridge circuit and the second H-bridge circuit, so that the adjustment of the current of the direct current transmission line is realized, and the redistribution of the power flow is realized; when the short-circuit fault state occurs, the power devices in the first H-bridge circuit and the second H-bridge circuit are controlled to be in a turn-off state, the direct-current capacitors are charged through the anti-parallel diodes in the H-bridge circuits, partial short-circuit fault current is absorbed, and the current limiting function of the short-circuit fault is realized. The inter-line direct current power flow controller has the power flow control function, the current limiting function and the self-protection function, and is easy to realize, simple in design and low in cost.
Further, the first bypass switch and the second bypass switch are both a group of anti-parallel thyristors.
The invention also provides a control method of the inter-line direct current power flow controller, which comprises the following steps:
step 1: connecting the line-to-line direct current power flow controller into a multi-terminal direct current system, wherein the multi-terminal direct current system at least comprises a main converter station 1 and two slave converter stations 2/3, one ends of a first bypass switch and a second bypass switch in the line-to-line direct current power flow controller are connected in series and then connected with the main converter station 1, and the other ends of the first bypass switch and the second bypass switch are respectively connected with a slave converter station 2 and a slave converter station 3;
step 2: when the power flow is in a power flow control state, controlling the duty ratio of power devices in the first H-bridge circuit and the second H-bridge circuit and the on-off of the first bypass switch and the second bypass switch to realize the redistribution of direct-current line current;
and when the circuit is in a short-circuit fault state, the on-off of power devices in the first H-bridge circuit and the second H-bridge circuit and the on-off of the first bypass switch and the second bypass switch are controlled, so that the fault current of the direct current circuit is reduced, and the current limitation and the self-protection are realized.
Further, in the step 2, when the power flow control state is established, both the first bypass switch and the second bypass switch are in an off state, and a specific control process of the power flow control state includes a steady-state process and a transient process;
in a steady state, adjusting the output voltages of the first H-bridge circuit and the second H-bridge circuit to increase or decrease the input line current of the slave converter station 2 and the input line current of the slave converter station 3, thereby realizing the redistribution of the direct current line current;
and during transient state, the duty ratios of power devices in the first H-bridge circuit and the second H-bridge circuit are controlled, so that the time-sharing control of the current of the direct current line and the voltage of the direct current capacitor is realized.
Further, the time-sharing control process in the transient process is as follows:
step 2.11: dividing a control period into a first half period and a second half period; the first half period is used for adjusting the current of the direct current circuit, and the second half period is used for adjusting the voltage of the direct current capacitor;
step 2.12: in the first half period, controlling the duty ratio of a power device in the first H-bridge circuit or the second H-bridge circuit to enable the first H-bridge circuit or the second H-bridge circuit to be in a PWM (pulse-width modulation) regulation state, and simultaneously controlling the second H-bridge circuit or the first H-bridge circuit to be in a bypass state; and in the second half period, controlling the first H-bridge circuit or the second H-bridge circuit to be in a bypass state, and simultaneously controlling the duty ratio of a power device in the second H-bridge circuit or the first H-bridge circuit to enable the second H-bridge circuit or the first H-bridge circuit to be in a PWM (pulse width modulation) regulation state.
Because the charging and discharging of the direct current capacitor can not be carried out simultaneously, the control period is divided into a first half period and a second half period, the first H-bridge circuit and the second H-bridge circuit are controlled, the direct current line current and the direct current capacitor voltage can be controlled in a time-sharing mode respectively, the power flow control function is achieved, the power balance of the direct current power flow controllers among the lines is guaranteed, and the control is more reliable.
Further, the specific implementation process of step 2.12 is divided into two cases according to different adjustment objects of the PWM adjustment state:
case 1: in the first half cycle, the control target is the line current, the second H-bridge circuit is in a bypass state, and when the input line current modulation wave from the converter station 2 is larger than the input line current carrier wave from the converter station 2, the input line current from the converter station 2 flows through the first H-bridge circuit, which outputs ± UCOr 0, the second H-bridge circuit is in a bypass state, so that the input line current from the converter station 2 increases and the input line current from the converter station 3 decreases; when the line current modulation wave input from the converter station 2 is smaller than the line current carrier wave input from the converter station 2, the line current input from the converter station 2 flows through the first H-bridge circuit, and the output of the first H-bridge circuit is 0 or +/-UCThe second H-bridge circuit is in a bypass state such that the incoming line current from the converter station 2 decreases and the incoming line current from the converter station 3 increases;
in the second half period, the control target is the capacitor voltage, the first H-bridge circuit is in a bypass state, when the voltage modulation wave of the direct current capacitor is smaller than the voltage modulation wave of the direct current capacitor, the current of the input line of the converter station 3 flows through the second H-bridge circuit to discharge the direct current capacitor, and the second H-bridge circuitOutput plus or minus UCWhen the first H-bridge circuit is in a bypass state, the direction of current flowing through the capacitor is opposite to the direction of voltage of the capacitor, so that the voltage of the direct current capacitor is reduced; when the direct current capacitor voltage modulation wave is larger than the direct current capacitor voltage ballast wave, the current of an input line from the converter station 3 flows through the second H-bridge circuit, the second H-bridge circuit outputs 0, the first H-bridge circuit is in a bypass state, and the capacitor discharge phenomenon disappears when the direct current capacitor voltage modulation wave is smaller than the direct current capacitor voltage carrier wave, so that the direct current capacitor voltage is increased;
case 2: in the first half cycle, the control target is the line current, the first H-bridge circuit is in a bypass state, and when the line current modulated wave input from the converter station 2 is larger than the line current carrier wave input from the converter station 2, the line current input from the converter station 3 flows through the second H-bridge circuit, which outputs ± UCOr 0, the first H-bridge circuit is in a bypass state, so that the input line current from the converter station 2 is increased and the input line current from the converter station 3 is decreased; when the line current modulation wave input from the converter station 2 is smaller than the line current carrier wave input from the converter station 2, the line current input from the converter station 3 flows through the second H-bridge circuit, and the output of the second H-bridge circuit is 0 or +/-UCThe first H-bridge circuit is in a bypass state such that the incoming line current from the converter station 2 decreases and the incoming line current from the converter station 3 increases;
in the second half period, the control target is the capacitor voltage, the second H-bridge circuit is in a bypass state, when the voltage modulation wave of the direct current capacitor is smaller than the voltage modulation wave of the direct current capacitor, the current of the input line of the converter station 2 flows through the first H-bridge circuit to discharge the direct current capacitor, and the first H-bridge circuit outputs +/-UCThe second H-bridge circuit is in a bypass state, and the direction of current flowing through the capacitor is opposite to the direction of capacitor voltage, so that the direct-current capacitor voltage is reduced; when the voltage modulation wave of the direct current capacitor is larger than the voltage carrier wave of the direct current capacitor, the current of an input line of the converter station 2 flows through the first H-bridge circuit, the first H-bridge circuit outputs 0, the second H-bridge circuit is in a bypass state, and the capacitor discharge phenomenon disappears when the voltage modulation wave of the direct current capacitor is smaller than the voltage carrier wave of the direct current capacitor, so that the voltage of the direct current capacitor is increased.
Further, the calculation expression of the line current input from the converter station 2 is:
Figure BDA0002910762400000041
the calculation expression of the input line current from the converter station 3 is:
Figure BDA0002910762400000042
wherein, U1、U2、U3The output direct-current voltage of the main converter station 1, the input direct-current voltage of the slave converter station 2 and the input direct-current voltage of the slave converter station 3 are respectively; u shapeaAfter the power flow control, the power flow controller is connected in series with the voltage between the main converter station 1 and the slave converter station 2; u shapebAfter power flow control, a power flow controller is connected in series with the voltage between the main converter station 1 and the slave converter station 3; rL1For equivalent resistance of the incoming line from the converter station 2, RL2Is the equivalent resistance of the incoming line from the converter station 3; I.C. AL1Is the average current flowing through the incoming line from the converter station 2, i.e. the incoming line current from the converter station 2; I.C. AL2Is the average current flowing through the incoming line from the converter station 3, i.e. the incoming line current from the converter station 3.
Further, in step 2, the specific control process in the short-circuit fault state includes:
acquiring a short-circuit fault signal, and enabling power devices in a first H-bridge circuit and a second H-bridge circuit to be in a turn-off state according to the short-circuit fault signal, so that the first H-bridge circuit and the second H-bridge circuit are in an uncontrollable rectification state;
the fault current is charged to the direct current capacitor through anti-parallel diodes in the first H-bridge circuit and the second H-bridge circuit, so that fault current limitation is realized;
and when the voltage of the direct current capacitor is greater than or equal to the protection upper limit voltage of the direct current capacitor, controlling the first bypass switch and the second bypass switch to be conducted, so that the interline direct current power flow controller bypasses, and realizing self-protection.
Further, the short-circuit fault signal obtaining process includes: when any one of the line current or the direct current capacitor voltage input from the converter station 2 exceeds the respective short-circuit threshold value, a short-circuit fault signal is sent out;
the short-circuit threshold value I of the line current input from the converter station 2OC15A, short circuit threshold U of the DC capacitor voltageOCIs 50V.
The invention also provides a multi-terminal direct current system, which at least comprises a main converter station 1 and two slave converter stations 2/3, and further comprises the inter-line direct current power flow controller, wherein one ends of a first bypass switch and a second bypass switch in the inter-line direct current power flow controller are connected in series and then connected with the main converter station 1, and the other ends of the first bypass switch and the second bypass switch are respectively connected with the slave converter station 2 and the slave converter station 3.
Advantageous effects
Compared with the prior art, the inter-line direct current power flow controller, the control method and the multi-terminal direct current system provided by the invention adopt a PI (proportional integral) control and time-sharing control method, control the output voltage of each branch circuit by adjusting the duty ratio of the power device, and play a role in redistributing the line current; under the fault current-limiting mode, the peak value of the current can be limited, and the self-protection of the line-to-line direct current power flow controller can be realized after the bypass switch is conducted. The invention has the two functions of direct current line power flow control and current limiting protection, and improves the flexibility and reliability of direct current transmission system control.
Drawings
In order to more clearly illustrate the technical solution of the present invention, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only one embodiment of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on the drawings without creative efforts.
Fig. 1 is a topological structure of an inter-line dc power flow controller according to an embodiment of the present invention;
fig. 2 is an equivalent circuit diagram of a transmission line of a direct current power flow controller between installation lines in the embodiment of the invention;
FIG. 3 is a PWM control diagram of the current of the transmission line 2' and the DC capacitor voltage in the embodiment of the invention;
FIG. 4 is a control block diagram of fault current limiting in an embodiment of the present invention;
FIG. 5 is a test loop system constructed in an embodiment of the invention;
FIG. 6 is a simulation waveform diagram of current sharing distribution during the power flow control phase in the embodiment of the invention, FIG. 6a is a simulation waveform diagram of DC capacitor voltage, and FIG. 6b is a simulation waveform diagram of bus current and current flowing through each branch;
FIG. 7 is a simulation waveform diagram of current uneven distribution in the power flow control stage in the embodiment of the invention, FIG. 7a is a simulation waveform diagram of DC capacitor voltage, and FIG. 7b is a simulation waveform diagram of bus current and current flowing through each branch;
FIG. 8 is a simulation waveform diagram of the fault current limiting stage in the embodiment of the invention, FIG. 8a is a simulation waveform diagram of the DC capacitor voltage, and FIG. 8b is a simulation waveform diagram of the bus current and the current flowing through each branch;
FIG. 9 is a comparison of the effects of fault current limiting with infinite flow in an embodiment of the present invention;
FIG. 10 is a waveform of an experimental prototype under the action of infinite flow in an embodiment of the invention;
FIG. 11 is a waveform diagram of an experimental prototype under the effect of a limited flow in an embodiment of the present invention.
Detailed Description
The technical solutions in the present invention are clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be obtained by a person skilled in the art without inventive efforts based on the embodiments of the present invention, shall fall within the scope of protection of the present invention.
As shown in fig. 1, the line-to-line dc power flow controller provided in this embodiment includes a first H-bridge circuit FBS1, a second H-bridge circuit FBS2, a dc capacitor, a first bypass switch Q1, and a second bypass switch Q2; the first bypass switch Q1 is connected to the output of the first H-bridge circuit FBS1, and the second bypass switch Q2 is connected to the output of the second H-bridge circuit FBS 2; the first H-bridge circuit FBS1 is connected to the second H-bridge circuit FBS2 via a dc capacitor.
The first H-bridge circuit FBS1 and the second H-bridge circuit FBS2 are each composed of 4 sets of IGBTs with antiparallel diodes, that is, the power devices in the first H-bridge circuit FBS1 and the second H-bridge circuit FBS2 are IGBTs. The first H-bridge circuit FBS1 and the second H-bridge circuit FBS2 can output three levels: + UC、-UC0, wherein, UCIs a dc capacitor voltage. The first H-bridge circuit FBS1 and the second H-bridge circuit FBS2 correspond to an adjustable voltage source, the output voltage of which is adjusted to insert the desired voltage value U on the dc lineaAnd UbAnd further, the line current is regulated, and the power flow control is realized. The topological structure of the inter-line direct current power flow controller is easy to expand and realize modular cascade. The first bypass switch Q1 and the second bypass switch Q2 are both a group of anti-parallel thyristors, and the first bypass switch Q1 and the second bypass switch Q2 are turned on under a fault condition, so that self-protection of an IDCPFC (inter DC Power-Flow Controller) is realized.
As shown in fig. 2, the inter-line dc power flow controller of this embodiment has four terminals, and the four terminals are directly mounted on the dc node, so as to implement the mounting of the inter-line dc power flow controller in the multi-terminal dc system. The multi-terminal dc system comprises at least one master converter station 1 and two slave converter stations 2/3, and accordingly, the bus-bar transmission line is 1 ', i.e. the output line of the master converter station 1 is 1', the output transmission lines are 2 'and 3', i.e. the input line of the slave converter station 2 is 2 ', and the input line of the slave converter station 3 is 3'. And connecting a terminal 1 and a terminal 2 of the inter-line direct current power flow controller in series and then connecting the inter-line direct current power flow controller with a bus end power transmission line 1 ', connecting a terminal 3 with an output end power transmission line 2 ', and connecting a terminal 4 with an output end power transmission line 3 ', namely completing the installation of the inter-line direct current power flow controller in the multi-terminal direct current system.
As shown in fig. 1 and 2, according to kirchhoff's voltage and current laws:
Figure BDA0002910762400000071
wherein, U1、U2、U3DC voltages, i.e. U, at the bus terminal and at the two outputs, respectively1、U2、U3The direct current voltage at the output end of the main converter station 1, the direct current voltage at the input end of the slave converter station 2 and the direct current voltage at the input end of the slave converter station 3 are respectively; u shapeaAfter power flow control, a power flow controller is connected in series to the voltage between the main converter station 1 and the slave converter station 2; u shapebAfter the power flow control, the power flow controller is connected in series with the voltage between the main converter station 1 and the slave converter station 3; r isL1Is the equivalent resistance, R, of the transmission line 2L2The equivalent resistance of the transmission line 3'; l isL1Is the equivalent inductance, L, of the transmission line 2L2Is the equivalent inductance of the transmission line 3'; i isL1Is the average current flowing through the transmission line 2', IL2Is the average current flowing through the transmission line 3'; i.e. iL1And iL2Is the instantaneous current value; I.C. A1Is the average current flowing through the transmission line 1'; because the inductance of transmission line can be ignored under the steady state, consequently have:
Figure BDA0002910762400000072
the embodiment also provides a control method of the inter-line direct current power flow controller, which includes the following steps:
1. the line-to-line dc power flow controller is connected to a multi-terminal dc system as shown in fig. 2, the multi-terminal dc system comprising at least one master converter station 1 and two slave converter stations 2/3.
2. The inter-line direct current power flow controller has two working conditions in a multi-terminal direct current system, namely a power flow control state working condition and a short-circuit fault state working condition.
Under the working condition of a power flow control state, the duty ratios of power devices in the first H-bridge circuit FBS1 and the second H-bridge circuit FBS2 and the first bypass switch Q1 and the second bypass switch Q2 are controlled to be in an off state, and the redistribution of direct-current line current is realized, namely, the power flow control is realized; under the working condition of a short-circuit fault state, power devices in the first H-bridge circuit FBS1 and the second H-bridge circuit FBS2 are controlled to be in an off state, the first bypass switch Q1 and the second bypass switch Q2 are controlled to be switched on and switched off, the fault current of a direct-current line is reduced, and current limiting and self-protection are achieved.
2.1 Power flow control in Normal State
As shown in FIG. 3, the power flow control adopts PI control and time-sharing control, A1And A2Respectively representing a line 2' current modulated wave (i.e. the line current modulated wave input from the converter station 2) and a dc capacitor voltage modulated wave, B1And B2Representing the line 2' current carrier and the dc capacitor voltage carrier, respectively. Because the charging and discharging of the direct current capacitor can not be carried out simultaneously, the first H-bridge circuit FBS1 and the second H-bridge circuit FBS2 at the left end and the right end need to be controlled in a time-sharing mode (namely, the control processes are controlled respectively and independently, so that the control process is more reliable), the power flow control function is realized, and the power balance of the direct current power flow controllers among the lines is ensured.
According to the difference of the current flowing direction and the adjusting direction, 8 operating conditions can be divided, as shown in table 1.
TABLE 1IDCPFC operating conditions
Figure BDA0002910762400000081
In table 1, 0 indicates that the IGBT is in the off state, and 1 indicates that the IGBT is in the on state.
The specific control process of the power flow control state comprises a steady-state process and a transient-state process;
in a steady state, adjusting the output voltages of the first H-bridge circuit and the second H-bridge circuit to increase or decrease the input line current of the slave converter station 2 and the input line current of the slave converter station 3, thereby realizing the redistribution of the direct current line current;
and during transient state, the duty ratios of power devices in the first H-bridge circuit and the second H-bridge circuit are controlled, so that the time-sharing control of the direct current line current and the direct current capacitor voltage is realized.
The first operating condition is as follows: the current of the transmission line 2 'and the current of the transmission line 3' are both positive, and the current of the line 2 'decreases, and the current of the line 3' increases, the positive direction being the direction from the master converter station 1 to the slave converter station 2/3.
As shown in table 1, the specific process of power flow control is as follows:
the first H-bridge circuit FBS1 outputs a positive voltage UaEquivalently, a positive resistor is connected in series with the power transmission line 2 ', and the current of the power transmission line 2' is reduced; the second H-bridge circuit FBS2 outputs a negative voltage UbEquivalently, a negative resistor is connected in series with the power transmission line 3 ', and the current of the power transmission line 3' is increased.
As shown in fig. 3, the specific control process of the transient state is:
in the first half period T1Inner, the control target is the line current, t0-t1Time period, current IL1Modulated wave A1Less than current IL1Carrier B1Current IL1The DC capacitor is charged by the anti-parallel diodes of the power device S1 and the power device S4 in the first H-bridge circuit FBS1, and the output + U of the first H-bridge circuit FBS1CEquivalent to a positive resistance, line 2' current IL1Meanwhile, in order to prevent the current coupling phenomenon of the left and right bridge arms, the second H-bridge circuit FBS2 should be in a forward bypass state; t is t1-t2Time period, current IL1Modulated wave A1Greater than current IL1Carrier B1The first H-bridge circuit FBS1 outputs 0, and the second H-bridge circuit FBS2 is still in bypass state due to t0-t1The positive resistance phenomenon in the time period disappears, so that the output of the first H-bridge circuit FBS1 is 0, which corresponds to the current I of the line 2L1At the time of enlargement; t is t2-t3Time period and t0-t1The process of the time period is the same.
In the second half period T2In the inner, the control target is the DC capacitor voltage, t3-t4Time period, dc capacitor voltage modulation wave a2Less than DC capacitor voltage carrier B2From the converter station 3, the line current I is inputL2The IGBT of the power device S5 and the power device S8 in the second H-bridge circuit FBS2 discharges the direct-current capacitor, and the output-U of the second H-bridge circuit FBS2CWhen the voltage of the direct current capacitor is reduced, the first H-bridge circuit FBS1 is in a negative bypass state; t is t4-t5Time period, dc capacitor voltage modulation wave a2Greater than the DC capacitor voltage carrier B2The first H-bridge circuit FBS1 is still in bypass state, and the output of the second H-bridge circuit FBS2 is 0, t3-t4The capacitance discharge phenomenon of the time period disappears, and the capacitance voltage is increased; t is t5-t6Time period and t3-t4The process of the time period is the same.
As can be seen from table 1, in one control cycle of the operation condition, the controlled devices are S2, S3, S5, and S8.
The second operating condition is as follows: the current of the power transmission line 2 'and the current of the power transmission line 3' are both positive directions, the current of the line 2 'is increased, and the current of the line 3' is decreased.
As shown in table 1, the specific process of power flow control is as follows:
the first H-bridge circuit FBS1 outputs a negative voltage UaEquivalently, a negative resistor is connected in series with the power transmission line 2 ', and the current of the power transmission line 2' is increased; the second H-bridge circuit FBS2 outputs a positive voltage UbEquivalently, a positive resistor is connected in series with the power transmission line 3 ', and the current of the power transmission line 3' is reduced.
As shown in fig. 3, the specific control process of the transient state is:
in the first half period T1Inner, the control target is the line current, t1-t2Time period, current IL1Modulated wave A1Greater than current IL1Carrier B1Current IL2The DC capacitor is charged via the anti-parallel diodes of the power device S6 and the power device S7 in the second H-bridge circuit FBS2, the second H-bridge circuit FBS2 outputs + UCEquivalently, a positive resistor is connected in series, the current of the line 3 'is reduced, the current of the line 2' is increased, and meanwhile, in order to prevent the current coupling phenomenon of the left and right bridge arms, the first H-bridge circuit FBS1 is in a forward bypass state; t is t2-t3Time period, electricityStream IL1Modulated wave A1Less than current IL1Carrier B1The second H-bridge circuit FBS2 outputs 0, and the first H-bridge circuit FBS1 is still in the bypass state due to t1-t2The positive resistance phenomenon in the time period disappears, so that the output of the second H-bridge circuit FBS2 is 0, which means that the current of the line 3 'is increasing, and the current of the line 2' is decreasing; t is t0-t1Time period and t2-t3The process of the time period is the same.
In the second half period T2The control target is the DC capacitor voltage, t3-t4Time period, dc capacitor voltage modulation wave a2Less than DC capacitor voltage carrier B2Current IL1The IGBT flowing through the power device S2 and the power device S3 in the first H-bridge circuit FBS1 discharges the direct-current capacitor, and the output-U of the first H-bridge circuit FBS1CWhen the voltage of the direct current capacitor is reduced, the second H-bridge circuit FBS2 is in a negative bypass state; t is t4-t5Time period, DC capacitor voltage modulation wave A2Greater than the DC capacitor voltage carrier B2The second H-bridge circuit FBS2 is still in bypass state, the output of the first H-bridge circuit FBS1 is 0, t3-t4The capacitance discharge phenomenon in the time period disappears, and the capacitance voltage can be increased; t is t5-t6Time period and t3-t4The process of the time period is the same.
In a control cycle of the operation condition, the controlled devices are S2, S3, S5 and S8.
The third operating condition: the current of the transmission line 2 'and the current of the transmission line 3' are both negative, and the current of the line 2 'decreases, and the current of the line 3' increases, the negative direction being the direction from the converter station 2/3 into the main converter station 1.
As shown in table 1, the specific control process of the power flow control is as follows:
the first H-bridge circuit FBS1 outputs a negative voltage UaSince the current is negative, the current of the line 2' is reduced; the second H-bridge circuit FBS2 outputs a positive voltage UbSince the current is negative, the line 3' current increases.
As shown in fig. 3, the specific control process of the transient state is:
in the first half period T1Inner, the control target is the line current, t1-t2Time period, current IL1Modulated wave A1Greater than the current IL1Carrier B1Current I ofL1The DC capacitor is charged by the anti-parallel diodes flowing through S2 and S3, and the output-U of the first H-bridge circuit FBS1CEquivalent to series connection of a negative resistance, line 2' current IL1The current coupling phenomenon of the left and right bridge arms is prevented, and the second H-bridge circuit FBS2 is in a forward bypass state; t is t2-t3Time period, current IL1Modulated wave A1Less than current IL1Carrier B1The first H-bridge circuit FBS1 outputs 0, and the second H-bridge circuit FBS2 is still in the bypass state due to t1-t2The negative resistance phenomenon in the time period disappears, so that the output of the first H-bridge circuit FBS1 is 0, which is equivalent to the current of the line 2' decreasing; t is t0-t1Time period and t2-t3The process of the time period is the same.
In the second half period T2In, the control target is the capacitor voltage, t3-t4Time period, DC capacitor voltage modulation wave A2Less than DC capacitor voltage carrier B2Current I ofL2The IGBT flowing through S6 and S7 discharges the direct current capacitor, and the second H bridge circuit FBS2 outputs + UCDue to the direction and I of the capacitor voltageL2The direction of the current flowing through the capacitor is opposite, so that the capacitor is equivalently discharged, the voltage of the capacitor is reduced, and the FBS1 is in a negative bypass state; t is t4-t5Time period, DC capacitor voltage modulation wave A2Greater than the DC capacitor voltage carrier B2The first H-bridge circuit FBS1 is still in bypass state, and the output of the second H-bridge circuit FBS2 is 0, t3-t4The capacitive discharge phenomenon of the time period disappears, so that the capacitive voltage increases; t is t5-t6Time period and t3-t4The process of the time period is the same.
In a control cycle of the operation condition, the controlled devices are S1, S4, S6 and S7.
A fourth operating condition: the current of the power transmission line 2 'is positive, the current of the power transmission line 3' is negative, the current of the line 2 'is reduced, and the current of the line 3' is increased.
As shown in table 1, the specific control process of the power flow control is as follows:
the first H-bridge circuit FBS1 outputs a positive voltage UaEquivalently, a positive resistor is connected in series with the circuit 2 ', and the current of the circuit 2' is reduced; the second H-bridge circuit FBS2 outputs a positive voltage UbSince the line 3 'current is negative, the line 3' current increases.
As shown in fig. 3, the specific control process of the transient state is:
in the first half period T1Inner, the control target is the line current, t0-t1Time period, current IL1Modulated wave A1Less than current IL1Carrier B1Current IL1The DC capacitor is charged by the anti-parallel diodes of S1 and S4, and the first H-bridge circuit FBS1 outputs + UCEquivalently, a positive resistor is connected in series, the current of the line 2' is reduced, and meanwhile, in order to prevent the current coupling phenomenon of the left and right bridge arms, the second H-bridge circuit FBS2 should be in a forward bypass state; t is t1-t2Time period, current IL1Modulated wave A1Greater than the current IL1Carrier B1The first H-bridge circuit FBS1 outputs 0, and the second H-bridge circuit FBS2 is still in bypass state due to t0-t1The positive resistance phenomenon in the time period disappears, so that the output of the first H-bridge circuit FBS1 is 0, which is equivalent to the current of the line 2' increasing; t is t2-t3Time period and t0-t1The process of the time period is the same.
In the second half period T2Inner, the control target is the capacitor voltage, t3-t4Time period, dc capacitor voltage modulation wave a2Less than DC capacitor voltage carrier B2Current I ofL2The IGBT flowing through S6 and S7 discharges the direct current capacitor, and the second H bridge circuit FBS2 outputs + UCDue to the direction of the capacitor voltage and IL2The direction of the current flowing through the capacitor is opposite, so that the current is equivalent to discharging the capacitorThe capacitor voltage is reduced, and the first H-bridge circuit FBS1 is in a negative bypass state; t is t4-t5Time period, dc capacitor voltage modulation wave a2Greater than the DC capacitor voltage carrier B2The first H-bridge circuit FBS1 is still in bypass state, and the output of the second H-bridge circuit FBS2 is 0, t3-t4The discharge phenomenon of the time period disappears, so that the capacitor voltage increases; t is t5-t6Time period and t3-t4The process of the time period is the same.
In a control cycle of the operation condition, the controlled devices are S2, S3, S6 and S7.
From the above analysis, it can be derived that for other operating conditions, due to the difference between the current direction and the adjustment direction, only the direction of the current reference value and the controlled device need to be replaced.
In FIG. 3, a given current IL1refThe setting can be carried out in the non-overload range, the given voltage is determined according to the grade of the line voltage, and the given voltage U is set in the embodimentCrefIs 30V.
The duty cycle of the first H-bridge circuit FBS1 and the duty cycle of the second H-bridge circuit FBS2 are not more than 50%, and the duty cycle comprises:
Figure BDA0002910762400000121
wherein D is1、D2The series-connected capacitor voltage input coefficients of the first H-bridge circuit FBS1 and the second H-bridge circuit FBS2 after power flow control are respectively shown.
Based on the inter-line direct current power flow controller of the embodiment, according to kirchhoff's current law, the following components are provided: i is1＝IL1+IL2Ideally, the net power of the inter-line dc power flow controller is zero, and there are:
UaIL1+UbIL2＝0 (4)
2.2 Current limiting and self-protection control under Fault conditions
The current limiting and the self-protection are divided into two control stages:
a first control stage: in case of a short-circuit fault at one end (i.e. when a short-circuit fault signal is detected), the current I of the transmission line 2' isL1And (3) rising sharply, sending an overcurrent protection command block according to the short-circuit fault signal, blocking power devices in the first H-bridge circuit FBS1 and the second H-bridge circuit FBS2 according to the overcurrent protection command block, enabling the first H-bridge circuit FBS1 and the second H-bridge circuit FBS2 to be in an uncontrollable rectification state, and charging a direct current capacitor connected in series in a circuit through anti-parallel diodes in the first H-bridge circuit FBS1 and the second H-bridge circuit FBS2 to absorb part of fault current in a charging mode so as to realize current limiting.
And a second control stage: when the voltage of the direct-current capacitor is greater than or equal to the protection upper limit voltage of the direct-current capacitor, namely the direct-current capacitor is overcharged, a command step _ n for protecting the power flow controller is sent out, the first bypass switch Q1 and the second bypass switch Q2 are controlled to be conducted, the first H-bridge circuit FBS1 and the second H-bridge circuit FBS2 are enabled to bypass, and the self-protection function is achieved.
As shown in fig. 4, in the case of a short-circuit fault at one end, the line current and the dc capacitor voltage of the inter-line dc power flow controller are doubly sampled, when the current I of the power transmission line 2' is detectedL1Or DC capacitor voltage UcAny one exceeding the respective short-circuit threshold (I)oc＝15A，Uoc50V), the short-circuit fault is determined. After the short-circuit fault is detected, an overcurrent protection instruction block is sent out, power devices in the first H-bridge circuit FBS1 and the second H-bridge circuit FBS2 are locked, the fault current charges a direct-current capacitor through the anti-parallel diodes of the first H-bridge circuit FBS1 and the second H-bridge circuit FBS2, and + U is outputcLine fault current is reduced. Once the DC capacitor voltage U is detectedcIs charged to its protective upper limit value (U)Cmax160V), a command step _ n is issued to turn on the first bypass switch Q1 and the second bypass switch Q2, thereby achieving the purpose of self-protection. Outputting a negative voltage opposite to the system voltage through a first control stage to limit a current peak value; the IDCPFC is protected by a second control phase which has no effect on the fault current.
3. Simulation verification
And (3) constructing a test loop system as shown in fig. 5, and carrying out experimental verification on the power flow control and fault current limiting functions of the test loop system. Wherein the DC power supply U1As the output DC voltage of the main converter station 1, is the system voltage source, the resistor R1Simulating a system power source. The line inductance and resistance are simulated by setting different series inductances and resistances. Switch SF acts as a throw-in small resistance R2Simulating the effect of short-circuit overcurrent. The simulation parameters of the multi-terminal direct current system are shown in table 2:
TABLE 2 System simulation parameters
Parameter(s) U1(V) RL1(Ω) RL2(Ω) R1(Ω) R2(Ω) LL1(H) LL2(H)
Numerical value 1000 3 5 100 20 0.05 0.05
3.1 Power flow control
A direct current power flow controller between the embodiment lines is connected in series in one direct current bus and two shunt branches, and a given value I is setL1ref＝5A，UCrefFig. 6 shows a simulation waveform diagram of current sharing in the power flow control mode at 30V. When the line-to-line direct current power flow controller is not put into the embodiment, the line current is naturally distributed, I1＝9.80A，IL1＝6.13A，IL23.67A. After the direct current power flow controller between the lines of the embodiment is put into use, when the system is in a stable state, I1＝9.80A，IL1＝5.00A，IL24.80A (as shown in fig. 6 b), the dc capacitor voltage becomes 30V (as shown in fig. 6 a) after a short spike occurs and is substantially consistent with the set value. This simulation result corresponds to the first operating condition of 2.1.
Resetting the set point IL1ref＝8A，UCref30V. A simulated waveform diagram of the current maldistribution in the tidal control mode is shown in fig. 7. When the direct current power flow controller between the lines of the embodiment is not put into use, the line current is naturally distributed, I1＝9.80A，IL1＝6.13A，IL23.67A. After the direct current power flow controller between the lines of the embodiment is put into use, when the system is in a stable state, I1＝9.80A，IL1＝8.02A，IL21.78A (as shown in fig. 7 b), the dc capacitor voltage becomes 30V (as shown in fig. 7 a) after a short spike occurs and stabilizes, and substantially matches the set point. This simulation result corresponds to the second operating condition of 2.1.
It can be concluded that after the line-to-line dc power flow controller is put into operation, both the line current and the capacitor voltage can be made to closely follow the given values when the current is evenly distributed and when the current is unequally distributed.
3.2 Fault Current limiting
Setting the protection upper limit U of the DC capacitor voltageCmax160V, the short-circuit time Tf is set to 1s,and the fault clearing time Td is Tf +0.003 is 1.003s, namely when t is 1s, the system has a short-circuit fault, and the fault is cleared after 3 ms. The simulated waveform diagram in the fault current limiting mode is shown in fig. 8. As can be seen from fig. 8a and 8b, the simulation waveform is the same as the current control mode in the initial simulation 1s, i.e. before the occurrence of the short-circuit fault, and 4.26ms after the occurrence of the fault, the dc capacitor voltage UCIs charged to the protection threshold 160V and thereafter turns on the first bypass switch Q1 and the second bypass switch Q2, IDCPFC is bypass protected.
Fig. 9 is a waveform diagram showing the effect of the system on its current limiting effect when there is infinite current. As can be seen in FIG. 9, when infinite flow is acting, I when a fault occurs1Continued to rise to 49.17A; under the action of a limited flow, I1Peak value of 45.32A, the current drops by about 7.83% compared to the infinite current effect, and lasts about 3ms from the start of the fault to the clearing of the fault.
As can be seen from the above, the current limiting effect is related to the capacitance and the voltage limit of the capacitor. The smaller the capacitance value of the capacitor is, the faster the voltage of the capacitor is increased in a limited short-circuit time (generally, a direct-current short-circuit fault can be cleared by a circuit breaker within a few milliseconds), the larger the back voltage in the series circuit is, and the stronger the capacity of inhibiting the short-circuit current is. However, if the capacitance value of the capacitor is too small, the capacitor is charged to the upper voltage limit value in a very short time, the capacitor is bypassed when the short-circuit fault is not cleared, the current continues to increase at a large rate of increase, and the current limiting function is hardly performed because the current suppressing time is too short. The larger the upper limit value of the capacitor voltage is, the longer the time for inhibiting the short-circuit current is, but the pursuit of the current limiting time can increase the requirement on the rated value of the capacitor, and increase the difficulty of the device volume and the device type selection. Therefore, the capacitance value and the upper limit value of the capacitor voltage are selected according to specific working conditions, and the optimal condition is that the capacitance value and the upper limit value of the capacitor voltage just reach the limit value of the capacitor voltage when the fault is cleared, so that the current limiting capability can be fully exerted, and the current limiting function can be provided in the whole short-circuit process.
4. Prototype testing
FIG. 10 is a waveform diagram of a prototype experiment under the action of infinite flow. In case of failure, inUnder the action of a current limiting, I1Rising to a peak value of 27.93A 5ms after the fault occurs.
FIG. 11 is a waveform diagram of a prototype experiment under the effect of a finite flow, and system parameters are set as follows: u shape1＝250V，IL1ref＝3A，UCref30V, the capacitance value of the direct current capacitor is 550 uF. In the steady state situation, IL1And UCAre 3A and 30V, respectively, it can be seen that the line current and the capacitor voltage are substantially equal to their reference values when the system is stable. Under the action of limited current, when the current I1Rising to 17.52A, IDCPFC detects the fault and begins current limiting. Due to the lower system voltage level, the line current begins to drop as the capacitor voltage increases. At 4.4ms, UCmaxAt 155V, the capacitance is bypassed and the line current drops to 10.51A. Without the breaker, the line current will continue to rise. Faults in the actual system will be cleared by the circuit breaker within 3-4 ms.
The above disclosure is only for the specific embodiments of the present invention, but the scope of the present invention is not limited thereto, and any changes or modifications within the technical scope of the present disclosure may be easily conceived by those skilled in the art and shall be covered by the scope of the present invention.

Claims (10)

1. An inter-line direct current power flow controller is characterized in that: the circuit comprises a first H-bridge circuit, a second H-bridge circuit, a direct current capacitor, a first bypass switch and a second bypass switch; the first bypass switch is connected with the output end of the first H-bridge circuit, and the second bypass switch is connected with the output end of the second H-bridge circuit; the first H-bridge circuit is connected with the second H-bridge circuit through a direct current capacitor;
when the power flow is in a power flow control state, controlling the duty ratio of power devices in the first H-bridge circuit and the second H-bridge circuit and the on-off of the first bypass switch and the second bypass switch to realize the redistribution of direct-current line current; and when the circuit is in a short-circuit fault state, the on-off of power devices in the first H-bridge circuit and the second H-bridge circuit and the on-off of the first bypass switch and the second bypass switch are controlled, so that the fault current of the direct-current circuit is reduced, and the current limitation and the self-protection are realized.
2. An interline dc power flow controller according to claim 1, characterized in that: the first bypass switch and the second bypass switch are both a group of anti-parallel thyristors.
3. A method for controlling an interline dc power flow controller according to claim 1 or 2, characterised by comprising the steps of:
step 1: connecting the line-to-line direct current power flow controller into a multi-terminal direct current system, wherein the multi-terminal direct current system at least comprises a main converter station 1 and two slave converter stations 2/3, one ends of a first bypass switch and a second bypass switch in the line-to-line direct current power flow controller are connected in series and then connected with the main converter station 1, and the other ends of the first bypass switch and the second bypass switch are respectively connected with a slave converter station 2 and a slave converter station 3;
and 2, step: when the power flow is in a power flow control state, controlling the duty ratio of power devices in the first H-bridge circuit and the second H-bridge circuit and the on-off of the first bypass switch and the second bypass switch to realize the redistribution of direct-current line current;
and when the circuit is in a short-circuit fault state, the on-off of power devices in the first H-bridge circuit and the second H-bridge circuit and the on-off of the first bypass switch and the second bypass switch are controlled, so that the fault current of the direct-current circuit is reduced, and the current limitation and the self-protection are realized.
4. A control method according to claim 3, characterized in that: in the step 2, when the power flow control state is in a power flow control state, the first bypass switch and the second bypass switch are both in an off state, and the specific control process of the power flow control state comprises a steady-state process and a transient-state process;
in a steady state, adjusting the output voltages of the first H-bridge circuit and the second H-bridge circuit to increase or decrease the input line current of the slave converter station 2 and the input line current of the slave converter station 3, thereby realizing the redistribution of the direct current line current;
and during transient state, the duty ratios of power devices in the first H-bridge circuit and the second H-bridge circuit are controlled, so that the time-sharing control of the current of the direct current line and the voltage of the direct current capacitor is realized.
5. The control method according to claim 4, characterized in that: the time-sharing control process in the transient process comprises the following steps:
step 2.11: dividing a control period into a first half period and a second half period; the first half period is used for adjusting the current of the direct current circuit, and the second half period is used for adjusting the voltage of the direct current capacitor;
step 2.12: in the first half period, controlling the duty ratio of a power device in the first H-bridge circuit or the second H-bridge circuit to enable the first H-bridge circuit or the second H-bridge circuit to be in a PWM (pulse-width modulation) regulation state, and simultaneously controlling the second H-bridge circuit or the first H-bridge circuit to be in a bypass state to realize the regulation of direct-current line current;
and in the second half period, controlling the first H-bridge circuit or the second H-bridge circuit to be in a bypass state, and simultaneously controlling the duty ratio of a power device in the second H-bridge circuit or the first H-bridge circuit to enable the second H-bridge circuit or the first H-bridge circuit to be in a PWM (pulse width modulation) regulation state, so that the regulation of the voltage of the direct current capacitor is realized.
6. The control method according to claim 5, characterized in that: the specific implementation process of step 2.12 is divided into two cases according to the different adjustment objects of the PWM adjustment state:
case 1: in the first half cycle, when the incoming line current modulation wave from the converter station 2 is larger than the incoming line current carrier wave from the converter station 2, the incoming line current from the converter station 2 flows through the first H-bridge circuit, which outputs ± UCOr 0, the second H-bridge circuit is in a bypass state, so that the input line current from the converter station 2 is increased and the input line current from the converter station 3 is decreased; when the line current modulation wave input from the converter station 2 is smaller than the line current carrier wave input from the converter station 2, the line current input from the converter station 2 flows through the first H-bridge circuit, and the output of the first H-bridge circuit is 0 or +/-UCThe second H-bridge circuit is in a bypass state such that the incoming line current from the converter station 2 is reduced and the line is incoming from the converter station 3The current is increased;
in the second half period, when the voltage modulation wave of the direct current capacitor is smaller than the voltage modulation wave of the direct current capacitor, the current of the input line of the converter station 3 flows through the second H-bridge circuit to discharge the direct current capacitor, and the second H-bridge circuit outputs +/-UCThe first H-bridge circuit is in a bypass state, and the voltage of the direct current capacitor is reduced; when the voltage modulation wave of the direct current capacitor is larger than the voltage modulation wave of the direct current capacitor, the current of the input line of the converter station 3 flows through the second H-bridge circuit, the second H-bridge circuit outputs 0, the first H-bridge circuit is in a bypass state, and the voltage of the direct current capacitor is increased;
case 2: in the first half cycle, when the line current modulation wave input from the converter station 2 is larger than the line current carrier wave input from the converter station 2, the line current input from the converter station 3 flows through the second H-bridge circuit, and the second H-bridge circuit outputs ± UCOr 0, the first H-bridge circuit is in a bypass state, so that the input line current from the converter station 2 is increased and the input line current from the converter station 3 is decreased; when the line current modulation wave input from the converter station 2 is smaller than the line current carrier wave input from the converter station 2, the line current input from the converter station 3 flows through the second H-bridge circuit, and the output of the second H-bridge circuit is 0 or plus or minus UCThe first H-bridge circuit is in a bypass state such that the incoming line current from the converter station 2 decreases and the incoming line current from the converter station 3 increases;
in the second half period, when the voltage modulation wave of the direct current capacitor is smaller than the voltage modulation wave of the direct current capacitor, the current of the input line of the converter station 2 flows through the first H-bridge circuit to discharge the direct current capacitor, and the first H-bridge circuit outputs +/-UCThe second H-bridge circuit is in a bypass state, and the voltage of the direct current capacitor is reduced; when the voltage modulation wave of the direct current capacitor is larger than the voltage modulation wave of the direct current capacitor, the current of the input line of the converter station 2 flows through the first H-bridge circuit, the first H-bridge circuit outputs 0, the second H-bridge circuit is in a bypass state, and the voltage of the direct current capacitor is increased.
7. The control method according to claim 6, characterized in that: the calculation expression of the line current input from the converter station 2 is as follows:
Figure FDA0002910762390000031
the calculation expression of the line current input from the converter station 3 is:
Figure FDA0002910762390000032
wherein, U1、U2、U3The output direct-current voltage of the main converter station 1, the input direct-current voltage of the slave converter station 2 and the input direct-current voltage of the slave converter station 3 are respectively; u shapeaThe power flow controller is connected in series with the voltage between the main converter station 1 and the slave converter station 2 after power flow control; u shapebThe voltage between the main converter station 1 and the slave converter station 3 is connected in series to a power flow controller after power flow control; rL1Is the equivalent resistance of the incoming line from the converter station 2; rL2Is the equivalent resistance of the incoming line from the converter station 3; I.C. AL1Is the average current flowing through the incoming line from the converter station 2, i.e. the incoming line current from the converter station 2; I.C. AL2Is the average current flowing through the incoming line from the converter station 3, i.e. the incoming line current from the converter station 3.
8. The control method according to any one of claims 3 to 7, characterized in that: in step 2, the specific control process in the short-circuit fault state includes:
acquiring a short-circuit fault signal, and enabling power devices in a first H-bridge circuit and a second H-bridge circuit to be in a turn-off state according to the short-circuit fault signal, so that the first H-bridge circuit and the second H-bridge circuit are in an uncontrollable rectification state;
the fault current charges the direct current capacitor through anti-parallel diodes in the first H-bridge circuit and the second H-bridge circuit;
and when the voltage of the direct current capacitor is greater than or equal to the protection upper limit voltage of the direct current capacitor, controlling the first bypass switch and the second bypass switch to be conducted so as to enable the line-to-line direct current power flow controller to bypass.
9. The control method according to claim 8, characterized in that: the short-circuit fault signal acquisition process comprises the following steps: when any one of the line current or the direct current capacitor voltage input from the converter station 2 exceeds the respective short-circuit threshold value, a short-circuit fault signal is sent out;
the short-circuit threshold value I of the line current input from the converter station 2OC15A, a short-circuit threshold U of the DC capacitor voltageOCIs 50V.
10. A multi-terminal direct current system comprising at least a master converter station 1 and two slave converter stations 2/3, characterized in that: the method further comprises the interline direct current power flow controller according to claim 1 or 2, wherein one end of a first bypass switch and one end of a second bypass switch in the interline direct current power flow controller are connected in series and then connected with the main converter station 1, and the other end of the first bypass switch and the other end of the second bypass switch are respectively connected with the slave converter station 2 and the slave converter station 3.
CN202110085796.5A 2021-01-22 2021-01-22 Inter-line direct current power flow controller, control method and multi-terminal direct current system Pending CN114784782A (en)

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