CN114783897B - Chip structure planted with different-size solder balls and processing technology thereof - Google Patents

Chip structure planted with different-size solder balls and processing technology thereof Download PDF

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Publication number
CN114783897B
CN114783897B CN202210438170.2A CN202210438170A CN114783897B CN 114783897 B CN114783897 B CN 114783897B CN 202210438170 A CN202210438170 A CN 202210438170A CN 114783897 B CN114783897 B CN 114783897B
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ball
ubm layer
solder balls
diameter
solder
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CN114783897A (en
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严晨虎
李春阳
方梁洪
李宁
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Ningbo Chipex Semiconductor Co ltd
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Ningbo Chipex Semiconductor Co ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/14Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/11Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/14Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
    • H01L2224/1401Structure
    • H01L2224/1403Bump connectors having different sizes, e.g. different diameters, heights or widths

Abstract

The application relates to a chip structure planted with different-size solder balls and a processing technology thereof, wherein the chip structure comprises: a chip provided with a bonding pad; UBM layers stacked on the bonding pads and connected to each other with at least one; solder balls which are in one-to-one correspondence with each bonding pad and are implanted on the UBM layer far away from the bonding pad; the ball diameter of the solder balls implanted corresponding to the UBM layers with larger stacking number is smaller, so that the ball height of each solder ball is equal. The process comprises the following steps: forming a PI protective layer on the chip; forming a UBM layer on the area where each bonding pad is located; forming a photoresist layer on the chip; forming a UBM layer on the area of the bonding pad corresponding to the small spherical solder ball; removing the photoresist layer; and implanting tin balls with corresponding ball diameters into the UBM layer on the top. The solder balls with different sizes on the chip can be equal in ball height, and the connection quality of the chip implanted with the solder balls with different sizes and the substrate is improved.

Description

Chip structure planted with different-size solder balls and processing technology thereof
Technical Field
The present disclosure relates to semiconductor packaging, and more particularly, to a chip structure with different-sized solder balls and a processing technique thereof.
Background
Wafer level chip scale packaging (Wafer Level Chip Scale Packaging, WLCSP) is a process technique in which wafer level packaging is first performed and then the chips are singulated by dicing. Compared with the traditional packaging, the wafer level packaging has the advantages of high packaging efficiency, small packaging size (approaching 100%), high I/O pin density, low induction, low heat dissipation capacity and the like.
Ball placement technology is one of the key technologies. And (3) implanting Balls (BP), namely implanting tin balls on the UBM layer formed by electrochemical deposition by utilizing a ball implantation net plate, and finally forming array balls on the electric layer for connecting the chip and the substrate to form electric interconnection. After ball placement, the uniformity of the ball height is one of the key factors of the chip quality, which affects the connection quality of the chip and the substrate, the wafer grinding, and the like. If the ball heights are uneven, bad phenomena such as cold joint and the like can be generated, so that the chip performance is poor and even scrapped.
Disclosure of Invention
In order to improve the connection quality of chips planted with solder balls with different sizes and a substrate, the application provides a chip structure planted with different-size solder balls and a processing technology thereof.
In a first aspect, the present application provides a chip structure planted with different-size solder balls, which adopts the following technical scheme:
a chip structure planted with different size solder balls, comprising:
a chip provided with a bonding pad;
UBM layers stacked on the bonding pads and connected to each other with at least one;
solder balls which are in one-to-one correspondence with each bonding pad and are implanted on the UBM layer far away from the bonding pad;
the ball diameter of the solder balls implanted corresponding to the UBM layers with larger stacking number is smaller, so that the ball height of each solder ball is equal.
By adopting the technical scheme, when the spherical diameter of the solder ball is smaller, the heights of the UBM layers of the corresponding parts can be increased by superposing and adding the UBM layers, so that the heights of the UBM layers positioned at the top of the chip after the solder ball is implanted can be the same as those of the solder balls implanted in other parts. Therefore, the tops of all the tin balls can be positioned on the same horizontal plane, and when the chip under the structure is connected with the substrate, each tin ball can be reliably connected with the substrate.
Preferably, a passivation layer disposed on the chip and having an opening for exposing the pad;
the PI protective layer is arranged on the passivation layer;
and the UBM layer connected with the bonding pad passes through the opening of the passivation layer and then is connected with the bonding pad.
In a second aspect, the present application provides a chip processing technology for implanting a solder ball with different dimensions, which adopts the following technical scheme:
a chip processing technology for implanting different-size solder balls comprises the following steps:
gluing on the chip to form a PI protective layer;
based on the PI protective layer, photoetching, developing and electrochemical depositing are sequentially carried out on the area where each bonding pad is positioned so as to form a UBM layer;
photoresist layer gluing, namely gluing the chip to form a photoresist layer, wherein each UBM layer is covered by the photoresist layer;
a top UBM layer forming step of performing photoetching, developing and electrochemical deposition on the area where the bonding pad corresponding to the small spherical solder ball is located based on the photoresist layer to form the UBM layer; a plurality of UBM layers corresponding to the same bonding pad are connected with each other;
removing photoresist layer;
and implanting tin balls with corresponding ball diameters into the UBM layer on the top.
By adopting the technical scheme, when the spherical diameter of the solder ball is smaller, the heights of the UBM layers of the corresponding parts can be increased by superposing and adding the UBM layers, so that the heights of the UBM layers positioned at the top of the chip after the solder ball is implanted can be the same as those of the solder balls implanted in other parts. Therefore, the tops of all the tin balls can be positioned on the same horizontal plane, and when the chip under the structure is connected with the substrate, each tin ball can be reliably connected with the substrate.
Preferably, each solder ball with a ball diameter is correspondingly provided with a UBM layer for the corresponding implantation of the solder ball, the area of the UBM layer for the implantation of the solder ball is related to the ball diameter of the solder ball, and the thickness of the UBM layer for the implantation of the solder ball is related to the ball diameter of the solder ball and the ball diameter of the solder ball with the largest ball diameter;
and in the process of forming the second UBM layer, photoetching, developing and electrochemical depositing are carried out on the area where at least one bonding pad corresponding to the solder ball with the same ball diameter is positioned so as to form the UBM layer with corresponding thickness and area.
By adopting the technical scheme, the tin ball with smaller ball diameter is adapted by adjusting the thickness of the second UBM layer.
Preferably, the method for obtaining the thickness of the second UBM layer for tin ball implantation includes:
acquiring current sphere diameter information of a tin sphere to be implanted;
acquiring a proportional relation between current spherical diameter information and maximum spherical diameter information;
obtaining maximum ball distance information between the ball center of the tin ball with the maximum ball diameter and the corresponding UBM layer;
calculating current ball distance information according to the proportional relation between the maximum ball distance information and the current ball diameter information;
and calculating thickness information of the UBM layer for the tin ball implantation according to the current ball distance information and the maximum ball distance information.
By adopting the technical scheme, for the tin ball implantation of the same process, an equal proportion coefficient is always maintained between the radius of the surface of the UBM and the spherical diameter of the tin ball, and the change of the spherical diameter of the tin ball can be regarded as equal proportion amplification of the radius of the surface of the UBM, so that the distance between the spherical center of the tin ball and the surface of the UBM is also equal proportion amplified along with the change of the spherical diameter of the tin ball. The required thickness of the UBM layer can thus be calculated correspondingly by this relation.
Preferably, each solder ball with a ball diameter is correspondingly provided with a UBM layer for the corresponding implantation of the solder ball, the area of the UBM layer for the implantation of the solder ball is related to the ball diameter of the solder ball, wherein the photoresist layer gluing step, the top UBM layer forming step and the second photoresist layer photoresist removing step are repeated for a plurality of times;
photoetching, developing and electrochemically depositing all areas where the ball diameters are smaller than the corresponding bonding pads of the current solder balls in the process of repeating the forming steps of the top UBM layer each time according to the sequence from large to small according to the ball diameters of the solder balls so as to form the UBM layer;
in each process of forming the UBM layer, the thickness of the UBM layer is associated with the difference between the spherical diameter of the solder ball corresponding to the current top UBM layer forming step and the spherical diameter of the solder ball corresponding to the previous top UBM layer forming step.
By adopting the technical scheme, the method is suitable for the tin ball with smaller ball diameter by stacking the thicknesses of UBM layers with different heights.
Preferably, the method of calculating the thickness of the UBM layer to be formed in the current top UBM layer forming step includes:
acquiring sphere diameter information of a solder ball corresponding to the previous top UBM layer forming step and defining the sphere diameter information as first sphere diameter information;
acquiring sphere diameter information of a solder ball corresponding to the current top UBM layer forming step and defining the sphere diameter information as second sphere diameter information;
calculating the proportional relation between the first sphere diameter information and the second sphere diameter information;
acquiring ball distance information between a ball center of a solder ball corresponding to the previous top UBM layer forming step and a corresponding UBM layer, and defining the ball distance information as first ball distance information;
calculating second ball distance information according to the first ball distance information and the proportional relation between the first ball diameter information and the second ball diameter information, wherein the second ball distance information is the ball distance information between the ball center of the solder ball corresponding to the current top UBM layer forming step and the corresponding UBM layer;
and calculating thickness information of the UBM layer for tin ball implantation in the current top UBM layer forming step according to the second ball distance information and the first ball distance information.
By adopting the technical scheme, for the tin ball implantation of the same process, an equal proportion coefficient is always maintained between the radius of the surface of the UBM and the spherical diameter of the tin ball, and the change of the spherical diameter of the tin ball can be regarded as equal proportion amplification of the radius of the surface of the UBM, so that the distance between the spherical center of the tin ball and the surface of the UBM is also equal proportion amplified along with the change of the spherical diameter of the tin ball. The required thickness of the UBM layer can thus be calculated correspondingly by this relation.
Preferably, the photoresist layer gluing step, the top UBM layer forming step and the photoresist layer gluing step are repeated for a plurality of times; the process further comprises:
classifying a plurality of solder balls with different ball diameters according to a preset classification method, wherein the solder ball with the largest ball diameter is one of the solder balls;
in the process of repeating the forming step of the top UBM layer each time, photoetching, developing and electrochemically depositing the solder balls with the largest ball diameter in each type of solder balls and all areas which do not belong to the current type and are smaller than the corresponding bonding pads of the current solder balls according to the ball diameters of the solder balls in order from large to small so as to form the UBM layer;
after the UBM layer corresponding to the solder ball with the largest ball diameter in each type of solder ball is formed, comparing the ball diameter of the solder ball corresponding to the current top UBM layer forming step with the reference ball diameter information to determine the thickness of the formed UBM layer in the process of repeating the top UBM layer forming step each time, wherein the reference ball diameter information is the ball diameter of the solder ball with the largest ball diameter in the type closest to and larger than the ball diameter of the current solder ball.
By adopting the technical scheme, the solder balls with smaller ball diameters are adapted by stacking the thicknesses of UBM layers with different heights on the bonding pads corresponding to the solder balls with larger ball diameter difference. And the solder balls with smaller ball diameter difference are adapted to the solder balls with smaller ball diameter by adopting a mode of adjusting the thickness of the UBM layer.
Preferably, the method of comparing the sphere diameter of the corresponding solder ball in the current top UBM layer forming step with the reference sphere diameter information to determine the thickness of the formed UBM layer includes:
acquiring spherical diameter information of a solder ball corresponding to the current top UBM layer forming step and defining the spherical diameter information as target spherical diameter information;
calculating the proportional relation between the reference sphere diameter information and the target sphere diameter information;
acquiring ball distance information between the ball center of the solder ball corresponding to the reference ball diameter information and the corresponding UBM layer, and defining the ball distance information as reference ball distance information;
calculating target ball distance information according to the reference ball distance information and the proportional relation between the reference ball diameter information and the target ball diameter information, wherein the target ball distance information is the ball distance information between the ball center of the solder ball corresponding to the current top UBM layer forming step and the corresponding UBM layer;
and calculating and determining the thickness of the formed UBM layer according to the target pitch information and the reference pitch information.
By adopting the technical scheme, for the tin ball implantation of the same process, an equal proportion coefficient is always maintained between the radius of the surface of the UBM and the spherical diameter of the tin ball, and the change of the spherical diameter of the tin ball can be regarded as equal proportion amplification of the radius of the surface of the UBM, so that the distance between the spherical center of the tin ball and the surface of the UBM is also equal proportion amplified along with the change of the spherical diameter of the tin ball. The required thickness of the UBM layer can thus be calculated correspondingly by this relation.
In summary, the ball heights of the solder balls with different sizes on the chip can be equal, and the connection quality of the chip with the solder balls with different sizes and the substrate is improved.
Drawings
Fig. 1 is a schematic structural diagram of a chip structure according to an embodiment of the invention.
Fig. 2 is a schematic flow chart of a processing process according to an embodiment of the invention.
Fig. 3 is a schematic flow chart of a first UBM forming process according to an embodiment of the present invention.
Fig. 4 is a schematic diagram of a process of forming a second UBM layer and implanting tin according to an embodiment of the present invention.
Fig. 5 is a schematic flow chart of a processing process according to an embodiment of the invention.
Fig. 6 is a schematic structural diagram of a chip structure according to an embodiment of the invention.
Fig. 7 is a flowchart of a UBM layer thickness calculating method according to an embodiment of the present invention.
Fig. 8 is a schematic flow chart of a processing process according to an embodiment of the invention.
Fig. 9 is a schematic structural diagram of a chip structure according to an embodiment of the invention.
Fig. 10 is a flowchart of a UBM layer thickness calculating method according to an embodiment of the present invention.
FIG. 11 is a schematic flow chart of a processing process according to an embodiment of the invention.
Fig. 12 is a schematic structural diagram of a chip structure according to an embodiment of the invention.
Fig. 13 is a flowchart of a UBM layer thickness calculating method according to an embodiment of the present invention.
Reference numerals illustrate: 1. a chip; 2. a bonding pad; 3. a passivation layer; 4. a PI protective layer; 5. a UBM layer; 6. a photoresist layer; 7. solder balls.
Detailed Description
The present application is described in further detail below in conjunction with figures 1-13.
The embodiment of the application discloses a chip structure planted with different-size solder balls, and referring to fig. 1, a bonding pad 2 and a passivation layer 3 are arranged on a chip 1, the passivation layer 3 covers part of the bonding pad 2, and a PI protective layer is attached to the passivation layer 3. The passivation layer 3 is formed with an opening exposing the pad 2 at the location of the pad 2, and the pad 2 is connected with a UBM layer 5, and the UBM layer 5 connected with the pad 2 is connected with the pad 2 after passing through the opening of the passivation layer 3. Wherein the pads 2 may also be rewiring layers.
The UBM layer 5 is used for implanting the solder balls 7, and the size of the solder balls 7 may have at least two different sizes according to the corresponding process requirements of the chip, and a specific number is considered when designing the chip, and parameters such as conductivity can be improved by implanting the solder balls 7 with different sizes into different UBM layers 5 due to different performances required by different pads 2. Meanwhile, due to the relative fixation of the bonding pads 2, and the ball centers of the solder balls 7 and the bonding pads 2 are on the same vertical line after implantation, the ball distance between the adjacent implanted solder balls 7 is always constant, so that the distance between the edges of the adjacent solder balls 7 can be changed by changing the ball diameter of the solder balls 7.
However, if the solder balls 7 with different ball diameters are directly implanted on the single UBM layer, the top ends of the solder balls 7 are not on the same horizontal plane due to the different ball diameters, so that the occurrence of the conditions such as cold joint and the like is easily caused in the connection process between the substrate and the substrate in the later stage. In addition, due to the process specificity, the solder balls 7 are generally implanted on the corresponding UBM layers 5 through the tin-implanting screen plate, and it is difficult to implant solder balls 7 with different sizes on the corresponding UBM layers 5 at a time by single tin implantation.
Based on this, the above-mentioned problem is solved in the chip structure of the present application by designing a plurality of UBM layers 5. The UBM layers 5 correspondingly connected to each bonding pad 2 are stacked and at least one UBM layer is disposed, and UBM layers 5 of each stack are connected to each other. The solder balls 7 with the largest ball diameters may be directly implanted on the single UBM layer 5 (i.e., on the single UBM layer 5 directly connected to the pad 2), and as the UBM layers 5 are stacked, the ball diameters of the UBM layers 5 corresponding to the implanted solder balls 7 are smaller, so that the top of each solder ball 7 may be located on the same plane, so that the ball heights of each solder ball 7 (i.e., the distance between the highest position of the solder ball 7 and the pad 2) are equal.
For the solder balls 7 with two ball diameters, only two UBM layers 5 are stacked on the bonding pad 2 where the solder balls 7 with smaller ball diameters are to be implanted, and the ball height of the implanted solder balls 7 is the same as that of the solder balls 7 implanted by the single UBM layer 5 by adjusting the area and the height of the second UBM layer. Referring to fig. 2, 3 and 4, the processing technology specifically includes the following steps:
s100: a glue is applied to the chip 1 to form a PI protective layer 4.
S200: based on the PI protective layer 4, the region where each pad 2 is located is subjected to photolithography, development, and electrochemical deposition successively to form the UBM layer 5.
The photoresist is coated on the surface of the chip 1 (covering the passivation layer 3 and the bonding pad 2). In the photoetching process, the mask plate is needed to be used for realizing, light rays are transmitted to the photoresist through a design pattern on the mask plate, so that the photoresist at the position corresponding to the bonding pad 2 keeps small molecules, and the photoresist at other positions is polymerized into macromolecules. The development is to dissolve and wash out small molecules at the opening of the corresponding bonding pad 2 through the developing solution, so that the photoresist coated on the chip 1 can be provided with an opening of a design pattern corresponding to the mask plate. Corresponding to this step, after photolithography and development, the PI protective layer 4 forms an opening at the position corresponding to the pad 2, and after electrochemical deposition, a UBM layer 5 connected to the pad 2 is formed on the pad 2. The area of the UBM layer 5 is related to the size of the opening formed on the PI protection layer 4 by photolithography and development, and the thickness of the UBM layer 5 is related to the process of electrochemical deposition, and the thickness of the UBM layer 5 formed can be changed by changing various parameters of the electrochemical deposition. Wherein, the solder balls 7 with each ball diameter have a one-to-one correspondence with the area of the UBM layer 5 to be implanted.
S300: and photoresist layer gluing step, gluing on the chip 1 to form a photoresist layer 6.
The thickness of the photoresist layer 6 needs to cover each UBM layer 5, and the material of the photoresist layer 6 is different from the material of the PI protection layer 4.
S400: and forming the top UBM layer 5, namely performing photoetching, developing and electrochemical deposition on the region of the solder pad 2 corresponding to the small-sphere-diameter solder ball 7 based on the photoresist layer 6 to form the UBM layer 5.
After photolithography, development and electrochemical deposition, a corresponding UBM layer 5 is formed at the opening formed by the corresponding photoresist layer 6, and is connected to the UBM layer 5 formed previously, similar to the process of step S200. Wherein, each solder ball 7 with different ball diameters corresponds to a UBM layer 5 for the corresponding implantation of the solder ball 7, the area of the UBM layer 5 formed is related to the ball diameter of the solder ball 7 to be implanted, and the thickness of the UBM layer 5 for the implantation of the solder ball 7 is related to the ball diameters of the two solder balls 7, so that the ball height of the second UBM layer 5 formed after the step S400 and the ball height of the first UBM layer 5 after the implantation of the solder ball 7 can be kept equal after the implantation of the solder ball 7 with the corresponding ball diameter. In general, the thickness of the second UBM layer 5 can be obtained experimentally or empirically determined for solder balls 7 having only two different ball diameters, and is applied in a specific process.
S500: and removing photoresist layer 6 in the second protective layer photoresist removing step.
Since the material of the PI protection layer 4 is different from that of the photoresist layer 6, only the photoresist layer 6 can be removed by the corresponding photoresist remover, leaving the PI protection layer 4.
S600: a solder ball 7 of a corresponding ball diameter is implanted into the UBM layer 5 on top.
The solder balls 7 may be implanted in two steps, i.e. each time the mesh on the mesh plate is implanted on the chip 1 for only solder balls 7 of one ball diameter.
However, when there are more than three ball diameters of the solder balls 7 to be implanted, the steps S100-S600 of a single round cannot form a plurality of UBM layers 5 to satisfy the implantation of the solder balls 7 with different ball diameters, and therefore, the steps S300-S500 are repeated for a plurality of times according to the number of ball diameters of the solder balls 7. After all UBM layers 5 to be formed are formed, the cycle is ended and the process proceeds to step S600.
Referring to fig. 5 and 6, in one embodiment, UBM layers 5 are formed in at most two layers, and the thickness of the corresponding second UBM layer 5 is changed according to the ball diameter of each solder ball 7, so that the ball height of each solder ball 7 can be correspondingly equal, and thus, the thickness of each second UBM layer 5 is related to the ball diameter of the solder ball 7 and the ball diameter of the solder ball 7 with the largest ball diameter. The chip structure corresponding to the structure is suitable for the situation that the ball diameter of each solder ball 7 has small change.
Specifically, each time the process is repeated to step S400, the area of at least one bonding pad 2 corresponding to the solder ball 7 with the same ball diameter is subjected to photolithography, development and electrochemical deposition to form the UBM layer 5 with a corresponding thickness and area. The thickness of UBM layer 5 required for solder ball 7 can be calculated from the ball diameter of solder ball 7 and the ball diameter of solder ball 7 with the largest ball diameter. Referring to fig. 7, specifically, the method includes the following steps:
s410: current ball diameter information of the solder ball 7 to be implanted is acquired.
The current ball diameter information represents the ball diameter of the solder ball 7 corresponding to the solder pad 2 corresponding to the UBM layer 5, which is determined by the process requirement of the chip, that is, each solder pad 2 has a corresponding size of one solder ball 7.
S411: and acquiring the proportional relation between the current spherical diameter information and the maximum spherical diameter information.
The maximum sphere diameter information represents the sphere diameter corresponding to the maximum solder ball 7, and the maximum solder ball 7 is determined by the technological requirement of the chip. The proportional relation refers to a proportional coefficient obtained by dividing the maximum sphere diameter information by the current sphere diameter information.
S412: and acquiring the maximum ball distance information between the ball center of the solder ball 7 with the maximum ball diameter and the corresponding UBM layer 5.
Generally, the area of the UBM layer 5 where the solder ball 7 with the largest sphere diameter is implanted has a corresponding mapping relationship, so that the distance between the center of the solder ball 7 and the surface of the UBM layer 5, that is, the maximum sphere distance information, can be obtained by a pre-calculation method.
S413: and calculating the current ball distance information according to the maximum ball distance information and the proportional relation between the current ball diameter information and the maximum ball diameter information.
For the implantation of the solder ball 7 in the same process, an equal proportionality coefficient is always maintained between the radius of the surface of the UBM and the spherical diameter of the solder ball 7, and the change of the spherical diameter of the solder ball 7 can be regarded as equal proportionality amplification of the radius of the surface of the UBM, so that the distance between the spherical center of the solder ball 7 and the surface of the UBM is also equal proportionality amplified along with the change of the spherical diameter of the solder ball 7. Therefore, the distance between the center of the current solder ball 7 and the surface of the UBM, that is, the current pitch information, can be obtained correspondingly through the maximum pitch information and the proportional relationship between the current pitch information and the maximum pitch information.
S414: and calculating thickness information of the UBM layer 5 implanted by the solder ball 7 according to the current ball distance information and the maximum ball distance information.
The specific thickness information may be obtained by adding the difference between the current spherical diameter information and the maximum spherical diameter information to the difference between the maximum spherical distance information and the current spherical distance information, and when it is assumed that the top of the solder ball 7 is located on the same horizontal plane, the smaller solder ball 7 will be affected by the current spherical distance information and the maximum spherical distance information to change the distance between the center of the solder ball 7 and the UBM layer 5, and the center of the solder ball 7 will be affected by the spherical diameter and become higher, so that the required thickness of the UBM layer 5 can be obtained by corresponding conversion according to the difference between the maximum spherical distance information and the current spherical diameter information and the difference between the current spherical diameter information and the maximum spherical diameter information.
Referring to fig. 8 and 9, in one embodiment, UBM layers 5 may be implemented in a multi-layered stack, i.e., UBM layers 5 of corresponding thickness are gradually applied over all pads 2 in such a manner that the spherical diameter of solder balls 7 is from large to small. For example, when the solder ball 7 has three ball diameters ABC, a is the solder ball 7 with the largest ball diameter, B times, a corresponds to one UBM layer 5, and the thickness of the UBM layer 5 required by B is correspondingly calculated by the change of the ball diameters between a and B, meanwhile, the thickness of the UBM layer 5 calculated by B is applied to the UBM layer 5 corresponding to C, and finally, the thickness of the UBM layer 5 corresponding to C is correspondingly calculated according to the ball diameters between B and C. Thus, from a structural point of view, a would be implanted on a single UBM layer 5, B would be implanted on a double UBM layer 5, and C would be implanted on a triple UBM layer 5. Therefore, the number of stacks of UBM layers 5 is associated with the order of the spherical diameters of the corresponding implanted solder balls 7 among the spherical diameters of all the solder balls 7, and the thickness of UBM layers 5 is set to the same number of layers corresponding to the number of kinds of spherical diameters of the solder balls 7. Also, in this embodiment, steps S300 to S500 are repeated several times according to the number of diameters of the solder balls 7.
The step S400 specifically includes: and according to the ball diameters of the solder balls 7, in the process of repeating the forming steps of the top UBM layer 5 each time, photoetching, developing and electrochemical depositing are carried out on all areas where the ball diameters are smaller than the corresponding bonding pads 2 of the current solder balls 7 so as to form the UBM layer 5.
After the UBM layer 5 corresponding to the solder ball 7 with each ball diameter is formed, the cycle from step S300 to step S500 is ended, and the process proceeds to step S600.
Since the number of UBM layers 5 corresponding to the solder balls 7 having smaller ball diameters is larger, each UBM layer 5 is formed by laying layer by layer. As described above, in each molding of the UBM layer 5, the thickness of each molding of the UBM layer 5 is associated with the difference between the spherical diameter of the corresponding solder ball 7 in the current step S400 and the spherical diameter of the corresponding solder ball 7 in the previous step S400.
Referring to fig. 10, as a specific calculation method, there is included:
s420: and acquiring the sphere diameter information of the solder ball 7 corresponding to the previous forming step of the top UBM layer 5, and defining the sphere diameter information as first sphere diameter information.
Wherein, the sphere diameter information of the solder ball 7 corresponding to the previous step of forming the UBM layer 5 at the top represents the sphere diameter of the solder ball 7 selected as the reference UBM layer 5 forming thickness in step S400 when the previous step S300-step S500 is repeated.
S421: and acquiring the sphere diameter information of the solder balls 7 corresponding to the current forming step of the top UBM layer 5 and defining the sphere diameter information as second sphere diameter information.
When the ball diameter information of the solder ball 7 corresponding to the current molding step of the top UBM layer 5 represents the current cycle of steps S300-S500, the ball diameter of the solder ball 7 serving as the molding thickness of the reference UBM layer 5 is selected correspondingly in step S400.
S422: and calculating the proportional relation between the first sphere diameter information and the second sphere diameter information.
The proportional relation refers to a proportional coefficient obtained by dividing the first sphere diameter information and the second sphere diameter information.
S423: and acquiring the ball distance information between the ball center of the solder ball 7 corresponding to the previous forming step of the top UBM layer 5 and the corresponding UBM layer 5, and defining the ball distance information as first ball distance information.
S424: and calculating second ball pitch information according to the first ball pitch information and the proportional relation between the first ball pitch information and the second ball pitch information, wherein the second ball pitch information is the ball pitch information between the ball center of the solder ball 7 corresponding to the current forming step of the top UBM layer 5 and the corresponding UBM layer 5.
Generally, the area of the UBM layer 5 where the solder ball 7 with the largest sphere diameter is implanted has a corresponding mapping relationship, in the process of the first cycle, the distance between the center of the solder ball 7 and the surface of the UBM layer 5 is obtained by a pre-calculation method, and then in the process of the second cycle execution and repeating the methods in S400, the distance between the center of the solder ball 7 and the surface of the UBM layer 5 calculated for the second time is obtained according to the first data calculation. In the course of each repetition cycle, the data of the second time is calculated according to the data of the previous time. Similarly, for the implantation of the solder ball 7 in the same process, an equal proportionality coefficient is always maintained between the radius of the surface of the UBM and the sphere diameter of the solder ball 7, and the change of the sphere diameter of the solder ball 7 can be regarded as equal proportionality amplification of the radius of the surface of the UBM, so that the distance between the sphere center of the solder ball 7 and the surface of the UBM is also equal proportionality amplified along with the change of the sphere diameter of the solder ball 7.
S425: and calculating thickness information of the UBM layer 5 for the tin ball 7 to be implanted in the current forming step of the top UBM layer 5 according to the second ball distance information and the first ball distance information.
The specific thickness information may be obtained by adding the difference between the second pitch information and the first pitch information to the difference between the second pitch information and the first pitch information, and when it is assumed that the top of the solder ball 7 is located on the same horizontal plane, the smaller solder ball 7 will be affected by the second pitch information and the first pitch information to cause the change of the distance between the center of the solder ball 7 and the UBM layer 5, and the center of the solder ball 7 will also be affected by the ball diameter to be increased, so that the required thickness of the UBM layer 5 can be obtained by corresponding conversion according to the difference between the first pitch information and the second pitch information and the difference between the first pitch information and the second pitch information.
Therefore, the chip 1 structure formed correspondingly in this embodiment is more suitable for the case where the ball diameter of the solder ball 7 is greatly changed than the chip 1 structure formed correspondingly in the previous embodiment. If the variation in the spherical diameter of the solder balls 7 is small, the formation of the thin UBM layer 5 in this embodiment will affect specific parameters and strength.
Referring to fig. 11 and 12, when the number of solder balls 7 is three or more, there may be cases where the difference in the ball diameters of some two solder balls 7 is large and the difference in the ball diameters of other two solder balls 7 is small. Thus in one embodiment, the structure and specific machining process can be optimized by combining the ways in the first two embodiments.
Before the processing process is performed, a plurality of solder balls 7 with different ball diameters are classified according to a preset classification method, wherein the solder ball 7 with the largest ball diameter is one of the classes. The classification criterion may be a range of a predetermined sphere diameter size, and is associated with sphere diameter information corresponding to the solder ball 7 having the largest sphere diameter. For example, with four ABCD solder balls 7 having successively smaller ball diameters, the B solder balls 7 and the C solder balls 7 are classified into the same class, and the finally classified solder balls 7 are classified into three classes. Among them, the a solder balls 7 are always of the same type because of the largest ball diameter.
For step S400, it is specifically: during each repetition of the forming step of the top UBM layer 5, for the solder balls 7 with the largest ball diameter in each type of solder balls 7, the solder balls 7 and all the areas where the solder balls 2 which do not belong to the current type and have the ball diameters smaller than the corresponding solder balls 7 are subjected to photoetching, developing and electrochemical deposition according to the ball diameters of the solder balls 7 from the large to the small order to form the UBM layer 5.
Since the B solder balls 7 and the C solder balls 7 are the same type, and the ball diameter of the B solder balls 7 is larger than that of the C solder balls 7, the solder balls 7 with the largest ball diameter in each type of solder balls 7 are a-B-D, and then, according to the sequence of a-B-D, all the areas which do not belong to the current type and have the ball diameter smaller than that of the corresponding bonding pads 2 of the current solder balls 7 are subjected to photolithography, development and electrochemical deposition. For example, in the process of forming the UBM layer 5 corresponding to the B solder ball 7, since the D solder ball 7 belongs to one type of the B solder ball 7, and the ball diameter of the D solder ball 7 is smaller than that of the B solder ball 7, the UBM layer 5 is formed simultaneously in the areas of the B solder ball 7 and the pad 2 corresponding to the D solder ball 7. The method of calculating the thickness of the UBM layer 5 is the same as each of steps S420 to S424.
After the UBM layer 5 corresponding to the solder ball 7 with the largest ball diameter among the solder balls 7 of each type is formed, the ball diameter of the solder ball 7 corresponding to the current forming step of the top UBM layer 5 is compared with the reference ball diameter information to determine the thickness of the formed UBM layer 5 and form the UBM layer 5 during each repetition of the forming step of the top UBM layer 5.
The reference ball diameter information is the ball diameter of the solder ball 7 which is closest to and larger than the largest ball diameter of the current solder ball 7. For example, for the C-tin ball 7, the class corresponding to the a-tin ball 7 is the one closest to and larger than the current ball diameter of the tin ball 7, and since there is only one a-tin ball 7 in the class of the a-tin ball 7, the ball diameter information of the a-tin ball 7 is the reference ball diameter information with respect to the C-tin ball 7.
Thus, for the same type of solder balls 7, they are regarded as solder balls 7 with similar ball diameters, and therefore, for solder balls 7 with similar ball diameters, the UBM layer 5 is formed by changing the thickness of the UBM layer 5, and for solder balls 7 with different types, that is, UBM layers 5 stacked to form the top layer are formed by stacking UBM layers 5. It can be seen that, at the beginning of the cycle, since the UBM layers 5 corresponding to the solder balls 7 with the largest ball diameter in each type of solder balls 7 are not formed yet, the UBM layers 5 corresponding to the solder balls 7 are stacked upwards, and the UBM layers 5 corresponding to the C solder balls 7 are formed again after the UBM layers 5 are stacked.
Wherein, referring to fig. 13, the method for comparing the sphere diameter of the corresponding solder ball 7 in the current molding step of the top UBM layer 5 with the reference sphere diameter information to determine the thickness of the molded UBM layer 5 includes:
step S430: and acquiring the sphere diameter information of the solder balls 7 corresponding to the current forming step of the top UBM layer 5, and defining the sphere diameter information as target sphere diameter information.
When the ball diameter information of the solder ball 7 corresponding to the current molding step of the top UBM layer 5 represents the current cycle of steps S300-S500, the ball diameter of the solder ball 7 corresponding to the molding thickness of the reference UBM layer 5 is selected as the target ball diameter information in step S400.
Step S431: and calculating the proportional relation between the reference sphere diameter information and the target sphere diameter information.
The proportional relation refers to a proportional coefficient obtained by dividing the reference sphere diameter information by the target sphere diameter information.
Step S432: ball pitch information between the center of the solder ball 7 corresponding to the reference ball diameter information and the corresponding UBM layer 5 is acquired and defined as the reference ball pitch information.
Step S433: and calculating target ball distance information according to the reference ball distance information and the proportional relation between the reference ball distance information and the target ball distance information, wherein the target ball distance information is the ball distance information between the ball center of the solder ball 7 corresponding to the current forming step of the top UBM layer 5 and the corresponding UBM layer 5.
Generally, for the second type of solder balls 7, the reference pitch information is the pitch information of the solder balls 7 with the largest pitch, and the area of the UBM layer 5 where the solder balls 7 with the largest pitch are implanted has a corresponding mapping relationship, in the first cycle, the pitch between the center of the solder balls 7 and the surface of the UBM layer 5 is obtained by a method of pre-calculating, and then in the second cycle, when repeating the methods in S400, the pitch between the center of the solder balls 7 and the surface of the UBM layer 5 is calculated according to the first data. In the course of each repetition cycle, the data of the second time is calculated according to the data of the previous time. Similarly, for the implantation of the solder ball 7 in the same process, an equal proportionality coefficient is always maintained between the radius of the surface of the UBM and the sphere diameter of the solder ball 7, and the change of the sphere diameter of the solder ball 7 can be regarded as equal proportionality amplification of the radius of the surface of the UBM, so that the distance between the sphere center of the solder ball 7 and the surface of the UBM is also equal proportionality amplified along with the change of the sphere diameter of the solder ball 7.
Step S434: the thickness of the formed UBM layer 5 is calculated and determined based on the target pitch information and the reference pitch information.
The specific thickness information may be obtained by adding the difference between the target pitch information and the reference pitch information to the difference between the target pitch information and the reference pitch information, and when it is assumed that the top of the solder ball 7 is located on the same horizontal plane, the smaller solder ball 7 will be affected by the target pitch information and the reference pitch information to change the distance between the center of the solder ball 7 and the UBM layer 5, and the center of the solder ball 7 will be affected by the ball pitch and thus the ball pitch will be increased, so that the required thickness of the UBM layer 5 can be obtained by corresponding conversion according to the difference between the reference pitch information and the target pitch information and the difference between the reference pitch information and the target pitch information.
In addition, in the case of the solder balls 7 with only two ball diameters, the ball heights of the two solder balls 7 can be matched by stacking at least three UBM layers 5 on the bonding pad 2 corresponding to the solder ball 7 with the smaller ball diameter, and the height of the stacked UBM layers 5 can be adjusted at will on the premise of the required height.
The foregoing are all preferred embodiments of the present application, and are not intended to limit the scope of the present application in any way, therefore: all equivalent changes in structure, shape and principle of this application should be covered in the protection scope of this application.

Claims (9)

1. Chip architecture that plants with different size tin ball, its characterized in that includes:
a chip (1) provided with a bonding pad (2);
a UBM layer (5) stacked on the bonding pad (2) and connected with at least one;
solder balls (7) which are in one-to-one correspondence with each bonding pad (2) and are implanted on the UBM layer (5) far away from the bonding pad (2);
the solder balls (7) with each ball diameter are correspondingly provided with a UBM layer (5) for correspondingly implanting the solder balls (7), the area of the UBM layer (5) for implanting the solder balls (7) is related to the ball diameter of the solder balls (7), the thickness of the UBM layer (5) for implanting the solder balls (7) is related to the ball diameter of the solder balls (7) and the ball diameter of the solder balls (7) with the largest ball diameter, and the ball diameter of the solder balls (7) implanted corresponding to the UBM layer (5) with larger stacking quantity is smaller, so that the ball heights of each solder ball (7) are equal.
2. The chip structure implanted with different-sized solder balls according to claim 1, wherein: further comprises:
a passivation layer (3) disposed on the chip (1) and having an opening for exposing the bonding pad (2);
a PI protection layer (4) arranged on the passivation layer (3);
the UBM layer (5) connected with the bonding pad (2) passes through the opening of the passivation layer (3) and then is connected with the bonding pad (2).
3. A chip processing technique for implanting tin balls with different sizes, which is characterized by comprising the following steps:
gluing on the chip (1) to form a PI protection layer (4);
forming a UBM layer (5) by sequentially performing photoetching, developing and electrochemical deposition on the area where each bonding pad (2) is positioned based on the PI protective layer (4);
a photoresist layer gluing step, gluing on the chip (1) to form a photoresist layer (6), wherein each UBM layer (5) is covered by the photoresist layer (6);
a top UBM layer forming step of performing photoetching, developing and electrochemical deposition on the region where the bonding pad (2) corresponding to the small spherical solder ball (7) is located based on the photoresist layer (6) to form a UBM layer (5); a plurality of UBM layers (5) corresponding to the same bonding pad (2) are connected with each other;
removing photoresist layer (6);
implanting solder balls (7) with corresponding ball diameters into the UBM layer (5) at the top;
the solder balls (7) with each ball diameter are correspondingly provided with a UBM layer (5) for the corresponding implantation of the solder balls (7), the area of the UBM layer (5) for the implantation of the solder balls (7) is related to the ball diameter of the solder balls (7), and the thickness of the UBM layer (5) for the implantation of the solder balls (7) is related to the ball diameter of the solder balls (7) and the ball diameter of the solder balls (7) with the largest ball diameter, so that the ball heights of the solder balls (7) are equal.
4. A chip processing process for implanting different-sized solder balls according to claim 3, wherein in the process of forming the second UBM layer (5), the area of at least one bonding pad (2) corresponding to the solder ball (7) with the same ball diameter is subjected to photolithography, development and electrochemical deposition to form the UBM layer (5) with a corresponding thickness and area.
5. The chip processing process for implanting different-sized solder balls according to claim 4, wherein the method for obtaining the thickness of the second UBM layer (5) for implanting the solder balls (7) comprises:
acquiring current sphere diameter information of a tin sphere (7) to be implanted;
acquiring a proportional relation between current spherical diameter information and maximum spherical diameter information;
obtaining the maximum ball distance information between the ball center of the solder ball (7) with the maximum ball diameter and the corresponding UBM layer (5);
calculating current ball distance information according to the proportional relation between the maximum ball distance information and the current ball diameter information;
and calculating thickness information of the UBM layer (5) for implanting the solder ball (7) according to the current ball distance information and the maximum ball distance information.
6. A chip processing process for implanting different-sized solder balls according to claim 3, wherein each ball diameter of the solder balls (7) corresponds to a UBM layer (5) for the corresponding implantation of the solder balls (7), and the area of the UBM layer (5) for the implantation of the solder balls (7) is related to the ball diameter of the solder balls (7), and wherein the photoresist layer-by-layer gluing step, the top UBM layer forming step, and the photoresist layer photoresist removing step are repeated multiple times;
according to the ball diameter of the solder ball (7) in order from large to small, in the process of repeating the forming step of the top UBM layer each time, photoetching, developing and electrochemical depositing are carried out on all areas where the ball diameter is smaller than the corresponding bonding pad (2) of the current solder ball (7) so as to form the UBM layer (5);
in each process of forming the UBM layer (5), the thickness of the UBM layer (5) is associated with the difference between the spherical diameter of the solder ball (7) corresponding to the current top UBM layer forming step and the spherical diameter of the solder ball (7) corresponding to the previous top UBM layer forming step.
7. Chip processing process for implanting different-sized solder balls according to claim 6, characterized in that the method for calculating the thickness of UBM layer (5) to be formed in the current top UBM layer forming step comprises:
acquiring sphere diameter information of a solder ball (7) corresponding to the previous top UBM layer forming step and defining the sphere diameter information as first sphere diameter information;
acquiring sphere diameter information of a solder ball (7) corresponding to the current top UBM layer forming step and defining the sphere diameter information as second sphere diameter information;
calculating the proportional relation between the first sphere diameter information and the second sphere diameter information;
acquiring ball distance information between a ball center of a solder ball (7) corresponding to the previous top UBM layer forming step and a corresponding UBM layer (5) and defining the ball distance information as first ball distance information;
calculating second ball pitch information according to the first ball pitch information and the proportional relation between the first ball pitch information and the second ball pitch information, wherein the second ball pitch information is the ball pitch information between the ball center of the solder ball (7) corresponding to the current top UBM layer forming step and the corresponding UBM layer (5);
and calculating thickness information of the UBM layer (5) for the tin ball (7) to be implanted in the current top UBM layer forming step according to the second ball distance information and the first ball distance information.
8. The chip processing method of implanting different-sized solder balls according to claim 3, wherein the photoresist layer gluing step, the top UBM layer forming step and the photoresist layer photoresist removing step are repeated a plurality of times; the process further comprises:
classifying a plurality of solder balls (7) with different ball diameters according to a preset classification method, wherein the solder ball (7) with the largest ball diameter is one of the solder balls;
in the process of repeating the forming step of the top UBM layer each time, photoetching, developing and electrochemically depositing the solder balls (7) with the largest ball diameter in each type of solder balls (7) according to the ball diameters of the solder balls (7) from the large to the small in sequence, and forming the UBM layer (5) by carrying out photoetching, developing and electrochemical deposition on the solder balls (7) and all areas which do not belong to the current type and are where the ball diameters are smaller than the corresponding bonding pads (2) of the current solder balls (7);
after the UBM layer (5) corresponding to the solder ball (7) with the largest ball diameter in each type of solder balls (7) is molded, comparing the ball diameter of the solder ball (7) corresponding to the current top UBM layer (5) molding step with the reference ball diameter information to determine the thickness of the molded UBM layer (5) and mold the UBM layer (5), wherein the reference ball diameter information is the ball diameter of the solder ball (7) with the largest ball diameter in the type of the ball diameters of the solder balls (7) closest to and larger than the current solder ball.
9. Chip processing process for implanting different-sized solder balls according to claim 8, characterized in that the method for comparing the ball diameter of the corresponding solder ball (7) in the current top UBM layer forming step with the reference ball diameter information to determine the thickness of the formed UBM layer (5) comprises:
acquiring spherical diameter information of a solder ball (7) corresponding to the current top UBM layer forming step and defining the spherical diameter information as target spherical diameter information;
calculating the proportional relation between the reference sphere diameter information and the target sphere diameter information;
acquiring ball distance information between a ball center of a solder ball (7) corresponding to the reference ball diameter information and a corresponding UBM layer (5) and defining the ball distance information as reference ball distance information;
calculating target ball distance information according to the reference ball distance information and the proportional relation between the reference ball diameter information and the target ball diameter information, wherein the target ball distance information is the ball distance information between the ball center of the solder ball (7) corresponding to the current top UBM layer forming step and the corresponding UBM layer (5);
the thickness of the formed UBM layer (5) is calculated and determined from the target pitch information and the reference pitch information.
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Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6462426B1 (en) * 2000-12-14 2002-10-08 National Semiconductor Corporation Barrier pad for wafer level chip scale packages

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW459362B (en) * 2000-08-01 2001-10-11 Siliconware Precision Industries Co Ltd Bump structure to improve the smoothness
US7312529B2 (en) * 2005-07-05 2007-12-25 International Business Machines Corporation Structure and method for producing multiple size interconnections
US20110121438A1 (en) * 2009-11-23 2011-05-26 Xilinx, Inc. Extended under-bump metal layer for blocking alpha particles in a semiconductor device
US20130026630A1 (en) * 2011-07-27 2013-01-31 Low Chauchin Flip chips having multiple solder bump geometries
US11145612B2 (en) * 2017-12-28 2021-10-12 Texas Instruments Incorporated Methods for bump planarity control
US11171006B2 (en) * 2019-12-04 2021-11-09 International Business Machines Corporation Simultaneous plating of varying size features on semiconductor substrate
CN111755342B (en) * 2020-06-18 2022-12-20 宁波芯健半导体有限公司 Method for packaging wafer-level chip

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6462426B1 (en) * 2000-12-14 2002-10-08 National Semiconductor Corporation Barrier pad for wafer level chip scale packages

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