CN1147667A - Multistandard video tape player for selectively generating clock signals corresponding to video standards - Google Patents

Multistandard video tape player for selectively generating clock signals corresponding to video standards Download PDF

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Publication number
CN1147667A
CN1147667A CN96110003A CN96110003A CN1147667A CN 1147667 A CN1147667 A CN 1147667A CN 96110003 A CN96110003 A CN 96110003A CN 96110003 A CN96110003 A CN 96110003A CN 1147667 A CN1147667 A CN 1147667A
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China
Prior art keywords
signal
video
standard
clock signal
operation circuit
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Granted
Application number
CN96110003A
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Chinese (zh)
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CN1077309C (en
Inventor
洪基敦
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Samsung Electronics Co Ltd
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Samsung Electronics Co Ltd
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Publication of CN1147667A publication Critical patent/CN1147667A/en
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N9/00—Details of colour television systems
    • H04N9/79—Processing of colour television signals in connection with recording
    • H04N9/7921—Processing of colour television signals in connection with recording for more than one processing mode
    • H04N9/7925—Processing of colour television signals in connection with recording for more than one processing mode for more than one standard
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/02—Analogue recording or reproducing
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/44—Receiver circuitry for the reception of television signals according to analogue transmission standards
    • H04N5/445—Receiver circuitry for the reception of television signals according to analogue transmission standards for displaying additional information

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  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Multimedia (AREA)
  • Television Signal Processing For Recording (AREA)
  • Synchronizing For Television (AREA)
  • Processing Of Color Television Signals (AREA)

Abstract

The invention relates to a multistandard video tape player, which includes a first oscillator, a second oscillator, a servo circuit, an on-screen-display (OSD) processor, a controller, and a selective output portion for selectively supplying one of the first frequency clock signal and the second frequency signal to the servo circuit in response to the first control signal, and selectively supplying the first frequency clock signal and the second frequency signal to the OSD processor and the servo circuit in response to the first and second control signals. Thus, a display unit having no multistandard function can stably operate.

Description

Selectively produce multi-standard video tape videoplayer with the corresponding to clock signal of video standard
The present invention relates to a kind of multi-standard video tape videoplayer, particularly, a kind of multi-standard video tape videoplayer, it selectively provide consistent with various video standards and with the corresponding to clock signal of state.
This multi-standard video tape videoplayer can be handled vision signal that signal source from the outside receives or that reappear from videotape, to such an extent as to can be selected to the televisor of picture display unit if any the video standard that is different from vision signal.With reference to Fig. 1, the multi-standard video tape videoplayer with the effect of full color screen display will be described below.
Among Fig. 1, one video signal preprocessor 10 is provided by outer video signal that enters through input end 5 and the vision signal that provides from servo operation circuit 15, reference clock signal CLK1 and CLK2 that it adopts oscillator 11 with oscillation frequency 3.58MHz and the oscillator 12 with oscillation frequency 4.43MHz to send.The 1st reference clock signal CKL1 that is produced by oscillator 11 offers an osd processor 13 and servo operation circuit 1 through resistance R 11 and a triode TR1 and the second reference clock signal CKL2 that produced by oscillator 12 offers an osd processor 13 and servo operation circuit 15 through resistance R 12 and triode TR2.Here, the setting of triode TR1 and TR2 is in order that when triode TR1 works, triode TR2 and osd processor 13 and servo operation circuit 15 not conductings.
Osd processor 13 will be rectified into vertical synchronizing signal V-SYNC from the vision signal that video signal preprocessor 10 spreads out of, and the vertical synchronizing signal V-SYNC of this rectification passes to microcomputer 1.Servo operation circuit 15 will be passed to video signal preprocessor 10 from the vision signal that the videotape (not shown) is duplicated, this servo operation circuit 15 is a control wave with counting on the control track on the confession videotape also, and will descend the C/D of CLT as a result of counting to export to microcomputer 17.Microcomputer 17 is the video standard of basis decision reproduction video signal at the following count results CTL C/D of tone playing state.Under halted state, microcomputer 17 serves as the video standard that vision signal is determined on the basis with the verticial-sync signal V-SYNC of osd processor 13 outputs.When vision signal was confirmed as the TSC-system standard, microcomputer 17 outputs one high voltage signal was given triode TR3, and simultaneously, when vision signal was confirmed as pal standard, microcomputer 17 outputs one low voltage signal was given triode TR3.If triode TR1 is through the high voltage signal conducting of triode TR3, be that the first reference clock signal CLK1 of 3.58MHz is transferred to OS processor 13 and servo operation circuit 15 from the frequency of oscillator 11 outputs.At this moment, the output signal of triode TR2 does not pass to osd processor 13 and servo operation circuit 15.Equally, if triode TR1 is closed by the low voltage signal of triode TR3, be that the second reference clock signal CLK2 of 4.43MHz passes to osd processor 13 and servo operation circuit 15 from the frequency of oscillator 12 output.Osd processor 13 is that the basis produces an osd signal with the input reference clock signal from the vision signal of video signal preprocessor 10 outputs.These reference clock signals in Fig. 1 device are summarised in Fig. 3 table.
When video signal preprocessor 10 did not have outputting video signal, osd processor 13 was with defeated.The reference clock signal of going into demonstrates a cloth made of orchid scape and puts into the vision signal of osd signal by osd processor 13 for the basis produces an osd signal on screen, pass to display and (do not draw and resemble televisor.Servo operation circuit 15 is finished replication work according to the second reference clock signal CLK2, and the vision signal of duplicating is passed to video signal preprocessor 10.
As mentioned above, the video tape video tape recorder determines that according to the following count results CTL C/D and the vertical synchronizing signal V-SYNC of servo operation circuit 15 inputs reference clock signal passes to osd processor 13 and servo operation circuit 15 among Fig. 1.Therefore, the reproducing of video of video tape videoplayer transmission NTSC standard or the outer video signal of NTSC standard are given the display with PAL standard in Fig. 1, or the reproducing of video or the PAL standard external vision signal of transmission PAL standard are given the display with NTSC standard, there is not the display of many standard signals processing effect can not show blue screen, because osd processor 13 used reference clock signals are determined by the input signal of vertical synchronizing signal V-SYNC according to the osd signal that Fig. 1 device provides.In addition, in this case, the vision signal of outer video signal and reproduction is respectively at different separately video standards, and triode TR3 has the instantaneous function of making delay switch, if the video tape video tape recorder is changed into the reproduction process state or vice versa from the outer video signal output state among Fig. 1.Therefore osd processor 13 and servo operation circuit 15 can not in time receive reference clock signal when reference clock signal need be consistent with vision signal.Osd processor 13 and servo operation circuit 15 synchronism have between the two disappeared.
Therefore, address the above problem, the purpose of this invention is to provide a kind of multi-standard video tape videoplayer that selectively produces corresponding reference clock signal, it needs an osd processor and a servo operation circuit.
For finishing above-mentioned purpose of the present invention, the composition of this multi-standard video tape videoplayer is proposed now:
First oscillator is used for producing and the corresponding to first frequency clock signal of first video standard;
Second oscillator is used for producing and the corresponding to second frequency clock signal of first video standard;
One servo operation circuit is used to produce the reproduction process about video tape, and its is based on clock signal of input, and the control of the control track reproduction of output from the video tape is towards signal;
One screen display (OSD) processor, be used for detecting a synchronous signal from one of the vision signal of outside input and vision signal of reproduction, and produce an osd signal, it is used for therefrom detecting the vision signal of synchronizing signal, with an osd signal, therefrom do not detect synchronizing signal, they are based on the clock signal of input;
One controller is used to produce first control signal, video standard according to the vision signal of exporting from set video tape videoplayer, be used to produce second control signal, according to the synchronizing signal of osd processor rectification and the control wave of exporting from servo operation circuit
Select output unit, be used for carrying first frequency clock signal and second frequency clock signal being selected to input to servo operation circuit according to first control signal, and according to first and second control signals first frequency clock signal and second frequency clock signal are selected, offered osd processor and servo operation circuit.
This most preferred embodiment is described according to accompanying drawing:
Fig. 1 is the block scheme that existing video cassette recorder (VCR) selectively produces the reference clock signal part.
Fig. 2 is the block scheme of the most preferred embodiment of VCR part of the present invention.
Fig. 3 A table explanation clock signal for reference in existing VCR.
Fig. 3 B table explanation most preferred embodiment of the present invention the reference clock signal of confession.
Most preferred embodiment of the present invention will be described below, and describe in detail according to accompanying drawing.
Fig. 2 device is according to the videoplayer of full color video tape shown in the most preferred embodiment of the present invention, and its block scheme has the function same with block diagram 1, specifies and the same reference number of Fig. 1.Be transferred to osd processor 13 from the signal of video signal preprocessor 10 outputs.Osd processor 13 goes out vertical synchronizing signal V-SYNC from the video signal detection of video signal preprocessor 10 outputs, and the vertical synchronizing signal V-SYNC that detects is transferred to controller 27.The reproduction process that servo operation circuit 1 produces about video tape, it is based on the clock signal of input, and counting control wave under reappearing the control track from video tape.One controller 27 is determined the video standard of the vision signal of osd processor input according to the frequency of the vertical synchronizing signal V-SYNC of osd processor 13.This moment, Fig. 2 device was provided in a side of halted state.Controller 27 determines to be reproduced the video standard of vision signal according to the following counting control wave CTL C/D of servo operation circuit 15, and this moment, Fig. 2 device was provided in a side of the state of elephant of putting.Controller 2 produces the first control signal CTL1, all standards of outer video signal that shows according to the vision signal state or the vision signal of being reappeared and the vision signal of in the video tape videoplayer, exporting, also produce the second control signal CTL2, based on the output signal of osd processor 13 or servo operation circuit 1.
The reference clock signal that one selects output 29 to receive sends from oscillator 11 and 12 also passes to osd processor 13 or servo operation circuit 15 according to the control signal CTL1 and the CTL2 of controller 29 with the reference clock signal that is received.Select output 29 to comprise triode 22 and 25, their base stage links to each other with oscillator 11 by resistance R 11, links to each other with oscillator 12 through resistance R 12 with 24 their base stages with triode 21. Triode 21 and 22 emitter one end and the clock signal input terminal of osd processor 13 join, and the other end joins through the collector of resistance R 3 ground connection triodes 22 and the emitter of triode 23.The base stage of triode 23 links to each other with the first control signal CTL1 of controller 27.The collector of the power supply source VCC of institute and triode 21 and 2 joins.Resistance R 1 and R2 are when the first control signal CTL1 is high voltage, and the reference clock signal of oscillator 11 is transferred to osd processor 13.Resistance R 1 is connected between the base stage of power supply source VCC of institute and triode 22, and resistance R 2 is connected between the base stage and ground of triode 22.When the first control signal CTL1 was low-voltage, the reference clock signal of oscillator 12 was transferred to osd processor 13 through triode 21.Triode 24 links to each other with the clock signal input terminal of servo operation circuit 15 with 25 emitter, and through R6 ground connection.The collector of triode 25 links to each other with the emitter of triode 26.The base stage of triode 26 links to each other with the second control signal CTL2 of controller 27.The power supply source VCC of institute and triode 24 link to each other with 26 collector, and resistance R 4 and R5 are when the second control signal CTL2 is high voltage, and the reference clock signal of oscillator 12 is transferred to servo operation circuit 15.Resistance R 4 is connected between the base stage of power supply source VCC of institute and triode 25, and resistance R 5 is connected between the base stage and ground wire of triode 25.When the second control signal CTL2 was low-voltage, the reference clock signal of oscillator 12 passed to servo operation circuit 15 through triode 24.
Oscillator 11 produces the reference clock signal of the color subcarrier frequency rate of a 3.58MHz according to the NTSC standard, and oscillator 12 produces the reference clock signal of the color subcarrier frequency rate of a 4.43MHz according to the PAL standard.These oscillators 11 and 12 keep oscillatory regime when Fig. 2 device is worked.
When Fig. 2 device was operated in halted state or external input state, video signal preprocessor 10 was handled the vision signal that receives through the tuner (not shown).Osd processor 13 will be rectified into vertical synchronizing signal V-SYNC from the vision signal of video signal preprocessor 10 output, and the vertical synchronizing signal V-SYNC that exports this rectification gives controller 27.When an output video standard is set to an outputting video signal is PAL, SECAM, during with one of MESECAM standard, it is 60Hz that the vertical synchronizing signal V-SYNC of OS processor 13 hangs down according to the NTSC standard frequency, promptly working as outputting video signal is that the Video processing state is arranged on NTSC4.43 such as Fig. 3 B, it is low-voltage that controller 2 produces the first control signal CTL1, and second control signal is a high voltage.Select the triode 23 of output 29 to be closed by the low-voltage of the first control signal CTL1.The reference clock signal of oscillator 12 is exported to osd processor 13 through triode 21.Because triode 2 is by the second control signal CTL2 conducting, the reference clock signal of oscillator 11 is exported to servo operation circuit 15 through triode 25.Equally, when a set outputting video signal is PAL, in the time of one of in SECAM and the MECAM standard, the verticial-sync signal of osd processor 13 has the frequency of 50Hz according to the PAL standard, it is high voltage that controller 27 produces the first control signal CTL1, and second control signal is a low-voltage.In this case, the reference clock signal of oscillator 11 is exported to osd processor 13 through triode 22, and the reference clock signal of oscillator 12 is exported to servo operation circuit 15 through triode 24.
When being operated in, Fig. 2 device puts when resembling state, the vision signal of servo operation circuit 15 output records on videotape given video signal preprocessor 10, count a control wave that is recorded on the videotape control track down, and this time count results CTL C/D is exported to controller 27.When a set ＂ output video standard ＂ is PAL, in the time of one of among SE-CAM and the MESECAM, the following count results CTL C/D of servo operation circuit 15 is shown as the vision signal of the NTSC standard of duplicating again.Promptly, when the output video standard be the Video processing state be arranged on a NTSC PB on PAL TV shown in Fig. 3 B, it is low-voltage that controller 27 produces the first control signal CTL, second control signal is a high voltage, therefore, the reference clock signal of oscillator 11 is a high voltage, and therefore, the reference clock signal of oscillator 11 is exported to the reference clock signal of servo operation circuit 15 oscillators 12 and exported to osd processor 13.Equally, when set output video standard is PAL, SECAM, with one of in the MESECAM standard time, the following count results CTL C/D of servo operation circuit 1 shows the vision signal of the PAL standard of reappearing again, and it is high voltage that controller 2 produces the first control signal CTL1, and the second control signal CTL2 is a low-voltage, therefore, the reference clock signal of oscillator 11 reference clock signal of exporting to osd processor 13 and oscillator 12 is exported to servo operation circuit 15.
In addition, when Fig. 2 device is exported an outer video signal or reappeared the display unit of the vision signal of a NTSC standard to the NTSC standard, export an outer video signal or duplicate the display unit of the vision signal of a PA standard to the PAL standard, the frequency of reference clock signal of exporting to osd processor 13 and servo operation circuit 15 is shown in Fig. 3 B, because content shown in Fig. 3 B is to be shown to his skilled application drawing 2 shown devices of those skilled in the art, omits its detailed description.
As no matter be outer video signal or reproducing of video, controller 27 can not be that video standard is determined on the basis from the signal of osd processor 13 and servo operation circuit 15 receptions, in the case, the first control signal CTL1 is according to set output video standard in controller 27 outputs, for example, when set output video standard was the NTSC standard, the controller 27 outputs first control signal CTL1 was a high voltage.When set output video standard is DAL, SECAM, with one of in the MESECAM standard time, the controller 27 outputs first control signal CTL1 is low-voltage so osd processor 13 output one osd signal and set output video conformances to standard, and osd signal is a blue screen like this.
By foregoing description, the present invention can export a correct reference clock signal and give an OS processor and a servo operation circuit, this reference clock signal determines according to this do not have the display unit of many standard features to use by the video standard of outer video signal and reproduction video signal with from the video standard of the vision signal of videoplayer output.
Simultaneously, correct embodiment of the present invention describes one by one at this, and in addition, many improvement that can not break away from design of the present invention and scope are conspicuous.

Claims (6)

1. a multi-standard video tape videoplayer comprises:
First oscillator is used for producing and the corresponding to first frequency clock signal of first video standard;
Second oscillator is used for producing and the corresponding to second frequency clock signal of first video standard;
One servo operation circuit, being used to finish with the clock signal is the reproduction process of basis about videotape, and exports the control wave that reappears from the control track of videotape;
One screen display osd processor, be used for and detect synchronizing signal from one of vision signal of external input signal and reproduction, and produce an osd signal, be used for therefrom having detected the vision signal of synchronizing signal, one osd signal, therefrom do not detect synchronizing signal, they are based on the clock signal of input;
One controller is used to produce first control signal, video standard according to the vision signal that from described videoplayer, is provided with, it is consistent with the synchronizing signal that detects in described osd processor and consistent with the control wave of exporting from described servo operation circuit to produce second control signal;
Select output unit, be used for selecting institute's first frequency clock signal that supplies and second frequency clock signal one of them to described servo operation circuit, and it is consistent with first control signal, select institute's first frequency clock signal that supplies and second frequency clock signal to described osd processor and described servo operation circuit, and consistent with first and second control signals.
2. multi-standard video tape videoplayer according to claim 1, wherein said first video standard is the NTSC standard, described second video standard is PAL, one of SECAM and MESECAM standard.
3. multi-standard video video tape recorder according to claim 1, wherein work as the video tape video tape recorder in halted state, when set video standard was shown as second video standard, controller produced second control signal, was used for the second frequency clock signal is transferred to described OS processor.
4. multi-standard video tape videoplayer according to claim 1, wherein work as the video tape videoplayer in halted state, when set video standard was shown as first video standard, controller produced second control signal and is used for the first frequency clock signal is transferred to described osd processor.
5. multi-standard video tape videoplayer according to claim 1, wherein work as the video tape videoplayer and putting the state of elephant, when described video standard is shown as second video standard, and controller produces first control signal and is used for the first frequency clock signal is transferred to described OS processor when the control wave from the output of described servo operation circuit reaches first video standard, and produces second control signal and be used for the second frequency clock signal is transferred to described servo operation circuit.
6. according to the described multi-standard video tape of claim 1 videoplayer, wherein work as the video tape videoplayer and putting the state of elephant, when described video standard is shown as first video standard, and when the control wave from described servo operation circuit output reaches second video standard, controller produces first control signal and is used for the second frequency clock signal is exported to described osd processor, and produces second control signal and be used for the first frequency clock signal is exported to servo operation circuit.
CN96110003A 1995-05-08 1996-05-08 Multistandard video tape player for selectively generating clock signals corresponding to video standards Expired - Fee Related CN1077309C (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
KR1019950011170A KR960042655A (en) 1995-05-08 1995-05-08 Reference Frequency Switching Circuit of Multi Video Cassette Recorder
KR11170/95 1995-05-08
KR11170/1995 1995-05-08

Publications (2)

Publication Number Publication Date
CN1147667A true CN1147667A (en) 1997-04-16
CN1077309C CN1077309C (en) 2002-01-02

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CN96110003A Expired - Fee Related CN1077309C (en) 1995-05-08 1996-05-08 Multistandard video tape player for selectively generating clock signals corresponding to video standards

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CN (1) CN1077309C (en)
GB (1) GB2300778B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104234949A (en) * 2013-06-20 2014-12-24 西门子公司 Wind power plant with a mechanical bearing

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006246185A (en) 2005-03-04 2006-09-14 Sharp Corp Radio video transmission system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104234949A (en) * 2013-06-20 2014-12-24 西门子公司 Wind power plant with a mechanical bearing

Also Published As

Publication number Publication date
KR960042655A (en) 1996-12-21
GB9609556D0 (en) 1996-07-10
GB2300778A (en) 1996-11-13
GB2300778B (en) 1997-05-14
CN1077309C (en) 2002-01-02

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Granted publication date: 20020102