CN114765013B

CN114765013B - Display driving circuit, display driving method and related equipment

Info

Publication number: CN114765013B
Application number: CN202210562881.0A
Authority: CN
Inventors: 汪俊; 戴珂; 聂春扬; 周留刚; 陈韫璐; 黄艳庭; 权宇; 尹晓峰; 孙建伟; 李清; 胡胜华
Original assignee: BOE Technology Group Co Ltd; Hefei BOE Display Lighting Co Ltd
Current assignee: BOE Technology Group Co Ltd; Hefei BOE Display Lighting Co Ltd
Priority date: 2022-05-23
Filing date: 2022-05-23
Publication date: 2024-02-23
Anticipated expiration: 2042-05-23
Also published as: WO2023226741A9; WO2023226741A1; CN114765013A

Abstract

The application discloses a display driving circuit, a display driving method and related equipment, which relate to the technical field of display, and can reduce the charging rate difference between display pixels of different rows and improve the cross grain defect of a display picture by adjusting the high-level amplitude of a scanning pulse signal under the condition that the equal impedance of a scanning passage of the display pixels is different due to process fluctuation. A display driving circuit comprising: and the gating modulation module is used for adjusting the amplitude of the high level of the received scanning pulse signal, and the scanning pulse signal is used for driving the display pixels of the display panel.

Description

Display driving circuit, display driving method and related equipment

Technical Field

The present disclosure relates to the field of display technologies, and in particular, to a display driving circuit, a display driving method, and related devices.

Background

With the rapid development of display technology, display products gradually evolve to high resolution and high refresh rate, and the difficulty of the display technology is increased by a range order. The path impedance corresponding to the scan pulse signal is slightly different due to process fluctuation. With the increase of the refresh rate of the high-end product, the charging time of each row of pixels is reduced, and the charging rate of each row of pixels is easy to be different, so that the display difference among the pixel rows is caused, and the cross grain defect is formed.

Disclosure of Invention

The embodiment of the application provides a display driving circuit, a display driving method and related equipment, which can improve the cross grain defect caused by the difference of charging rate between pixel rows.

In a first aspect of an embodiment of the present application, a display driving circuit includes:

and the gating modulation module is used for adjusting the amplitude of the high level of the received scanning pulse signal, and the scanning pulse signal is used for driving the display pixels of the display panel.

In some embodiments, the gating modulation module is configured to adjust a high level reference voltage to output an adjusted reference voltage, the adjusted reference voltage being configured to adjust a high level amplitude of the scan pulse signal.

In some embodiments, the adjusted reference voltages are in one-to-one correspondence with the scan pulse signals.

In some embodiments, the gate modulation module is configured to adjust a voltage division of a scan path for driving the display pixel by the scan driving signal, so as to adjust an amplitude of a high level of the scan pulse signal corresponding to the scan path.

In some embodiments, the gating modulation module includes an adjustment unit, and the adjustment unit corresponds to the scanning pulse signal one by one.

In some embodiments, the adjustment unit comprises at least one switch.

In some embodiments, the regulating unit comprises a plurality of switches connected in parallel, and at least one fixed resistor and/or a variable resistor is arranged between any two of the switches connected in parallel.

In some embodiments, the regulating unit comprises a plurality of switches connected in parallel, each of the switches being connected in series with a fixed resistor and/or a variable resistor.

In some embodiments, the switch comprises at least one thin film transistor.

In some embodiments, the display driving circuit further includes:

and the level conversion module comprises a high-level reference input pin which is electrically connected with the output pin of the gating modulation module.

In some embodiments, the display driving circuit further includes:

the level conversion module comprises a scanning pulse output pin, and the scanning pulse output pin is electrically connected with an input pin of the gating modulation module.

In some embodiments, the display driving circuit further includes:

the output discharging module is arranged between the level conversion module and the gating modulation module; or alternatively, the first and second heat exchangers may be,

The gating modulation module is arranged between the level conversion module and the output discharge module.

In some embodiments, the display driving circuit further includes:

the modulation control module is used for providing a modulation control signal for the gating modulation module, and the modulation control signal is used for controlling the gating modulation module to adjust the high-level amplitude of the scanning pulse signal.

In a second aspect of embodiments of the present application, there is provided a display driving method applied to the display driving circuit described in the first aspect, the display driving method including:

receiving a display control instruction;

driving display pixels of a display panel to display a picture based on the display control instruction;

and in the process of driving the display pixels of the display panel to display pictures based on the display control instruction, the gate modulation module is used for adjusting the amplitude of the high level of the received scanning pulse signal so as to reduce the current difference between different scanning paths, wherein the scanning paths are paths for driving the display pixels by the scanning driving signal.

In some embodiments, the display control instructions include a modulation control signal;

Before receiving the display control instruction, the method further comprises:

collecting the current of the scanning path to obtain an initial scanning current;

determining the scanning paths needing compensation current and corresponding compensation current values according to the differences of the initial scanning currents among different scanning paths;

generating a modulation control signal according to the scanning path needing compensation current and the corresponding compensation current value;

in the process of driving the display pixels of the display panel to display a picture based on the display control instruction, the method for adjusting the amplitude of the high level of the received scanning pulse signal through the gating modulation module comprises the following steps:

and adjusting the amplitude of the high level of the received scanning pulse signal based on the modulation control signal in the process of driving the display pixels of the display panel to display a picture based on the display control instruction.

In some embodiments, the adjusting, by the gating modulation module, the amplitude of the high level of the received scanning pulse signal includes:

regulating the high level reference voltage to output a regulated reference voltage;

and adjusting the amplitude of the high level of the scanning pulse signal based on the adjustment reference voltage.

and adjusting the partial pressure of the scanning path to adjust the amplitude of the high level of the scanning pulse signal corresponding to the scanning path.

In a third aspect of the embodiments of the present application, there is provided a driving controller, including:

a memory in which a computer program is stored;

a processor for implementing the display driving method according to the first aspect when executing the computer program.

In a fourth aspect of embodiments of the present application, there is provided a display device, including:

the display driving circuit according to the first aspect, and/or the driving controller according to the third aspect.

In some embodiments, the display device further comprises:

the display pixels are arranged in a display area of the display panel;

the control circuit board is electrically connected with the display panel;

the display driving circuit is bound to a non-display area of the display panel; or alternatively, the first and second heat exchangers may be,

the display driving circuit is arranged on the control circuit board.

According to the display driving circuit, the display driving method and the related equipment, the gating modulation module is arranged, the amplitude of the high level of the received scanning pulse signal is regulated through the gating modulation module, under the condition that the equivalent impedance of the scanning path of the display pixel is different due to process fluctuation, the grid voltage of the thin film transistor of the display pixel is regulated through regulating the high level amplitude of the scanning pulse signal, the grid of the thin film transistor is ensured to be continuously started in a required time period, the charging time of the pixel electrode is ensured not to be influenced by the equivalent impedance difference, the charging rate difference between the display pixels of different rows can be reduced, and the cross grain defect of a display picture can be improved.

Drawings

Fig. 1 is a schematic block diagram of a display driving circuit according to an embodiment of the present application;

fig. 2 is a schematic block diagram of a gate scanning circuit of a display panel according to an embodiment of the present application;

FIG. 3 is a schematic diagram of a partial equivalent circuit of a scan pulse signal driven display pixel according to an embodiment of the present disclosure;

fig. 4 is a schematic diagram of a refresh rate and a charging time of a display panel according to an embodiment of the present disclosure;

FIG. 5 is a schematic block diagram of another display driving circuit according to an embodiment of the present application;

FIG. 6 is a schematic block diagram of a further display driving circuit according to an embodiment of the present application;

fig. 7 is a schematic block diagram of a gating modulation module according to an embodiment of the present application;

FIG. 8 is a schematic block diagram of another gating modulation module according to an embodiment of the present application;

fig. 9 is a schematic structural view of an adjusting unit provided in an embodiment of the present application;

fig. 10 is a schematic signal timing diagram of a display driving circuit according to an embodiment of the present disclosure;

FIG. 11 is a schematic block diagram of another adjustment unit provided in an embodiment of the present application;

FIG. 12 is a schematic flow chart of a display driving method according to an embodiment of the present application;

FIG. 13 is a schematic block diagram of a driving controller according to an embodiment of the present application;

fig. 14 is a schematic block diagram of a display device according to an embodiment of the present application.

Detailed Description

In order to better understand the technical solutions provided by the embodiments of the present specification, the following detailed description of the technical solutions of the embodiments of the present specification is made through the accompanying drawings and the specific embodiments, and it should be understood that the specific features of the embodiments of the present specification are detailed descriptions of the technical solutions of the embodiments of the present specification, and not limit the technical solutions of the present specification, and the technical features of the embodiments of the present specification may be combined with each other without conflict.

In this document, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element. The term "two or more" includes two or more cases.

In view of this, embodiments of the present application provide a display driving circuit, a display driving method, and related devices, capable of improving the cross-stripe defect caused by the difference in charge rate between pixel rows.

In a first aspect of the embodiments of the present application, a display driving circuit is provided, and fig. 1 is a schematic block diagram of a display driving circuit provided in an embodiment of the present application. As shown in fig. 1, a display driving circuit provided in an embodiment of the present application includes: the gate modulation module 100, the gate modulation module 100 is configured to adjust the amplitude of the high level of the received scan pulse signal CLK, and the scan pulse signal CLK is used to drive the display pixels 210 of the display panel 200 to realize the gate scan of the display pixels.

Fig. 2 is a schematic block diagram of a gate scanning circuit of a display panel according to an embodiment of the present application. As shown in fig. 2, the gate scan circuit of the display panel adopts a GOA (Gate on Array) architecture, and the scan pulse signal CLK includes a first scan pulse signal CLK1, a second scan pulse signal CLK2, a third scan pulse signal CLK3, a fourth scan pulse signal CLK4, a fifth scan pulse signal CLK5 and a sixth scan pulse signal CLK6. Each row of display pixels in the display panel corresponds to one GOA, fig. 2 only schematically shows 6 GOAs, namely GOA 1-GOA 6, each GOA comprises a pulse input pin CLK, a high level input pin VDD, a low level input pin, a frame start signal pin in and a cascade pin R, the pulse input pin CLK is used for receiving a scanning pulse signal CLK, the high level input pin VDD is used for receiving high level signals, two high level signals are respectively a first high level signal VDD1 and a second high level signal VDD2, the first high level signal VDD1 and the second high level signal VDD2 are identical in value and are transmitted through two signal lines, the corresponding high level input pin VDD is respectively represented by VDD (1) and VDD (1), the low level input pin is used for receiving a low level signal, the frame start signal pin in is used for receiving a frame start signal STV, and the cascade pin R is used for receiving a cascade feedback signal Vss. Since the display pixels are scanned line by line, the start time of each line is different, and pulse reset is required after scanning is completed, and cascade feedback is required for the GOAs which are not scanned to the GOAs which are already scanned, so as to reset the pulses of the GOAs which are scanned completely. In addition, all rows of display pixels are provided with scan pulse signals from CLK1 to CLK6.

Fig. 3 is a schematic diagram illustrating a partial equivalent circuit of a scan pulse signal driving display pixel according to an embodiment of the present application. As shown in fig. 3, the first scanning pulse signal CLK1 is correspondingly connected to the first thin film transistor T1, the first thin film transistor T1 represents a driving device of the display pixel, and the first thin film transistor T1 is connected to the pixel electrode; the second scan pulse signal CLK2 is correspondingly connected to the second thin film transistor T2, the second thin film transistor T2 represents a driving device of the display pixel, and the second thin film transistor T2 is connected to the pixel electrode. The equivalent impedance of the first scan pulse signal CLK1 and the scan path of the corresponding pixel electrode is a first resistor R01, the equivalent impedance of the second scan pulse signal CLK2 and the scan path of the corresponding pixel electrode is a second resistor R02, the voltage division of the first resistor R01 is V1, and the voltage division of the second resistor R02 is V2. The Data signal Line Data Line is used for providing Data signals to the first thin film transistor T1 and the second thin film transistor T2 respectively, the Data signals charge the pixel electrode, and the charging currents of the Data signals and the pixel electrode are respectively a first charging current i1 and a second charging current i2. The first scan pulse signal CLK1 and the second scan pulse signal CLK2 have the same high-level amplitude, and the gate voltage reaching the first thin film transistor T1 is the high-level amplitude of the scan pulse signal minus the divided voltage due to the divided voltage of the first resistor R01 and the second resistor R02. At present, metal deposition, exposure, etching and the like are generally adopted in the internal circuit line forming process of the display panel, tiny unevenness of each step causes the difference of equivalent impedance of each scanning path, if the first resistor R01 and the second resistor R02 are different due to process fluctuation, the first charging current i1 and the second charging current i2 are different, further, the charging time rates of pixel electrodes of display pixels of different rows are different, and finally, the cross grain defect of a display picture is caused.

Illustratively, in connection with FIGS. 2 and 3, the equivalent impedances R01-R06 of each of the vias in CLK1-CLK6 are used to represent the impedance differences due to process fluctuations. Fig. 4 is a schematic diagram of a refresh rate and a charging time of a display panel according to an embodiment of the present application. As shown in fig. 4, as the refresh frequency of the display panel of the high-end product increases, the charging time per row decreases. For example, the refresh frequency is from 60Hz to 576Hz, and the charging time of the Data signal Data to the pixel electrode of the display pixel in one period 1H is reduced from 7.4us to 0.72us at the driving of the gate of the display pixel driving device by the scan pulse signal CLK, and the charging time is changed by orders of magnitude. The extremely small charging time makes the charging rate of each display pixel extremely sensitive to the difference of the equivalent impedance of the paths, the difference of the equivalent impedance of the scanning paths can cause the difference of the gate voltage of the thin film transistor, the starting time or the conduction performance of the thin film transistor is influenced, and further the difference of the charging currents i1 and i2 of the data signal line DataLine is caused, and finally the difference of the charging rate is caused, in particular, the cross grains are formed on the pure gray-scale picture.

For the situation that the high-level amplitude of the pulse signal CLK in the existing display driving circuit is fixed and not adjustable, for example, the high-level amplitudes of CLK 1-CLK 6 are not adjustable, under the condition that the equivalent impedance of a scanning path of a display pixel is different due to process fluctuation, the grid voltages of thin film transistors corresponding to the display pixel are different, and finally, the charging rate difference of a pixel electrode is caused, so that the display picture cross stripe is bad. According to the display driving circuit provided by the embodiment of the application, the gating modulation module 100 is arranged, the gating modulation module 100 can adjust the high-level amplitude of the scanning pulse signal CLK, and under the condition that the equivalent impedance of the scanning path of the display pixels is different due to process fluctuation, the grid voltage of the thin film transistor of the display pixels is adjusted by adjusting the high-level amplitude of the scanning pulse signal CLK, so that the grid of the thin film transistor is ensured to be continuously started in a required time period, the charging time of the pixel electrode is ensured not to be influenced by the equivalent impedance difference, the charging rate difference between the display pixels of different rows can be reduced, and the cross grain defect of a display picture can be improved. Specifically, it can be understood that by adjusting the high level amplitude of the scanning pulse signal CLK, the accumulated charge amounts of the gates of the thin film transistors corresponding to the display pixels of different rows are ensured to be relatively average according to the equivalent difference, so that the turn-on time of the thin film transistors of different rows is ensured to be relatively average, the difference of the charge time of the pixel electrodes of different rows can be reduced, the charge rates of the pixel electrodes of different rows are ensured to be relatively balanced, and the cross grain defect caused by the charge rate difference of the pixel electrodes of different rows is avoided.

According to the display driving circuit provided by the embodiment of the application, the gating modulation module 100 is arranged, the high-level amplitude of the received scanning pulse signal CLK is regulated through the gating modulation module 100, under the condition that the equivalent impedance of the scanning path of the display pixels is different due to process fluctuation, the grid voltage of the thin film transistor of the display pixels is regulated through regulating the high-level amplitude of the scanning pulse signal CLK, the grid of the thin film transistor is ensured to be continuously started in a required time period, the charging time of the pixel electrode is ensured not to be influenced by the equivalent impedance difference, the charging rate difference between the display pixels of different rows can be reduced, and the cross grain defect of a display picture can be improved.

In some embodiments, the gate modulation module 100 is used to adjust the high level reference voltage to output an adjusted reference voltage, which is used to adjust the amplitude of the high level of the scan pulse signal CLK. The high level amplitude of the scan pulse signal CLK is determined by the high level reference voltage. Illustratively, a high level reference voltage of a display panel is 12V, and the magnitude of the high level of the scan pulse signal CLK driving the row scan of the display panel is 12V. The gate modulation module 100 adjusts the amplitude of the high level of the scan pulse signal CLK by adjusting the high level reference voltage. The gate modulation module 100 adjusts the high level reference voltage to obtain an adjusted reference voltage, and the adjusted reference voltage can control the high level amplitude of the corresponding scan pulse signal CLK. Specifically, the adjustment reference voltages can be in one-to-one correspondence with the scanning pulse signals, and one-to-one independent adjustment of the high-level reference voltages on the scanning pulse signals can be realized. In general, the existing display driving circuit is only provided with one high-level reference voltage signal line, and the display driving circuit provided in this embodiment of the present application can obtain a plurality of adjustment reference voltages through adjustment of the gate modulation module 100, where each adjustment reference voltage is used to control the high-level amplitude of one scanning pulse signal CLK, so as to reduce the charging rate difference of the display pixels of different rows, thereby improving the cross stripe defect of the display picture.

In some implementations, fig. 5 is a schematic block diagram of another display driving circuit provided in an embodiment of the present application. As shown in fig. 5, the display driving circuit further includes: the Level shift module Level Shifter includes a high Level reference input pin electrically connected with the output pin of the gate modulation module 100. For example, as shown in fig. 5, the high-level reference voltage VGH may be adjusted by the gate modulation module 100 to obtain N adjustment reference voltages, where VGHO1 to VGHON, N are natural numbers greater than zero, and the number of corresponding scanning pulse signals CLK is also N, which are CLK1 to CLKN, respectively. In general, the high Level of the scan pulse signal CLK is low in amplitude, for example, 3.3V when the scan pulse signal CLK is outputted from the T-Con (time control circuit), but the high Level of the scan pulse signal required for the display panel is generally high in amplitude, for example, 12V, 24V or 37V, and the high Level shift module Level shift may pull up the high Level of the scan pulse signal CLK outputted from the T-Con according to the size and pixel design of the display panel, and the pulled up amplitude may be determined by the high Level reference voltage VGH. The Level shift module further receives a low Level reference voltage VGL for determining the low Level amplitude of the scan pulse signal CLK. The output pin of the gating modulation module 100 is used for outputting the adjustment reference voltage, and the high-Level reference input pin of the Level shift module is used for receiving the adjustment reference voltage.

According to the display driving circuit provided by the embodiment of the application, the gate control module 100 is utilized to adjust the high-level reference voltage VGH, so that a plurality of adjustment reference voltages can be obtained, each adjustment reference voltage is used for controlling the high-level amplitude of one scanning pulse signal, and the charging rate difference of display pixels of different rows can be reduced, so that the cross grain defect of a display picture is improved.

For example, referring to fig. 5, the display driving circuit may further include an output discharging module XAO and a Logic module Logic Block; the output discharging module XAO is used for pulling all the scanning pulse signals CLK to the high-level reference voltage VGH when the display panel is turned off as a whole, and can perform discharging operation on the pixel capacitance in the display pixel. The Logic Block may be used to perform a scan pulse signal pulling operation for setting the shutdown state, and typically, the Level shift module is disposed between the Logic Block and the output discharge module XAO. The scan pulse signal with the amplitude of the high level adjusted is output from the output discharge module XAO to obtain scan driving signals, which are respectively represented as CLK1 Out to CLKN Out, and to obtain a frame start driving signal STV Out.

In some embodiments, the gate modulation module 100 is used to adjust the voltage division of the scan path for driving the display pixels by the scan driving signal, so as to adjust the high-level amplitude of the scan pulse signal CLK corresponding to the scan path. The voltage division may be implemented by accessing a resistor in the scan path, for example, or by accessing other devices. The access voltage division can change the amplitude of the high level of the scanning driving signal CLK corresponding to the scanning path, thereby changing the voltage applied to the grid electrode of the thin film transistor in the scanning path, and simultaneously changing the current flowing through the grid electrode of the thin film transistor, namely the current of the scanning path, and the charging rate difference caused by the equivalent impedance can be weakened or eliminated by adjusting the access voltage division. Specifically, due to the fact that the process difference causes the equivalent impedance difference of the scanning path and then causes the current difference of the scanning path, the current of the scanning path can be adjusted by adjusting the access partial pressure, further the difference of the opening time of the thin film transistor grid among the display pixels of different rows is reduced, the charging rate difference among the display pixels of different rows can be reduced, and the problem of transverse stripes of a display picture can be solved.

In some embodiments, the Level shift module includes a scan pulse output pin electrically connected to an input pin of the strobe modulation module. The gating modulation module 100 may be coupled into the scan path and can be used to adjust the partial pressure of the scan path.

Specifically, by way of example, fig. 6 is a schematic block diagram of still another display driving circuit according to an embodiment of the present application. As shown in fig. 6, the output discharging module XAO may be disposed between the Level shifting module Level Shifter and the gate modulating module 100. In some embodiments, the gating modulation module 100 may also be disposed between the Level shift module Level Shifter and the output discharge module XAO.

As shown in fig. 6, N scan pulse signals output from the output discharge module XAO are divided by N paths of the gate modulation module 100, so that N scan driving signals with amplitude adjusted at high levels can be obtained, which are respectively represented as CLK1 Out to CLKN Out.

In the display driving circuit provided in the embodiment of the present application, the voltage division of the scan path is adjusted by the gate modulation module 100 to adjust the high-level amplitude of the scan pulse signal CLK corresponding to the scan path. The adjustment of the access partial pressure can change the amplitude of the high level of the scanning driving signal corresponding to the scanning passage, further change the voltage applied to the grid electrode of the thin film transistor in the scanning passage, and simultaneously change the current flowing through the grid electrode of the thin film transistor, namely the current of the scanning passage, and the charging rate difference caused by equivalent impedance can be weakened or eliminated through the adjustment of the access partial pressure, so that the problem of transverse stripes of a display picture can be improved.

In some embodiments, the gating modulation module 100 includes an adjusting unit, and the adjusting unit corresponds to the scan pulse signal one by one.

Fig. 7 is a schematic structural block diagram of a gating modulation module according to an embodiment of the present application. As shown in fig. 7, the gate modulation module 100 includes N adjusting units, which are a first adjusting unit 110, a second adjusting unit 120, and a third adjusting unit 130, …, an nth adjusting unit 1N0, and the high-level reference voltage VGH is adjusted by each adjusting unit of the gate modulation module 100 to obtain adjusted reference voltages VGHO1 to VGHON. The adjustment reference voltages VGHO 1-VGHON may be used to adjust the high level magnitudes of the scan pulse signals CLK 1-CLKN.

In fig. 5 and 6, N adjusting units, denoted by x N, are provided in the gate modulation module 100 corresponding to N scan pulse signals CLK.

Fig. 8 is a schematic block diagram of another gating modulation module according to an embodiment of the present application. Corresponding to the adjustment of the partial voltage of the scan path by the gate modulation module 100, referring to fig. 8, CLK1 may be caused to pass through the first adjustment unit 110 to obtain CLK1 Out, …, and CLKN may be caused to pass through the nth adjustment unit 1N0 to obtain CLKN Out.

In some embodiments, the adjustment unit may comprise at least one switch. The switch may be configured to receive the modulation control signal and to turn on or off based on the modulation control signal, the opening of the switch may turn on the path of the adjustment unit to turn on the adjustment function, and the closing of the switch may turn off the path of the adjustment unit to turn off the adjustment function.

In some embodiments, the adjusting unit may comprise a plurality of switches connected in parallel, with at least one fixed resistor and/or an adjustable resistor being provided between any two switches connected in parallel. The fixed resistor and the adjustable resistor can play roles in dividing voltage and adjusting current.

Fig. 9 is a schematic structural diagram of an adjusting unit according to an embodiment of the present application. As shown in fig. 9, each adjusting unit includes n switches and n resistors, which may be fixed resistors or adjustable resistors. The resistors are respectively represented by R0 to Rn, and n is any natural number. The n switches can receive n control signals which are respectively expressed as D0-Dn, each adjusting unit corresponds to one group of control signals, each group of control signals comprises D0-Dn, the n switches can realize a plurality of adjusting gears of the adjusting unit, and the adjusting capacity range of the adjusting unit is increased. And each adjusting unit correspondingly outputs an adjusting reference voltage VGHOQ, wherein Q is more than or equal to 1 and less than or equal to N. The control signal may be represented in binary form, e.g. 1 for the on control signal of the switch and 0 for the off control signal of the switch. The control signal corresponding to each adjustment unit comprises a set of binary digital codes.

Illustratively, table 1 is a schematic representation of a binary control signal.

TABLE 1

Fig. 10 is a schematic signal timing diagram of a display driving circuit according to an embodiment of the present application. As shown in fig. 10, if the values of VGHO1, VGHO2, VGHO3 … VGHON are not identical, the high-level amplitude values of the corresponding controls CLK1, CLK2, CLK3 … CLKN are not identical, the current of the scan path can be adjusted, so as to reduce the difference of the on-time of the thin film transistor gate between the display pixels of different rows, reduce the charging rate difference between the display pixels of different rows, and improve the problem of the cross stripes of the display screen.

In some embodiments, the regulating unit comprises a plurality of switches connected in parallel, each switch being connected in series with a fixed resistor and/or a variable resistor. The switch is connected with the resistor in series, and the switch and the resistor connected in series can form an adjusting gear and can be used for adjusting the voltage division of the access scanning path.

Fig. 11 is a schematic structural view of another adjusting unit according to an embodiment of the present application. As shown in fig. 11, each adjusting unit includes n switches and n resistors, which may be fixed resistors or adjustable resistors. The resistors are respectively represented as R0-Rn, the resistors and the switches are connected in series, and the resistors and the switches after being connected in series are connected in parallel with other resistors and switches connected in series, so that n adjustment gears can be formed. The n switches can receive n control signals which are respectively expressed as D0-Dn, each adjusting unit corresponds to one group of control signals, each group of control signals comprises D0-Dn, the n switches can realize a plurality of adjusting gears of the adjusting unit, and the adjusting capacity range of the adjusting unit is increased. Each adjusting unit correspondingly outputs a scanning pulse signal CLKQOut, wherein Q is more than or equal to 1 and less than or equal to N.

Illustratively, table 2 is a schematic of another binary control signal.

TABLE 2

In some embodiments, the display driving circuit further includes: and the modulation control module is used for providing a modulation control signal for the gating modulation module 100, and the modulation control signal is used for controlling the gating modulation module 100 to adjust the high-level amplitude of the scanning pulse signal. The modulation control signal may be programmed to burn a program in the modulation control module, and be sent to the gate modulation module 100 according to a display control instruction during the display driving process.

In the display driving circuit provided in this embodiment, the high-level reference voltage may be set to be 40V, and by accessing the gate modulation module 100, based on the modulation control signal, the switch in the adjustment unit is controlled to be turned on, the resistance of the access scanning loop is increased, the voltage division function is achieved, the function of reducing the high-level amplitude of the scanning pulse signal is achieved, and the switch corresponding to the number and the corresponding position is controlled to be turned on according to specific needs. The switch in the adjusting unit can be controlled to be turned on based on the modulation control signal, the resistance of the high-level reference voltage adjusting circuit is increased, the voltage division function is achieved, the effect of adjusting the high-level reference voltage is achieved, the amplitude of the high level of the scanning pulse signal is controlled to be lowered, and the switch of the corresponding number and the switch of the corresponding position are controlled to be turned on according to specific requirements. The adjustability of the high-level amplitude of the scanning pulse signal can be realized by pulling the high-level reference signal up in advance and reducing the value of the high-level reference signal according to specific conditions or directly reducing the high-level amplitude of the scanning pulse signal, so that the current of a scanning channel is regulated, the difference of the grid electrode conduction performance of the thin film transistor between display pixels of different rows is reduced, the charging rate difference between the display pixels of different rows can be reduced, and the problem of transverse lines of a display picture can be solved.

In some embodiments, the switch includes at least one thin film transistor. In a semiconductor integrated circuit, for example, a thin film transistor can be used as a switching device in a driver chip, and the process is mature and stable. Other forms of switching devices may also be used for the switch, and the embodiments of the present application are not particularly limited.

In a second aspect of the embodiments of the present application, a display driving method is provided, which is applied to the display driving circuit according to the first aspect, and fig. 12 is a schematic flowchart of a display driving method provided in an embodiment of the present application. As shown in fig. 12, the display driving method includes:

s301: and receiving a display control instruction. The display control instruction may be sent by the control motherboard or may be sent by other control chips, which is not specifically limited in the embodiment of the present application.

S302: driving display pixels of a display panel to display a picture based on the display control instruction; in the process of driving display pixels of a display panel to display pictures based on display control instructions, the gate modulation module is used for adjusting the amplitude of the high level of the received scanning pulse signals so as to reduce the current difference between different scanning paths, wherein the scanning paths are paths for driving the display pixels by scanning driving signals.

For the situation that the high-level amplitude of the pulse signal CLK in the existing display driving circuit is fixed and not adjustable, for example, the high-level amplitudes of CLK 1-CLK 6 are not adjustable, under the condition that the equivalent impedance of a scanning path of a display pixel is different due to process fluctuation, the grid voltages of thin film transistors corresponding to the display pixel are different, and finally, the charging rate difference of a pixel electrode is caused, so that the display picture cross stripe is bad. According to the display driving circuit provided by the embodiment of the application, the gating modulation module 100 is arranged, the gating modulation module 100 can adjust the high-level amplitude of the scanning pulse signal CLK, and under the condition that the equal resistance of the scanning channel of the display pixel is different due to process fluctuation, the grid voltage of the thin film transistor of the display pixel is adjusted by adjusting the high-level amplitude of the scanning pulse signal CLK, so that the grid of the thin film transistor is continuously started in a required time period, the charging time of a pixel electrode is not influenced by the equivalent impedance difference, the charging rate difference between the display pixels of different rows can be reduced, and the cross grain defect of a display picture can be improved. Specifically, it can be understood that by adjusting the high level amplitude of the scanning pulse signal CLK, the accumulated charge amounts of the gates of the thin film transistors corresponding to the display pixels of different rows are ensured to be relatively average according to the equivalent difference, so that the turn-on time of the thin film transistors of different rows is ensured to be relatively average, the difference of the charge time of the pixel electrodes of different rows can be reduced, the charge rates of the pixel electrodes of different rows are ensured to be relatively balanced, and the cross grain defect caused by the charge rate difference of the pixel electrodes of different rows is avoided.

According to the display driving method provided by the embodiment of the application, the gate modulation module 100 is used for adjusting the high-level amplitude of the received scanning pulse signal CLK, and under the condition that the process fluctuation causes the difference of the equivalent impedance of the scanning paths of the display pixels, the gate voltage of the thin film transistor of the display pixels is adjusted by adjusting the high-level amplitude of the scanning pulse signal CLK, so that the gate of the thin film transistor is ensured to be continuously opened in a required time period, the charging time of the pixel electrode is ensured not to be influenced by the difference of the equivalent impedance, the difference of the charging rates between the display pixels of different rows can be reduced, and the cross grain defect of the display picture can be improved.

In some embodiments, the display control instruction includes a modulation control signal, and before step S301, further includes:

and collecting the current of the scanning path to obtain the initial scanning current. The current of each scanning channel corresponding to the scanning pulse signal can be tested by using a testing jig or an electric signal acquisition device, so as to obtain the corresponding initial scanning current.

And determining the scanning paths needing compensation current and corresponding compensation current values according to the difference of initial scanning currents among different scanning paths. It should be noted that the compensation current value may be positive or negative, and is mainly determined according to the difference of the initial scan currents between different scan paths.

And generating a modulation control signal according to the scanning path needing compensation current and the corresponding compensation current value, wherein the modulation control signal comprises the address of the scanning path needing compensation current and the corresponding compensation current value.

It should be noted that, the control program for collecting the initial scan current and generating the modulation control signal may be executed at the start-up stage of the display device, or may be executed each time or at intervals of a set period, and the execution times may be set according to the operation computing capability of the display device. I.e. the control program that collects the initial scan current and generates the modulation control signal, may be run during use of the display device by the user.

In some embodiments, the process of collecting the initial scanning current and generating the modulation control signal is only performed at the debugging stage before the display device or the display panel leaves the factory, and the modulation control signal after the debugging is burnt in the modulation control module, so that the user can adjust the scanning pulse signal in the process of using the display device.

Step S302 may include:

in driving display pixels of a display panel to display a picture based on a display control instruction, the amplitude of the high level of a received scanning pulse signal is adjusted based on a modulation control signal. After the gating modulation module receives the modulation control signal, the high-level amplitude of the scanning pulse signal can be adjusted based on the modulation control signal, the scanning channel with current difference can be compensated through high-level voltage compensation of the scanning pulse signal, and the high-level amplitude of the scanning pulse signal can be reduced or increased and is mainly determined according to the compensation current value.

According to the display driving method provided by the embodiment of the application, aiming at the fact that the high-level amplitude of the pulse signal CLK in the existing display driving circuit is fixed and not adjustable, the embodiment of the application collects initial scanning current in advance, determines a scanning path needing compensation current and corresponding compensation current values according to the difference of the initial scanning current among different scanning paths, generates a modulation control signal according to the scanning path needing compensation current and the corresponding compensation current values, and the gating modulation module 100 adjusts the amplitude of the high level of the scanning pulse signal CLK based on the modulation control signal. Under the condition that the process fluctuation causes the difference of the equivalent impedance of the scanning paths of the display pixels, the difference between the equivalent impedance of different scanning paths can be reflected by testing the difference of the initial scanning currents of the scanning paths, the adjustment amplitude of the high-level amplitude of the scanning pulse signal CLK can be determined according to the difference of the initial scanning currents, the amplitude of the high level of the scanning pulse signal CLK can be adjusted, the charging rate difference between the display pixels of different rows can be reduced, and the cross grain defect of the display picture can be improved.

In some embodiments, adjusting the amplitude of the high level of the received scanning pulse signal by the gating modulation module may include:

The high level reference voltage is regulated to output a regulated reference voltage.

The amplitude of the high level of the scanning pulse signal is adjusted based on the adjustment reference voltage. The gate modulation module 100 adjusts the amplitude of the high level of the scan pulse signal CLK by adjusting the high level reference voltage. The gate modulation module 100 adjusts the high level reference voltage to obtain an adjusted reference voltage, and the adjusted reference voltage can control the high level amplitude of the corresponding scanning pulse signal. Specifically, the adjustment reference voltages may be in one-to-one correspondence with the scan pulse signals. In general, the existing display driving circuit is only provided with one high-level reference voltage signal line, and the display driving circuit provided in the embodiment of the present application can obtain a plurality of adjustment reference voltages through adjustment of the gate modulation module 100, where each adjustment reference voltage is used to control the amplitude of the high level of one scanning pulse signal, so as to reduce the charging rate difference of the display pixels of different rows, thereby improving the cross stripe defect of the display picture.

In some embodiments, adjusting the amplitude of the high level of the received scanning pulse signal by the gating modulation module includes:

The partial pressure of the scanning path is adjusted to adjust the amplitude of the high level of the scanning pulse signal corresponding to the scanning path. The voltage division may be implemented by accessing a resistor in the scan path, for example, or by accessing other devices. The access voltage division can change the amplitude of the high level of the scanning driving signal corresponding to the scanning passage, so as to change the voltage applied to the grid electrode of the thin film transistor in the scanning passage, and simultaneously, the current flowing through the grid electrode of the thin film transistor, namely the current of the scanning passage, and the charging rate difference caused by equivalent impedance can be weakened or eliminated through the adjustment of the access voltage division. Specifically, due to the fact that the process difference causes the equivalent impedance difference of the scanning path and then causes the current difference of the scanning path, the current of the scanning path can be adjusted by adjusting the access partial pressure, further the difference of the opening time of the thin film transistor grid among the display pixels of different rows is reduced, the charging rate difference among the display pixels of different rows can be reduced, and the problem of transverse stripes of a display picture can be solved.

In a third aspect of the embodiments of the present application, a driving controller is provided, and fig. 13 is a schematic block diagram of a driving controller provided in the embodiments of the present application. As shown in fig. 13, the drive controller includes:

A memory 401, the memory 401 storing a computer program;

a processor 402, the processor 402 being configured to implement the display driving method according to the second aspect when executing a computer program.

It should be noted that, the driving controller may be disposed on a control motherboard of the display device, and the driving controller may be disposed in the display device in a chip form, which is not limited in particular.

In a fourth aspect of the embodiments of the present application, a display device is provided, and fig. 14 is a schematic block diagram of a display device provided in the embodiments of the present application. As shown in fig. 14, the display device includes: the display driving circuit 501 according to the first aspect, and/or the driving controller 502 according to the third aspect. The display driving circuit 501 may be a driving chip within the display device, and the driving controller 502 may be disposed on a control main board of the display device.

Illustratively, the display device provided in the embodiments of the present application includes a driving circuit 501 and a driving controller 502, where the driving controller 502 may control the operation of the driving circuit 501.

In some embodiments, the display device further includes: the display pixels are arranged in a display area of the display panel; and the control circuit board is electrically connected with the display panel. The display panel may be a liquid crystal display panel, an organic light emitting display panel or an LED display panel, and the embodiments of the present application are not particularly limited. The control circuit board can be understood as a control main board of the display device, and the display driving circuit is bound to the non-display area of the display panel. The display driving circuit is bound to the non-display area of the display panel in the form of a driving chip, and the display panel may be a flexible display panel, and the non-display area bound with the display driving circuit may be bent to the back of the display panel to reduce the frame of the display device. The display driving circuit can also be arranged on the control circuit board, and can be reasonably designed according to the space of a specific display device.

It should be noted that, the display device provided in the embodiments of the present application may be a smart phone, a notebook computer, a tablet computer, a television or other displays, and the embodiments of the present application are not limited in particular.

In the foregoing embodiments, the descriptions of the embodiments are focused on, and for those portions of one embodiment that are not described in detail, reference may be made to the related descriptions of other embodiments.

It will be appreciated by those skilled in the art that embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-readable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-readable program code embodied therein.

The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flowchart illustrations and/or block diagrams, and combinations of flows and/or blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded computer, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.

These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.

These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.

Embodiments of the present application also provide a computer program product comprising computer software instructions that, when run on a processing device, cause the processing device to perform the flow of a display driving method.

The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the processes or functions in accordance with embodiments of the present application are produced in whole or in part. The computer may be a general purpose computer, a special purpose computer, a computer network, or other programmable apparatus. The computer instructions may be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another computer-readable storage medium, for example, the computer instructions may be transmitted from one website, computer, server, or data center to another website, computer, server, or data center by a wired (e.g., coaxial cable, fiber optic, digital subscriber line (digital subscriber line, DSL)) or wireless (e.g., infrared, wireless, microwave, etc.). Computer readable storage media can be any available media that can be stored by a computer or data storage devices such as servers, data centers, etc. that contain an integration of one or more available media. Usable media may be magnetic media (e.g., floppy disks, hard disks, magnetic tapes), optical media (e.g., DVDs), or semiconductor media (e.g., solid State Disks (SSDs)), among others.

It will be clear to those skilled in the art that, for convenience and brevity of description, specific working procedures of the above-described systems, apparatuses and units may refer to corresponding procedures in the foregoing method embodiments, which are not repeated herein.

In the several embodiments provided in this application, it should be understood that the disclosed apparatus, device, and method may be implemented in other manners. For example, the apparatus embodiments described above are merely illustrative, e.g., the division of elements is merely a logical functional division, and there may be additional divisions of actual implementation, e.g., multiple elements or components may be combined or integrated into another system, or some features may be omitted, or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be an indirect coupling or communication connection via some interfaces, devices or units, which may be in electrical, mechanical or other form.

The units described as separate units may or may not be physically separate, and units shown as units may or may not be physical units, may be located in one place, or may be distributed over a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

In addition, each functional unit in each embodiment of the present application may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit. The integrated units may be implemented in hardware or in software functional units.

The integrated units, if implemented in the form of software functional units and sold or used as stand-alone products, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present application may be embodied in essence or a part contributing to the prior art or all or part of the technical solution in the form of a software product stored in a storage medium, including several instructions to cause a computer device (which may be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the methods of the embodiments of the present application. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a random access Memory (Random Access Memory, RAM), a magnetic disk, or an optical disk, or other various media capable of storing program codes.

The above embodiments are only for illustrating the technical solution of the present application, and not for limiting the same; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the corresponding technical solutions.

While preferred embodiments of the present description have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. It is therefore intended that the following claims be interpreted as including the preferred embodiments and all such alterations and modifications as fall within the scope of the disclosure.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present specification without departing from the spirit or scope of the specification. Thus, if such modifications and variations of the present specification fall within the scope of the claims and the equivalents thereof, the present specification is also intended to include such modifications and variations.

Claims

1. A display driving circuit, comprising:

the gate modulation module is used for adjusting the amplitude of the high level of a received scanning pulse signal so as to reduce current difference among different scanning paths and reduce charging rate difference among display pixels of different rows, the scanning pulse signal is used for driving the display pixels of the display panel, the scanning path is a path for driving the display pixels by a scanning driving signal, and the scanning pulse signal after the amplitude of the high level is adjusted is output to obtain the scanning driving signal;

the gating modulation module comprises an adjusting unit, and the adjusting unit corresponds to the scanning pulse signals one by one;

the gating modulation module is used for adjusting high-level reference voltage to output adjustment reference voltage, the adjustment reference voltage is used for adjusting the high-level amplitude of the scanning pulse signal, and the adjustment reference voltage corresponds to the scanning pulse signal one by one; or alternatively, the first and second heat exchangers may be,

the gating modulation module is used for adjusting the partial pressure of a scanning path for driving the display pixels by the scanning driving signals so as to adjust the amplitude of the high level of the scanning pulse signals corresponding to the scanning path.

2. The display driver circuit of claim 1, wherein the adjustment unit comprises at least one switch.

3. A display driver circuit according to claim 2, wherein the adjustment unit comprises a plurality of switches connected in parallel, at least one fixed resistor and/or adjustable resistor being arranged between any two of the switches connected in parallel.

4. A display driver circuit according to claim 2, wherein the adjustment unit comprises a plurality of switches connected in parallel, each of the switches being connected in series with a fixed resistor and/or a variable resistor.

5. The display driver circuit of claim 2, wherein the switch comprises at least one thin film transistor.

6. The display driver circuit according to claim 1, further comprising:

7. The display driver circuit according to claim 1, further comprising:

8. The display driver circuit according to claim 7, further comprising:

9. The display driver circuit according to claim 1, further comprising:

10. A display driving method, characterized in that it is applied to the display driving circuit according to any one of claims 1 to 9, comprising:

receiving a display control instruction;

in the process of driving the display pixels of the display panel to display pictures based on the display control instruction, the gate modulation module is used for adjusting the high-level amplitude of the received scanning pulse signals so as to reduce the current difference between different scanning paths and reduce the charging rate difference between display pixels of different rows, the scanning paths are paths for driving the display pixels by using scanning driving signals, the scanning pulse signals after the high-level amplitude is adjusted are output to obtain the scanning driving signals, and the gate modulation module comprises an adjusting unit which corresponds to the scanning pulse signals one by one;

The method for adjusting the amplitude of the high level of the received scanning pulse signal through the gating modulation module comprises the following steps:

adjusting the amplitude of the high level of the scanning pulse signal based on the adjustment reference voltage;

or alternatively, the first and second heat exchangers may be,

11. The display driving method according to claim 10, wherein the display control instruction includes a modulation control signal;

before receiving the display control instruction, the method further comprises:

12. A drive controller, comprising:

a memory in which a computer program is stored;

a processor for implementing the display driving method according to claim 10 or 11 when executing the computer program.

13. A display device, comprising:

a display driver circuit as claimed in any one of claims 1 to 9, and/or a drive controller as claimed in claim 12.

14. The display device according to claim 13, further comprising:

the display pixels are arranged in a display area of the display panel;

the control circuit board is electrically connected with the display panel;

the display driving circuit is arranged on the control circuit board.