CN114762093A - Method for manufacturing semiconductor device, and power conversion device - Google Patents

Method for manufacturing semiconductor device, and power conversion device Download PDF

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Publication number
CN114762093A
CN114762093A CN202080083528.3A CN202080083528A CN114762093A CN 114762093 A CN114762093 A CN 114762093A CN 202080083528 A CN202080083528 A CN 202080083528A CN 114762093 A CN114762093 A CN 114762093A
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China
Prior art keywords
semiconductor device
sealed
primer layer
solution
case
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CN202080083528.3A
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Chinese (zh)
Inventor
川添智香
藤野纯司
北川达哉
村田大辅
梶勇辅
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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Publication of CN114762093A publication Critical patent/CN114762093A/en
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    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
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Abstract

A semiconductor element (19) is mounted on the ceramic substrate (5). A ceramic substrate (5) on which a semiconductor element (19) is mounted is housed in a case (13). A solution of a silane coupling agent is flowed into the case (13). The solution in the housing (13) is removed. A treatment is applied to the solution adhering to the semiconductor element (19) or the like in the step of flowing the solution into the case (13), thereby forming an undercoat layer (35) on the surface of the semiconductor element (19) or the like. A semiconductor element (19) or the like having a primer layer (35) formed thereon is sealed by filling a sealing material (37) into a case (13).

Description

Method for manufacturing semiconductor device, and power conversion device
Technical Field
The present disclosure relates to a method of manufacturing a semiconductor device, and a power conversion device.
Background
Semiconductor devices (power modules) for electric power are used in a wide range of fields such as industrial equipment, automobiles, and railways. In recent years, with the increase in performance of devices equipped with semiconductor devices, there have been demands for an increase in rated voltage and rated current, an increase in operating temperature, and the like.
In a semiconductor device in which a semiconductor element or the like is sealed with a sealing material, in particular, in order to cope with operation at high temperature, it is required to improve the adhesion strength between the sealed semiconductor element or the like and the sealing material. For example, patent document 1 proposes the following method: an aqueous solution of a silane coupling agent is applied to a semiconductor device or the like and dried, whereby an undercoat layer (プライマ body panel) is formed on the surface of the semiconductor device or the like, and the semiconductor device or the like is sealed with a sealing material.
Prior art documents
Patent document
Patent document 1: japanese patent laid-open publication No. 2018-39211
Disclosure of Invention
Problems to be solved by the invention
The semiconductor device of the following mode: an insulating substrate on which a semiconductor element is mounted is housed in a case, and the insulating substrate and the like housed in the case are sealed with a sealing material. In such a semiconductor device, it is required to selectively form an undercoat layer for achieving adhesion between a semiconductor element or the like sealed with a sealing material and the sealing material.
The present disclosure has been made under such development, and an object thereof is to provide a method for manufacturing a semiconductor device, which can selectively form an undercoat layer in order to improve the adhesion strength between a sealing material and a member to be sealed, such as a semiconductor element, sealed with the sealing material, another object thereof is to provide such a semiconductor device, and still another object thereof is to provide a power conversion device provided with such a semiconductor device.
Means for solving the problems
The method for manufacturing a semiconductor device according to the present disclosure is a method for manufacturing a semiconductor device in which a semiconductor element is sealed with a sealing material, and includes the following steps. A sealed member including a semiconductor element to be sealed by a sealing material is formed. The sealed member is housed in the case. A solution of the silane coupling agent is flowed into the housing. The solution within the housing is removed. The solution adhering to the member to be sealed in the step of flowing the solution into the case is treated to form a primer layer on the surface of the member to be sealed. The sealing material is filled in the case, thereby sealing the member to be sealed on which the primer layer is formed. The step of forming the primer layer includes a step of forming a primer layer on the surface of the semiconductor element.
The semiconductor device of the present disclosure is a semiconductor device in which a semiconductor element is sealed with a sealing material, and includes a member to be sealed, a case, an undercoat layer, and a sealing material. The sealed member includes an insulating substrate on which a semiconductor element is mounted and which is sealed with a sealing material. The housing accommodates the sealed member. The primer layer is formed on the surface of the member to be sealed. The sealing material is filled in the case and seals the member to be sealed having the primer layer formed thereon. The primer layer is interposed between the member to be sealed and the sealing material, and bonds the member to be sealed and the sealing material. The primer layer is formed between the inner wall surface of the housing including the member to be sealed and the sealing material.
The disclosed power conversion device is provided with: a main converter circuit including the semiconductor device, converting input power and outputting the converted power; and a control circuit that outputs a control signal for controlling the main conversion circuit to the main conversion circuit.
ADVANTAGEOUS EFFECTS OF INVENTION
According to the method of manufacturing a semiconductor device of the present disclosure, a solution of a silane coupling agent is flowed into a case containing a member to be sealed including a semiconductor element, the solution in the case is removed, and then a treatment is applied to the solution adhering to the member to be sealed, thereby forming an undercoat layer on the surface of the member to be sealed. Thus, the primer layer can be selectively formed between the inner wall surface of the housing including the member to be sealed and the sealing material. By selectively forming the primer layer at a desired portion, the adhesion strength between the member to be sealed and the sealing material can be improved, and the operation at a higher temperature can be performed.
According to the semiconductor device of the present disclosure, the primer layer is selectively formed between the inner wall surface of the case including the member to be sealed and the sealing material. By selectively forming the primer layer at a desired portion, the adhesion strength between the member to be sealed and the sealing material can be improved, and the operation at a higher temperature can be performed.
According to the power conversion device of the present disclosure, the semiconductor device having the primer layer selectively formed at a desired portion is provided, and the power conversion device can be operated at a higher temperature.
Drawings
Fig. 1 is a plan view of a semiconductor device according to embodiment 1.
Fig. 2 is a cross-sectional view of the semiconductor device of this embodiment mode, taken along a line II-II shown in fig. 1.
Fig. 3 is a cross-sectional view showing a step of the method for manufacturing a semiconductor device according to this embodiment.
Fig. 4 is a cross-sectional view showing a process performed after the process shown in fig. 3 in this embodiment.
Fig. 5 is a cross-sectional view showing a process performed after the process shown in fig. 4 in this embodiment.
Fig. 6 is a cross-sectional view showing a process performed after the process shown in fig. 5 in this embodiment.
Fig. 7 is a cross-sectional view showing a process performed after the process shown in fig. 6 in this embodiment.
Fig. 8 is a cross-sectional view showing a process performed after the process shown in fig. 7 in this embodiment.
Fig. 9 is a cross-sectional view showing a process performed after the process shown in fig. 8 in this embodiment.
Fig. 10 is a plan view showing the process shown in fig. 7 in this embodiment in more detail.
Fig. 11 is a sectional view showing a step of the method for manufacturing a semiconductor device according to embodiment 2.
Fig. 12 is a cross-sectional view showing a process performed after the process shown in fig. 11 in this embodiment.
Fig. 13 is a cross-sectional view showing a process performed after the process shown in fig. 12 in this embodiment.
Fig. 14 is a plan view showing more specifically the process shown in fig. 12 in this embodiment.
Fig. 15 is a cross-sectional view showing more specifically a process performed after the process shown in fig. 12 in this embodiment.
Fig. 16 is a cross-sectional view showing a first example of the semiconductor device according to embodiment 3.
Fig. 17 is a cross-sectional view showing a second example of the semiconductor device according to this embodiment.
Fig. 18 is a cross-sectional view showing a third example of the semiconductor device according to this embodiment.
Fig. 19 is a sectional view showing a semiconductor device according to embodiment 4.
Fig. 20 is a sectional view showing a step of the method for manufacturing a semiconductor device according to this embodiment.
Fig. 21 is a cross-sectional view showing a process performed after the process shown in fig. 20 in this embodiment.
Fig. 22 is a cross-sectional view showing a process performed after the process shown in fig. 21 in this embodiment.
Fig. 23 is a block diagram of a power conversion device according to embodiment 5.
Detailed Description
Embodiment mode 1
An example of the semiconductor device of embodiment 1 will be described. As shown in fig. 1 and 2, in the semiconductor device 1, a power semiconductor element 21 and an IC element 24 are mounted as a semiconductor element 19 on a ceramic substrate 5 as an insulating substrate. The power semiconductor element 21 includes, for example, an IGBT (Insulated Gate Bipolar Transistor) and a diode that control electric power. The IC element 24 includes, for example, a switching element.
The ceramic substrate 5 includes a substrate main body 7, a conductor layer 9, and a conductor layer 11. A conductor layer 9 is formed on one main surface side of the substrate body 7. A conductor layer 11 is formed on the other main surface side of the substrate main body 7. The power semiconductor element 21 is joined to the conductor layer 11 by solder 17 a. The IC component 24 is joined to the conductor layer 11 by solder 17 b. The substrate body 7 is formed of, for example, aluminum nitride (AlN).
The case 13 is fixed to the ceramic substrate 5 on which the semiconductor element 19 is mounted by an adhesive 15. The housing 13 is fitted with an external electrode terminal 31 and a signal electrode terminal 33. The case 13 is formed of, for example, polyphenylene Sulfide Resin (PPS).
An external electrode terminal 31 and a signal electrode terminal 33, which are conductive members electrically connected to the outside, are mounted on the case 13. The external electrode terminals 31 include an external electrode terminal 31a and an external electrode terminal 31 b. The external electrode terminal 31a serves as a source electrode terminal, for example. The external electrode terminal 31b is, for example, a drain electrode terminal. The external electrode terminal 31a and the surface electrode 23 of the power semiconductor element 21 are electrically connected by a plurality of wires 25. The external electrode terminal 31b and the conductor layer 11 are electrically connected by a plurality of wires 29.
The signal electrode terminal 33 is, for example, a gate electrode terminal or a temperature sensor electrode terminal. The signal electrode terminal 33 and the signal electrode 26 of the IC element 24 are electrically connected by a wire 27. The lead wire 25 is made of aluminum having a diameter of about 100 to 500 μm, for example.
The ceramic substrate 5 on which the semiconductor element 19 is mounted is sealed as a member to be sealed with a sealing material 37 filled in the case 13. In the semiconductor device 1, the lead wires 25, 27, 29, etc. are also sealed with the sealing material 37 as a part of the member to be sealed. An undercoat layer 35 is interposed between the ceramic substrate 5 on which the semiconductor element 19 is mounted and the sealing material 37. An undercoat layer 35 is interposed between the lead wires 25, 27, 29, etc. and the sealing material 37.
The primer layer 35 is formed to cover the surface of the ceramic substrate 5 on which the semiconductor element 19 is mounted. The primer layer 35 is formed to cover the surfaces of the wires 25, 27, 29. The primer layer 35 is formed to cover the inner wall surface of the case 13 from the bottom of the case 13 to a position between the bottom of the case 13 and the upper end of the case 13.
As described later, the primer layer 35 is formed by immersing the ceramic substrate 5 or the like on which the semiconductor element 19 is mounted in a solution of, for example, a silane coupling agent. The silane coupling agent has a functional group that binds to an organic material and a functional group that binds to an inorganic material. Examples of the solvent for the silane coupling agent include water and ethanol. The concentration (weight) of the silane coupling agent in the silane coupling agent solution is preferably 1 to 10%. In the case where the concentration of the silane coupling agent is less than 1%, the primer layer 35 may not be sufficiently formed. On the other hand, in the case where the concentration of the silane coupling agent is higher than 10%, the primer layer 35 becomes excessively thick.
The primer layer 35 is interposed between the ceramic substrate 5 or the like on which the semiconductor element 19 is mounted and the sealing material 37. The primer layer 35 has a function of bonding to an inorganic material such as the ceramic substrate 5 on which the semiconductor element 19 is mounted and bonding to an organic material of the sealing material 37. This can improve the adhesion strength between the sealing material 37 and the ceramic substrate 5 on which the semiconductor element 19 is mounted.
For example, by interposing the primer layer 35 having a thickness of about 30nm to 500nm between aluminum as an inorganic material and an epoxy resin as an organic material, the adhesion strength can be improved by about 3 times as compared with the case where the primer layer 35 is not interposed. When the thickness of the primer layer 35 is less than 30nm, it is difficult to obtain sufficient adhesion strength.
Further, by interposing the primer layer 35 having a thickness of about 100nm to 500nm between the copper and the epoxy resin, the adhesion strength can be improved by about 3 times as compared with the case where the primer layer 35 is not interposed. When the thickness of the primer layer 35 is less than 100nm, it is difficult to obtain sufficient adhesion strength.
In any case, when the thickness of the primer layer 35 is more than 500nm, the adhesion strength does not vary greatly and the consumption amount of the primer solution increases. Therefore, from the viewpoint of suppressing the production cost, it is preferable that the thickness of the primer layer 35 is not more than 500 nm.
The semiconductor device 1 sealed with the sealing material 37 is mounted on the cooling mechanism 39. In fig. 1, although the state in which the conductor layer 9 of the ceramic substrate 5 is mounted on the cooling mechanism 39 is schematically shown, the semiconductor device 1 may be a semiconductor device in which a base plate (neither shown) is mounted on the ceramic substrate 5 with an insulating layer interposed therebetween. In this case, the base plate is interposed between the ceramic substrate 5 and the cooling mechanism 39. The semiconductor device 1 of embodiment 1 is configured as described above.
Next, an example of the method for manufacturing the semiconductor device 1 will be described. As shown in fig. 3, a ceramic substrate 5 is prepared. In the ceramic substrate 5, a conductive layer 9 is formed on one main surface side of the substrate main body 7, and a conductive layer 11 is formed on the other main surface side. A plate-like solder is placed on the conductor layer 11. Semiconductor element 19 including power semiconductor element 21 and IC element 24 is disposed on the solder and put into a reflow furnace. The solder in the form of a plate is melted in a reflow furnace, and the semiconductor element 19 and the conductor layer 11 (ceramic substrate 5) are joined. Thereby, the back surface electrode (for example, a drain electrode (not shown)) of the power semiconductor element 21 is electrically connected to the conductor layer 11.
Then, as shown in fig. 4, the case 13 is bonded to the ceramic substrate 5 on which the semiconductor element 19 is mounted by the adhesive 15. The external electrode terminals 31 and the signal electrode terminals 33 are fitted in advance to the housing 13 (insert molding). An inner peripheral portion of the housing 13 is coated with, for example, a silicon adhesive 15. The ceramic substrate 5 on which the semiconductor element 19 is mounted is aligned with respect to the case 13, and the ceramic substrate 5 is placed on the case 13. Then, the case 13 on which the ceramic substrate 5 is placed is put into a furnace (not shown). The adhesive 15 is cured by heating in an oven at a temperature of, for example, 50 to 150 ℃ for about 30 minutes.
Then, as shown in fig. 5, the external electrode terminals 31 and the signal electrode terminals 33 are electrically connected to the semiconductor element 19, respectively. Here, for example, a wire bonding apparatus (not shown) is used. The external electrode terminal 31a and the surface electrode 23 (e.g., source electrode) of the power semiconductor element 21 are electrically connected by a plurality of wires 25. The external electrode terminal 31b and the conductor layer 11 are electrically connected by a lead wire 29 (see fig. 1). The signal electrode terminal 33 and the signal electrode 26 of the IC element 24 are electrically connected by a wire 27.
Then, a treatment for forming a primer layer is performed. First, a solution of a silane coupling agent, i.e., an undercoat agent solution, is prepared. Then, as shown in fig. 6, the primer solution 34 is flowed into the case 13. In this case, it is necessary to form a primer layer also on the surface of the back side of the bent portions of the leads 25, 27, 29. When the inside of the case 13 is viewed from above, it is necessary to form an undercoat layer also on the surface of the semiconductor element 19 or other portion that forms a dead space below the leads 25, 27, and 29. Therefore, the primer solution 34 is allowed to flow into a position higher than the top of the wires 25, 27, 29 by, for example, about 0.5 to 5 mm.
At this time, only a part of the members may be immersed in the primer solution 34 as necessary. For example, when the lead wire 25 is dipped and the lead wires 27 and 29 do not need to be dipped, the lead wire 25 may be dipped in the primer solution 34 up to a position higher by about 0.5 to 5mm than the top portion of the lead wire 25. For example, in the case where the portion of the semiconductor element 19 is to be impregnated and the bent portion of the lead wires 25, 27, 29 does not need to be impregnated, the portion up to about 0.5 to 5mm higher than the upper portion of the semiconductor element 19 may be impregnated in the primer solution 34.
For example, when the joint portion between the semiconductor element 19 and the leads 25 and 27 is to be immersed, the joint portion may be immersed in the primer solution 34 up to a position higher by about 0.5 to 5mm than the joint portion. In this case, the primer solution 34 adheres to the inner wall surface of the case 13 at a position higher by about 0.5 to 5mm than the bonding portion from the bottom surface of the case 13, and finally remains as the primer layer 35 in the completed semiconductor device 1 (see fig. 2).
Then, the excess primer solution 34 that has flowed into the case 13 is removed. As shown in fig. 7, the primer solution 34 is sucked through the nozzle 51. At this time, the nozzle 51 is disposed at a position (above) about 1 to 20mm, for example, from the surface of the conductor layer 11 near the center of the ceramic substrate 5 where no component such as the semiconductor element 19 is mounted, and the primer solution 34 is sucked. Considering the primer solution 34 to be attracted, the viscosity of the primer solution 34 is preferably 10Pa · s or less.
If the primer solution 34 remains, the portion is likely to bulge, and the uniformity of the thickness of the primer layer formed is likely to be reduced. Therefore, it is preferable to attract the primer solution 34 so that droplets of the primer solution 34 may not remain as much as possible.
The thickness of the primer layer formed on the ceramic substrate 5 or the like on which the semiconductor element 19 is mounted can be changed depending on the concentration of the silane coupling agent contained in the solution, and when the concentration of the silane coupling agent becomes high, the thickness of the primer layer becomes thick. By changing the concentration of the silane coupling agent, the amount of the silane coupling agent adhering to the ceramic substrate 5 and the like can be changed, and the thickness of the primer layer can be controlled.
As described above, the primer solution 34 is preferably attracted so that no droplet of the primer solution 34 remains, but a liquid pool may be provided as needed. For example, when the film thickness of the primer layer formed on the ceramic substrate 5 and the semiconductor element 19 is to be controlled, first, the concentration of the silane coupling agent and the amount of the primer solution 34 sucked from the nozzle 51 are changed to form a pool of the primer solution 34 in the case 13.
Then, by heating, moisture such as liquid pool is evaporated, and the film thickness of the primer layer formed on the ceramic substrate 5 and the semiconductor element 19 can be controlled. For example, the thickness of the primer layer in the central portion of the semiconductor element 19 can be made thicker than the thickness of the primer layer in the peripheral portion of the semiconductor element 19 in accordance with the relationship with the material disposed in the peripheral portion of the semiconductor element 19.
After the primer solution 34 is sucked, the substrate is put into a furnace and dried, and as shown in fig. 8, a primer layer 35 is formed on the surface of the ceramic substrate 5 or the like on which the semiconductor element 19 is mounted. Then, the case 13 is filled with a liquid sealing material. Then, as shown in fig. 9, the liquid sealing material is cured by applying heat treatment, thereby forming a sealing material 37. Thus, the main part of the semiconductor device 1 is completed. Then, the semiconductor device 1 is mounted on the cooling mechanism 39, whereby the semiconductor device 1 shown in fig. 1 and the like is manufactured.
In the semiconductor device 1 described above, the primer layer 35 can be selectively formed by flowing the primer solution 34 to be the primer layer 35 into the case 13. This will be explained.
In the semiconductor device 1 in which the ceramic substrate 5 or the like on which the semiconductor element 19 is mounted is housed in the case 13, if the primer layer 35 is formed by spin coating after the case 13 is bonded to the ceramic substrate 5, for example, a portion where the primer layer 35 cannot be formed, such as a bent portion of the lead wires 25, 27, and 29, appears.
Further, the primer solution 34 that diffuses outward from the vicinity of the center in the case 13 is accumulated in the corner portions of the case 13, and when the primer solution 34 diffuses, droplets of the primer solution 34 are likely to adhere to the upper end portion of the case 13, the external electrode terminal 31, the signal electrode terminal 33, and the like. The upper end portion of the case 13, etc., is a portion where the primer layer 35 is not required to be formed.
Further, if the primer layer 35 is formed by a bar coater after the case 13 is bonded to the ceramic substrate 5, the leads 25, 27, and 29 are connected, and thus the leads 25, 27, and 29 become obstacles, and it is difficult to form the primer layer 35.
In addition, when the entire case 13 to which the ceramic substrate 5 and the like are fixed is immersed in the primer solution 34, the outer wall surface of the case 13, and portions such as the external electrode terminal 31 and the signal electrode terminal 33 that do not need to be formed with the primer layer 35 are immersed in the primer solution 34.
In contrast to these methods, in the above-described method, the primer solution flows into the case 13 to which the ceramic substrate 5 or the like on which the semiconductor element 19 is mounted is fixed, and the ceramic substrate 5 or the like is immersed in the primer solution 34. Therefore, the primer solution 34 can be prevented from adhering to the outer wall surface of the case 13, the external electrode terminal 31, the signal electrode terminal 33, or other portions where the primer layer 35 is not required to be formed. Thus, the primer layer 35 can be formed only at a necessary portion, and the adhesion strength between the ceramic substrate 5 or the like on which the semiconductor element 19 is mounted and the sealing material 37 can be improved. As a result, an operation at a higher temperature can be realized.
In addition, since the primer solution 34 flows into the housing 13, the nozzle 51 can remove the excessive primer solution 34. The drawn primer solution 34 can be reused by cleaning as necessary. When the primer solution 34 is sucked through the nozzle 51, the suction may be performed while moving the nozzle 51.
In a state where the nozzle 51 is disposed at a position (above) about 1 to 20mm, for example, from the surface of the conductor layer 11 near the center of the ceramic substrate 5 on which the components such as the semiconductor element 19 are not mounted, the primer solution 34 can be efficiently sucked by moving the nozzle 51 in one direction indicated by an arrow Y1, for example, as shown in fig. 10.
In addition, the primer solution 34 may be drawn while moving the nozzle 51 in a direction other than the one direction, and also in a direction intersecting the one direction. When the nozzle 51 moves, for example, if there is a possibility of interference with the semiconductor element 19 or the lead wires 25, 27, 29, etc., the nozzle 51 may be raised to suck the primer solution 34. Also, a plurality of nozzles 51 may be used to suck the primer solution 34. By using a plurality of nozzles, the primer solution 34 can be removed more efficiently.
As the cross-sectional shape of the nozzle 51, a nozzle having a cross-sectional shape corresponding to the shape of the semiconductor device 1 as a target, such as a circle, an ellipse, or a quadrangle, is preferably applied. Further, by making the tip shape of the nozzle 51 an acute angle, the primer solution 34 remaining in a narrower space in the housing 13 can be easily sucked. Moreover, by chamfering the tip portion of the nozzle 51, even if the nozzle 51 interferes with the semiconductor element 19 or the like, damage to the semiconductor element 19 or the like can be suppressed.
In addition to sucking the primer solution 34 through the nozzle 51, the primer solution 34 may be removed by, for example, being impregnated into a sponge or the like. Further, the primer solution 34 in the case 13 may be removed by tilting the case 13. When the housing 13 is tilted, a cover such as a jig may be attached as necessary. In addition, a flow path through which the primer solution flows may be provided. The method of tilting the housing 13 will be described later.
After the primer solution 34 in the housing 13 is sucked, vibration may be applied to the housing 13, or the housing 13 may be rotated. Even if the primer solution is concentrated on a certain portion in the case 13, the primer solution 34 can be dispersed by vibration or rotation of the case 13, and the thickness of the primer layer 35 can be made uniform.
In the completed semiconductor device 1, the primer layer 35 is formed so as to be interposed between the ceramic substrate 5 on which the semiconductor element 19 is mounted and the sealing material 37. The primer layer 35 is formed to be interposed between the wires 25, 27, 29 and the sealing material 37. The primer layer 35 is formed to cover the inner wall surface of the case 13 from the bottom of the case 13 to a position between the bottom of the case 13 and the upper end of the case 13.
Primer layer 35 can be detected by compositional analysis. The component analysis includes, for example, an EI (Electron Ionization) method, an FI (Field Ionization) method, an FTIR (Fourier-transformed Infrared Spectrometer) method, and the like.
The EI method is one of ionization methods used in gas chromatography mass spectrometry, and from this analysis, information about the structure of the primer layer 35 can be obtained. The FI method is one of ionization methods used in gas chromatography mass spectrometry, and from this analysis, information on the molecular weight of the primer layer 35 can be obtained.
The FTIR method irradiates a substance with infrared light and measures transmitted or reflected light, thereby obtaining information on the structure of the substance. In the process of forming the primer layer 35, dehydration condensation reaction of Si-OH groups is performed to form Si-O-Si groups. Thus, a peak of the infrared absorption spectrum based on the Si-O-Si group was observed in the infrared absorption spectrum.
In the semiconductor device 1 described above, a peak of an infrared absorption spectrum based on an Si — O — Si group is observed from the inside of the case 13. On the other hand, no peak of the infrared absorption spectrum based on the Si — O — Si group is observed from the outer wall surface of case 13, the upper end surface of case 13, and the portion of the inner wall surface located on the upper end side of case 13. Further, no peak of the infrared absorption spectrum based on the Si-O-Si group was observed from the back surface of the ceramic substrate 5, that is, the surface of the conductor layer 9.
In the semiconductor device 1 described above, the case where the substrate body 7 of the ceramic substrate 5 is formed of aluminum nitride (AlN) is described. The substrate main body 7 may be formed of alumina (Al2O3), for example, in addition to the above. The substrate main body 7 may be formed of silicon nitride (SiN). When the necessity of heat dissipation is low, a metal base substrate, a glass epoxy substrate, or the like may be used as the substrate body 7.
The case where the case 13 is formed of PPS is explained. The case 13 may be made of a Liquid Crystal Polymer (LCP) having higher heat resistance.
The case where the semiconductor element 19 includes an IGBT and a diode is described. As an arrangement method of the IGBT and the diode, for example, there is a 1in1 type in which the IGBT and the diode are arranged one by one in one semiconductor device (semiconductor module). For example, there is a 2in1 type in which two IGBTs and two diodes are arranged. For example, there is a 6in1 type in which six IGBTs and six diodes are arranged.
The case where the semiconductor element 19 is bonded to the conductor layer 11 with the solder 17a, 17b has been described. As a method for bonding the semiconductor element 19 and the conductor layer 11, for example, a conductive adhesive in which silver (Ag) filler is dispersed in epoxy resin may be used to bond the semiconductor element 19 and the conductor layer 11. For example, silver (Ag) nanopowder or copper (Cu) nanopowder obtained by sintering nanoparticles at a low temperature may be used to bond the semiconductor element 19 and the conductor layer 11.
The case where the wires 25, 27, 29 are made of aluminum has been explained. The wires 25, 27, and 29 may be copper wires. The wires 25, 27, and 29 may be copper wires coated with aluminum. The wires 25, 27, and 29 may be gold wires.
The case where the liquid sealant is cured by heating as the sealing material 37 has been described. The sealing material 37 may be a liquid sealing material that is cured at room temperature. Further, the cover may be attached to the housing 13 so as to cover the sealing material 37.
Embodiment mode 2
An example of the semiconductor device of embodiment 2 will be described. Here, a method for manufacturing a semiconductor device will be mainly described. Note that the same structures as those of the semiconductor device 1 described above are denoted by the same reference numerals, and a description thereof will not be repeated unless necessary.
After the same steps as those shown in fig. 3 to 5 described above, the primer solution 34 is poured into the case 13 as shown in fig. 11. At this time, the primer solution 34 is poured to a position higher than the top of the wires 25, 27, 29 by, for example, about 0.5 to 5 mm. Then, the excess primer solution 34 that flowed into the housing 13 is removed.
At this time, as shown in fig. 12, the case 13 is tilted so that the primer solution 34 in the case 13 is concentrated at one location. The nozzle 51 is disposed toward the concentrated primer solution 34, and attracts the primer solution 34. In addition, by moving the nozzle 51 in the region where the primer solution 34 is concentrated, the primer solution 34 can be more efficiently drawn in.
After that, through the same steps as those shown in fig. 8 and 9, as shown in fig. 13, a sealing material 37 is formed on the surface of the ceramic substrate 5 or the like on which the semiconductor element 19 is mounted, with an undercoat layer 35 interposed therebetween. Thus, the main part of the semiconductor device 1 is completed.
In the completed semiconductor device 1, similarly to the semiconductor device 1 shown in fig. 1 and 2 described above, the primer solution 34 flows into the case 13 to which the ceramic substrate 5 or the like on which the semiconductor element 19 is mounted is fixed, and the ceramic substrate 5 or the like is immersed in the primer solution 34. Therefore, the primer solution 34 can be prevented from adhering to the outer wall surface of the case 13, the external electrode terminal 31, the signal electrode terminal 33, or other portions where the primer layer 35 is not required to be formed.
In addition, since the primer solution 34 is caused to flow into the housing 13, an excess primer solution 34 can be removed by the nozzle 51. At this time, the primer solution 34 concentrated at one location in the housing 13 can be sucked by the nozzle 51 while the housing 13 is tilted, whereby the primer solution 34 can be sucked efficiently. As shown in fig. 14, the case 13 may be inclined so that the primer solution 34 is accumulated in as few portions as possible (see a dashed line frame DC) of the ceramic substrate 5 or the like disposed in the case 13.
In addition, as shown in fig. 15, when removing the droplets 34a of the primer solution 34 remaining in the case 13, the droplets 34a may be blown away by the air nozzle 52 in a state where the cover jig 53 is attached, and the cover jig 53 may cover the outer wall surface of the case 13, the external electrode terminals 31, the signal electrode terminals 33, and other portions to which the primer solution 34 is not intended to adhere.
Embodiment 3
Here, a modification of the semiconductor device including the cooling mechanism will be described. Note that the same structures as those of the semiconductor device 1 shown in fig. 1 and 2 are denoted by the same reference numerals, and a description thereof will not be repeated except where necessary.
(first example)
As shown in fig. 16, the semiconductor device 1 of the first example includes water-cooling fins 41 as a cooling means. The water-cooling fins 41 are provided with a plurality of flow paths 41a through which cooling water 42 flows. The ceramic substrate 5 on which the semiconductor element 19 is mounted is disposed on the water-cooling fin 41 via the insulating layer 3. The case 13 is fixed to the water-cooling fin 41 so as to surround the ceramic substrate 5.
The primer layer 35 is formed so as to be interposed between a part of the water-cooling fin 41 and the sealing material 37, in addition to the portions of the lead wires 25 and 27 and the ceramic substrate 5 on which the semiconductor element 19 is mounted and the sealing material 37.
In the semiconductor device including the water-cooling fins 41, after the ceramic substrate 5 on which the semiconductor element 19 is mounted and the case 13 are fixed to the water-cooling fins 41, the primer solution is poured into the case 13 and an excess primer solution is sucked in the same manner as in the method described in embodiment 1 or 2, whereby the primer layer 35 can be formed at a desired portion.
(second example)
In the first example, the semiconductor device 1 in which the primer layer 35 is interposed between the sealing material 37 and a part of the water cooling fins 41 serving as the cooling means has been described, but as shown in fig. 17, the semiconductor device 1 may be configured so that the primer layer is not formed on the cooling fins 43 (air cooling fins) themselves. The semiconductor device 1 of the second example has substantially the same configuration as the semiconductor device 1 shown in fig. 1 and 2, and is a semiconductor device 1 of a type in which, for example, cooling fins 43 are applied as the cooling mechanism 39.
(third example)
In each embodiment, the case where the semiconductor element 19 and the like are electrically connected by the wires 25, 27, and 29 is described. In a third example, a semiconductor device in which semiconductor elements and the like are electrically connected by a lead frame which is a conductive member will be described.
As shown in fig. 18, a power semiconductor element 21 and an IC element 24 are mounted on the conductor layer 16 as the semiconductor element 19. The conductor layer 16 is disposed on the cooling fins 43 with the insulating layer 4 interposed therebetween. The power semiconductor element 21 is joined to the conductor layer 16 by solder 18 a. The IC component 24 is joined to the conductor layer 16 by solder 18 b.
The lead frame 45 is electrically connected to the power semiconductor element 21 and the IC element 24. The power semiconductor element 21 and the lead frame 45 are joined by solder 17 a. The IC element 24 and the lead frame 45 are bonded by solder 17 b. The lead frame 45 is electrically connected to the main terminal 32, for example. The IC element 24 is electrically connected to the signal electrode terminal 33 via a wire 27.
The power semiconductor element 21, the IC element 24, and the like mounted on the conductor layer 16 are housed in the case 13 and sealed with a sealing material 37. The housing 13 is fixed to the cooling fins 43. The primer layer 35 is interposed between the inner wall surface of the case 13, each of the power semiconductor element 21, the IC element 24, the lead 27, and the lead frame 45, and the sealing material 37.
In the semiconductor device 1 including the lead frame 45, after the conductor layer 16 on which the semiconductor element 19 is mounted and the case 13 are fixed to the cooling fins 43, the primer layer 35 can be formed at a desired portion by flowing the primer solution into the case 13 and sucking the excess primer solution in the same manner as the method described in embodiment 1 or 2.
Embodiment 4
An example of the semiconductor device of embodiment 4 will be described. Here, a structure of a semiconductor device and a method for manufacturing the same will be described. Note that the same structures as those of the semiconductor device 1 shown in fig. 1 and 2 are denoted by the same reference numerals, and a description thereof will not be repeated except where necessary.
As shown in fig. 19, the semiconductor device 1 has a structure in which the upper surface of the ceramic substrate 5, which is the bottom surface in the case 13, is inclined. Specifically, the ceramic substrate 5 is provided with an inclination such that the position (height) of the upper surface of the ceramic substrate 5 becomes lower toward one of the four corners (see fig. 1) in the case 13. The inclination angle is, for example, about 1 to 15 degrees. Here, the upper surface of the ceramic substrate 5 is inclined by changing the thickness of the substrate main body 7 in the ceramic substrate 5. As described above, the semiconductor device 1 is mounted on the cooling mechanism 39 (see fig. 2).
Next, an example of the method for manufacturing the semiconductor device 1 will be described. First, the ceramic substrate 5 is prepared. In this case, the substrate main body 7 has a thickness corresponding to the inclination of the upper surface of the ceramic substrate 5 (see fig. 19). After the same steps as those shown in fig. 3 to 5 are performed, the primer solution 34 is poured into the case 13 as shown in fig. 20. At this time, the primer solution 34 is poured to a position higher than the top of the wires 25, 27, 29 by, for example, about 0.5 to 5 mm.
Then, the excess primer solution 34 that flowed into the housing 13 is removed. At this time, as shown in fig. 21, the nozzle 51 is disposed at a corner where the position of the upper surface of the ceramic substrate 5 (the bottom surface in the case 13) in the case 13 is the lowest position. Then, the primer solution 34 is sucked from the nozzle 51. The liquid level of the primer solution 34 gradually drops, and the primer solution 34 that eventually remains is attracted to the lowest portion (corner) of the upper surface of the ceramic substrate 5 in the case 13, thereby attracting the excess primer solution 34. Thereafter, the same steps as those shown in fig. 8 and 9 are performed, and as shown in fig. 22, the main part of the semiconductor device 1 is completed.
In the completed semiconductor device 1, similarly to the semiconductor device 1 shown in fig. 1 and 2, the primer solution 34 flows into the case 13 to which the ceramic substrate 5 or the like on which the semiconductor element 19 is mounted is fixed, and the ceramic substrate 5 or the like is immersed in the primer solution 34. Therefore, the primer solution 34 can be prevented from adhering to the outer wall surface of the case 13, the external electrode terminal 31, the signal electrode terminal 33, or other portions where the primer layer 35 is not required to be formed.
In the semiconductor device 1 described above, the ceramic substrate 5 is provided with an inclination such that the height of the ceramic substrate 5 decreases toward one of the four corners (see fig. 1) in the case 13. Thus, in manufacturing the semiconductor device 1, the excessive primer solution 34 can be efficiently sucked in by sucking the primer solution 34 that will eventually remain at the lowest position (corner) of the upper surface of the ceramic substrate 5 in the case 13 (the bottom surface in the case 13) without tilting the case 13.
In order to more efficiently suck the excess primer solution 34 from the nozzle 51, it is preferable to incline the ceramic substrate 5 so that the angle at the position where the semiconductor element 19 or the like mounted on the ceramic substrate 5 is as small as possible is reduced.
As described above, when removing the droplets 34a of the primer solution 34 remaining in the case 13, the droplets 34a may be blown off by the air nozzle 52 in a state where the cover jig 53 (see fig. 15) is attached, and the cover jig 53 may cover the outer wall surface of the case 13, the external electrode terminal 31, the signal electrode terminal 33, and other portions to which the primer solution 34 is not intended to adhere.
Embodiment 5
Here, a power conversion device to which the semiconductor device described in embodiments 1 to 4 is applied will be described. The present disclosure is not limited to a specific power conversion device, but a case where the present disclosure is applied to a three-phase inverter will be described below as embodiment 4.
Fig. 23 is a block diagram showing a configuration of a power conversion system to which the power conversion device of the present embodiment is applied. The power conversion system shown in fig. 23 includes a power supply 100, a power conversion device 200, and a load 300. The power supply 100 is a dc power supply and supplies dc power to the power conversion device 200. The power supply 100 can be configured by various components, for example, a dc system, a solar cell, and a battery. Further, the rectifier circuit or the AC/DC converter may be connected to the AC system. The power supply 100 may be configured by a DC/DC converter that converts DC power output from the DC system into predetermined power.
The power conversion device 200 is a three-phase inverter connected between the power source 100 and the load 300, and converts dc power supplied from the power source 100 into ac power and supplies the ac power to the load 300. As shown in fig. 23, the power conversion device 200 includes: a main converter circuit 201 that converts dc power into ac power and outputs the ac power; and a control circuit 203 that outputs a control signal that controls the main conversion circuit 201 to the main conversion circuit 201.
The load 300 is a three-phase motor driven by ac power supplied from the power conversion device 200. The load 300 is not limited to a specific application, and is used as a motor mounted on various electric devices, for example, a motor for a hybrid car, an electric car, a railway vehicle, an elevator, or an air conditioner.
Hereinafter, the power converter 200 will be described in detail. The main converter circuit 201 includes a switching element and a flywheel diode (not shown). The switching elements perform a switching operation, thereby converting dc power supplied from the power supply 100 into ac power and supplying the ac power to the load 300. The main converter circuit 201 has various specific circuit configurations, and the main converter circuit 201 of the present embodiment is a two-level three-phase full bridge circuit and can be configured with 6 switching elements and 6 freewheeling diodes connected in anti-parallel to the respective switching elements.
At least one of the switching elements and the free wheel diodes of the main conversion circuit 201 is a switching element or a free wheel diode included in the semiconductor device 202 corresponding to the semiconductor device 1 of at least one of embodiments 1 to 4. The 6 switching elements constitute upper and lower arms connected in series for every two switching elements, and each upper and lower arm constitutes each phase (U-phase, V-phase, W-phase) of the full bridge circuit. Further, 3 output terminals of the main converter circuit 201, which are output terminals of the upper and lower arms, are connected to the load 300.
Further, the main converter circuit 201 includes a drive circuit (not shown) for driving each switching element, but the drive circuit may be incorporated in the semiconductor device 202, or a drive circuit may be provided separately from the semiconductor device 202. The drive circuit generates a drive signal for driving the switching element of the main conversion circuit 201, and supplies the drive signal to the control electrode of the switching element of the main conversion circuit 201. Specifically, in accordance with a control signal from the control circuit 203 described later, a drive signal for turning the switching element on and a drive signal for turning the switching element off are output to the control electrode of each switching element. When the switching element is maintained in the on state, the drive signal is a voltage signal (on signal) equal to or higher than the threshold voltage of the switching element, and when the switching element is maintained in the off state, the drive signal is a voltage signal (off signal) equal to or lower than the threshold voltage of the switching element.
The control circuit 203 controls the switching elements of the main conversion circuit 201 so as to supply desired power to the load 300. Specifically, the time (on time) for which each switching element of the main converter circuit 201 should be turned on is calculated based on the power to be supplied to the load 300. For example, the main converter circuit 201 can be controlled by PWM control for modulating the on time of the switching element in accordance with the voltage to be output. Then, a control command (control signal) is output to the drive circuit provided in the main converter circuit 201 so that an on signal is output to the switching element to be turned on and an off signal is output to the switching element to be turned off at each time point. The drive circuit outputs an on signal or an off signal as a drive signal to the control electrode of each switching element in accordance with the control signal.
In the power converter of the present embodiment, since the semiconductor devices of embodiments 1 to 3 are applied as the semiconductor device 202 constituting the main converter circuit 201, the primer layer 35 can be formed only at a necessary portion, and the adhesion strength between the semiconductor element 19 and the like and the sealing material 37 can be improved by the primer layer 35. As a result, the power conversion device can be operated at a higher temperature.
In the present embodiment, an example in which the present disclosure is applied to a two-level three-phase inverter is described, but the present disclosure is not limited thereto, and can be applied to various power conversion devices. In the present embodiment, a two-level power conversion device is used, but a three-level or multi-level power conversion device may be used, and the present disclosure may be applied to a single-phase inverter when power is supplied to a single-phase load. In addition, the present disclosure can also be applied to a DC/DC converter or an AC/DC converter when power is supplied to a DC load or the like.
The power converter to which the present disclosure is applied is not limited to the case where the load is a motor, and may be used as a power supply device for an electric discharge machine, a laser machine, an induction heating cooker, or a non-contact power supply system, and may also be used as a power conditioner for a solar power generation system, a power storage system, or the like.
In the semiconductor device and the like described in each embodiment, a description has been given of a case where the adhesive strength between the ceramic substrate 5 and the sealing material 37 is improved by interposing the primer layer 35 formed of an aqueous solution of a silane coupling agent between the ceramic substrate 5 and the sealing material 37 on which the semiconductor element 19 is mounted. The member for improving the adhesion strength between the sealing material 37 and the ceramic substrate 5 or the like is not limited to the primer layer 35 formed of an aqueous solution of a silane coupling agent as long as the member can improve the adhesion strength between the inorganic material of the ceramic substrate 5 and the organic material of the sealing material 37.
The semiconductor devices and the like described in the embodiments can be combined in various ways as necessary.
The embodiments disclosed herein are illustrative, and are not limited thereto. The present disclosure is defined not by the above description but by the claims, and is intended to include all modifications within the meaning and range equivalent to the claims.
Industrial applicability
The present disclosure is effectively applied to a semiconductor device in which an insulating substrate or the like on which a semiconductor element is mounted is accommodated in a case and sealed with a sealing material.
Description of the reference numerals
1a semiconductor device; 3. 4 an insulating layer; 5 a ceramic substrate; 7a substrate main body; 9. 11, 12 conductor layers; 13 a housing; 15 a binder; 16 a conductor layer; 17a, 17b, 18a, 18b solder; 19 a semiconductor element; 21 a power semiconductor element; 23 a surface electrode; 24IC components; 26 a signal electrode; 25. 27, 29 wires; 31 an external electrode terminal; 31a source electrode terminal; 31b a drain electrode; 32 a main terminal; 33 signal electrode terminals; 34a primer solution; 34a liquid droplet; 35 a primer layer; 37 sealing material; 39 a cooling mechanism; 41 water-cooling fins; 41a flow path; 42 cooling water; 43 cooling fins; 45 lead frames; 51 an intake nozzle; 52 an air nozzle; 53 cover clamps; 100 power supply; 200 power conversion devices; 201 a main conversion circuit; 202 a semiconductor module; 203 a control circuit; 300 load; y1 arrows; the DC dashed box.

Claims (22)

1. A method for manufacturing a semiconductor device in which a semiconductor element is sealed with a sealing material, comprising:
a step of forming a member to be sealed including the semiconductor element to be sealed by the sealing material;
a step of accommodating the member to be sealed in a case;
a step of flowing a solution of a silane coupling agent into the case;
Removing the solution in the housing;
a step of applying a treatment to the solution adhering to the member to be sealed in the step of flowing the solution into the case, thereby forming a primer layer on the surface of the member to be sealed; and
a step of sealing the member to be sealed on which the primer layer is formed by filling the case with a sealing material,
the step of forming the primer layer includes a step of forming the primer layer on the surface of the semiconductor element.
2. The method for manufacturing a semiconductor device according to claim 1,
as a solvent of the solution of the silane coupling agent, any of water and ethanol is used.
3. The method for manufacturing a semiconductor device according to claim 1 or 2,
the concentration of the silane coupling agent in the solution is 1-10%.
4. The method for manufacturing a semiconductor device according to any one of claims 1 to 3,
the step of forming the member to be sealed includes a step of mounting the semiconductor element on an insulating substrate,
the step of forming the primer layer includes a step of forming the primer layer on a surface of the insulating substrate on which the semiconductor element is mounted.
5. The method for manufacturing a semiconductor device according to any one of claims 1 to 4,
the step of forming the member to be sealed includes a step of forming a conductive member for electrically connecting the semiconductor element to the outside,
the step of forming the primer layer includes a step of forming the primer layer on the surface of the conductive member.
6. The method for manufacturing a semiconductor device according to any one of claims 1 to 5,
the step of removing the solution includes a step of sucking the solution through a nozzle.
7. The method for manufacturing a semiconductor device according to claim 6,
the step of removing the solution includes a step of sucking the solution in the housing through the nozzle while collecting the solution at one location by tilting the housing.
8. The method for manufacturing a semiconductor device according to claim 6 or 7,
the step of removing the solution includes a step of sucking the solution while moving the nozzle.
9. The method for manufacturing a semiconductor device according to claim 6,
the step of removing the solution includes a step of sucking the solution, which is finally left, through the nozzle at a position where a bottom surface of the housing is the lowest by providing an inclination to the bottom surface of the housing.
10. The method for manufacturing a semiconductor device according to any one of claims 1 to 9,
the method comprises the following steps between the step of removing the solution and the step of forming the primer layer:
covering a portion including an outer wall surface of the case other than the member to be sealed with a cover member; and
and blowing off the solution remaining in the case by air in a state where the cover member is disposed.
11. The method for manufacturing a semiconductor device according to any one of claims 1 to 10,
between the step of removing the solution and the step of forming the primer layer,
the method includes a step of applying at least one of vibration and rotation to the housing.
12. A semiconductor device in which a semiconductor element is sealed with a sealing material, comprising:
a sealed member sealed with the sealing material, the sealed member including an insulating substrate on which the semiconductor element is mounted;
a housing that houses the sealed member;
a primer layer formed on a surface of the member to be sealed; and
the sealing material which is filled in the case and seals the member to be sealed on which the primer layer is formed,
The primer layer is formed between the sealing material and an inner wall surface of the housing including the member to be sealed.
13. The semiconductor device according to claim 12,
the primer layer includes a portion of the primer layer interposed between the insulating substrate on which the semiconductor element is mounted and the sealing material.
14. The semiconductor device according to claim 12 or 13,
the member to be sealed includes a conductive member electrically connecting the semiconductor element with the outside,
the primer layer includes a portion of the primer layer interposed between the conductive member and the sealing material.
15. The semiconductor device according to claim 14,
the conductive member includes at least any one of a lead wire and a lead frame.
16. The semiconductor device according to any one of claims 12 to 15,
the thickness of the primer layer is 30 nm-500 nm.
17. The semiconductor device according to any one of claims 12 to 16,
the primer layer is located on the inner wall surface of the housing,
the primer layer is formed from the bottom surface in the case to a position higher by 0.5 to 5mm than the top of the member to be sealed.
18. The semiconductor device according to any one of claims 12 to 17,
the insulating substrate of the sealed member housed in the case is provided with an inclination.
19. The semiconductor device according to any one of claims 12 to 18,
the sealing device is provided with a cooling mechanism assembled with the housing accommodating the sealed component.
20. The semiconductor device according to claim 19,
the cooling mechanism includes cooling fins.
21. The semiconductor device according to any one of claims 12 to 20,
the portion of the primer layer formed on the inner wall surface of the housing is located at a position lower than an upper end of the housing.
22. A power conversion device is provided with:
a main converter circuit having the semiconductor device according to any one of claims 12 to 21, converting an input power and outputting the converted power; and
a control circuit that outputs a control signal that controls the main conversion circuit to the main conversion circuit.
CN202080083528.3A 2019-12-11 2020-12-01 Method for manufacturing semiconductor device, and power conversion device Pending CN114762093A (en)

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JP2003181853A (en) 2001-12-18 2003-07-02 Mitsubishi Electric Corp Resin sealing device for optical module, resin sealing method for optical module, and optical module
JP5548467B2 (en) 2010-01-29 2014-07-16 本田技研工業株式会社 Electronic device and method of manufacturing electronic device
JP5808599B2 (en) 2011-07-28 2015-11-10 株式会社ダイセル Primer composition and optical semiconductor device using the primer composition
EP2960936A4 (en) 2013-02-22 2016-10-19 Hitachi Ltd Resin-sealed electronic control device
JP2017057339A (en) 2015-09-18 2017-03-23 日立化成株式会社 Translucent gas barrier composition and sulfidation prevention layer, and optical semiconductor device provided with the same and method for manufacturing optical semiconductor device
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US11107756B2 (en) 2017-04-06 2021-08-31 Mitsubishi Electric Corporation Semiconductor device and method for manufacturing the same, and power conversion device
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