CN114759918A - Frequency discrimination error correction method, system and device and all-digital phase-locked loop - Google Patents
Frequency discrimination error correction method, system and device and all-digital phase-locked loop Download PDFInfo
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- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
- H03L7/0991—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider
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Abstract
The invention discloses a frequency discrimination error correction method, a system, a device and an all-digital phase-locked loop, wherein the method comprises the following steps: adjusting the actual output frequency output by the numerically controlled oscillator according to the value of the frequency coarse adjustment control word so that the quantized value of the actual frequency difference between the actual output frequency and the target output frequency is smaller than a preset integer value; detecting the frequency difference between the actual output frequency and the target output frequency to obtain a detected frequency difference, and quantizing the detected frequency difference to obtain a quantized value of the detected frequency difference; and comparing the quantized value of the detected frequency difference with a set threshold value, and correcting the quantized value of the detected frequency difference according to a comparison result. The invention corrects the detection frequency difference exceeding the threshold value by setting the threshold value, improves the accuracy of the frequency difference used as feedback in the all-digital phase-locked loop system and effectively reduces the frequency searching times. The invention can be widely applied to the all-digital phase-locked loop system.
Description
Technical Field
The present invention relates to an all-digital phase-locked loop system, and more particularly, to a frequency discrimination error correction method, system, apparatus and all-digital phase-locked loop.
Background
The phase-locked loop is mainly divided into an analog charge pump phase-locked loop and an all-digital phase-locked loop. The adpll has been gradually and increasingly applied to a frequency synthesizer in the rf field due to its high integration level, flexible configurability, fast process portability and phase noise characteristics comparable to those of the adpll.
The all-digital phase-locked loop system adopts a frequency discrimination and phase discrimination mechanism different from that of an analog phase-locked loop system, the signal processing needs to be carried out in a uniform discrete time domain, a metastable state phenomenon can cause sampling errors of signals required by frequency discrimination, a frequency difference result with a large error is obtained, the feedback precision of the all-digital phase-locked loop system is influenced, and the locking time is increased in the locking process.
At present, the problem is mainly solved in three directions, firstly, an additional circuit is adopted to reduce the probability of the occurrence of the metastable state phenomenon, and the complexity and the area of the circuit implementation are increased; secondly, the bandwidth of a filter in the loop system is reduced, namely the feedback effect in the loop is reduced, which undoubtedly greatly increases the locking time; thirdly, the frequency discrimination result is subjected to multi-period averaging to reduce errors, but the multi-period averaging also enables the locking time to be multiplied.
Thus, the prior art has yet to be improved and modified.
Disclosure of Invention
To solve at least one of the technical problems in the prior art to a certain extent, an object of the present invention is to provide a method, a system, a device and an all-digital phase-locked loop for frequency discrimination error correction.
The technical scheme adopted by the invention is as follows:
a frequency discrimination error correction method includes the following steps:
adjusting the actual output frequency output by the numerically controlled oscillator according to the value of the frequency coarse adjustment control word so that the quantized value of the actual frequency difference between the actual output frequency and the target output frequency is smaller than a preset integer value;
detecting the frequency difference between the actual output frequency and the target output frequency to obtain a detected frequency difference, and quantizing the detected frequency difference to obtain a quantized value of the detected frequency difference;
and comparing the quantized value of the detected frequency difference with a set threshold value, and correcting the quantized value of the detected frequency difference according to a comparison result.
Further, the adjusting the actual output frequency of the digitally controlled oscillator according to the value of the coarse frequency adjustment control word includes:
acquiring a value of a frequency coarse tuning control word corresponding to the target output frequency of the numerical control oscillator according to a rule of correspondence between the value of the frequency coarse tuning control word and the actual output frequency of the numerical control oscillator;
and regulating and controlling the output frequency of the numerical control oscillator according to the obtained value of the frequency coarse tuning control word to be used as the actual output frequency.
Further, the detecting a frequency difference between the actual output frequency and the target output frequency to obtain a detected frequency difference, and quantizing the detected frequency difference to obtain a quantized value of the detected frequency difference includes:
sampling synchronization is carried out on a reference signal by adopting the rising edge of a clock signal of a numerically controlled oscillator, and a synchronous signal after sampling synchronization is obtained;
sampling the time digital signal of the time digital converter by adopting the rising edge of the synchronous signal to obtain the quantized data of the sampled time digital signal;
and acquiring a quantized value of the detected frequency difference according to the target output frequency of the numerically controlled oscillator, the frequency of the reference signal and the quantized data of the sampled time digital signal.
Further, the comparing the quantized value of the detected frequency difference with a set threshold and correcting the quantized value of the detected frequency difference according to the comparison result includes:
when the quantized value of the detection frequency difference is a positive number and is greater than the set threshold value, subtracting one from the quantized value of the detection frequency difference;
and when the quantized value of the detected frequency difference is a negative number and the absolute value of the quantized value is smaller than the set threshold value, adding one to the quantized value of the detected frequency difference.
The other technical scheme adopted by the invention is as follows:
a frequency discrimination error correction system comprising:
the frequency output module is used for adjusting the actual output frequency output by the numerically controlled oscillator according to the value of the frequency coarse tuning control word so as to enable the quantized value of the actual frequency difference between the actual output frequency and the target output frequency to be smaller than a preset integer value;
the frequency difference detection module is used for detecting the frequency difference between the actual output frequency and the target output frequency to obtain a detection frequency difference, and quantizing the detection frequency difference to obtain a quantized value of the detection frequency difference;
and the frequency difference correction module is used for comparing the quantized value of the detected frequency difference with a set threshold value and correcting the quantized value of the detected frequency difference according to a comparison result.
Further, the adjusting the actual output frequency of the digitally controlled oscillator according to the value of the coarse frequency adjustment control word includes:
acquiring a value of a frequency coarse tuning control word corresponding to the target output frequency of the numerical control oscillator according to a rule of correspondence between the value of the frequency coarse tuning control word and the actual output frequency of the numerical control oscillator;
and regulating and controlling the output frequency of the numerical control oscillator according to the obtained value of the frequency coarse tuning control word to be used as the actual output frequency.
Further, the detecting a frequency difference between the actual output frequency and the target output frequency to obtain a detected frequency difference, and quantizing the detected frequency difference to obtain a quantized value of the detected frequency difference includes:
sampling synchronization is carried out on a reference signal by adopting the rising edge of a clock signal of a numerically controlled oscillator, and a synchronous signal after sampling synchronization is obtained;
sampling the time digital signal of the time digital converter by adopting the rising edge of the synchronous signal to obtain the quantized data of the sampled time digital signal;
and acquiring a quantized value of the detected frequency difference according to the target output frequency of the numerically controlled oscillator, the frequency of the reference signal and the quantized data of the sampled time digital signal.
Further, the comparing the quantized value of the detected frequency difference with a set threshold and correcting the quantized value of the detected frequency difference according to the comparison result includes:
when the quantized value of the detection frequency difference is a positive number and is greater than the set threshold value, the quantized value of the detection frequency difference is reduced by one;
and when the quantized value of the detected frequency difference is a negative number and the absolute value of the quantized value is smaller than the set threshold value, adding one to the quantized value of the detected frequency difference.
The other technical scheme adopted by the invention is as follows:
a frequency discrimination error correction apparatus comprising:
at least one processor;
at least one memory for storing at least one program;
when executed by the at least one processor, cause the at least one processor to implement the method described above.
The other technical scheme adopted by the invention is as follows:
an all-digital phase-locked loop comprises a frequency discrimination module, wherein the frequency discrimination module adopts the frequency discrimination error correction method to correct frequency errors.
The invention has the beneficial effects that: the invention corrects the detected frequency difference exceeding the threshold value by setting the threshold value, improves the accuracy of the frequency difference serving as feedback in the all-digital phase-locked loop system, and effectively reduces the frequency searching times; on the premise of not increasing the circuit complexity, the feedback precision of the all-digital phase-locked loop system is improved, the locking time of the all-digital phase-locked loop is reduced, and quick locking is realized.
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In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following description is made on the drawings of the embodiments of the present invention or the related technical solutions in the prior art, and it should be understood that the drawings in the following description are only for convenience and clarity of describing some embodiments in the technical solutions of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained according to these drawings without creative efforts.
FIG. 1 is a flow chart illustrating a method for frequency discrimination error correction according to an embodiment of the present invention;
FIG. 2 is a timing diagram of sampling synchronization for a reference signal in an embodiment of the present invention;
FIG. 3 is a timing diagram illustrating the occurrence of meta-stability during sample synchronization according to an embodiment of the present invention.
Detailed Description
Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the accompanying drawings are illustrative only for the purpose of explaining the present invention, and are not to be construed as limiting the present invention. For the step numbers in the following embodiments, they are set for convenience of illustration only, the order between the steps is not limited at all, and the execution order of each step in the embodiments can be adapted according to the understanding of those skilled in the art.
In the description of the present invention, it should be understood that the orientation or positional relationship referred to in the description of the orientation, such as the upper, lower, front, rear, left, right, etc., is based on the orientation or positional relationship shown in the drawings, and is only for convenience of description and simplification of description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus, should not be construed as limiting the present invention.
In the description of the present invention, the meaning of a plurality of means is one or more, the meaning of a plurality of means is two or more, and larger, smaller, larger, etc. are understood as excluding the number, and larger, smaller, inner, etc. are understood as including the number. If there is a description of first and second for the purpose of distinguishing technical features only, this is not to be understood as indicating or implying a relative importance or implicitly indicating the number of technical features indicated or implicitly indicating the precedence of technical features indicated.
In the description of the present invention, unless otherwise specifically limited, terms such as set, installation, connection and the like should be understood in a broad sense, and those skilled in the art can reasonably determine the specific meanings of the above terms in the present invention by combining the specific contents of the technical solutions.
As shown in fig. 1, the present embodiment provides a frequency discrimination error correction method, including the following steps:
and S1, adjusting the output actual output frequency of the numerical control oscillator according to the value of the frequency coarse adjustment control word, so that the quantized value of the actual frequency difference between the actual output frequency and the target output frequency is smaller than a preset integer value.
Wherein the step S1 specifically includes steps S11-S12:
s11, obtaining the value of the frequency coarse tuning control word corresponding to the target output frequency of the numerical control oscillator according to the corresponding rule of the value of the frequency coarse tuning control word and the actual output frequency of the numerical control oscillator;
and S12, regulating and controlling the output frequency of the numerical control oscillator according to the obtained value of the frequency coarse adjustment control word to be used as the actual output frequency.
In some alternative embodiments, the preset integer value is 1, i.e. the actual output frequency and the target output frequency are very close, and the quantized value of the frequency difference is less than 1.
And S2, detecting the frequency difference between the actual output frequency and the target output frequency to obtain a detected frequency difference, and quantizing the detected frequency difference to obtain a quantized value of the detected frequency difference.
Wherein, the step S2 includes steps S21-S23:
s21, sampling and synchronizing the reference signal by adopting the rising edge of the clock signal of the numerical control oscillator to obtain a synchronous signal after sampling and synchronizing;
s22, sampling the time digital signal of the time digital converter by adopting the rising edge of the synchronous signal to obtain the quantized data of the sampled time digital signal;
and S23, acquiring a quantized value of the detected frequency difference according to the target output frequency of the numerically controlled oscillator, the frequency of the reference signal and the quantized data of the sampled time digital signal.
In some embodiments, sampling synchronization is performed on a reference signal by using a rising edge of a clock signal of a digitally controlled oscillator to obtain a synchronization signal after sampling synchronization, and a specific timing relationship is as shown in fig. 2, where the reference signal is sampled at each rising edge of the clock signal, at a time T1, the rising edge of the clock signal is a high level when the reference signal is sampled, and the synchronization signal outputs a high level at a time T1, so as to complete sampling synchronization of the reference signal.
In fact, the clock signal and the reference signal are asynchronous with each other, and when the time when the reference signal changes is not near the rising edge of the clock signal, the synchronous signal can complete correct change at the time when the next rising edge of the clock signal after the change of the reference signal occurs; when the time when the reference signal changes is near the rising edge of the clock signal, the rising edge of the clock signal adopts that the reference signal is an uncertain signal, and a synchronization signal may output a level signal the same as the reference signal at the time of the rising edge of the clock signal or a level signal opposite to the reference signal at the time of the rising edge of the clock signal, so that an error may occur in the sampling synchronization process.
In a specific example, as shown in fig. 3, the time when the reference signal changes is around time T1, the rising edge of the clock signal is at time T1, the time when the reference signal changes is a high-level signal at time T1, since the time when the reference signal changes is too close to the rising edge of the clock signal, the rising edge of the clock signal assumes that the reference signal is an indeterminate signal, synchronization signal 1 outputs a high-level signal at time T1, synchronization signal 2 outputs a low-level signal at time T1, and the high-level signal is output at time T2, which is later than synchronization signal 1 by one clock signal period, and this sampling synchronization error causes an integer error to be introduced into the quantized data of the time-to-digital signal, and further causes an integer error to be introduced into the quantized value of the frequency difference of the detection result.
In fact, in this embodiment, the quantized value of the actual frequency difference is smaller than an integer, and when the quantized value of the frequency difference of the detection result introduces an integer error, the quantized value of the frequency difference of the detection result may be larger than an integer.
In general, due to the presence of the meta-stability phenomenon, there is an error of ± 1 (the value is determined according to a specific system) with respect to the difference between the detected actual output frequency and the target output frequency.
And S3, comparing the quantized value of the detected frequency difference with a set threshold value, and correcting the quantized value of the detected frequency difference according to the comparison result.
Wherein, the step S3 includes steps S31-S32:
s31, when the quantized value of the detected frequency difference is positive and greater than the set threshold, subtracting one from the quantized value of the detected frequency difference;
and S32, when the quantized value of the detected frequency difference is negative and the absolute value of the quantized value is less than the set threshold value, adding one to the quantized value of the detected frequency difference.
Specifically, in this embodiment, the threshold is set to be a quantized integer one, and when the quantized value of the frequency difference of the detection result is greater than one, the quantized value of the frequency difference of the detection result is decreased by one; and when the quantized value of the frequency difference of the detection result is less than negative, adding one to the quantized value of the frequency difference of the detection result.
In some embodiments, a range is set based on the set threshold, such as-1 to +1, and if the desired difference is 0.24 and the detected difference is 1.24 due to the presence of the error, then 1 is subtracted from it to correct the error.
As can be seen from the above, the embodiment of the present invention uses the frequency preset word technique to make the quantization value of the actual frequency difference smaller than an integer. By setting a threshold value, the detection frequency difference exceeding the threshold value is corrected, the accuracy of the frequency difference serving as feedback in the all-digital phase-locked loop system is improved, the frequency search times are effectively reduced, the locking time of the all-digital phase-locked loop is reduced on the premise of not increasing the circuit complexity, and the rapid locking is realized.
In summary, compared with the prior art, the present embodiment has the following advantages and beneficial effects:
(1) and an additional circuit for avoiding the metastable state is not required, so that the complexity of circuit implementation can be reduced, and the circuit area can be reduced.
(2) The bandwidth of the filter in the loop system does not need to be reduced, and the locking time can be greatly reduced.
(3) The frequency discrimination result does not need to be averaged in multiple cycles, and the locking time can be shortened in multiples.
(4) And the quantized value of the actual frequency difference is smaller than an integer by using a frequency preset word technology. By setting a threshold value, the detection frequency difference exceeding the threshold value is corrected, the accuracy of the frequency difference serving as feedback in the all-digital phase-locked loop system is improved, the frequency search times are effectively reduced, the locking time of the all-digital phase-locked loop is reduced on the premise of not increasing the circuit complexity, and the rapid locking is realized. The invention can be applied to the all-digital phase-locked loop system and is simultaneously suitable for a tracking stage and a post-locking stage.
The present embodiment further provides a frequency discrimination error correction system, including:
the frequency output module is used for adjusting the actual output frequency output by the numerically controlled oscillator according to the value of the frequency coarse tuning control word so as to enable the quantized value of the actual frequency difference between the actual output frequency and the target output frequency to be smaller than a preset integer value;
the frequency difference detection module is used for detecting the frequency difference between the actual output frequency and the target output frequency to obtain a detection frequency difference, and quantizing the detection frequency difference to obtain a quantized value of the detection frequency difference;
and the frequency difference correction module is used for comparing the quantized value of the detected frequency difference with a set threshold value and correcting the quantized value of the detected frequency difference according to a comparison result.
As a further optional implementation, the adjusting the actual output frequency of the output of the digitally controlled oscillator according to the value of the coarse frequency adjustment control word includes:
acquiring a value of a frequency coarse tuning control word corresponding to the target output frequency of the numerical control oscillator according to a rule of correspondence between the value of the frequency coarse tuning control word and the actual output frequency of the numerical control oscillator;
and regulating and controlling the output frequency of the numerical control oscillator according to the obtained value of the frequency coarse tuning control word to be used as the actual output frequency.
As a further optional implementation manner, the detecting a frequency difference between the actual output frequency and the target output frequency to obtain a detected frequency difference, and quantizing the detected frequency difference to obtain a quantized value of the detected frequency difference includes:
sampling synchronization is carried out on a reference signal by adopting the rising edge of a clock signal of a numerically controlled oscillator, and a synchronous signal after sampling synchronization is obtained;
sampling the time digital signal of the time digital converter by adopting the rising edge of the synchronous signal to obtain the quantized data of the sampled time digital signal;
and acquiring a quantized value of the detected frequency difference according to the target output frequency of the numerically controlled oscillator, the frequency of the reference signal and the quantized data of the sampled time digital signal.
As a further optional implementation manner, the comparing the quantized value of the detected frequency difference with a set threshold, and correcting the quantized value of the detected frequency difference according to a comparison result includes:
when the quantized value of the detection frequency difference is a positive number and is greater than the set threshold value, the quantized value of the detection frequency difference is reduced by one;
and when the quantized value of the detected frequency difference is a negative number and the absolute value of the quantized value is smaller than the set threshold, adding one to the quantized value of the detected frequency difference.
The frequency discrimination error correction system of the embodiment can execute the frequency discrimination error correction method provided by the method embodiment of the invention, can execute any combination of the implementation steps of the method embodiment, and has corresponding functions and beneficial effects of the method.
The present embodiment further provides a frequency discrimination error correction apparatus, including:
at least one processor;
at least one memory for storing at least one program;
when executed by the at least one processor, cause the at least one processor to implement the method of fig. 1.
The frequency discrimination error correction device of the embodiment can execute the frequency discrimination error correction method provided by the method embodiment of the invention, can execute any combination of the implementation steps of the method embodiment, and has corresponding functions and beneficial effects of the method.
The embodiment further provides an adpll comprising a frequency discrimination module, wherein the frequency discrimination module corrects a frequency error by using a frequency discrimination error correction method as shown in fig. 1.
The all-digital phase-locked loop of the embodiment can execute the frequency discrimination error correction method provided by the method embodiment of the invention, can execute any combination implementation steps of the method embodiment, and has corresponding functions and beneficial effects of the method.
In alternative embodiments, the functions/acts noted in the block diagrams may occur out of the order noted in the operational illustrations. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality/acts involved. Furthermore, the embodiments presented and described in the flow charts of the present invention are provided by way of example in order to provide a more comprehensive understanding of the technology. The disclosed methods are not limited to the operations and logic flows presented herein. Alternative embodiments are contemplated in which the order of various operations is changed and in which sub-operations described as part of larger operations are performed independently.
Furthermore, although the present invention is described in the context of functional modules, it should be understood that, unless otherwise indicated to the contrary, one or more of the described functions and/or features may be integrated in a single physical device and/or software module, or one or more functions and/or features may be implemented in separate physical devices or software modules. It will also be appreciated that a detailed discussion of the actual implementation of each module is not necessary for an understanding of the present invention. Rather, the actual implementation of the various functional modules in the apparatus disclosed herein will be understood within the ordinary skill of an engineer, given the nature, function, and internal relationship of the modules. Accordingly, those skilled in the art can, using ordinary skill, practice the invention as set forth in the claims without undue experimentation. It is also to be understood that the specific concepts disclosed are merely illustrative of and not intended to limit the scope of the invention, which is to be determined from the appended claims along with their full scope of equivalents.
The functions, if implemented in the form of software functional units and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present invention may be embodied in the form of a software product, which is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk, or an optical disk, and various media capable of storing program codes.
The logic and/or steps represented in the flowcharts or otherwise described herein, e.g., an ordered listing of executable instructions that can be considered to implement logical functions, can be embodied in any computer-readable medium for use by or in connection with an instruction execution system, apparatus, or device, such as a computer-based system, processor-containing system, or other system that can fetch the instructions from the instruction execution system, apparatus, or device and execute the instructions. For the purposes of this description, a "computer-readable medium" can be any means that can contain, store, communicate, propagate, or transport the program for use by or in connection with the instruction execution system, apparatus, or device.
More specific examples (a non-exhaustive list) of the computer-readable medium would include the following: an electrical connection (electronic device) having one or more wires, a portable computer diskette (magnetic device), a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber device, and a portable compact disc read-only memory (CDROM). Additionally, the computer-readable medium could even be paper or another suitable medium upon which the program is printed, as the program can be electronically captured, via for instance optical scanning of the paper or other medium, then compiled, interpreted or otherwise processed in a suitable manner if necessary, and then stored in a computer memory.
It should be understood that portions of the present invention may be implemented in hardware, software, firmware, or a combination thereof. In the above embodiments, various steps or methods may be implemented in software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented in hardware, as in another embodiment, any one or combination of the following techniques, which are known in the art, may be used: a discrete logic circuit having a logic gate circuit for implementing a logic function on a data signal, an application specific integrated circuit having an appropriate combinational logic gate circuit, a Programmable Gate Array (PGA), a Field Programmable Gate Array (FPGA), or the like.
In the foregoing description of the specification, reference to the description of "one embodiment/example," "another embodiment/example," or "certain embodiments/examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
While embodiments of the present invention have been shown and described, it will be understood by those of ordinary skill in the art that: various changes, modifications, substitutions and alterations can be made to the embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the claims and their equivalents.
While the preferred embodiments of the present invention have been illustrated and described, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.
Claims (10)
1. A method for frequency discrimination error correction, comprising the steps of:
adjusting the actual output frequency output by the numerically controlled oscillator according to the value of the frequency coarse adjustment control word so as to enable the quantized value of the actual frequency difference between the actual output frequency and the target output frequency to be smaller than a preset integer value;
detecting the frequency difference between the actual output frequency and the target output frequency to obtain a detected frequency difference, and quantizing the detected frequency difference to obtain a quantized value of the detected frequency difference;
and comparing the quantized value of the detected frequency difference with a set threshold value, and correcting the quantized value of the detected frequency difference according to a comparison result.
2. The method as claimed in claim 1, wherein the adjusting the actual output frequency of the dco according to the value of the coarse frequency adjustment control word comprises:
acquiring a value of a frequency coarse tuning control word corresponding to the target output frequency of the numerical control oscillator according to a rule of correspondence between the value of the frequency coarse tuning control word and the actual output frequency of the numerical control oscillator;
and regulating and controlling the output frequency of the numerical control oscillator according to the obtained value of the frequency coarse tuning control word to be used as the actual output frequency.
3. The method according to claim 1, wherein the detecting a frequency difference between the actual output frequency and the target output frequency to obtain a detected frequency difference, and quantizing the detected frequency difference to obtain a quantized value of the detected frequency difference, comprises:
sampling synchronization is carried out on a reference signal by adopting the rising edge of a clock signal of a numerically controlled oscillator, and a synchronous signal after sampling synchronization is obtained;
sampling a time digital signal of a time digital converter by adopting the rising edge of the synchronous signal to obtain quantized data of the sampled time digital signal;
and acquiring a quantized value of the detected frequency difference according to the target output frequency of the numerically controlled oscillator, the frequency of the reference signal and the quantized data of the sampled time digital signal.
4. The method as claimed in claim 1, wherein comparing the quantized value of the detected frequency offset with a predetermined threshold and correcting the quantized value of the detected frequency offset according to the comparison result comprises:
when the quantized value of the detection frequency difference is a positive number and is greater than the set threshold value, subtracting one from the quantized value of the detection frequency difference;
and when the quantized value of the detected frequency difference is a negative number and the absolute value of the quantized value is smaller than the set threshold value, adding one to the quantized value of the detected frequency difference.
5. A frequency discrimination error correction system, comprising:
the frequency output module is used for adjusting the numerical control oscillator to output an actual output frequency according to the value of the frequency coarse adjustment control word so as to enable the quantized value of the actual frequency difference between the actual output frequency and the target output frequency to be smaller than a preset integer value;
the frequency difference detection module is used for detecting the frequency difference between the actual output frequency and the target output frequency to obtain a detection frequency difference, and quantizing the detection frequency difference to obtain a quantized value of the detection frequency difference;
and the frequency difference correction module is used for comparing the quantized value of the detected frequency difference with a set threshold value and correcting the quantized value of the detected frequency difference according to a comparison result.
6. The frequency discrimination error correction system of claim 5 wherein adjusting the actual output frequency of the digitally controlled oscillator based on the value of the coarse frequency tuning control word comprises:
acquiring a value of a frequency coarse tuning control word corresponding to the target output frequency of the numerical control oscillator according to a rule of correspondence between the value of the frequency coarse tuning control word and the actual output frequency of the numerical control oscillator;
and regulating and controlling the output frequency of the numerical control oscillator according to the obtained value of the frequency coarse tuning control word to be used as the actual output frequency.
7. The system according to claim 5, wherein the detecting a frequency difference between the actual output frequency and the target output frequency to obtain a detected frequency difference, and the quantizing the detected frequency difference to obtain a quantized value of the detected frequency difference comprises:
sampling synchronization is carried out on a reference signal by adopting the rising edge of a clock signal of a numerically controlled oscillator, and a synchronous signal after sampling synchronization is obtained;
sampling the time digital signal of the time digital converter by adopting the rising edge of the synchronous signal to obtain the quantized data of the sampled time digital signal;
and acquiring a quantized value of the detected frequency difference according to the target output frequency of the numerically controlled oscillator, the frequency of the reference signal and the quantized data of the sampled time digital signal.
8. The system as claimed in claim 5, wherein the comparing the quantized value of the detected frequency offset with a predetermined threshold and correcting the quantized value of the detected frequency offset according to the comparison result comprises:
when the quantized value of the detection frequency difference is a positive number and is greater than the set threshold value, subtracting one from the quantized value of the detection frequency difference;
and when the quantized value of the detected frequency difference is a negative number and the absolute value of the quantized value is smaller than the set threshold value, adding one to the quantized value of the detected frequency difference.
9. An all-digital phase-locked loop comprising a frequency discrimination module, said frequency discrimination module employing a method as claimed in any one of claims 1 to 4 to correct frequency errors.
10. A frequency discrimination error correction apparatus, comprising:
at least one processor;
at least one memory for storing at least one program;
when executed by the at least one processor, cause the at least one processor to implement the method of any one of claims 1-4.
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