CN114759566B - Power grid voltage recovery device and control method thereof - Google Patents

Power grid voltage recovery device and control method thereof Download PDF

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Publication number
CN114759566B
CN114759566B CN202210409615.4A CN202210409615A CN114759566B CN 114759566 B CN114759566 B CN 114759566B CN 202210409615 A CN202210409615 A CN 202210409615A CN 114759566 B CN114759566 B CN 114759566B
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power supply
source converter
voltage
voltage source
load
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CN114759566A (en
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陈伟
渠学景
张建绮
丁小刚
李建
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Pushon Beijing Electric Co ltd
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Pushon Beijing Electric Co ltd
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02JCIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J3/00Circuit arrangements for ac mains or ac distribution networks
    • H02J3/12Circuit arrangements for ac mains or ac distribution networks for adjusting voltage in ac networks by changing a characteristic of the network load
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02JCIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J3/00Circuit arrangements for ac mains or ac distribution networks
    • H02J3/36Arrangements for transfer of electric power between ac networks via a high-tension dc link
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02JCIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J9/00Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/30Systems integrating technologies related to power network operation and communication or information technologies for improving the carbon footprint of the management of residential or tertiary loads, i.e. smart grids as climate change mitigation technology in the buildings sector, including also the last stages of power distribution and the control, monitoring or operating management systems at local level
    • Y02B70/3225Demand response systems, e.g. load shedding, peak shaving
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y04INFORMATION OR COMMUNICATION TECHNOLOGIES HAVING AN IMPACT ON OTHER TECHNOLOGY AREAS
    • Y04SSYSTEMS INTEGRATING TECHNOLOGIES RELATED TO POWER NETWORK OPERATION, COMMUNICATION OR INFORMATION TECHNOLOGIES FOR IMPROVING THE ELECTRICAL POWER GENERATION, TRANSMISSION, DISTRIBUTION, MANAGEMENT OR USAGE, i.e. SMART GRIDS
    • Y04S20/00Management or operation of end-user stationary applications or the last stages of power distribution; Controlling, monitoring or operating thereof
    • Y04S20/20End-user application control systems
    • Y04S20/222Demand response systems, e.g. load shedding, peak shaving

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Business, Economics & Management (AREA)
  • Emergency Management (AREA)
  • Inverter Devices (AREA)
  • Stand-By Power Supply Arrangements (AREA)

Abstract

The invention relates to the field of intelligent power grids, in particular to a power grid voltage recovery device and a control method thereof. The voltage recovery device can realize voltage sag compensation of any dip depth, solve the problem of long-time voltage interruption, and solve the problems of short power supply time or overlong switching transition time and the like of the traditional DVR and SSTS equipment.

Description

Power grid voltage recovery device and control method thereof
Technical Field
The invention belongs to the field of intelligent power grids, and particularly relates to a power grid voltage recovery device and a control method thereof.
Background
With the increasing precision of modern processing technology, especially the increasing sensitive loads of chip processing, automobile manufacturing, PLC control, precision instruments and the like, the hazard problems of voltage sag and interruption of the power grid become more and more prominent. Voltage sag and interruption can cause various problems of failure, outage, damage and the like of sensitive loads, and huge economic loss is brought to enterprises. According to the definition of institute of electrical and electronics engineers IEEE, voltage sag is a short-time voltage variation phenomenon in which the rms value of voltage under power frequency is reduced to 0.1 to 0.9pu rated voltage and the duration is 0.5 cycle (20 ms for 1 cycle calculated by 50HZ in power frequency in our country) to 1 min. The voltage interruption means that the voltage drops to within 0.1pu rated voltage. For sensitive loads, the longer the voltage sag and interruption time, the greater the depth, and the more serious the damage to the equipment.
In the prior art, the problems of system voltage sag and power supply interruption are generally solved through a Dynamic Voltage Restorer (DVR) and a solid-state two-way power supply change-over switch (SSTS), and the power supply reliability is improved, but certain problems and disadvantages exist.
A Dynamic Voltage Restorer (DVR) is connected between a power supply and a sensitive load in series, and when the system voltage is normal, the DVR bypasses; when the system voltage drops or is interrupted for a short time, the DVR cuts off the power supply at the speed of ms level and supplies power for the load by the self energy storage power supply, thus ensuring the continuity of the power supply of the load. The main defect is that the compensation time is short, even if a super capacitor is adopted, in a high-power application occasion, the power supply time is only hundreds of ms or s, the power supply time cannot bear the influence of long-time temporary reduction or voltage interruption, if the power supply needs to be carried out for a long time, an ultra-large-capacity storage battery and a high-power heat dissipation system need to be matched, and the economic benefit is reduced linearly.
The solid-state double-circuit power supply change-over switch (SSTS) is composed of a thyristor valve group and a quick mechanical switch, and after voltage sag or interruption is detected, the SSTS quick switch and the valve body act according to set logic to realize the switching of two circuits of power supplies and relieve the problems of voltage sag and interruption to a certain extent. The SSTS has complex control logic and low switching speed, even if a quick mechanical switch is adopted, the response speed is difficult to be within 15ms, economic loss which is difficult to recover is generated for a plurality of sensitive loads in such a long switching time, in addition, the SSTS device has high requirements on two paths of power supplies, the two paths of power supplies are required to be mutually independent, the amplitude and the phase difference are required to be as small as possible, and a general power distribution network is difficult to obtain two paths of power supplies which simultaneously meet the harsh requirements. SSTS devices are currently less engineered to suffer from the above-mentioned drawbacks and deficiencies.
Therefore, in order to meet the development requirements of the smart grid, it is necessary to provide a voltage recovery device capable of ensuring the reliability of power supply and avoiding the influence of voltage sag and interruption on sensitive loads.
Disclosure of Invention
The invention provides a power grid voltage recovery device and a control method thereof, which can obtain a charging power supply from a main power supply or a standby power supply through two groups of voltage source converters of the voltage recovery device when a power supply drops or is interrupted, wherein a first power supply side voltage source converter and a second power supply side voltage source converter respectively obtain the charging power supply from the main power supply or the standby power supply, so that a direct current system can stably operate. The voltage recovery device can realize voltage sag compensation of any dip depth, solve the problem of long-time voltage interruption, and solve the problems of short power supply time or overlong switching transition time and the like of the traditional DVR and SSTS equipment.
The technical problem to be solved by the invention is realized by adopting the following technical scheme:
a voltage recovery device of a power grid is a three-phase low-voltage device, adopts a first power supply and a second power supply dual-path power supply to supply power, and has a three-phase sensitive load on the output side, wherein the three-phase sensitive load comprises a main loop and a control loop; wherein the main loop comprises a first power source side thyristor bypass valve (10), a second power source side thyristor bypass valve (11), a reactor (12) of a first power source side voltage source converter, a first power source side voltage source converter VSC1 (13), a reactor (14) of a second power source side voltage source converter, a second power source side voltage source converter VSC2 (15), a direct current positive bus (16), a direct current negative bus (17), a direct current support capacitor (18), a load side voltage source converter VSC3 (19), and a reactor (20) of a load side voltage source converter; the control loop comprises a multi-path alternating current/direct current voltage signal detection unit (21), an alternating current signal detection unit (22), a first state control switch K1 (23), a second state control switch K2 (24), a third state control switch K3 (25) and a logic control and signal modulation system (26).
Furthermore, the first power supply side is connected and then divided into two paths, wherein one path is connected to the output side through a first power supply side thyristor bypass valve (10) to be connected to the three-phase sensitive load, and the other path is connected to the output side through a reactor (12) of the first power supply side voltage source converter, a first power supply side voltage source converter VSC1 (13), a direct current positive bus (16), a direct current negative bus (17), a direct current support capacitor (18), a load side voltage source converter VSC3 (19) and a reactor (20) of the load side voltage source converter to be connected to the three-phase sensitive load; the second power supply side is also divided into two paths after being connected, one path is connected to the output side through a second power supply side thyristor bypass valve (11) to be connected to the three-phase sensitive load, and the other path is connected to the output side through a reactor (14) of the second power supply side voltage source converter, a second power supply side voltage source converter VSC2 (15), a direct current negative bus (17), a direct current supporting capacitor (18), a load side voltage source converter VSC3 (19) and a reactor (20) of the load side voltage source converter to be connected to the three-phase sensitive load.
Further, the first power supply side thyristor bypass valve (10) comprises a first thyristor T11, a second thyristor T12, a third thyristor T13, a fourth thyristor T14, a fifth thyristor T15 and a sixth thyristor T16, wherein the first thyristor T11 and the second thyristor T12 are connected in parallel in the positive and negative directions and then connected to the phase a of the first power supply, the third thyristor T13 and the fourth thyristor T14 are connected in parallel in the positive and negative directions and then connected to the phase B of the first power supply, and the fifth thyristor T15 and the sixth thyristor T16 are connected in parallel in the positive and negative directions and then connected to the phase C of the first power supply.
Further, the second power supply side thyristor bypass valve (11) comprises a seventh thyristor T21, an eighth thyristor T22, a ninth thyristor T23, a tenth thyristor T24, an eleventh thyristor T25 and a twelfth thyristor T26, wherein the seventh thyristor T21 and the eighth thyristor T22 are connected in parallel in a positive and negative direction and then connected to the phase a of the second power supply, the ninth thyristor T23 and the tenth thyristor T24 are connected in parallel in a positive and negative direction and then connected to the phase B of the second power supply, and the eleventh thyristor T25 and the twelfth thyristor T26 are connected in parallel in a positive and negative direction and then connected to the phase C of the second power supply.
Further, the reactor (12) of the first power source side voltage source converter is composed of a first reactor La1, a second reactor Lb1, and a third reactor Lc 1.
Further, the first source side voltage source converter VSC1 (13) is formed by six groups of turn-off capable devices connected in a three-phase bridge connection manner and diodes connected in anti-parallel therewith, and includes a first turn-off capable device V11, a second turn-off capable device V12, a third turn-off capable device V13, a fourth turn-off capable device V14, a fifth turn-off capable device V15, and a sixth turn-off capable device V16; the first turn-off device V11 and the fourth turn-off device V14 are connected in series, the third turn-off device V13 and the sixth turn-off device V16 are connected in series, the second turn-off device V12 and the fifth turn-off device V15 are connected in series, collectors of the first turn-off device V11, the third turn-off device V13 and the fifth turn-off device V15 are connected together, and emitters of the second turn-off device V12, the fourth turn-off device V14 and the sixth turn-off device V16 are connected together.
Further, the reactor (14) of the second power source side voltage source converter is composed of a fourth reactor La2, a fifth reactor Lb2, and a sixth reactor Lc 2.
Further, the second source side voltage source converter VSC2 (15) is formed by six groups of turn-off capable devices connected in a three-phase bridge connection manner and diodes connected in anti-parallel therewith, and includes a seventh turn-off capable device V21, an eighth turn-off capable device V22, a ninth turn-off capable device V23, a tenth turn-off capable device V24, an eleventh turn-off capable device V25, and a twelfth turn-off capable device V26, wherein the seventh turn-off capable device V21 and the tenth turn-off capable device V24 are connected in series, the ninth turn-off capable device V23 and the twelfth turn-off capable device V26 are connected in series, the eighth turn-off capable device V22 and the eleventh turn-off capable device V25 are connected in series, collectors of the seventh turn-off capable device V21, the ninth turn-off capable device V23, and the eleventh turn-off capable device V25 are connected together, and emitters of the eighth turn-off capable device V22, the tenth turn-off capable device V24, and the twelfth turn-off capable device V26 are connected together.
Further, the load side voltage source converter VSC3 (19) is formed by six groups of turn-off capable devices connected in a three-phase bridge connection and diodes connected in anti-parallel therewith, and includes a thirteenth turn-off capable device V31, a fourteenth turn-off capable device V32, a fifteenth turn-off capable device V33, a sixteenth turn-off capable device V34, a seventeenth turn-off capable device V35, and an eighteenth turn-off capable device V36; wherein, the thirteenth turn-off device V31 and the sixteenth turn-off device V34 are connected in series, the fifteenth turn-off device V33 and the eighteenth turn-off device V36 are connected in series, the seventeenth turn-off device V35 and the fourteenth turn-off device V32 are connected in series, collectors of the thirteenth turn-off device V31, the fifteenth turn-off device V33 and the seventeenth turn-off device V35 are connected together, and emitters of the sixteenth turn-off device V34, the eighteenth turn-off device V36 and the fourteenth turn-off device V32 are connected together.
Further, the load side three-phase bridge type voltage source converter connecting reactor (20) is composed of a seventh reactor La3, an eighth reactor Lb3 and a ninth reactor Lc 3.
Further, the input signals of the multi-path alternating current and direct current voltage signal detection unit (21) are first power supply side voltages Ua1, ub1 and Uc1, second power supply side voltages Ua2, ub2 and Uc2 and direct current bus voltage Udc, the output signals are a first power supply side voltage effective value U1rms and a phase theta 1, a second power supply side voltage effective value U2rms and a phase theta 2, the direct current bus voltage Udc, and the output signals are connected to a logic control and signal modulation system (26); the input signal of the alternating current signal detection unit (22) is load side three-phase currents Ia, ib and Ic, the output signal is a load side current effective value Irms, and the output signal is connected to the logic control and signal modulation system (26); a first state control switch K1 (23), a second state control switch K2 (24) and a third state control switch K3 (25) are connected to a logic control and signal modulation system (26); the 1 st group signal S1 output by the logic control and signal modulation system (26) is used as a trigger signal of a first power supply side thyristor bypass valve (10), the 2 nd group signal S2 is used as a trigger signal of a second power supply side thyristor bypass valve (11), the 3 rd group signal S3 is used as a trigger signal of a first power supply side voltage source converter VSC1 (13), the 4 th group signal S4 is used as a trigger signal of a second power supply side voltage source converter VSC2 (15), and the 5 th group signal S5 is used as a trigger signal of a load side voltage source converter VSC3 (19).
Furthermore, a first circuit breaker is connected in series with the inlet side of a first power supply, a second circuit breaker is connected in series with the inlet side of a second power supply, a third circuit breaker is connected in series with the outlet side of the compensation device, the two ends of the fourth circuit breaker are bridged between the first power supply wire inlet side and the load wire outlet side, and the two ends of the fifth circuit breaker are bridged between the second power supply wire inlet side and the load wire outlet side.
Furthermore, the first circuit breaker, the second circuit breaker, the third circuit breaker, the fourth circuit breaker and the fifth circuit breaker are mechanical bypass or maintenance switches, and the device is withdrawn and electrically isolated when the inside of the device is abnormal or maintained.
A method of controlling a grid voltage recovery device, comprising: step 1, when a first power supply is normal, a first group of signals S1 output by a logic control and signal modulation system (26) are effective, a thyristor bypass valve (10) on the side of the first power supply is continuously conducted and is in bidirectional through-flow, and the first power supply supplies power to a load; step 2, when the effective value U1rms of the voltage of the first power supply side is lower than the AC voltage sag setting value Uacset, the thyristor bypass valve (10) of the first power supply side is rapidly turned off, and a load side voltage source converter VSC3 (19) continuously supplies power for a sensitive load; step 3, slowly adjusting a control target of the load side voltage source converter VSC3 (19) to enable the voltage amplitude and the phase of the control target to track the second power supply, and when the phase difference and the amplitude difference between the load side voltage source converter VSC3 (19) and the second power supply are within a certain range, supplying power to the load by the second power supply; and 4, when the effective value U1rms of the voltage of the first power supply side is higher than the steady value Uacset of the AC voltage sag, quickly turning off the thyristor bypass valve (11) of the second power supply side, and after a fixed time delay delta t, sending a conduction signal of the thyristor bypass valve (10) of the first power supply side by the logic control and signal modulation system, wherein the first power supply provides power for a load.
Further, step 2 further comprises: step 21, deactivating the first group of signals S1, cancelling thyristor trigger pulses of the thyristor bypass valve (10) at the first power supply side, and preparing to isolate the first power supply; step 22, outputting a fifth group of signals S5, starting a load side voltage source converter VSC3 (19), firstly executing a1 st control strategy to quickly turn off a first power source side thyristor bypass valve (10), and entering step 23 after a fixed delay delta t; and step 23, adjusting the output of the load side voltage source converter VSC3 (19) to ensure that the phase and amplitude of the output voltage are stable and consistent with those of the first power supply, and continuously supplying power to the sensitive load by the load side voltage source converter VSC3 (19).
Further, step 2 further comprises: 24, when the first power supply voltage is recovered, namely when the effective value U1rms of the first power supply side voltage is not lower than the AC voltage sag set value Uacset, directly jumping to the step 4; and 25, when the effective value U1rms of the voltage at the first power supply side is lower than the AC voltage sag fixed value Uacset and the effective value U2rms of the voltage at the second power supply side is greater than the AC voltage sag fixed value Uacset, reducing the DC bus voltage Udc to be lower than a fixed value Udcset1 or enabling the working time of the load side voltage source converter VSC3 (19) to reach a fixed value Tset, and entering the step 3.
Further, step 3 further comprises: step 31: slowly adjusting a control target of a load side voltage source converter VSC3 (19) to enable the voltage amplitude and the phase to track the second power supply; step 32: when the phase difference and the amplitude difference between the load side voltage source converter VSC3 (19) and the second power supply are within a certain range, the logic control and signal modulation system sends out a conduction signal of the thyristor bypass valve (11) on the second power supply side, and simultaneously, the fifth group of signals S5 are cut off, so that the load side voltage source converter VSC3 (19) stops working, and the second power supply supplies power to the load.
Further, step 3 further comprises: step 33: and the load is powered by the second power supply, and when the voltage of the first power supply is recovered, namely when the effective value U1rms of the voltage of the first power supply side is not lower than the AC voltage sag set value Uacset, the step 4 is carried out.
Further, step 4 further comprises: step 41: deactivating the second group signal S2, cancelling the thyristor trigger pulse of the thyristor bypass valve (11) at the second power supply side, and preparing to isolate the second power supply; step 42: outputting a fifth group of signals S5, starting a load side voltage source converter VSC3 (19), firstly executing a1 st control strategy to quickly turn off a second power source side thyristor bypass valve (11), and entering a step 43 after a fixed time delay delta t; step 43: adjusting the output of the load side voltage source converter VSC3 (19) to make the phase and amplitude of the output voltage stable and consistent with those of the power supply 2, continuously supplying power to the sensitive load by the load side voltage source converter VSC3 (19), and entering step 44 after a fixed delay delta t; and step 44: adjusting the output of a load side voltage source converter VSC3 (19) to ensure that the phase and amplitude of the output voltage are stable and are consistent with those of the first power supply; step 45: when the phase difference between the load side voltage source converter VSC3 (19) and the phase difference and the amplitude difference between the first power supply are within a certain range, the logic control and signal modulation system sends out a first power supply side thyristor bypass valve (10) conduction signal, and simultaneously, the fifth group of signals S5 are cut off, so that the load side voltage source converter VSC3 (19) stops working, and the first power supply still provides power for the load.
Further, when the direct current bus voltage Udc is lower than a charging fixed value Udcset2, comparing a first power supply side voltage effective value U1rms with a second power supply side voltage effective value U2rms; when the first power supply side voltage effective value U1rms is larger than or equal to the second power supply side voltage effective value U2rms, outputting a third group signal S3 and starting a first power supply side voltage source converter VSC1 (13); when the first power supply side voltage effective value U1rms is smaller than the second power supply side voltage effective value U2rms, a second power supply side voltage source converter VSC2 (15) is started to work; and when the direct current bus voltage Udc reaches a charging stopping fixed value Udcset3, stopping the third group of signals S3 or the fourth group of signals S4, and stopping the corresponding first power source side voltage source converter VSC1 (13) or second power source side voltage source converter VSC2 (15).
Compared with the prior art, the invention has the advantages that:
1. the invention not only can realize the voltage sag compensation of any drop depth, but also can solve the problem of long-time voltage interruption, and solves the problems of short power supply time or overlong switching transition time and the like of the traditional DVR and SSTS equipment.
2. When the power supply falls or is interrupted, the device obtains the charging power supply from the main power supply or the standby power supply through the two groups of voltage source converters respectively, the stability of a direct current system is ensured, and therefore the device does not need a large-capacity energy storage device, a direct current link can work only by a small-capacity supporting capacitor, and the size, the weight and the cost of the device are reduced.
3. The three groups of voltage source converters do not need to continuously operate for a long time under the working condition, wherein the first voltage source converter and the second voltage source converter on the power supply side only work for a short time in the charging period of the direct-current supporting capacitor, the load side voltage source converter VSC3 only works for a short time in the voltage sag of the main power supply or the switching period of the double-circuit power supply, the through-current time is short, the heat productivity is small, and the capacity and the cost of a cooling system can be reduced.
4. The invention adopts a rapid switching strategy, and the thyristor bypass valve is rapidly and forcibly turned off, so that the load is supplied by the load side voltage source converter VSC3 while the fault power supply is rapidly isolated, the response speed is high, the power failure time is short, and the influence of voltage sag and interruption on sensitive loads is avoided.
5. The invention detects the amplitude and the phase of the first power supply and the second power supply in real time, ensures that the phase sequence and the phase are approximately consistent when the load side voltage source converter VSC3 is switched to supply power with the first power supply and the second power supply, does not generate switching impact, and lightens the influence of power supply switching on sensitive loads.
6. The transition strategy of the load side voltage source converter VSC3 reduces the requirement of double power sources, the device has no requirement on voltage amplitude difference, frequency difference, phase sequence difference and phase difference of the two power sources, and the engineering implementation difficulty is reduced.
Drawings
FIG. 1 is an electrical main wiring diagram of the present invention;
FIG. 2 is a signal wiring diagram of the control system of the present invention;
FIG. 3 is a schematic workflow diagram of a preferred embodiment of the present invention;
fig. 4 is a schematic diagram of the operation flow of the first and second source side voltage source converters.
Detailed Description
The invention is described in further detail below with reference to the following drawings:
as shown in fig. 1 and 2:
the invention discloses a power grid voltage recovery device which is a three-phase low-voltage device, adopts a first power supply and a second power supply dual-path power supply to supply power, adopts a three-phase sensitive load on an output side, and comprises a main loop and a control loop.
The main loop comprises a first power supply side thyristor bypass valve (10), a second power supply side thyristor bypass valve (11), a reactor (12) of the first power supply side voltage source converter, a first power supply side voltage source converter VSC1 (13), a reactor (14) of the second power supply side voltage source converter, a second power supply side voltage source converter VSC2 (15), a direct current positive bus (16), a direct current negative bus (17), a direct current supporting capacitor (18), a load side voltage source converter VSC3 (19) and a reactor (20) of the load side voltage source converter.
The control loop comprises a multi-path alternating current/direct current voltage signal detection unit (21), an alternating current signal detection unit (22), a first state control switch K1 (23), a second state control switch K2 (24), a third state control switch K3 (25) and a logic control and signal modulation system (26).
Furthermore, the first power supply side is connected and then divided into two paths, wherein one path is connected to the output side through a first power supply side thyristor bypass valve (10) to be connected to the three-phase sensitive load, and the other path is connected to the output side through a reactor (12) of the first power supply side voltage source converter, a first power supply side voltage source converter VSC1 (13), a direct current positive bus (16), a direct current negative bus (17), a direct current support capacitor (18), a load side voltage source converter VSC3 (19) and a reactor (20) of the load side voltage source converter to be connected to the three-phase sensitive load; the second power supply side is also divided into two paths after being connected, one path is connected to the output side through a second power supply side thyristor bypass valve (11) to be connected to the three-phase sensitive load, and the other path is connected to the output side through a reactor (14) of the second power supply side voltage source converter, a second power supply side voltage source converter VSC2 (15), a direct current negative bus (17), a direct current supporting capacitor (18), a load side voltage source converter VSC3 (19) and a reactor (20) of the load side voltage source converter to be connected to the three-phase sensitive load.
In one embodiment, the first power source side thyristor bypass valve (10) comprises a first thyristor T11, a second thyristor T12, a third thyristor T13, a fourth thyristor T14, a fifth thyristor T15 and a sixth thyristor T16, wherein the first thyristor T11 and the second thyristor T12 are connected in parallel in a positive and negative direction and then connected to phase a of the first power source, the third thyristor T13 and the fourth thyristor T14 are connected in parallel in a positive and negative direction and then connected to phase B of the first power source, and the fifth thyristor T15 and the sixth thyristor T16 are connected in parallel in a positive and negative direction and then connected to phase C of the first power source.
In one embodiment, the second power source side thyristor bypass valve (11) comprises a seventh thyristor T21, an eighth thyristor T22, a ninth thyristor T23, a tenth thyristor T24, an eleventh thyristor T25 and a twelfth thyristor T26, wherein the seventh thyristor T21 and the eighth thyristor T22 are connected in parallel in a positive and negative direction and are connected in parallel with each other and are connected to phase a of the second power source, the ninth thyristor T23 and the tenth thyristor T24 are connected in parallel in a positive and negative direction and are connected to phase B of the second power source, and the eleventh thyristor T25 and the twelfth thyristor T26 are connected in parallel in a positive and negative direction and are connected to phase C of the second power source.
In one embodiment, the reactor (12) of the first power source side voltage source converter is composed of a first reactor La1, a second reactor Lb1, and a third reactor Lc 1.
In one embodiment, the first source side voltage source converter VSC1 (13) is composed of six groups of turn-off devices connected in a three-phase bridge connection manner and diodes connected in anti-parallel therewith, and includes a first turn-off device V11, a second turn-off device V12, a third turn-off device V13, a fourth turn-off device V14, a fifth turn-off device V15, and a sixth turn-off device V16; the first turn-off device V11 and the fourth turn-off device V14 are connected in series, the third turn-off device V13 and the sixth turn-off device V16 are connected in series, the second turn-off device V12 and the fifth turn-off device V15 are connected in series, collectors of the three devices of the first turn-off device V11, the third turn-off device V13 and the fifth turn-off device V15 are connected together, and emitters of the three devices of the second turn-off device V12, the fourth turn-off device V14 and the sixth turn-off device V16 are connected together.
In one embodiment, the reactor (14) of the second power source side voltage source converter is composed of a fourth reactor La2, a fifth reactor Lb2, and a sixth reactor Lc 2.
In one embodiment, the second source side voltage source converter VSC2 (15) is composed of six groups of turn-off devices connected in a three-phase bridge connection and diodes connected in anti-parallel therewith, and includes a seventh turn-off device V21, an eighth turn-off device V22, a ninth turn-off device V23, a tenth turn-off device V24, an eleventh turn-off device V25, and a twelfth turn-off device V26; the seventh turn-off device V21 and the tenth turn-off device V24 are connected in series, the ninth turn-off device V23 and the twelfth turn-off device V26 are connected in series, the eighth turn-off device V22 and the eleventh turn-off device V25 are connected in series, collectors of the seventh turn-off device V21, the ninth turn-off device V23 and the eleventh turn-off device V25 are connected together, and emitters of the eighth turn-off device V22, the tenth turn-off device V24 and the twelfth turn-off device V26 are connected together.
In one embodiment said load side voltage source converter VSC3 (19) is comprised of six groups of turn-off capable devices connected in a three phase bridge connection and diodes connected in anti-parallel therewith comprising a thirteenth turn-off capable device V31, a fourteenth turn-off capable device V32, a fifteenth turn-off capable device V33, a sixteenth turn-off capable device V34, a seventeenth turn-off capable device V35, an eighteenth turn-off capable device V36; the thirteenth turn-off device V31 and the sixteenth turn-off device V34 are connected in series, the fifteenth turn-off device V33 and the eighteenth turn-off device V36 are connected in series, the seventeenth turn-off device V35 and the fourteenth turn-off device V32 are connected in series, collectors of the thirteenth turn-off device V31, the fifteenth turn-off device V33 and the seventeenth turn-off device V35 are connected together, and emitters of the sixteenth turn-off device V34, the eighteenth turn-off device V36 and the fourteenth turn-off device V32 are connected together.
In one embodiment, the load side three-phase bridge voltage source converter connection reactor (20) is composed of a seventh reactor La3, an eighth reactor Lb3, and a ninth reactor Lc 3.
In one embodiment, the multi-path alternating current and direct current voltage signal detection unit (21) inputs signals of first power supply side voltages Ua1, ub1 and Uc1, second power supply side voltages Ua2, ub2 and Uc2 and a direct current bus voltage Udc, outputs signals of a first power supply side voltage effective value U1rms and a phase theta 1, a second power supply side voltage effective value U2rms and a phase theta 2 and a direct current bus voltage Udc, and outputs signals connected to a logic control and signal modulation system (26); the input signal of the alternating current signal detection unit (22) is load side three-phase currents Ia, ib and Ic, the output signal is a load side current effective value Irms, and the output signal is connected to the logic control and signal modulation system (26); a first state control switch K1 (23), a second state control switch K2 (24) and a third state control switch K3 (25) are connected to a logic control and signal modulation system (26); the 1 st group signal S1 output by the logic control and signal modulation system (26) is used as a trigger signal of a first power supply side thyristor bypass valve (10), the 2 nd group signal S2 is used as a trigger signal of a second power supply side thyristor bypass valve (11), the 3 rd group signal S3 is used as a trigger signal of a first power supply side voltage source converter VSC1 (13), the 4 th group signal S4 is used as a trigger signal of a second power supply side voltage source converter VSC2 (15), and the 5 th group signal S5 is used as a trigger signal of a load side voltage source converter VSC3 (19).
In one embodiment, the grid voltage recovery device disclosed by the invention further comprises a first circuit breaker connected in series to the first power supply line inlet side, a second circuit breaker connected in series to the second power supply line inlet side, a third circuit breaker connected in series to the compensation line outlet side, a fourth circuit breaker, a fifth circuit breaker, a third circuit breaker and a fourth circuit breaker, wherein two ends of the fourth circuit breaker are bridged between the first power supply line inlet side and the load line outlet side, and two ends of the fifth circuit breaker are bridged between the second power supply line inlet side and the load line outlet side.
In a preferred embodiment, the first circuit breaker, the second circuit breaker, the third circuit breaker, the fourth circuit breaker and the fifth circuit breaker are mechanical bypass or service switches, and when the inside of the device is abnormal or is repaired, the device is withdrawn and is electrically isolated.
As shown in fig. 1, a phase a, a phase B, and a phase C of the first power supply are connected to a first power supply side phase a connection terminal (1), a first power supply side phase B connection terminal (2), and a first power supply side phase C connection terminal (3), respectively, and voltages at connection terminals thereof are Ua1, ub1, and Uc1, respectively. A phase, B phase and C phase of the second power supply are respectively connected with a second power supply side A phase connection terminal (4), a second power supply side B phase connection terminal (5) and a second power supply side C phase connection terminal (6) of the device, and the voltages at the connection terminals are Ua2, ub2 and Uc2 respectively. A phase, B phase and C phase of the load are respectively connected with a device load side A phase connection terminal (7), a load side B phase connection terminal (8) and a load side C phase connection terminal (9), and the voltage at the connection terminals is Ua3, ub3 and Uc3.
An anode of a first thyristor T11 of a first power supply side thyristor bypass valve (10) is connected to a first power supply side phase A connection terminal (1), an anode of a third thyristor T13 is connected to a first power supply side phase B connection terminal (2), an anode of a fifth thyristor T15 is connected to a first power supply side phase C connection terminal (3), a cathode of the first thyristor T11 is connected to a load side phase A connection terminal (7), a cathode of the third thyristor T13 is connected to a load side phase B connection terminal (8), and a cathode of the fifth thyristor T15 is connected to a load side phase C connection terminal (9).
An anode of a seventh thyristor T21 of the second power supply side thyristor bypass valve (11) is connected to the second power supply side A phase connection terminal (4), an anode of a ninth thyristor T23 is connected to the second power supply side B phase connection terminal (5), an anode of an eleventh thyristor T25 is connected to the second power supply side C phase connection terminal (6), a cathode of the seventh thyristor T21 is connected to the load side A phase connection terminal (7), a cathode of the ninth thyristor T23 is connected to the load side B phase connection terminal (8), and a cathode of the eleventh thyristor T25 is connected to the load side C phase connection terminal (9).
A first reactor La1 "" -side terminal of a reactor (12) of the first power supply side voltage source converter is connected to a first power supply side A phase connection terminal (1), the other side is connected to an electrical node Ua4 of the first power supply side voltage source converter VSC1 (13), a second reactor Lb1 "" -side terminal of the reactor (12) of the first power supply side voltage source converter is connected to a first power supply side B phase connection terminal (2), the other side is connected to an electrical node Ub4 of the first power supply side voltage source converter VSC1 (13), a third reactor Lc1 "" -side terminal of the reactor (12) of the first power supply side voltage source converter is connected to a first power supply side C phase connection terminal (3), and the other side is connected to an electrical node Uc4 of the first power supply side voltage source converter VSC1 (13).
Electric nodes Ua4, ub4 and Uc4 of a first power supply side voltage source converter VSC1 (13) are respectively connected with a first reactor La1, a second reactor Lb1 and a third reactor Lc1 in a reactor (12) of the first power supply side voltage source converter, a common collector electric node is connected to a direct current positive bus B + (16), and a common emitter electric node is connected to a direct current negative bus B- (17).
A fourth reactor La2 "-" side terminal of the reactor (14) of the second power source side voltage source converter is connected to the second power source side a phase connection terminal (4), the other side is connected to the electrical node Ua5 of the second power source side voltage source converter VSC2 (15), a fifth reactor Lb2 "-" side terminal of the reactor (14) of the second power source side voltage source converter is connected to the second power source side B phase connection terminal (5), the other side is connected to the electrical node Ub5 of the second power source side voltage source converter VSC2 (15), a sixth reactor Lc2 "-" side terminal of the reactor (14) of the second power source side voltage source converter is connected to the second power source side C phase connection terminal (6), and the other side is connected to the electrical node Uc5 of the second power source side voltage source side converter VSC2 (15).
The electrical nodes Ua5, ub5, uc5 of the second source side voltage source converter VSC2 (15) are connected to the fourth reactor La2, the fifth reactor Lb2, and the sixth reactor Lc2 in the reactor (14) of the second source side voltage source converter, respectively, and the common collector electrical node is connected to the dc positive bus B + (16), and the common emitter electrical node is connected to the dc negative bus B- (17).
A seventh reactor La3 "-" side terminal of a reactor (20) of the load side voltage source converter is connected to the load side a phase connection terminal (7), the other side is connected to an electrical node Ua6 of the load side voltage source converter VSC3 (19), an eighth reactor Lb3 "-" side terminal of the reactor (20) of the load side voltage source converter is connected to the load side B phase connection terminal (8), the other side is connected to an electrical node Ub6 of the load side voltage source VSC3 (19), a ninth reactor Lc3 "-" side terminal of the reactor (20) of the load side voltage source converter is connected to the load side C phase connection terminal (9), and the other side is connected to the electrical node Uc6 of the load side voltage source VSC3 (19).
The electrical nodes Ua6, ub6, uc6 of the load side voltage source converter VSC3 (19) are connected to the seventh reactor La3, eighth reactor Lb3, ninth reactor Lc3 of the reactors (20) of the load side voltage source converter, respectively, and the common collector electrical node is connected to the dc positive bus B + (16) and the common emitter electrical node is connected to the dc negative bus B- (17).
The direct current support capacitor C (18) is respectively connected with the direct current positive bus B + (16) and the direct current negative bus B- (17), corresponding electric connection terminals are respectively marked as ' + ' and ' -, and the voltage at two ends of the direct current support capacitor C is Udc.
As shown in fig. 2, the input signals of the multi-path alternating current/direct current voltage signal detection unit (21) are first power supply side voltages Ua1, ub1 and Uc1, second power supply side voltages Ua2, ub2 and Uc2 and a direct current bus voltage Udc, the output signals are a first power supply side voltage effective value U1rms and a phase theta 1, a second power supply side voltage effective value U2rms and a phase theta 2, the direct current bus voltage Udc, and the output signals are connected to a logic control and signal modulation system (26); the input signal of the alternating current signal detection unit (22) is load side three-phase currents Ia, ib and Ic, the output signal is a load side current effective value Irms, and the output signal is connected to the logic control and signal modulation system (26); a first state control switch K1 (23), a second state control switch K2 (24) and a third state control switch K3 (25) are connected to a logic control and signal modulation system (26); the 1 st group signal S1 output by the logic control and signal modulation system (26) is used as a trigger signal of a first power supply side thyristor bypass valve (10), the 2 nd group signal S2 is used as a trigger signal of a second power supply side thyristor bypass valve (11), the 3 rd group signal S3 is used as a trigger signal of a first power supply side voltage source converter VSC1 (13), the 4 th group signal S4 is used as a trigger signal of a second power supply side voltage source converter VSC2 (15), and the 5 th group signal S5 is used as a trigger signal of a load side voltage source converter VSC3 (19).
The input signals of the multi-path alternating current and direct current voltage signal detection unit (21) are first power supply side voltages Ua1, ub1 and Uc1, second power supply side voltages Ua2, ub2 and Uc2 and direct current bus voltage Udc, and output signals are a first power supply side voltage effective value U1rms and a phase theta 1, a second power supply side voltage effective value U2rms and a phase theta 2 and the direct current bus voltage Udc. The output signals are all connected to a logic control and signal modulation system (26).
The alternating current signal detection unit (22) inputs signals of load side three-phase currents Ia, ib and Ic, outputs a signal load side current effective value Irms, and outputs a signal to be connected to a logic control and signal modulation system (26).
A first state control switch K1 (23) of the 'input power supply 1', a second state control switch K2 (24) of the 'input compensation' and a third state control switch K3 (25) of the 'exit compensation' are all connected to a logic control and signal modulation system (26).
The 1 st group signal S1 output by the logic control and signal modulation system (26) is used as a trigger signal of a first power supply side thyristor bypass valve (10), the 2 nd group signal S2 is used as a trigger signal of a second power supply side thyristor bypass valve (11), the 3 rd group signal S3 is used as a trigger signal of a first power supply side voltage source converter VSC1 (13), the 4 th group signal S4 is used as a trigger signal of a second power supply side voltage source converter VSC2 (15), and the 5 th group signal S5 is used as a trigger signal of a load side voltage source converter VSC3 (19).
The working principle of the voltage recovery device is as follows: when the first breaker QF1, the first breaker QF2, the third breaker QF3 and the fifth breaker QF5 are disconnected and the fourth breaker QF4 is closed, the device enters an overhauling and isolating state and a first power supply supplies power to a load; when the first breaker QF1, the second breaker QF2, the third breaker QF3 and the fourth breaker QF4 are disconnected and the fifth breaker QF5 is closed, the device enters an overhauling and isolating state and a second power supply supplies power to a load; when the first breaker QF1, the second breaker QF2 and the third breaker QF3 are closed, the fourth breaker QF4 and the fifth breaker QF5 are opened, so that the device can be withdrawn from the maintenance and isolation and enter a working state.
When the first control switch K1 (23) is turned off, the 'power on 1' state is invalid, and at this time, no matter what state the second control switch K2 (24) is in, all the five groups of control signals S1, S2, S3, S4 and S5 output by the logic control and signal modulation system (26) are invalid. The device stops the voltage sag and voltage interruption compensation functions and stops the power supply to the sensitive load.
When the first control switch K1 (23) is closed and the second control switch K2 (24) is opened, the 'input power supply 1' state and the 'input compensation' state are valid, the first group of signals S1 output by the logic control and signal modulation system (26) are valid, the first power supply side thyristor bypass valve (10) is conducted, the sensitive load is powered by the first power supply, but the device stops the voltage sag and interruption compensation functions, and the other four groups of control signals S2, S3, S4 and S5 output by the logic control and signal modulation system (26) are all invalid.
When the first control switch K1 (23) and the second control switch K2 (24) are closed simultaneously, the 'on power supply 1' state is effective, the 'on compensation' state is effective, the logic control and signal modulation system (26) works according to a set logic and strategy, corresponding five groups of control signals S1, S2, S3, S4 and S5 are output, the sensitive load is supplied with power by the first power supply, and the device is provided with the functions of voltage sag and voltage interruption compensation.
In order to avoid the parallel operation of a first power supply and a second power supply, a1 st group of control signals S1 and a2 nd group of control signals S2 output by a logic control and signal modulation system (26) are subjected to interlocking logic control, namely the 1 st group of control signals S1 and the 2 nd group of control signals S2 cannot be simultaneously effective; in order to avoid the parallel operation of the first source side voltage source converter VSC1 (13) and the second source side voltage source converter VSC2 (15), the 3 rd group control signal S3 and the 4 th group control signal S4 output by the logic control and signal modulation system (26) are subjected to interlocking control, namely the 3 rd group control signal S3 and the 4 th group control signal S4 cannot be simultaneously effective.
The 1 st group of control signals S1 and the 2 nd group of control signals S2 output by the logic control and signal modulation system (26) are on-off signals, the high level corresponds to the conduction of the thyristor, and the low level corresponds to the turn-off of the thyristor; the 3 rd group of control signals S3, the 4 th group of control signals S4 and the 5 th group of control signals S5 output by the logic control and signal modulation system (26) adopt PWM modulation waves. Preferably, an SVPWM modulated wave is recommended.
A dq decoupling control method is adopted for a first power supply side voltage source converter VSC1 (13), the control target of an outer ring d axis is direct-current bus voltage Udc, and the control target of an outer ring q axis is reactive current (or power) 0. The first power supply side voltage source converter VSC1 (13) is used as a synchronous rectifier, converts alternating current of a first power supply into direct current charging current, charges a supporting capacitor C (18), enables direct current bus voltage Udc to reach a target value, meanwhile, has a power factor of approximately 1, and reduces reactive power requirements to the maximum extent.
And a dq decoupling control method is also adopted in the second power supply side voltage source converter VSC2 (15), the control target of an outer ring d axis is the direct current bus voltage Udc, and the control target of an outer ring q axis is that reactive current (or power) is 0. The second power source side voltage source converter VSC2 (15) is also used as a synchronous rectifier, converts alternating current of a second power source into direct current charging current, charges a supporting capacitor C (18), enables direct current bus voltage Udc to reach a target value, meanwhile, the power factor is approximate to 1, and reactive power requirements are reduced to the maximum extent.
The control strategy of the load side voltage source converter VSC3 (19) comprises two, the first control strategy being to rapidly switch off the currently operating first source side thyristor bypass valve (10) or second source side thyristor bypass valve (11). The preferable method is that rectangular waves are output, when the corresponding phase load current is in a positive direction, the upper tube of the corresponding phase of the load side voltage source converter VSC3 (19) is conducted, and when the corresponding phase load current is in a negative direction, the lower tube of the corresponding phase of the load side voltage source converter VSC3 (19) is conducted, so that the thyristor bears back pressure and is rapidly turned off; the second control strategy is to adopt a dq decoupling control method, the outer ring d axis control target is that the d axis component Ud of the alternating-current bus voltage reaches a target value, the outer ring q axis control target is that the q axis component of the alternating-current bus voltage is 0, and the phase angle theta of coordinate transformation and the voltage Ud target value can be kept consistent with the first power supply or the second power supply in different working stages. The load side voltage source converter VSC3 (19) is used as an inverter, outputs three-phase alternating-current voltage with controllable voltage amplitude and frequency, and continuously supplies power for sensitive loads.
The first source side thyristor bypass valve (10), the second source side thyristor bypass valve (11), and the load side voltage source converter VSC3 (19) operate according to the following procedure.
Preparation work: a first power supply three-phase wiring terminal of the device is respectively connected to an A phase, a B phase and a C phase of a first power supply, and voltage signals Ua1, ub1 and Uc1 of the device are connected to a multi-path alternating current and direct current voltage signal detection unit 21 for processing and then output a first power supply side voltage effective value U1rms and a phase angle theta 1 thereof; a second power supply three-phase wiring terminal of the device is respectively connected to the phase A, the phase B and the phase C of a second power supply, and voltage signals Ua2, ub2 and Uc2 of the device are connected to a multi-path alternating current and direct current voltage signal detection unit (21) for processing and then output a voltage effective value U2rms and a phase angle theta 2 of the second power supply; the A phase, the B phase and the C phase of the sensitive load are respectively connected with a three-phase output terminal of the device, and current signals Ia, ib and Ic of the sensitive load are connected into an alternating current signal detection unit (22) to be processed so as to output a load effective value Irms. The first breaker QF1, the second breaker QF2 and the third breaker QF3 are closed, and the fourth breaker QF4 and the fifth breaker QF5 are opened, so that the device is out of the maintenance isolation state. And closing the first state control switch K1 (23), the second state control switch K2 (24) and the third state control switch K3 (25), and starting and putting compensation into the equipment.
The control method preferably applied to the voltage recovery device as shown in fig. 3 includes the steps of:
step 1, when a first power supply is normal, a first group of signals S1 output by a logic control and signal modulation system (26) are effective, a thyristor bypass valve (10) on the side of the first power supply is continuously conducted and is in bidirectional through-flow, and the first power supply supplies power to a load; step 2, when the effective value U1rms of the voltage of the first power supply side is lower than the AC voltage sag setting value Uacset, the thyristor bypass valve (10) of the first power supply side is rapidly turned off, and a load side voltage source converter VSC3 (19) continuously supplies power for a sensitive load; step 3, slowly adjusting a control target of the load side voltage source converter VSC3 (19) to enable the voltage amplitude and the phase of the control target to track the second power supply, and when the phase difference and the amplitude difference between the load side voltage source converter VSC3 (19) and the second power supply are within a certain range, supplying power to the load by the second power supply; and 4, when the effective value U1rms of the voltage of the first power supply side is higher than the steady value Uacset of the alternating voltage, quickly turning off the thyristor bypass valve (11) of the second power supply side, and after a fixed time delay delta t, sending a conduction signal of the thyristor bypass valve (10) of the first power supply side by the logic control and signal modulation system (26), wherein the first power supply provides power for the load.
In one embodiment, wherein step 2 further comprises: step 21, deactivating the first group of signals S1, canceling the thyristor trigger pulse of the thyristor bypass valve (10) at the first power supply side, and preparing to isolate the first power supply; step 22, outputting a fifth group of signals S5, starting a load side voltage source converter VSC3 (19), firstly executing a1 st control strategy to quickly turn off a first power side thyristor bypass valve (10), and entering step 23 after a fixed time delay delta t; and step 23, adjusting the output of the load side voltage source converter VSC3 (19) to ensure that the phase and amplitude of the output voltage are stable and consistent with those of the first power supply, and continuously supplying power to the sensitive load by the load side voltage source converter VSC3 (19).
In one embodiment, step 2 further comprises: 24, when the first power supply voltage is recovered, namely when the first power supply side voltage effective value U1rms is not lower than the AC voltage sag set value Uacset, directly jumping to the step 4; and 25, when the effective value U1rms of the voltage at the first power supply side is lower than the AC voltage sag fixed value Uacset and the effective value U2rms of the voltage at the second power supply side is greater than the AC voltage sag fixed value Uacset, reducing the DC bus voltage Udc to be lower than a fixed value Udcset1 or enabling the working time of the load side voltage source converter VSC3 (19) to reach a fixed value Tset, and entering the step 3.
In one embodiment, step 3 further comprises: step 31: slowly adjusting a control target of a load side voltage source converter VSC3 (19) to enable the voltage amplitude and the phase of the control target to track the second power supply; step 32: when the phase difference and the amplitude difference between the load side voltage source converter VSC3 (19) and the second power supply are within a certain range, the logic control and signal modulation system (26) sends out a conduction signal of the thyristor bypass valve (11) at the second power supply side, and simultaneously, the fifth group of signals S5 are cut off, so that the load side voltage source converter VSC3 (19) stops working, and the second power supply supplies power to the load.
In one embodiment, step 3 further comprises: step 33: and the load is powered by the second power supply, and when the voltage of the first power supply is recovered, namely when the effective value U1rms of the voltage of the first power supply side is not lower than the AC voltage sag set value Uacset, the step 4 is carried out.
In one embodiment, step 4 further comprises: step 41: deactivating the second group signal S2, cancelling the thyristor trigger pulse of the thyristor bypass valve (11) at the second power supply side, and preparing to isolate the second power supply; step 42: outputting a fifth group of signals S5, starting a load side voltage source converter VSC3 (19), firstly executing a1 st control strategy to quickly turn off a second power source side thyristor bypass valve (11), and entering a step 43 after a fixed time delay delta t; step 43: adjusting the output of the load side voltage source converter VSC3 (19) to make the phase and amplitude of the output voltage stable and consistent with those of the power supply 2, continuously supplying power to the sensitive load by the load side voltage source converter VSC3 (19), and entering step 44 after a fixed delay delta t; and step 44: adjusting the output of a load side voltage source converter VSC3 (19) to ensure that the phase and amplitude of the output voltage are stable and are consistent with those of the first power supply; step 45: when the phase difference between the load side voltage source converter VSC3 (19) and the phase difference and the amplitude difference between the load side voltage source converter VSC3 and the first power supply are within a certain range, the logic control and signal modulation system (26) sends out a first power supply side thyristor bypass valve (10) conduction signal, and simultaneously disconnects the fifth group of signals S5, so that the load side voltage source converter VSC3 (19) stops working, and the first power supply still provides power for the load.
Through the preferred embodiment, the amplitude and the phase of the three-phase voltage of the main power supply, the standby power supply and the load side can be detected in real time, the phase sequence difference and the phase difference of the load side voltage source converter VSC3 (19) are ensured to be within the range of the limit values when the power supply is switched, the switching impact cannot be generated, and the influence of the power supply switching on the sensitive load is lightened.
In one embodiment, when the direct current bus voltage Udc is lower than the charging fixed value Udcset2, the first power supply side voltage effective value U1rms and the second power supply side voltage effective value U2rms are compared; when the first power supply side voltage effective value U1rms is larger than or equal to the second power supply side voltage effective value U2rms, outputting a third group signal S3 and starting a first power supply side voltage source converter VSC1 (13); when the effective value U1rms of the first power supply side voltage is smaller than U2rms, a second power supply side voltage source converter VSC2 (15) is started to work; and when the direct current bus voltage Udc reaches a charging stopping fixed value Udcset3, stopping the third group of signals S3 or the fourth group of signals S4, and stopping the corresponding first power source side voltage source converter VSC1 (13) or second power source side voltage source converter VSC2 (15).
As shown in fig. 4, in a preferred embodiment, the first source side voltage source converter VSC1 (13), the second source side voltage source converter VSC2 (15) may operate according to the following logic:
a dq decoupling control method is adopted for the first power supply side voltage source converter VSC1 (13) and the second power supply side voltage source converter VSC2 (15), the control target of an outer ring d axis is that the direct current bus voltage Udc reaches a target value, the control target of an outer ring q axis is that reactive current (or power) is 0, the first power supply side voltage source converter VSC1 (13) and the second power supply side voltage source converter VSC2 (15) are used as rectifiers, alternating current of the first power supply and the second power supply is converted into direct current charging current, a supporting capacitor C (18) is charged, the direct current bus voltage Udc reaches the target value, and meanwhile reactive power requirements are reduced to the maximum extent.
The first power source side voltage source converter VSC1 (13), the second power source side voltage source converter VSC2 (15) and the load side voltage source converter VSC3 (19) work independently, and when the direct current bus voltage Udc is lower than a charging fixed value Udcset2, a first power source side effective value U1rms and a second power source side effective value U2rms are compared. And when the first power supply side voltage effective value U1rms is larger than or equal to the second power supply side voltage effective value U2rms, outputting a third group signal S3 and starting the first power supply side voltage source converter VSC1 (13). And when the first power supply side voltage effective value U1rms is smaller than the second power supply side voltage effective value U2rms, starting the second power supply side voltage source converter VSC2 (15) to work. And when the direct current bus voltage Udc reaches a charging stop constant value Udcset3, stopping the third group of signals S3 or the fourth group of signals S4 to enable the corresponding first power supply side voltage source converter VSC1 (13) or second power supply side voltage source converter VSC2 (15) to stop working. In order to avoid frequent starting of the first and second source side voltage source converters VSC1 (13, VSC2 (15), the charging constant value Udcset2 and the charging stop constant value Udcset3 should have a large difference, and the charging constant value Udcset2 should be much lower than the charging stop constant value Udcset3.
When the equipment needs to be overhauled, the first breaker QF1, the second breaker QF2 and the third breaker QF3 are disconnected, the fourth breaker QF4 or the fifth breaker QF5 are closed, and the fourth breaker QF4 and the fifth breaker QF5 are interlocked and cannot be closed at the same time, so that the device is withdrawn from an overhauling isolation state, and the normal electricity utilization of sensitive loads is not influenced during overhauling of the device.
It should be emphasized that the embodiments described herein are exemplary rather than limiting, and thus the present invention is not limited to the embodiments described in the detailed description, as other embodiments derived from the technical solutions of the present invention by those skilled in the art also belong to the protection scope of the present invention.

Claims (6)

1. A control method of a power grid voltage recovery device is characterized in that:
step 1, when a first power supply is normal, a first group of signals S1 output by a logic control and signal modulation system (26) are effective, a thyristor bypass valve (10) on the side of the first power supply is continuously conducted and is in bidirectional through-flow, and the first power supply supplies power to a load;
step 2, when the effective value U1rms of the voltage of the first power supply side is lower than an alternating voltage sag constant value Uacset, quickly turning off a thyristor bypass valve (10) of the first power supply side, and continuously supplying power to a sensitive load by a load side voltage source converter VSC3 (19);
step 3, slowly adjusting a control target of the load side voltage source converter VSC3 (19) to enable the voltage amplitude and the phase of the control target to track the second power supply, and when the phase difference and the amplitude difference between the load side voltage source converter VSC3 (19) and the second power supply are within a certain range, supplying power to the load by the second power supply;
step 4, when the effective value U1rms of the voltage of the first power supply side is higher than the steady value Uacset of the alternating voltage, the thyristor bypass valve (11) of the second power supply side is rapidly turned off, after a fixed time delay delta t, the logic control and signal modulation system (26) sends out a turn-on signal of the thyristor bypass valve (10) of the first power supply side, and the first power supply provides power for a load;
wherein the step 4 further comprises:
step 41: deactivating the second group of signals S2, canceling the thyristor trigger pulse of the thyristor bypass valve (11) at the second power supply side, and preparing to isolate the second power supply;
step 42: outputting a fifth group of signals S5, starting a load side voltage source converter VSC3 (19), quickly turning off a second power source side thyristor bypass valve (11), and entering a step 43 after a fixed delay delta t;
step 43: adjusting the output of the load side voltage source converter VSC3 (19) to make the phase and amplitude of the output voltage stable, the phase and amplitude are consistent with those of the second power supply, continuously supplying power to the sensitive load by the load side voltage source converter VSC3 (19), and entering step 44 after a fixed delay delta t;
and step 44: adjusting the output of a load side voltage source converter VSC3 (19) to ensure that the phase and amplitude of the output voltage are stable and consistent with those of the first power supply;
step 45: when the phase difference and the amplitude difference between the load side voltage source converter VSC3 (19) and the first power supply are within a certain range, the logic control and signal modulation system (26) sends out a conducting signal of the first power supply side thyristor bypass valve (10), and simultaneously, the fifth group of signals S5 are cut off, so that the load side voltage source converter VSC3 (19) stops working, and the first power supply still provides power for the load.
2. The control method of the grid voltage restoration device according to claim 1, characterized in that: wherein the step 2 further comprises:
step 21, deactivating the first group of signals S1, canceling the thyristor trigger pulse of the thyristor bypass valve (10) at the first power supply side, and preparing to isolate the first power supply;
step 22, outputting a fifth group of signals S5, starting a load side voltage source converter VSC3 (19), quickly turning off a first power side thyristor bypass valve (10), and entering step 23 after a fixed time delay delta t;
and 23, adjusting the output of the load side voltage source converter VSC3 (19) to ensure that the phase and amplitude of the output voltage are stable and consistent with those of the first power supply, and continuously supplying power to the sensitive load by the load side voltage source converter VSC3 (19).
3. The control method of the grid voltage recovery apparatus according to claim 2, characterized in that: wherein the step 2 further comprises:
24, when the first power supply voltage is recovered, namely when the first power supply side voltage effective value U1rms is not lower than the AC voltage sag set value Uacset, directly jumping to the step 4;
and 25, when the first power supply side voltage effective value U1rms is lower than the alternating current voltage sag fixed value Uacset, the second power supply side voltage effective value U2rms is larger than the alternating current voltage sag fixed value Uacset, the direct current bus voltage Udc is reduced to be lower than a fixed value Udcset1, or the working time of the load side voltage source converter VSC3 (19) reaches a fixed value Tset, entering the step 3.
4. The control method of the grid voltage recovery apparatus according to claim 3, characterized in that: wherein step 3 further comprises:
step 31: slowly adjusting a control target of a load side voltage source converter VSC3 (19) to enable the voltage amplitude and the phase of the control target to track the second power supply;
step 32: when the phase difference and the amplitude difference between the load side voltage source converter VSC3 (19) and the second power supply are within a certain range, the logic control and signal modulation system (26) sends out a conduction signal of the thyristor bypass valve (11) on the second power supply side, and simultaneously, the fifth group of signals S5 are cut off, so that the load side voltage source converter VSC3 (19) stops working, and the second power supply supplies power to the load.
5. The control method of the grid voltage recovery device according to claim 4, characterized in that: wherein step 3 further comprises:
step 33: and the load is powered by the second power supply, and when the voltage of the first power supply is recovered, namely when the effective value U1rms of the voltage of the first power supply side is not lower than the AC voltage sag set value Uacset, the step 4 is carried out.
6. The control method of the grid voltage restoration device according to any one of claims 1 to 5, characterized by: when the direct current bus voltage Udc is lower than a charging fixed value Udcset2, comparing a first power supply side voltage effective value U1rms with a second power supply side voltage effective value U2rms; when the first power supply side voltage effective value U1rms is larger than or equal to the second power supply side voltage effective value U2rms, outputting a third group signal S3 and starting a first power supply side voltage source converter VSC1 (13); when the first power supply side voltage effective value U1rms is smaller than the second power supply side voltage effective value U2rms, a second power supply side voltage source converter VSC2 (15) is started to work; and when the direct current bus voltage Udc reaches a charging stopping fixed value Udcset3, stopping the third group of signals S3 or the fourth group of signals S4, and stopping the corresponding first power source side voltage source converter VSC1 (13) or second power source side voltage source converter VSC2 (15).
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US5734256A (en) * 1995-05-31 1998-03-31 General Electric Company Apparatus for protection of power-electronics in series compensating systems
CN102570590A (en) * 2012-01-05 2012-07-11 青岛经济技术开发区创统科技发展有限公司 Solid-state changeover switch
CN103904668A (en) * 2014-03-27 2014-07-02 广东电网公司电力科学研究院 Uniform power quality controller
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