CN114759566A

CN114759566A - Power grid voltage recovery device and control method thereof

Info

Publication number: CN114759566A
Application number: CN202210409615.4A
Authority: CN
Inventors: 陈伟; 渠学景; 张建绮; 丁小刚; 李建
Original assignee: Pushon Beijing Electric Co ltd
Current assignee: Pushon Beijing Electric Co ltd
Priority date: 2022-04-19
Filing date: 2022-04-19
Publication date: 2022-07-15
Anticipated expiration: 2042-04-19
Also published as: CN114759566B

Abstract

The invention relates to the field of intelligent power grids, in particular to a power grid voltage recovery device and a control method thereof. The voltage recovery device not only can realize voltage sag compensation of any drop depth, but also can solve the problem of long-time voltage interruption, and solves the problems of short power supply time or overlong switching transition time and the like of the traditional DVR and SSTS equipment.

Description

Power grid voltage recovery device and control method thereof

Technical Field

The invention belongs to the field of intelligent power grids, and particularly relates to a power grid voltage recovery device and a control method thereof.

Background

With the increasing precision of modern processing technology, especially the increasing sensitive loads of chip processing, automobile manufacturing, PLC control, precision instruments and the like, the hazard problems of voltage sag and interruption of the power grid become more and more prominent. Voltage sag and interruption can cause various problems of failure, outage, damage and the like of sensitive loads, and huge economic loss is brought to enterprises. According to the definition of institute of electrical and electronics engineers IEEE, voltage sag refers to a short-time voltage variation phenomenon in which the rms value of voltage is reduced to 0.1 to 0.9pu rated voltage under the power frequency condition, and the duration is 0.5 cycle (calculated by 50HZ in our country, 1 cycle is 20 ms) to 1 min. The voltage interruption means that the voltage drops to within 0.1pu rated voltage. For sensitive loads, the longer the voltage sag and interruption time, the greater the depth, and the more serious the damage to equipment.

In the prior art, the problems of system voltage sag and power supply interruption are generally solved through a Dynamic Voltage Restorer (DVR) and a solid-state two-way power supply change-over switch (SSTS), and the power supply reliability is improved, but certain problems and disadvantages exist.

A Dynamic Voltage Restorer (DVR) is connected in series between a power supply and a sensitive load, and when the system voltage is normal, the DVR bypasses; when the system voltage drops or is interrupted for a short time, the DVR cuts off the power supply at the speed of ms level and supplies power for the load by the self energy storage power supply, thus ensuring the continuity of the power supply of the load. The main defect is that the compensation time is short, even if a super capacitor is adopted, in a high-power application occasion, the power supply time is only hundreds of ms or s, the power supply time cannot be influenced by long-time temporary reduction or voltage interruption, if long-time power supply is needed, the super-capacity storage battery and a high-power heat dissipation system need to be matched, and the economic benefit is reduced linearly.

The solid-state double-circuit power supply change-over switch (SSTS) is composed of a thyristor valve group and a quick mechanical switch, and after voltage sag or interruption is detected, the SSTS quick switch and the valve body act according to set logic to realize the switching of two circuits of power supplies and relieve the problems of voltage sag and interruption to a certain extent. The SSTS has complex control logic and low switching speed, even if a quick mechanical switch is adopted, the response speed is difficult to be within 15ms, economic loss which is difficult to recover is generated for a plurality of sensitive loads in such a long switching time, in addition, the SSTS device has high requirements on two paths of power supplies, the two paths of power supplies are required to be mutually independent, the amplitude and the phase difference are required to be as small as possible, and a general power distribution network is difficult to obtain two paths of power supplies which simultaneously meet the harsh requirements. Subject to the above-described drawbacks and deficiencies, SSTS devices are currently being engineered for less use.

Therefore, in order to meet the development requirements of the smart grid, it is necessary to provide a voltage recovery device capable of ensuring the reliability of power supply and avoiding the influence of voltage sag and interruption on sensitive loads.

Disclosure of Invention

The invention provides a power grid voltage recovery device and a control method thereof, which can obtain a charging power supply from a main power supply or a standby power supply respectively through two groups of voltage source converters of the voltage recovery device when a power supply drops or is interrupted, and ensure that a direct current system can stably operate. The voltage recovery device not only can realize voltage sag compensation of any drop depth, but also can solve the problem of long-time voltage interruption, and solves the problems of short power supply time or overlong switching transition time and the like of the traditional DVR and SSTS equipment.

The technical problem to be solved by the invention is realized by adopting the following technical scheme:

a voltage recovery device of a power grid is a three-phase low-voltage device, adopts a first power supply and a second power supply to supply power, and adopts a three-phase sensitive load on the output side, wherein the three-phase sensitive load comprises a main loop and a control loop; the main loop comprises a first power supply side thyristor bypass valve (10), a second power supply side thyristor bypass valve (11), a first power supply side voltage source converter connecting reactor (12), a first power supply side voltage source converter (13), a second power supply side voltage source converter connecting reactor (14), a second power supply side voltage source converter (15), a direct current positive bus (16), a direct current negative bus (17), a direct current supporting capacitor (18), a load side voltage source converter (19) and a load side voltage source converter connecting reactor (20); the control loop comprises a multi-path alternating current/direct current voltage signal detection unit (21), an alternating current signal detection unit (22), a first state control switch K1 (23), a second state control switch K2 (24), a third state control switch K3 (25) and a logic control and signal modulation system (26).

Furthermore, the first power supply side is connected and then divided into two paths, one path is connected to the output side through a first power supply side thyristor bypass valve (10) and then connected to the three-phase sensitive load, and the other path is connected to the output side through a first power supply side voltage source converter connecting reactor (12), a first power supply side voltage source converter (13), a direct current positive bus (16), a direct current negative bus (17), a direct current supporting capacitor (18), a load side voltage source converter (19) and a load side voltage source converter connecting reactor (20) and then connected to the three-phase sensitive load; the second power supply side is also divided into two paths after being connected, one path is connected to the output side through a second power supply side thyristor bypass valve (11) and is connected to the three-phase sensitive load, and the other path is connected to the output side through a second power supply side voltage source converter connecting reactor (14), a second power supply side voltage source converter (15), a direct current negative bus (17), a direct current supporting capacitor (18), a load side voltage source converter (19) and a load side voltage source converter connecting reactor (20) and is connected to the three-phase sensitive load.

Further, the first power supply side thyristor bypass valve (10) comprises a first thyristor T11, a second thyristor T12, a third thyristor T13, a fourth thyristor T14, a fifth thyristor T15 and a sixth thyristor T16, wherein the first thyristor T11 and the second thyristor T12 are connected in parallel in a positive-negative reverse mode and then connected to the phase a of the first power supply, the third thyristor T13 and the fourth thyristor T14 are connected in parallel in a positive-negative reverse mode and then connected to the phase B of the first power supply, and the fifth thyristor T15 and the sixth thyristor T16 are connected in parallel in a positive-negative reverse mode and then connected to the phase C of the first power supply.

Further, the second power supply side thyristor bypass valve (11) comprises a seventh thyristor T21, an eighth thyristor T22, a ninth thyristor T23, a tenth thyristor T24, an eleventh thyristor T25 and a twelfth thyristor T26, wherein the seventh thyristor T21 and the eighth thyristor T22 are connected with the phase a of the second power supply in a forward and reverse and inverse parallel manner, the ninth thyristor T23 and the tenth thyristor T24 are connected with the phase B of the second power supply in a forward and reverse and inverse parallel manner, the eleventh thyristor T25 and the twelfth thyristor T26 are connected with the phase C of the second power supply in a forward and reverse and inverse parallel manner.

Further, the first power source side voltage source converter connection reactor (12) is composed of a first reactor La1, a second reactor Lb1, and a third reactor Lc 1.

Further, the first power supply side voltage source converter (13) is composed of six groups of turn-off devices connected in a three-phase bridge connection mode and diodes connected in inverse parallel with the turn-off devices, and comprises a first turn-off device V11, a second turn-off device V12, a third turn-off device V13, a fourth turn-off device V14, a fifth turn-off device V15 and a sixth turn-off device V16; the first turn-off device V11 and the fourth turn-off device V14 are connected in series, the third turn-off device V13 and the sixth turn-off device V16 are connected in series, the second turn-off device V12 and the fifth turn-off device V15 are connected in series, collectors of the first turn-off device V11, the third turn-off device V13 and the fifth turn-off device V15 are connected together, and emitters of the second turn-off device V12, the fourth turn-off device V14 and the sixth turn-off device V16 are connected together.

Further, the second power source side voltage source converter connection reactor (14) is composed of a fourth reactor La2, a fifth reactor Lb2, and a sixth reactor Lc 2.

Further, the second power source side voltage source converter (15) is composed of six groups of turn-off devices connected in a three-phase bridge connection manner and diodes connected in inverse parallel with the turn-off devices, and includes a seventh turn-off device V21, an eighth turn-off device V22, a ninth turn-off device V23, a tenth turn-off device V24, an eleventh turn-off device V25 and a twelfth turn-off device V26, wherein the seventh turn-off device V21 and the tenth turn-off device V24 are connected in series, the ninth turn-off device V23 and the twelfth turn-off device V26 are connected in series, the eighth turn-off device V22 and the eleventh turn-off device V25 are connected in series, collectors of the seventh turn-off device V21, the ninth turn-off device V23 and the eleventh turn-off device V25 are connected together, and emitters of the eighth turn-off device V22, the tenth turn-off device V24 and the twelfth turn-off device V26 are connected together.

Further, the load side voltage source converter (19) is composed of six groups of turn-off devices connected in a three-phase bridge connection manner and diodes connected in inverse parallel with the turn-off devices, and comprises a thirteenth turn-off device V31, a fourteenth turn-off device V32, a fifteenth turn-off device V33, a sixteenth turn-off device V34, a seventeenth turn-off device V35 and an eighteenth turn-off device V36; wherein, the thirteenth turn-off device V31 and the sixteenth turn-off device V34 are connected in series, the fifteenth turn-off device V33 and the eighteenth turn-off device V36 are connected in series, the seventeenth turn-off device V35 and the fourteenth turn-off device V32 are connected in series, collectors of the thirteenth turn-off device V31, the fifteenth turn-off device V33 and the seventeenth turn-off device V35 are connected together, and emitters of the sixteenth turn-off device V34, the eighteenth turn-off device V36 and the fourteenth turn-off device V32 are connected together.

Further, the load side three-phase bridge voltage source converter connecting reactor (20) is composed of a seventh reactor La3, an eighth reactor Lb3 and a ninth reactor Lc 3.

Further, the input signals of the multi-path alternating current and direct current voltage signal detection unit (21) are first power supply side voltages Ua1, Ub1 and Uc1, second power supply side voltages Ua2, Ub2 and Uc2 and direct current voltages Udc, the output signals are first power supply side voltage effective values U1rms and a phase theta 1, second power supply side voltage effective values U2rms and a phase theta 2, and the output signals are connected to a logic control and signal modulation system (26); the input signal of the alternating current signal detection unit (22) is load side three-phase currents Ia, Ib and Ic, the output signal is a load side current effective value Irms, and the output signal is connected to the logic control and signal modulation system (26); a first state control switch K1 (23), a second state control switch K2 (24) and a third state control switch K3 (25) are connected to a logic control and signal modulation system (26); the 1 st group signal S1 output by the logic control and signal modulation system (26) is used as a trigger signal of a first power supply thyristor bypass valve (10), the 2 nd group signal S2 is used as a trigger signal of a second power supply thyristor bypass valve (11), the 3 rd group signal S3 is used as a trigger signal of a first power supply side voltage source converter (13), the 4 th group signal S4 is used as a trigger signal of a second power supply side voltage source converter (15), and the 5 th group signal S5 is used as a trigger signal of a load side voltage source converter (19).

The three-phase.

Furthermore, the first circuit breaker, the second circuit breaker, the third circuit breaker, the fourth circuit breaker and the fifth circuit breaker are mechanical bypass or maintenance switches, and the device is withdrawn and electrically isolated when the inside of the device is abnormal or maintained.

A method of controlling a grid voltage recovery device, comprising: step 1, when a first power supply is normal, a first group of signals S1 output by a logic control and signal modulation system (26) are effective, a thyristor bypass valve (10) on the side of the first power supply is continuously conducted and has through current in two directions, and the first power supply supplies power to a load; step 2, when the effective value U1rms of the first power supply voltage is lower than an alternating current voltage sag value Uacset, quickly turning off a thyristor bypass valve (10) on the first power supply side, and continuously supplying power for a sensitive load by a load side voltage source converter VSC3 (19); step 3, slowly adjusting a control target of the load side voltage source converter VSC3 (19) to enable the voltage amplitude and the phase of the control target to track the second power supply, and when the phase difference and the amplitude difference between the load side voltage source converter VSC3 (19) and the second power supply are within a certain range, supplying power to the load by the second power supply; step 4, when the effective value U1rms of the first power supply voltage is higher than the AC voltage sag constant value Uacset, the thyristor bypass valve (11) on the second power supply side is rapidly turned off and is subjected to fixed time delay

Thereafter, the logic control and signal modulation system asserts the thyristor bypass valve (10) of the first power supplyAnd the first power supply provides power for the load.

Further, step 2 further comprises: step 21, deactivating the first group signal S1, cancelling a thyristor trigger pulse of the first power supply side thyristor bypass valve (10), and preparing to isolate the first power supply; step 22, outputting a fifth group signal S5, starting the load side voltage source converter VSC3 (19), firstly executing a 1 st control strategy to quickly turn off the first power source side thyristor bypass valve (10), and after a fixed time delay

Then, the step 23 is carried out; and step 23, adjusting the output of the load side voltage source converter VSC3 (19) to stabilize the phase and amplitude of the output voltage, wherein the phase and amplitude are consistent with those of the first power supply, and the load side voltage source converter VSC3 (19) continuously supplies power to the sensitive load.

Further, step 2 further comprises: 24, when the voltage of the first power supply is recovered, namely when the effective value U1rms of the first power supply voltage is not lower than the AC voltage sag set value Uacset, directly jumping to the step 4; and step 25, when the first power supply voltage effective value U1rms is lower than the alternating current voltage sag constant value Uacset and the second power supply voltage effective value U2rms is larger than the alternating current voltage sag constant value Uacset, reducing the direct current voltage Udc to be below a constant value Udcset1, or enabling the working time of the load side voltage source converter VSC3 (19) to reach a constant value Tset, and entering the step 3.

Further, step 3 further comprises: step 31: slowly adjusting a control target of a load side voltage source converter VSC3 (19) to enable the voltage amplitude and the phase of the control target to track the second power supply; step 32: when the phase difference and amplitude difference between the load side voltage source converter VSC3 (19) and the second power supply are within a certain range, the logic control and signal modulation system sends out a conduction signal of the thyristor bypass valve (11) on the second power supply side, and simultaneously, the fifth group of signals S5 are cut off, so that the load side voltage source converter VSC3 (19) stops working, and the second power supply supplies power to the load.

Further, step 3 further includes: step 33: the load is powered by the second power supply and when the first power supply voltage is restored, i.e. when the first power supply voltage effective value U1rms is not lower than the ac voltage sag set value Uacset, step 4 is entered.

Further, step 4 further includes: step 41: deactivating the second group signal S2, deactivating the thyristor trigger pulse of the first supply side thyristor bypass valve (10), in preparation for isolating the second supply; step 42: outputting a fifth group signal S5, starting a load side voltage source converter VSC3 (19), firstly executing a 1 st control strategy to quickly turn off a second power source side thyristor bypass valve (11), and after a fixed time delay

Then step 43 is entered; step 43: the output of the load side voltage source converter VSC3 (19) is adjusted to ensure that the phase and amplitude of the output voltage are stable and consistent with those of the power supply 2, the load side voltage source converter VSC3 (19) continuously supplies power for the sensitive load, and the sensitive load is subjected to fixed time delay

Then step 44 is entered; and step 44: adjusting the output of a load side voltage source converter VSC3 (19) to stabilize the phase and amplitude of the output voltage, wherein the phase and amplitude are consistent with those of the first power supply; step 45: when the phase difference between the load side voltage source converter VSC3 (19) and the phase difference and the amplitude difference between the load side voltage source converter VSC3 and the first power supply are within a certain range, the logic control and signal modulation system sends out a first power supply thyristor bypass valve (10) conduction signal, and simultaneously, a fifth group of signals S5 are cut off, so that the load side voltage source converter VSC3 (19) stops working, and the first power supply still supplies power to the load.

Further, when the direct current bus voltage Udc is lower than a charging fixed value Udcset2, comparing a first power supply side voltage effective value U1rms with a second power supply side voltage effective value U2 rms; when the first power supply side voltage effective value U1rms is larger than or equal to the second power supply side voltage effective value U2rms, outputting a third group signal S3 and starting a first power supply side voltage source converter VSC1 (13); when the first power supply side voltage effective value U1rms is smaller than the second power supply side voltage effective value U2rms, a second power supply side voltage source converter VSC2 (15) is started to work; when the direct current bus voltage Udc reaches the charging stop constant value Udcset3, the third group signal S3 or the fourth group signal S4 is stopped, so that the corresponding first power source side voltage source converter VSC1 (13) or second power source side voltage source converter VSC2 (15) stops working.

Compared with the prior art, the invention has the advantages that:

1. the invention not only can realize the voltage sag compensation of any drop depth, but also can solve the problem of long-time voltage interruption, and solves the problems of short power supply time or overlong switching transition time and the like of the traditional DVR and SSTS equipment.

2. When the power supply falls or is interrupted, the device obtains the charging power supply from the main power supply or the standby power supply respectively through the two groups of voltage source converters, so that the stability of a direct current system is ensured, the device does not need a large-capacity energy storage device, a direct current link can work only by a small-capacity supporting capacitor, and the size, the weight and the cost of the device are reduced.

3. The three groups of voltage source converters do not need to continuously operate for a long time under the working condition, wherein the first voltage source converter and the second voltage source converter on the power supply side only work for a short time in the charging period of the direct-current support capacitor, the voltage source converter on the load side only works for a short time in the voltage sag period of the main power supply or the switching period of the double-circuit power supply, the through-current time is short, the heat productivity is small, and the capacity and the cost of a cooling system can be reduced.

4. The invention adopts a rapid switching strategy, and the thyristor bypass valve is rapidly and forcibly turned off, so that the load is supplied with power by the load side voltage source converter while the fault power supply is rapidly isolated, the response speed is high, the power failure time is short, and the influence of voltage sag and interruption on sensitive loads is avoided.

5. The invention detects the amplitude and the phase of the first power supply and the second power supply in real time, ensures that the phase sequence and the phase are approximately consistent when the load side voltage source converter is switched to supply power with the first power supply and the second power supply, does not generate switching impact, and reduces the influence of power supply switching on sensitive loads.

6. The transition strategy of the load side voltage source converter reduces the requirement of the two power sources, the device has no requirement on the voltage amplitude difference, the frequency difference, the phase sequence difference and the phase difference of the two power sources, and the engineering implementation difficulty is reduced.

Drawings

FIG. 1 is an electrical main wiring diagram of the present invention;

FIG. 2 is a signal wiring diagram of the control system of the present invention;

FIG. 3 is a schematic workflow diagram of a preferred embodiment of the present invention;

fig. 4 is a schematic diagram of the operation flow of the first power-supply-side voltage source converter and the second power-supply-side voltage source converter.

Detailed Description

The invention is described in further detail below with reference to the accompanying drawings:

as shown in fig. 1 and 2:

the invention discloses a power grid voltage recovery device which is a three-phase low-voltage device, adopts a first power supply and a second power supply dual-path power supply to supply power, adopts a three-phase sensitive load on an output side, and comprises a main loop and a control loop.

The main loop comprises a first power supply side thyristor bypass valve (10), a second power supply side thyristor bypass valve (11), a first power supply side voltage source converter connecting reactor (12), a first power supply side voltage source converter (13), a second power supply side voltage source converter connecting reactor (14), a second power supply side voltage source converter (15), a direct current positive bus (16), a direct current negative bus (17), a direct current supporting capacitor (18), a load side voltage source converter (19) and a load side voltage source converter connecting reactor (20).

The control loop comprises a multi-path alternating current and direct current voltage signal detection unit (21), an alternating current signal detection unit (22), a first state control switch K1 (23), a second state control switch K2 (24), a third state control switch K3 (25) and a logic control and signal modulation system (26).

In one embodiment, the first power source side thyristor bypass valve (10) includes a first thyristor T11, a second thyristor T12, a third thyristor T13, a fourth thyristor T14, a fifth thyristor T15, and a sixth thyristor T16, wherein the first thyristor T11 and the second thyristor T12 are connected in parallel in the forward and reverse direction and then connected to the phase a of the first power source, the third thyristor T13 and the fourth thyristor T14 are connected in parallel in the forward and reverse direction and then connected to the phase B of the first power source, and the fifth thyristor T15 and the sixth thyristor T16 are connected in parallel in the forward and reverse direction and then connected to the phase C of the first power source.

In one embodiment, the second power supply side thyristor bypass valve (11) includes a seventh thyristor T21, an eighth thyristor T22, a ninth thyristor T23, a tenth thyristor T24, an eleventh thyristor T25, and a twelfth thyristor T26, wherein the seventh thyristor T21 and the eighth thyristor T22 are connected in parallel in the forward and reverse directions and are connected to the phase a of the second power supply, the ninth thyristor T23 and the tenth thyristor T24 are connected in parallel in the forward and reverse directions and are connected to the phase B of the second power supply, and the eleventh thyristor T25 and the twelfth thyristor T26 are connected in parallel in the forward and reverse directions and are connected to the phase C of the second power supply.

In one embodiment, the first power source side voltage source converter connection reactor (12) is composed of a first reactor La1, a second reactor Lb1, and a third reactor Lc 1.

In one embodiment, the first source side voltage source converter (13) is composed of six groups of turn-off capable devices connected in a three-phase bridge connection manner and diodes connected in inverse parallel therewith, and comprises a first turn-off capable device V11, a second turn-off capable device V12, a third turn-off capable device V13, a fourth turn-off capable device V14, a fifth turn-off capable device V15 and a sixth turn-off capable device V16; the first turn-off device V11 and the fourth turn-off device V14 are connected in series, the third turn-off device V13 and the sixth turn-off device V16 are connected in series, the second turn-off device V12 and the fifth turn-off device V15 are connected in series, the collectors of the three devices, namely the first turn-off device V11, the third turn-off device V13 and the fifth turn-off device V15, are connected together, and the emitters of the three devices, namely the second turn-off device V12, the fourth turn-off device V14 and the sixth turn-off device V16, are connected together.

In one embodiment, the second power supply side voltage source converter connection reactor (14) is composed of a fourth reactor La2, a fifth reactor Lb2, and a sixth reactor Lc 2.

In one embodiment, the second source side voltage source converter VSC2 (15) is formed by six groups of turn-off devices connected in a three-phase bridge connection and diodes connected in anti-parallel therewith, including a seventh turn-off device V21, an eighth turn-off device V22, a ninth turn-off device V23, a tenth turn-off device V24, an eleventh turn-off device V25, a twelfth turn-off device V26,; wherein, the seventh turn-off device V21 and the tenth turn-off device V24 are connected in series, the ninth turn-off device V23 and the twelfth turn-off device V26 are connected in series, the eighth turn-off device V22 and the eleventh turn-off device V25 are connected in series, collectors of the seventh turn-off device V21, the ninth turn-off device V23 and the eleventh turn-off device V25 are connected together, and emitters of the eighth turn-off device V22, the tenth turn-off device V24 and the twelfth turn-off device V26 are connected together.

In one embodiment, the load side voltage source converter VSC3 (19) is formed by six groups of turn-off devices connected in a three-phase bridge connection and diodes connected in anti-parallel therewith, including a thirteenth turn-off device V31, a fourteenth turn-off device V32, a fifteenth turn-off device V33, a sixteenth turn-off device V34, a seventeenth turn-off device V35, an eighteenth turn-off device V36; wherein, the thirteenth turn-off device V31 and the sixteenth turn-off device V34 are connected in series, the fifteenth turn-off device V33 and the eighteenth turn-off device V36 are connected in series, the seventeenth turn-off device V35 and the fourteenth turn-off device V32 are connected in series, collectors of the thirteenth turn-off device V31, the fifteenth turn-off device V33 and the seventeenth turn-off device V35 are connected together, and emitters of the sixteenth turn-off device V34, the eighteenth turn-off device V36 and the fourteenth turn-off device V32 are connected together.

In one embodiment, the load side three-phase bridge voltage source converter connection reactor (20) is composed of a seventh reactor La3, an eighth reactor Lb3, and a ninth reactor Lc 3.

In one embodiment, the multi-path alternating current and direct current voltage signal detection unit (21) inputs signals of a first power supply side voltage Ua1, Ub1, Uc1, a second power supply side voltage Ua2, Ub2, Uc2 and a direct current voltage Udc, outputs signals of a first power supply side voltage effective value U1rms and a phase theta 1, a second power supply side voltage effective value U2rms and a phase theta 2 and a direct current voltage Udc, and outputs signals connected to a logic control and signal modulation system (26); the input signal of the alternating current signal detection unit (22) is load side three-phase currents Ia, Ib and Ic, the output signal is a load side current effective value Irms, and the output signal is connected to the logic control and signal modulation system (26); a first state control switch K1 (23), a second state control switch K2 (24) and a third state control switch K3 (25) are connected to a logic control and signal modulation system (26); the 1 st group signal S1 output by the logic control and signal modulation system (26) is used as a trigger signal of a first power thyristor bypass valve (10), the 2 nd group signal S2 is used as a trigger signal of a second power thyristor bypass valve (11), the 3 rd group signal S3 is used as a trigger signal of a first power source side voltage source converter VSC1 (13), the 4 th group signal S4 is used as a trigger signal of a second power source side voltage source converter VSC2 (15), and the 5 th group signal S5 is used as a trigger signal of a load side voltage source converter VSC3 (19).

In one embodiment, the grid voltage recovery device disclosed by the invention further comprises a first circuit breaker connected in series to the first power supply line inlet side, a second circuit breaker connected in series to the second power supply line inlet side, a third circuit breaker connected in series to the compensation line outlet side, a fourth circuit breaker, a fifth circuit breaker, a third circuit breaker and a fourth circuit breaker, wherein two ends of the fourth circuit breaker are bridged between the first power supply line inlet side and the load line outlet side, and two ends of the fifth circuit breaker are bridged between the second power supply line inlet side and the load line outlet side.

In a preferred embodiment, the first circuit breaker, the second circuit breaker, the third circuit breaker, the fourth circuit breaker and the fifth circuit breaker are mechanical bypass or maintenance switches, and the device is withdrawn and electrically isolated when the inside of the device is abnormal or maintained.

As shown in fig. 1, a phase a, a phase B, and a phase C of the first power supply are connected to a first power supply side phase a connection terminal (1), a first power supply side phase B connection terminal (2), and a first power supply side phase C connection terminal (3), respectively, and voltages at the connection terminals are Ua1, Ub1, and Uc1, respectively. The phase A, the phase B and the phase C of the second power supply are respectively connected with a second power supply side phase A connecting terminal (4), a second power supply side phase B connecting terminal (5) and a second power supply side phase C connecting terminal (6) of the device, and the voltages at the connecting terminals are Ua2, Ub2 and Uc2 respectively. The A phase, the B phase and the C phase of the load are respectively connected with a device load side A phase connection terminal (7), a load side B phase connection terminal (8) and a load side C phase connection terminal (9), and the voltages at the connection terminals are Ua3, Ub3 and Uc 3.

An anode of a first thyristor T11 of the first power supply side thyristor bypass valve 10 is connected to a first power supply side phase A connection terminal 1, an anode of a third thyristor T13 is connected to a first power supply side phase B connection terminal 2, an anode of a fifth thyristor T15 is connected to a first power supply side phase C connection terminal 3, a cathode of the first thyristor T11 is connected to a load side phase A connection terminal 7, a cathode of the third thyristor T13 is connected to a load side phase B connection terminal 8, and a cathode of the fifth thyristor T15 is connected to a load side phase C connection terminal 9.

The anode of a seventh thyristor T21 of the second power supply side thyristor bypass valve (11) is connected to the second power supply side A phase connection terminal (4), the anode of a ninth thyristor T23 is connected to the second power supply side B phase connection terminal (5), the anode of an eleventh thyristor T25 is connected to the second power supply side C phase connection terminal (6), the cathode of the seventh thyristor T21 is connected to the load side A phase connection terminal (7), the cathode of the ninth thyristor T23 is connected to the load side B phase connection terminal (8), and the cathode of the eleventh thyristor T25 is connected to the load side C phase connection terminal (9).

A first reactor La1 "+" side terminal of the first power source side voltage source converter connecting reactor (12) is connected to the first power source side a phase connection terminal (1), the other side is connected to the electrical node Ua4 of the first power source side voltage source converter VSC1 (13), a second reactor Lb1 "+" side terminal of the first power source side voltage source converter connecting reactor (12) is connected to the first power source side B phase connection terminal (2), the other side is connected to the electrical node Ub4 of the first power source side voltage source converter VSC1 (13), a third reactor Lc1 "+" side terminal of the first power source side voltage source converter connecting reactor (12) is connected to the first power source side C phase connection terminal (3), and the other side is connected to the electrical node Uc4 of the first power source side voltage source converter VSC1 (13).

The electrical nodes Ua4, Ub4 and Uc4 of the first source side voltage source converter VSC1 (13) are connected to the first reactor La1, the second reactor Lb1 and the third reactor Lc1 in the first source side voltage source converter connecting reactor (12), respectively, and the common collector electrical node is connected to the dc positive bus B + (16) and the common emitter electrical node is connected to the dc negative bus B- (17).

A fourth reactor La2 "@" side terminal of the second source-side voltage source converter connecting reactor (14) is connected to the second source-side a-phase connection terminal (4), the other side is connected to an electrical node Ua5 of the second source-side voltage source converter VSC2 (15), a fifth reactor Lb2 "@" side terminal of the second source-side voltage source converter connecting reactor (14) is connected to the second source-side B-phase connection terminal (5), the other side is connected to an electrical node Ub5 of the second source-side voltage source converter VSC2 (15), a sixth reactor Lc2 "@" side terminal of the second source-side voltage source converter connecting reactor (14) is connected to the second source-side C-phase connection terminal (6), and the other side is connected to an electrical node Uc5 of the second source-side voltage source converter VSC2 (15).

The electrical nodes Ua5, Ub5 and Uc5 of the second source side voltage source converter VSC2 (15) are connected to the fourth reactor La2, the fifth reactor Lb2 and the sixth reactor Lc2 in the second source side voltage source converter connecting reactor (14), respectively, and the common collector electrical node is connected to the dc positive bus B + (16) and the common emitter electrical node is connected to the dc negative bus B- (17).

A seventh reactor La3 "@" side terminal of the load-side voltage source converter connecting reactor (20) is connected to the load-side a-phase connection terminal (7), the other side is connected to an electrical node Ua6 of the load-side voltage source converter VSC3 (19), an eighth reactor Lb3 "@" side terminal of the load-side voltage source converter connecting reactor (20) is connected to the load-side B-phase connection terminal (8), the other side is connected to an electrical node Ub6 of the load-side voltage source converter VSC3 (19), a ninth reactor Lc3 "@" side terminal of the load-side voltage source converter connecting reactor (20) is connected to the load-side C-phase connection terminal (9), and the other side is connected to an electrical node Uc6 of the load-side voltage source converter VSC3 (19).

The electrical nodes Ua6, Ub6 and Uc6 of the load-side voltage source converter VSC3 (19) are connected to a seventh reactor La3, an eighth reactor Lb3 and a ninth reactor Lc3 of the load-side voltage source converter connection reactor (20), respectively, and the common collector electrical node is connected to the dc positive bus B + (16) and the common emitter electrical node is connected to the dc negative bus B- (17).

The direct current support capacitor C (18) is respectively connected with the direct current positive pole bus B + (16) and the direct current negative pole bus B- (17), corresponding electric connection terminals are respectively marked as '+' and '-', and the voltage at two ends of the direct current support capacitor C is Udc.

As shown in fig. 2, the input signals of the multi-path alternating current/direct current voltage signal detection unit (21) are first power supply side voltages Ua1, Ub1 and Uc1, second power supply side voltages Ua2, Ub2 and Uc2 and direct current voltage Udc, the output signals are a first power supply side voltage effective value U1rms and a phase theta 1, a second power supply side voltage effective value U2rms and a phase theta 2, and the direct current voltage Udc is connected to a logic control and signal modulation system (26); the input signal of the alternating current signal detection unit (22) is load side three-phase currents Ia, Ib and Ic, the output signal is a load side current effective value Irms, and the output signal is connected to the logic control and signal modulation system (26); a first state control switch K1 (23), a second state control switch K2 (24) and a third state control switch K3 (25) are connected to a logic control and signal modulation system (26); the 1 st group signal S1 output by the logic control and signal modulation system (26) is used as a trigger signal of a first power thyristor bypass valve (10), the 2 nd group signal S2 is used as a trigger signal of a second power thyristor bypass valve (11), the 3 rd group signal S3 is used as a trigger signal of a first power source side voltage source converter VSC1 (13), the 4 th group signal S4 is used as a trigger signal of a second power source side voltage source converter VSC2 (15), and the 5 th group signal S5 is used as a trigger signal of a load side voltage source converter (19).

The input signals of the multi-path alternating current and direct current voltage signal detection unit (21) are first power supply side voltages Ua1, Ub1 and Uc1, second power supply side voltages Ua2, Ub2 and Uc2 and direct current voltages Udc, and the output signals are a first power supply side voltage effective value U1rms and a phase theta 1, a second power supply side voltage effective value U2rms and a phase theta 2 and direct current voltages Udc. The output signals are all connected to a logic control and signal modulation system (26).

The alternating current signal detection unit (22) inputs signals of load side three-phase currents Ia, Ib and Ic, outputs a signal load side current effective value Irms, and outputs a signal to be connected to a logic control and signal modulation system (26).

The first state control switch K1 (23) of the 'input power supply 1', the second state control switch K2 (24) of the 'input compensation' and the third state control switch K3 (25) of the 'exit compensation' are all connected to a logic control and signal modulation system (26).

The 1 st group signal S1 output by the logic control and signal modulation system (26) is used as a trigger signal of a first power thyristor bypass valve (10), the 2 nd group signal S2 is used as a trigger signal of a second power thyristor bypass valve (11), the 3 rd group signal S3 is used as a trigger signal of a first power source side voltage source converter VSC1 (13), the 4 th group signal S4 is used as a trigger signal of a second power source side voltage source converter VSC2 (15), and the 5 th group signal S5 is used as a trigger signal of a load side voltage source converter VSC3 (19).

The working principle of the voltage recovery device is as follows: when the first breaker QF1, the first breaker QF2, the third breaker QF3 and the fifth breaker QF5 are disconnected, and the fourth breaker QF4 is closed, the device enters an overhauling and isolating state, and a first power supply supplies power to a load; when the first breaker QF1, the second breaker QF2, the third breaker QF3 and the fourth breaker QF4 are disconnected and the fifth breaker QF5 is closed, the device enters an overhauling and isolating state and a second power supply supplies power to a load; when the first breaker QF1, the second breaker QF2 and the third breaker QF3 are closed, the fourth breaker QF4 and the fifth breaker QF5 are opened, the device can be withdrawn from maintenance and isolation and enter a working state.

When the first control switch K1 (23) is turned off, the "power on 1" state is invalid, and at this time, the five sets of control signals S1, S2, S3, S4, and S5 output by the logic control and signal modulation system (26) are all invalid regardless of the state of the second control switch K2 (24). The device stops the voltage sag and voltage interruption compensation functions and stops the power supply to the sensitive load.

When the first control switch K1 (23) is closed and the second control switch K2 (24) is opened, the 'throw power supply 1' state is effective, the 'throw compensation' state is ineffective, the first group of signals S1 output by the logic control and signal modulation system (26) are effective, the first power supply side thyristor bypass valve (10) is conducted, the sensitive load is powered by the first power supply, but the device stops the voltage sag and interruption compensation function, and the other four groups of control signals S2, S3, S4 and S5 output by the logic control and signal modulation system (26) are all ineffective.

When the first control switch K1 (23) and the second control switch K2 (24) are closed simultaneously, the 'on power supply 1' state is effective, the 'on compensation' state is effective, the logic control and signal modulation system (26) works according to a given logic and strategy, corresponding five groups of control signals S1, S2, S3, S4 and S5 are output, the sensitive load is supplied with power by the first power supply, and the device is used for voltage sag and voltage interruption compensation functions.

In order to avoid the parallel operation of the first power supply and the second power supply, the 1 st group of control signals S1 and the 2 nd group of control signals S2 output by the logic control and signal modulation system (26) are subjected to interlocking logic control, namely the 1 st group of control signals S1 and the 2 nd group of control signals S2 cannot be simultaneously effective; in order to avoid the parallel operation of the first source side voltage source converter VSC1 (13) and the second source side voltage source converter VSC2 (15), the 3 rd group control signal S3 and the 4 th group control signal S4 output by the logic control and signal modulation system (26) are subjected to interlocking control, namely the 3 rd group control signal S3 and the 4 th group control signal S4 cannot be simultaneously effective.

The 1 st group of control signals S1 and the 2 nd group of control signals S2 output by the logic control and signal modulation system (26) are on-off signals, the high level corresponds to the conduction of the thyristor, and the low level corresponds to the turn-off of the thyristor; the 3 rd group of control signals S3, the 4 th group of control signals S4 and the 5 th group of control signals S5 output by the logic control and signal modulation system (26) adopt PWM modulation waves. Preferably, an SVPWM modulated wave is recommended.

A first power supply side voltage source converter VSC1 (13) adopts a dq decoupling control method, the control target of an outer ring d axis is direct-current bus voltage Udc, and the control target of an outer ring q axis is reactive current (or power) 0. The first source side voltage source converter VSC1 (13) functions as a synchronous rectifier, converts the ac current of the first source into a dc charging current, charges the support capacitor C (18), and brings the dc bus voltage Udc to a target value, while the power factor is approximately 1, minimizing reactive power requirements.

Similarly, a dq decoupling control method is adopted by a second power supply side voltage source converter VSC2 (15), the control target of an outer ring d axis is a direct-current bus voltage Udc, and the control target of an outer ring q axis is reactive current (or power) 0. The second source side voltage source converter VSC2 (15) also functions as a synchronous rectifier, converts the alternating current of the second source into a direct current charging current, charges the support capacitor C (18), and brings the direct current bus voltage Udc to a target value, while the power factor is approximately 1, minimizing reactive power requirements.

The control strategy for the load side voltage source converter VSC3 (19) includes two, the first control strategy being to rapidly switch off the currently operating first (10) or second (11) source side thyristor bypass valve. Preferably, rectangular waves are output, when the corresponding phase load current is in a positive direction, the corresponding phase upper tube of the load side voltage source converter VSC3 (19) is conducted, and when the corresponding phase load current is in a negative direction, the corresponding phase lower tube of the load side voltage source converter VSC3 (19) is conducted, so that the thyristor bears back voltage and is rapidly turned off; the second control strategy is to adopt a dq decoupling control method, the outer ring d axis control target is that the d axis component Ud of the alternating-current bus voltage reaches a target value, the outer ring q axis control target is that the q axis component of the alternating-current bus voltage is 0, and the phase angle theta of coordinate transformation and the voltage Ud target value can be kept consistent with the first power supply or the second power supply in different working stages. The load side voltage source converter VSC3 (19) is used as an inverter, outputs three-phase alternating current voltage with controllable voltage amplitude and frequency, and continuously supplies power for sensitive loads.

The first power source side thyristor bypass valve (10), the second power source side thyristor bypass valve (11), and the load side voltage source converter VSC3 (19) operate in accordance with the following procedure.

Preparation: a first power supply three-phase connecting terminal of the device is respectively connected to an A phase, a B phase and a C phase of a first power supply, and voltage signals Ua1, Ub1 and Uc1 of the device are connected to a multi-path alternating current-direct current voltage signal detection unit 21 for processing and then output a voltage effective value U1rms of the first power supply and a phase angle theta 1 of the first power supply; a second power supply three-phase connecting terminal of the device is respectively connected to an A phase, a B phase and a C phase of a second power supply, and voltage signals Ua2, Ub2 and Uc2 of the device are connected to a multi-path alternating current and direct current voltage signal detection unit (21) for processing and then output a voltage effective value U2rms of the second power supply and a phase angle theta 2 of the voltage effective value; a phase A, a phase B and a phase C of the sensitive load are respectively connected with a three-phase output terminal of the device, and current signals Ia, Ib and Ic of the sensitive load are connected into an alternating current signal detection unit (22) to be processed so as to output a load effective value Irms. The first breaker QF1, the second breaker QF2 and the third breaker QF3 are closed, the fourth breaker QF4 and the fifth breaker QF5 are opened, and the device is out of the maintenance isolation state. Closing the first state control switch K1 (23), the second state control switch K2 (24), opening the third state control switch K3 (25), starting the equipment and putting into compensation.

The control method preferably applied to the voltage recovery apparatus as shown in fig. 3 includes the steps of:

step 1, when a first power supply is normal, a first group of signals S1 output by a logic control and signal modulation system (26) are effective, a thyristor bypass valve (10) on the side of the first power supply is continuously conducted and is in bidirectional through-flow, and the first power supply supplies power to a load; step 2, when the effective value U1rms of the first power supply voltage is lower than an alternating current voltage sag constant value Uacset, quickly turning off a thyristor bypass valve (10) on the first power supply side, and continuously supplying power to a sensitive load by a load side voltage source converter VSC3 (19); step 3, slowly adjusting a control target of the load side voltage source converter VSC3 (19) to enable the voltage amplitude and the phase of the control target to track the second power supply, and when the phase difference and the amplitude difference between the load side voltage source converter VSC3 (19) and the second power supply are within a certain range, supplying power to the load by the second power supply; step 4, when the effective value U1rms of the first power supply voltage is higher than the AC voltage sag constant value Uacset, the thyristor bypass valve (11) on the second power supply side is rapidly turned off and is subjected to fixed time delay

The logic control and signal modulation system (26) then signals the conduction of the thyristor bypass valve (10) of the first power supply, which provides power to the load.

In one embodiment, wherein step 2 further comprises: step 21, deactivating the first group signal S1, cancelling a thyristor trigger pulse of the first power supply side thyristor bypass valve (10), and preparing to isolate the first power supply; step 22, outputting a fifth group signal S5, starting the load side voltage source converter VSC3 (19), firstly executing a 1 st control strategy to quickly turn off the first power source side thyristor bypass valve (10), and after a fixed time delay

In one embodiment, step 2 further comprises: 24, when the voltage of the first power supply is recovered, namely when the effective value U1rms of the first power supply voltage is not lower than the AC voltage sag set value Uacset, directly jumping to the step 4; and 25, when the first power supply voltage effective value U1rms is lower than the alternating current voltage sag fixed value Uacset and the second power supply voltage effective value U2rms is larger than the alternating current voltage sag fixed value Uacset, reducing the direct current voltage Udc to be below a fixed value Udcset1 or enabling the working time of the load side voltage source converter VSC3 (19) to reach a fixed value Tset, and entering the step 3.

In one embodiment, step 3 further comprises: step 31: slowly adjusting a control target of a load side voltage source converter VSC3 (19) to enable the voltage amplitude and the phase of the control target to track the second power supply; step 32: when the phase difference and the amplitude difference between the load side voltage source converter VSC3 (19) and the second power supply are within a certain range, the logic control and signal modulation system (26) sends out a conduction signal of the thyristor bypass valve (11) at the second power supply side, and simultaneously, the fifth group of signals S5 are cut off, so that the load side voltage source converter VSC3 (19) stops working, and the second power supply supplies power to the load.

In one embodiment, step 3 further comprises: step 33: the load is powered by the second power supply and when the first power supply voltage is restored, i.e. when the first power supply voltage effective value U1rms is not lower than the ac voltage sag set value Uacset, step 4 is entered.

In one embodiment, step 4 further comprises: step 41: deactivating the second group signal S2, deactivating the thyristor trigger pulse of the first supply side thyristor bypass valve (10), in preparation for isolating the second supply; step 42: outputting a fifth group signal S5, starting a load side voltage source converter VSC3 (19), firstly executing a 1 st control strategy to rapidly turn off a second power source side thyristor bypass valve (11) By a fixed time delay

Then step 44 is entered; step 44: adjusting the output of a load side voltage source converter VSC3 (19) to make the phase and amplitude of the output voltage stable and consistent with those of the first power supply; step 45: when the phase difference between the load side voltage source converter VSC3 (19) and the phase difference and the amplitude difference between the load side voltage source converter VSC3 and the first power supply are within a certain range, the logic control and signal modulation system (26) sends out a conducting signal of the thyristor bypass valve (10) of the first power supply, and simultaneously, the fifth group of signals S5 are cut off, so that the load side voltage source converter VSC3 (19) stops working, and the first power supply still provides power for the load.

Through the preferred embodiment, the amplitude and the phase of the three-phase voltage of the main power supply, the standby power supply and the load side can be detected in real time, the phase sequence difference and the phase difference of the load side voltage source converter VSC3 (19) are within the limit range when the load side voltage source converter is switched to supply power with the power supply, switching impact cannot be generated, and the influence of power supply switching on sensitive loads is reduced.

In one embodiment, when the dc bus voltage Udc is lower than the charging fixed value Udcset2, comparing the first power supply side voltage effective value U1rms and the second power supply side voltage effective value U2 rms; when the first power supply side voltage effective value U1rms is larger than or equal to the second power supply side voltage effective value U2rms, outputting a third group signal S3 and starting a first power supply side voltage source converter VSC1 (13); when the effective value U1rms of the first power supply side voltage is smaller than U2rms, a second power supply side voltage source converter VSC2 (15) is started to work; when the direct current bus voltage Udc reaches the charging stop constant value Udcset3, the third group signal S3 or the fourth group signal S4 is stopped, so that the corresponding first power source side voltage source converter VSC1 (13) or second power source side voltage source converter VSC2 (15) stops working.

As shown in fig. 4, in a preferred embodiment, the first source side voltage source converter VSC1 (13), the second source side voltage source converter VSC2 (15) may operate according to the following logic:

a dq decoupling control method is adopted for the first power supply side voltage source converter VSC1 (13) and the second power supply side voltage source converter VSC2 (15), the control target of an outer ring d axis is that the direct current bus voltage Udc reaches a target value, the control target of an outer ring q axis is that reactive current (or power) is 0, the first power supply side voltage source converter VSC1 (13) and the second power supply side voltage source converter VSC2 (15) are used as rectifiers, alternating current of a first power supply and an alternating current of a second power supply are converted into direct current charging current, a supporting capacitor C (18) is charged, the direct current bus voltage Udc reaches the target value, and meanwhile reactive power requirements are reduced to the maximum extent.

The first power source side voltage source converter VSC1 (13), the second power source side voltage source converter VSC2 (15) and the load side voltage source converter VSC3 (19) work independently, and when the direct current bus voltage Udc is lower than a charging fixed value Udcset2, a first power source side effective value U1rms and a second power source side effective value U2rms are compared. When the first power source side voltage effective value U1rms is greater than or equal to the second power source side voltage effective value U2rms, a third group signal S3 is output to start the first power source side voltage source converter VSC1 (13). And when the first power supply side voltage effective value U1rms is smaller than the second power supply side voltage effective value U2rms, starting a second power supply side voltage source converter VSC2 (15) to work. When the direct current bus voltage Udc reaches the charging stop constant value Udcset3, the third group signal S3 or the fourth group signal S4 is stopped, so that the corresponding first power source side voltage source converter VSC1 (13) or second power source side voltage source converter VSC2 (15) stops working. In order to avoid frequent starting of the first source side voltage source converter VSC1 (13) and the second source side voltage source converter VSC2 (15), the charging constant value Udcset2 and the charging stop constant value Udcset3 should have a large difference, and the charging constant value Udcset2 should be much lower than the charging stop constant value Udcset 3.

When equipment needs to be overhauled, the first breaker QF1, the second breaker QF2 and the third breaker QF3 are disconnected, the fourth breaker QF4 or the fifth breaker QF5 are closed, and the fourth breaker QF4 and the fifth breaker QF5 are interlocked and cannot be closed at the same time, so that the device is withdrawn from an overhauling isolation state, and normal electricity utilization of sensitive loads is not influenced during overhauling of the device.

It should be emphasized that the embodiments described herein are exemplary rather than limiting, and thus the present invention is not limited to the embodiments described in the detailed description, as other embodiments derived from the technical solutions of the present invention by those skilled in the art also belong to the protection scope of the present invention.

Claims

1. A grid voltage recovery device is characterized in that: the voltage recovery device is a three-phase low-voltage device, adopts a first power supply and a second power supply dual-path power supply to supply power, and has a three-phase sensitive load on the output side, wherein the three-phase sensitive load comprises a main loop and a control loop; the main loop comprises a first power supply side thyristor bypass valve (10), a second power supply side thyristor bypass valve (11), a first power supply side voltage source converter connecting reactor (12), a first power supply side voltage source converter (13), a second power supply side voltage source converter connecting reactor (14), a second power supply side voltage source converter (15), a direct current positive bus (16), a direct current negative bus (17), a direct current supporting capacitor (18), a load side voltage source converter (19) and a load side voltage source converter connecting reactor (20); the control loop comprises a multi-path alternating current/direct current voltage signal detection unit (21), an alternating current signal detection unit (22), a first state control switch K1 (23), a second state control switch K2 (24), a third state control switch K3 (25) and a logic control and signal modulation system (26).

2. The grid voltage recovery device according to claim 1, wherein: the first power supply side is connected and then divided into two paths, one path is connected to the output side through a first power supply side thyristor bypass valve (10) and then connected to the three-phase sensitive load, and the other path is connected to the output side through a first power supply side voltage source converter connecting reactor (12), a first power supply side voltage source converter (13), a direct current positive bus (16), a direct current negative bus (17), a direct current supporting capacitor (18), a load side voltage source converter (19) and a load side voltage source converter connecting reactor (20) and then connected to the three-phase sensitive load; the second power supply side is also divided into two paths after being connected, one path is connected to the output side through a second power supply side thyristor bypass valve (11) and is connected to the three-phase sensitive load, and the other path is connected to the output side through a second power supply side voltage source converter connecting reactor (14), a second power supply side voltage source converter (15), a direct current negative bus (17), a direct current supporting capacitor (18), a load side voltage source converter (19) and a load side voltage source converter connecting reactor (20) and is connected to the three-phase sensitive load.

3. The grid voltage recovery device according to claim 2, wherein: the first power supply side thyristor bypass valve (10) comprises a first thyristor T11, a second thyristor T12, a third thyristor T13, a fourth thyristor T14, a fifth thyristor T15 and a sixth thyristor T16, wherein the first thyristor T11 and the second thyristor T12 are connected with an A phase of a first power supply in a forward-reverse antiparallel manner and then connected with a B phase of the first power supply in a forward-reverse antiparallel manner, the third thyristor T13 and the fourth thyristor T14 are connected with a fifth thyristor T15 and a sixth thyristor T16 in a forward-reverse antiparallel manner and then connected with a C phase of the first power supply in a forward-reverse antiparallel manner.

4. The grid voltage recovery device according to claim 3, wherein: the second power supply side thyristor bypass valve (11) comprises a seventh thyristor T21, an eighth thyristor T22, a ninth thyristor T23, a tenth thyristor T24, an eleventh thyristor T25 and a twelfth thyristor T26, wherein the seventh thyristor T21 and the eighth thyristor T22 are connected with the phase A of the second power supply in a forward-reverse antiparallel manner and then connected with the phase B of the second power supply in a forward-reverse antiparallel manner, the ninth thyristor T23 and the tenth thyristor T24 are connected with the phase C of the second power supply in a forward-reverse antiparallel manner and then connected with the phase eleventh thyristor T25 and the twelfth thyristor T26 in a forward-reverse antiparallel manner.

5. The grid voltage recovery device according to claim 4, wherein: the first power supply side voltage source converter connecting reactor (12) is composed of a first reactor La1, a second reactor Lb1 and a third reactor Lc 1.

6. The grid voltage recovery device according to claim 5, wherein: the first power supply side voltage source converter (13) is composed of six groups of turn-off devices connected in a three-phase bridge connection mode and diodes connected in reverse parallel with the turn-off devices, and comprises a first turn-off device V11, a second turn-off device V12, a third turn-off device V13, a fourth turn-off device V14, a fifth turn-off device V15 and a sixth turn-off device V16; the first turn-off device V11 and the fourth turn-off device V14 are connected in series, the third turn-off device V13 and the sixth turn-off device V16 are connected in series, the second turn-off device V12 and the fifth turn-off device V15 are connected in series, collectors of the first turn-off device V11, the third turn-off device V13 and the fifth turn-off device V15 are connected together, and emitters of the second turn-off device V12, the fourth turn-off device V14 and the sixth turn-off device V16 are connected together.

7. The grid voltage recovery device according to claim 6, wherein: the second power supply side voltage source converter connecting reactor (14) is composed of a fourth reactor La2, a fifth reactor Lb2 and a sixth reactor Lc 2.

8. The grid voltage recovery device according to claim 7, wherein: the second power supply side voltage source converter (15) comprises six groups of turn-off devices connected in a three-phase bridge connection mode and diodes connected in reverse parallel with the turn-off devices, and comprises a seventh turn-off device V21, an eighth turn-off device V22, a ninth turn-off device V23, a tenth turn-off device V24, an eleventh turn-off device V25 and a twelfth turn-off device V26, wherein the seventh turn-off device V21 and the tenth turn-off device V24 are connected in series, the ninth turn-off device V23 and the twelfth turn-off device V26 are connected in series, the eighth turn-off device V22 and the eleventh turn-off device V25 are connected in series, collectors of the seventh turn-off device V21, the ninth turn-off device V23 and the eleventh turn-off device V25 are connected together, and emitters of the eighth turn-off device V22, the tenth turn-off device V24 and the twelfth turn-off device V26 are connected together.

9. The grid voltage recovery device according to claim 8, wherein: the load side voltage source converter (19) is composed of six groups of turn-off devices connected in a three-phase bridge connection mode and diodes connected in reverse parallel with the turn-off devices, and comprises a thirteenth turn-off device V31, a fourteenth turn-off device V32, a fifteenth turn-off device V33, a sixteenth turn-off device V34, a seventeenth turn-off device V35 and an eighteenth turn-off device V36; wherein, the thirteenth turn-off device V31 and the sixteenth turn-off device V34 are connected in series, the fifteenth turn-off device V33 and the eighteenth turn-off device V36 are connected in series, the seventeenth turn-off device V35 and the fourteenth turn-off device V32 are connected in series, collectors of the thirteenth turn-off device V31, the fifteenth turn-off device V33 and the seventeenth turn-off device V35 are connected together, and emitters of the sixteenth turn-off device V34, the eighteenth turn-off device V36 and the fourteenth turn-off device V32 are connected together.

10. The grid voltage recovery device according to claim 9, wherein: the load side three-phase bridge type voltage source converter connecting reactor (20) is composed of a seventh reactor La3, an eighth reactor Lb3 and a ninth reactor Lc 3.

11. The grid voltage restoration device according to any one of claims 1-10, wherein: the input signals of the multi-path alternating current and direct current voltage signal detection unit (21) are first power supply side voltages Ua1, Ub1 and Uc1, second power supply side voltages Ua2, Ub2 and Uc2 and direct current voltages Udc, the output signals are a first power supply side voltage effective value U1rms and a phase theta 1, a second power supply side voltage effective value U2rms and a phase theta 2, and a direct current voltage Udc, and the output signals are connected to a logic control and signal modulation system (26); the input signal of the alternating current signal detection unit (22) is load side three-phase currents Ia, Ib and Ic, the output signal is a load side current effective value Irms, and the output signal is connected to the logic control and signal modulation system (26); a first state control switch K1 (23), a second state control switch K2 (24) and a third state control switch K3 (25) are connected to a logic control and signal modulation system (26); the 1 st group of signals S1 output by the logic control and signal modulation system (26) are used as a trigger signal of a first power supply thyristor bypass valve (10), the 2 nd group of signals S2 are used as a trigger signal of a second power supply thyristor bypass valve (11), the 3 rd group of signals S3 are used as a trigger signal of a first power supply side voltage source converter (13), the 4 th group of signals S4 are used as a trigger signal of a second power supply side voltage source converter (15), and the 5 th group of signals S5 are used as a trigger signal of a load side voltage source converter (19).

12. The grid voltage restoration device according to any one of claims 1-10, wherein: the three-phase alternating current power supply system further comprises a first circuit breaker, a second circuit breaker, a third circuit breaker, a fourth circuit breaker and a fifth circuit breaker, wherein the first circuit breaker is connected to the first power supply inlet side in series, the second circuit breaker is connected to the second power supply inlet side in series, the third circuit breaker is connected to the compensation outlet side in series, two ends of the fourth circuit breaker are bridged between the first power supply inlet side and the load outlet side, and two ends of the fifth circuit breaker are bridged between the second power supply inlet side and the load outlet side.

13. The grid voltage recovery device according to claim 12, wherein: the first circuit breaker, the second circuit breaker, the third circuit breaker, the fourth circuit breaker and the fifth circuit breaker are mechanical bypasses or maintenance switches, and the device is withdrawn and electrically isolated when the inside of the device is abnormal or maintained.

14. A control method applied to the grid voltage restoration apparatus according to any one of claims 1 to 13, characterized by:

step 1, when a first power supply is normal, a first group of signals S1 output by a logic control and signal modulation system (26) are effective, a thyristor bypass valve (10) on the side of the first power supply is continuously conducted and is in bidirectional through-flow, and the first power supply supplies power to a load;

Step 2, when the effective value U1rms of the first power supply voltage is lower than an alternating current voltage sag constant value Uacset, quickly turning off a thyristor bypass valve (10) on the first power supply side, and continuously supplying power to a sensitive load by a load side voltage source converter VSC3 (19);

step 3, slowly adjusting a control target of the load side voltage source converter VSC3 (19) to enable the voltage amplitude and the phase of the control target to track the second power supply, and when the phase difference and the amplitude difference between the load side voltage source converter VSC3 (19) and the second power supply are within a certain range, supplying power to the load by the second power supply;

step 4, when the effective value U1rms of the first power supply voltage is higher than the AC voltage sag constant value Uacset, the thyristor bypass valve (11) on the second power supply side is rapidly turned off and is subjected to fixed time delay

The logic control and signal modulation system (26) then signals the conduction of the thyristor bypass valve (10) of the first power supply, and the load is powered by the first power supply.

15. The control method of the grid voltage recovery apparatus according to claim 14, characterized in that: wherein the step 2 further comprises:

step 21, deactivating the first group signal S1, canceling the thyristor trigger pulse of the first power supply side thyristor bypass valve (10), and preparing to isolate the first power supply;

Step 22, outputting a fifth group of signals S5, starting the load side voltage source converter VSC3 (19), rapidly turning off the first power side thyristor bypass valve (10), and performing fixed time delay

Then entering step 23;

and 23, adjusting the output of the load side voltage source converter VSC3 (19) to ensure that the phase and amplitude of the output voltage are stable and consistent with those of the first power supply, and continuously supplying power to the sensitive load by the load side voltage source converter VSC3 (19).

16. The control method of the grid voltage recovery apparatus according to claim 15, characterized in that: wherein the step 2 further comprises:

24, when the voltage of the first power supply is recovered, namely when the effective value U1rms of the first power supply voltage is not lower than the AC voltage sag set value Uacset, directly jumping to the step 4;

and step 25, when the first power supply voltage effective value U1rms is lower than the alternating current voltage sag constant value Uacset, the second power supply voltage effective value U2rms is larger than the alternating current voltage sag constant value Uacset, the direct current voltage Udc is reduced to a constant value Udcset1 or the working time of the load side voltage source converter VSC3 (19) reaches a constant value Tset, entering step 3.

17. The control method of the grid voltage recovery apparatus according to claim 16, characterized in that: wherein step 3 further comprises:

Step 31: slowly adjusting a control target of a load side voltage source converter VSC3 (19) to enable the voltage amplitude and the phase of the control target to track the second power supply;

step 32: when the phase difference and the amplitude difference between the load side voltage source converter VSC3 (19) and the second power supply are within a certain range, the logic control and signal modulation system (26) sends out a conduction signal of the thyristor bypass valve (11) at the second power supply side, and simultaneously, the fifth group of signals S5 are cut off, so that the load side voltage source converter VSC3 (19) stops working, and the second power supply supplies power to the load.

18. The control method of the grid voltage restoration device according to claim 17, wherein: wherein step 3 further comprises:

step 33: the load is powered by the second power supply and when the first power supply voltage is restored, i.e. when the first power supply voltage effective value U1rms is not lower than the ac voltage sag set value Uacset, step 4 is entered.

19. The control method of the grid voltage recovery device according to claim 18, characterized in that: wherein the step 4 further comprises:

step 41: deactivating the second group signal S2, deactivating the thyristor trigger pulse of the first supply side thyristor bypass valve (10), in preparation for isolating the second supply;

Step 42: outputting a fifth group signal S5, starting a load side voltage source converter VSC3 (19), quickly turning off the thyristor bypass valve (11) at the second power supply side, and performing fixed time delay

Then step 43 is entered;

step 43: adjusting the output of the load side voltage source converter VSC3 (19) to make the phase and amplitude of the output voltage stable and consistent with those of the second power supply, continuously supplying power for the sensitive load by the load side voltage source converter VSC3 (19), and after a fixed time delay

Then step 44 is entered;

step 44: adjusting the output of a load side voltage source converter VSC3 (19) to make the phase and amplitude of the output voltage stable and consistent with those of the first power supply;

step 45: when the phase difference between the load side voltage source converter VSC3 (19) and the phase difference and the amplitude difference between the load side voltage source converter VSC3 and the first power supply are within a certain range, the logic control and signal modulation system (26) sends out a conducting signal of the thyristor bypass valve (10) of the first power supply, and simultaneously, the fifth group of signals S5 are cut off, so that the load side voltage source converter VSC3 (19) stops working, and the first power supply still provides power for the load.

20. The control method of the grid voltage restoration device according to any one of claims 14 to 19, characterized by: when the direct current bus voltage Udc is lower than a charging fixed value Udcset2, comparing a first power supply side voltage effective value U1rms with a second power supply side voltage effective value U2 rms; when the first power supply side voltage effective value U1rms is larger than or equal to the second power supply side voltage effective value U2rms, outputting a third group signal S3 to start the first power supply side voltage source converter VSC1 (13); when the first power supply side voltage effective value U1rms is smaller than the second power supply side voltage effective value U2rms, starting a second power supply side voltage source converter VSC2 (15) to work; when the direct current bus voltage Udc reaches the charging stop constant value Udcset3, the third group signal S3 or the fourth group signal S4 is stopped, so that the corresponding first power source side voltage source converter VSC1 (13) or second power source side voltage source converter VSC2 (15) stops working.