CN114755865A - Display panel and display device - Google Patents
Display panel and display device Download PDFInfo
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- CN114755865A CN114755865A CN202210410757.2A CN202210410757A CN114755865A CN 114755865 A CN114755865 A CN 114755865A CN 202210410757 A CN202210410757 A CN 202210410757A CN 114755865 A CN114755865 A CN 114755865A
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/13306—Circuit arrangements or driving methods for the control of single liquid crystal cells
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
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Abstract
The invention provides a display panel and a display device, wherein an auxiliary sub-pixel of the display panel comprises an auxiliary pixel driving circuit and an auxiliary pixel electrode, the auxiliary pixel driving circuit comprises an auxiliary pixel driving module and a voltage division thin film transistor, a source electrode and a drain electrode of the voltage division thin film transistor are respectively and electrically connected between the auxiliary pixel electrode and a corresponding data shielding line, and a grid electrode of the voltage division thin film transistor is electrically connected to a corresponding scanning line. According to the embodiment of the invention, the data shielding line is electrically connected with the voltage division thin film transistor to realize the voltage division function, so that the display panel can draw out a part of voltage of the corresponding pixel electrode without additionally arranging the voltage division line, the liquid crystal deflection angles of the auxiliary sub-pixel and the main sub-pixel are inconsistent, the voltage division line is not required to be arranged in the middle of the sub-pixel, the display area is increased, and the pixel aperture ratio is improved.
Description
Technical Field
The invention relates to the technical field of display, in particular to a display panel and a display device.
Background
At present, the TFT-lcd (thin Film Transistor Liquid Crystal display) industry develops rapidly, and develops a plurality of new technologies, for example, a 3T plus technology, which divides an originally complete sub-pixel (pixel) into a main sub-pixel (main pixel) and an auxiliary sub-pixel (sub-pixel), and the auxiliary sub-pixel extracts a part of voltage of a corresponding pixel electrode through a voltage division line (sharebar), so that Liquid Crystal deflection angles of the auxiliary sub-pixel and the main sub-pixel are inconsistent, and an 8-domain wide viewing angle is realized.
However, in order to reduce the voltage division performance and the signal interference between the data lines, the prior art has to dispose the voltage division line in the middle of the sub-pixels, which results in a smaller display area and a smaller pixel aperture ratio.
Therefore, the pixel structure of the prior display panel has the technical problem of low pixel aperture ratio due to the voltage dividing line, and needs to be improved.
Disclosure of Invention
The invention provides a display panel and a display device, which are used for solving the technical problem of low pixel aperture ratio caused by a dividing line in the pixel structure of the conventional display panel.
In order to solve the problems, the technical scheme provided by the invention is as follows:
an embodiment of the present invention provides a display panel, including:
a plurality of data lines extending in a first direction;
a plurality of scanning lines extending along a second direction and enclosing a plurality of pixel regions with the plurality of data lines, wherein the second direction is crossed with the first direction;
the data shielding lines are positioned on the corresponding data lines and at least partially overlapped with the data lines;
the pixel driving circuit comprises a main pixel driving module, the input end and the output end of the main pixel driving module are electrically connected between the corresponding data line and the main pixel electrode, and the control end of the main pixel driving module is electrically connected with the corresponding scanning line; the auxiliary sub-pixel comprises an auxiliary pixel driving circuit and an auxiliary pixel electrode, the auxiliary pixel driving circuit comprises an auxiliary pixel driving module and a voltage division thin film transistor, the input end and the output end of the auxiliary pixel driving module are electrically connected to the corresponding data line and the auxiliary pixel electrode, the control end of the auxiliary pixel driving module is electrically connected to the corresponding scanning line, the source electrode and the drain electrode of the voltage division thin film transistor are respectively electrically connected to the auxiliary pixel electrode and the corresponding data shielding line, and the grid electrode of the voltage division thin film transistor is electrically connected to the corresponding scanning line.
In the display panel provided by the embodiment of the invention, at least one data shielding line includes a shielding portion and a connecting portion, the shielding portion extends along the first direction and at least partially overlaps with the corresponding data line, the connecting portion extends from a side portion of the shielding portion along a direction away from the shielding portion, and the connecting portion is electrically connected to one of the source electrode and the drain electrode of the voltage division thin film transistor.
In the display panel provided by the embodiment of the invention, the connecting portion of at least one data shielding line includes a first segment, a second segment and a third segment, the first segment extends from a side portion of the shielding portion along a direction far away from the shielding portion, the second segment extends from an end portion of the first segment far away from the shielding portion along a direction far away from the first segment, the third segment extends from an end portion of the second segment far away from the first segment along a direction far away from the first segment, and the third segment is electrically connected to one of the source electrode and the drain electrode of the voltage division thin film transistor.
In the display panel provided by the embodiment of the invention, the third segment includes a second segment, and a first segment and a third segment which extend from two opposite sides of the second segment, the second segment is electrically connected to one of the source and the drain of the voltage-dividing thin film transistor through a first via hole, the first segment is connected between the second segment and the second segment, and the width of the second segment is greater than the widths of the first segment and the third segment.
In the display panel provided in the embodiment of the present invention, the third sub-section is connected between the second sub-section and the shielding portion of the adjacent data shielding line.
In the display panel provided in the embodiment of the present invention, the auxiliary pixel electrode includes a pad portion, the pad portion is electrically connected to the output end of the auxiliary pixel driving module through a second via hole, and a diameter of the first via hole is smaller than a diameter of the second via hole.
In the display panel provided in the embodiment of the present invention, a direction from the first via to the second via is parallel to the first direction.
In the display panel provided in the embodiment of the present invention, at least one of the data shielding lines is disposed in the same layer as the main pixel electrode and the auxiliary pixel electrode, and has the same material.
In the display panel provided in the embodiment of the present invention, the main pixel driving module includes a main thin film transistor, the input end and the output end of the main pixel driving module include a source and a drain of the main thin film transistor, and the control end of the main pixel driving module includes a gate of the main thin film transistor; the auxiliary pixel driving module comprises an auxiliary thin film transistor, the input end and the output end of the auxiliary pixel driving module comprise a source electrode and a drain electrode of the auxiliary thin film transistor, and the control end of the auxiliary pixel driving module comprises a grid electrode of the auxiliary thin film transistor; the main thin film transistor, the auxiliary thin film transistor and the voltage division thin film transistor are electrically connected to the same scanning line, and the main thin film transistor and the auxiliary thin film transistor are electrically connected to the same data line.
Further, an embodiment of the present invention further provides a display device, including the display panel described in any one of the embodiments above.
The beneficial effects of the invention are as follows: the invention provides a display panel and a display device, wherein the display panel comprises a plurality of data lines extending along a first direction, a plurality of scanning lines extending along a second direction, a plurality of data shielding lines and a plurality of pixel units, the plurality of scanning lines and the plurality of data lines enclose a plurality of pixel regions, the second direction crosses the first direction, and at least one data shielding line is positioned on the corresponding data line and at least partially overlapped with the data line; the pixel units are arranged in the pixel areas, at least one pixel unit comprises a main sub-pixel and an auxiliary sub-pixel, the main sub-pixel comprises a main pixel driving circuit and a main pixel electrode, the main pixel driving circuit comprises a main pixel driving module, the input end and the output end of the main pixel driving module are electrically connected between the corresponding data line and the main pixel electrode, and the control end of the main pixel driving module is electrically connected to the corresponding scanning line; the auxiliary sub-pixel comprises an auxiliary pixel driving circuit and an auxiliary pixel electrode, the auxiliary pixel driving circuit comprises an auxiliary pixel driving module and a voltage division thin film transistor, the input end and the output end of the auxiliary pixel driving module are electrically connected with the corresponding data line and between the auxiliary pixel electrodes, the control end of the auxiliary pixel driving module is electrically connected with the corresponding scanning line, the source electrode and the drain electrode of the voltage division thin film transistor are respectively electrically connected with the auxiliary pixel electrode and the corresponding data shielding line, and the grid electrode of the voltage division thin film transistor is electrically connected with the corresponding scanning line. According to the embodiment of the invention, the data shielding line is electrically connected with the voltage division thin film transistor to realize the voltage division function, so that the display panel can draw out a part of voltage of the corresponding pixel electrode without additionally arranging the voltage division line, the liquid crystal deflection angles of the auxiliary sub-pixel and the main sub-pixel are inconsistent, the voltage division line is not required to be arranged in the middle of the sub-pixel, the display area is increased, and the pixel aperture ratio is improved.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the description below are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic diagram of a pixel driving circuit according to an embodiment of the invention;
FIG. 2 is a schematic diagram of a film layer design of a display panel according to an embodiment of the present invention;
FIG. 3 is a cross-sectional view of the transistor T3 shown in FIG. 2;
FIG. 4 is a schematic diagram of a design of the first metal layer m2 in FIG. 3;
FIG. 5 is a schematic diagram of a design of the second metal layer m5/m6 in FIG. 3;
FIG. 6 is a schematic diagram of a design of the pixel electrode layer m8 in FIG. 3;
fig. 7 is a schematic diagram of a comparative design of the layers in fig. 3.
Fig. 6 is provided by an embodiment of the present application.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In the description of the present invention, it is to be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc. indicate orientations or positional relationships based on those shown in the drawings, and are only for convenience of description and simplicity of description, but do not indicate or imply that the device or element being referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus, should not be considered as limiting the present invention. Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, features defined as "first" and "second" may explicitly or implicitly include one or more of the described features. In the description of the present invention, "a plurality" means two or more unless specifically defined otherwise.
In this application, the word "exemplary" is used to mean "serving as an example, instance, or illustration. Any embodiment described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other embodiments. The following description is presented to enable any person skilled in the art to make and use the invention. In the following description, details are set forth for the purpose of explanation. It will be apparent to one of ordinary skill in the art that the present invention may be practiced without these specific details. In other instances, well-known structures and processes are not shown in detail to avoid obscuring the description of the invention with unnecessary detail. Thus, the present invention is not intended to be limited to the embodiments shown, but is to be accorded the widest scope consistent with the principles and features disclosed herein.
The embodiment of the invention can solve the technical problem that the pixel aperture ratio is low due to the voltage dividing line in the pixel structure of the existing display panel.
Fig. 1 is a schematic diagram of a pixel driving circuit according to an embodiment of the invention, fig. 2 is a schematic diagram of a film layer design of a display panel according to an embodiment of the invention, and fig. 3 is a schematic cross-sectional diagram of a transistor T3 in fig. 2; embodiments of the present application will now be described in detail with reference to fig. 1 to 3.
In order to solve the above problem, the present application provides a pixel unit, as shown in fig. 1 to 3, a pixel unit provided in an embodiment of the present application at least includes:
a pixel electrode (including ITO1 and ITO2 in fig. 1 and 2), a scan line Gate, a Data line Data, and a Data shield line DBS; the pixel electrode comprises a main pixel electrode ITO1 and an auxiliary pixel electrode ITO2 which are separately arranged;
the pixel unit further comprises a main thin film transistor T1, an auxiliary thin film transistor T2 and a voltage dividing thin film transistor T3; the main thin film transistor T1 is respectively connected to the Data line Data, the scan line Gate, and the main pixel electrode ITO 1; the auxiliary thin film transistor T2 is respectively connected to the Data line Data, the scan line Gate, and the auxiliary pixel electrode ITO 2; the voltage-dividing thin film transistor T3 is respectively connected to the auxiliary pixel electrode ITO2, the scanning line Gate, and the data shielding line DBS; the data shielding line DBS is disposed on the same layer as the pixel electrode.
In the embodiment of the application, the data shielding line can be loaded with the same voltage as the common electrode, so that the voltage difference of two sides of the liquid crystal above the data line is 0, and the light leakage phenomenon above the data line can be improved.
The embodiment provides a pixel unit, and this pixel unit realizes the partial pressure function through with data shield line and partial pressure thin film transistor electric connection, and based on this, display panel need not additionally set up the partial voltage that divides the line and can take away corresponding pixel electrode, makes the liquid crystal deflection angle inconsistent of auxiliary sub-pixel and main sub-pixel, and then also need not set up the centre at sub-pixel with the partial pressure line, has increased the display area, has promoted the pixel aperture ratio.
In one embodiment, as shown in fig. 2, the data shield line DBS is disposed around the edges of the pixel electrodes (the main pixel electrode ITO1 and the auxiliary pixel electrode ITO 2); in this embodiment, the data shielding line DBS and the pixel electrode are disposed on the same layer, which may simplify the film structure of the panel.
In one embodiment, as shown in fig. 6, the data shield line DBS includes a shield portion D1 disposed above the signal line and a connection portion D2 connecting adjacent shield portions D1, the connection portion D2 being between the main pixel electrode ITO1 and the auxiliary pixel electrode ITO 2; the voltage-dividing thin film transistor T3 is electrically connected to the connection portion D2.
In one embodiment, as shown in fig. 2, the main thin film transistor T1, the auxiliary thin film transistor T2 and the voltage dividing thin film transistor T3 are located between the main pixel electrode ITO1 and the auxiliary pixel electrode ITO 2.
In one embodiment, as shown in fig. 3 and 5, the voltage-dividing thin film transistor T3 includes a signal electrode (one of a source electrode or a drain electrode) disposed at the same layer as the data line; as shown in fig. 2, the data shield line DBS is electrically connected to the signal electrode through a via H1.
In one embodiment, the voltage-dividing thin film transistor includes an active pattern, and the data shielding line is electrically connected to a segment of the active pattern through a via hole. This embodiment can reduce the thickness of the film layer in the connecting region.
In one embodiment, as shown in fig. 2, the scan lines Gate are located between the main pixel electrode ITO1 and the auxiliary pixel electrode ITO 2; as shown in fig. 3, the active pattern m4 is disposed between the scan line Gate (first metal layer m2) and the pixel electrode (pixel electrode layer m 8).
In one embodiment, as shown in fig. 5, in the second metal layer m5/m6, the pixel unit further includes a source m6, a drain m5 and a source-drain connection line mLj which are disposed at the same level as the Data line Data; as shown in fig. 7, in a top view, the source electrode m6, the drain electrode m5, and the source-drain connection line mLj are spaced from the pixel electrode.
In one embodiment, as shown in fig. 4, in the first metal layer m2, the pixel unit further includes an array substrate-side main common electrode Acom1 and an array substrate-side auxiliary common electrode Acom2 which are provided in the same layer as the scan line Gate; as shown in fig. 7, in a top view, each of the array substrate-side main common electrodes Acom1 and the corresponding main pixel electrode ITO1 are disposed at intervals, and each of the array substrate-side sub common electrodes Acom2 and the corresponding auxiliary pixel electrode ITO2 are disposed at intervals.
Similarly, in other embodiments, the present application provides an array substrate including the pixel unit described in any of the above embodiments.
For convenience of the following description, the film layer structure of the display panel according to the present application will be described with reference to fig. 3.
As shown in fig. 3, the present application provides a display panel including: a substrate m1, a first metal layer m2, a gate insulating layer m3, an active layer m4, a second metal layer m5/m6, a planarization layer m7, and a pixel electrode layer m 8; in the region where the transistor T3 is located, the data shielding line DBS formed by the pixel electrode layer m8 is electrically connected to the drain electrode m5 of the transistor.
It should be understood that the first metal layer m2, the second metal layer m5/m6, and the pixel electrode layer m8 in the present application are only schematic representations, and may be any film layer having the same effect; for example, the first metal layer m2 and the second metal layer m5/m6 may be copper layers or titanium aluminum titanium alloy layers, and the pixel electrode layer m8 may be a film layer formed of any transparent conductive material such as an ITO material or IGZO.
In order to solve the above problems, the present application provides a display panel. Fig. 2 is a schematic diagram of a film layer design of a display panel according to an embodiment of the present invention, fig. 3 is a schematic cross-sectional view of a transistor T3 in fig. 2, fig. 4 is a schematic diagram of a first metal layer m2 in fig. 3, fig. 5 is a schematic diagram of a second metal layer m5/m6 in fig. 3, fig. 6 is a schematic diagram of a pixel electrode layer m8 in fig. 3, and fig. 7 is a schematic diagram of a comparative design of various film layers in fig. 3. As shown in fig. 2 to 7, a display panel provided in an embodiment of the present application includes:
a plurality of Data lines Data extending in a first direction (vertical direction in fig. 5);
a plurality of scan lines Gate extending in a second direction (a horizontal direction in fig. 4) which intersects the first direction, and which, as shown in fig. 2, surround a plurality of pixel regions with the plurality of Data lines Data;
a plurality of Data shielding lines DBS, as shown in fig. 2, at least one Data shielding line DBS is located on the corresponding Data line Data and at least partially overlaps the Data line Data;
a plurality of pixel units disposed in the plurality of pixel regions, at least one of the pixel units includes a main sub-pixel and an auxiliary sub-pixel, the main sub-pixel includes a main pixel driving circuit (e.g., a transistor T1 in fig. 2) and a main pixel electrode ITO1, the main pixel driving circuit includes a main pixel driving module, an input end and an output end of the main pixel driving module (e.g., a transistor T1 in fig. 2) are electrically connected between the corresponding Data line Data and the main pixel electrode ITO1, and a control end of the main pixel driving module is electrically connected to the corresponding scan line Gate; the auxiliary sub-pixel comprises an auxiliary pixel driving circuit and an auxiliary pixel electrode ITO2, the auxiliary pixel driving circuit comprises an auxiliary pixel driving module (for example, a transistor T2 in FIG. 2) and a voltage division thin film transistor T3, an input end and an output end of the auxiliary pixel driving module (for example, a transistor T2 in FIG. 2) are electrically connected between the corresponding Data line and the auxiliary pixel electrode ITO2, a control end of the auxiliary pixel driving module is electrically connected between the corresponding scanning line Gate, a source electrode and a drain electrode of the voltage division thin film transistor T3 are respectively electrically connected between the auxiliary pixel electrode ITO2 and the corresponding Data shielding line DBS, and a Gate electrode of the voltage division thin film transistor is electrically connected between the corresponding scanning line Gate.
In one embodiment, as shown in fig. 6, in the pixel electrode layer m8, at least one Data shielding line DBS includes a shielding portion D1 and a connecting portion D2, the shielding portion D1 extends along the first direction and at least partially overlaps the corresponding Data line Data, and the connecting portion D2 extends from a side portion of the shielding portion D1 in a direction away from the shielding portion D1; as shown in fig. 2, the connection portion D2 is electrically connected to one of the source and the drain of the voltage-dividing thin film transistor T3.
In one embodiment, as shown in fig. 6, in the pixel electrode layer m8, the connection portion D2 of at least one data shielding line includes a first segment 31, a second segment 32, and a third segment 33, the first segment 31 extends from a side portion of the shielding portion D1 in a direction away from the shielding portion D1, the second segment 32 extends from an end portion of the first segment 31 away from the shielding portion D1 in a direction away from the first segment 31, the third segment 33 extends from an end portion of the second segment 32 away from the first segment 31 in a direction away from the first segment 31, and the third segment 33 is electrically connected to one of the source and the drain of the voltage-dividing thin film transistor T3.
In an embodiment, as shown in fig. 6, in the pixel electrode layer m8, the third segment 33 includes a second segment 332 and a first segment 331 and a third segment 333 extending from two opposite sides of the second segment 332, the second segment 332 is electrically connected to one of the source and the drain of the voltage-dividing thin film transistor T3 through a first via H1, the first segment 331 is connected between the second segment 332 and the second segment 32, and a width of the second segment 332 is greater than widths of the first segment 331 and the third segment 333.
In one embodiment, as shown in fig. 6, in the pixel electrode layer m8, the third subsection 333 is connected between the second subsection 332 and the shielding part D1 of the adjacent data shielding line.
In one embodiment, as shown in fig. 2 and 6, in the pixel electrode layer m8, the main pixel electrode ITO1 includes a main pad portion b1, the pad portion (i.e., the main pad portion b1) is electrically connected to the output end of the main pixel driving module (e.g., the transistor T1 in fig. 2) through a third via hole H3, and a diameter of the first via hole H1 is smaller than a diameter of the third via hole H3.
In one embodiment, as shown in fig. 2 and 6, in the pixel electrode layer m8, the auxiliary pixel electrode ITO2 includes an auxiliary pad portion b2, the pad portion (i.e., the auxiliary pad portion b2) is electrically connected to the output end of the auxiliary pixel driving module (e.g., the transistor T2 in fig. 2) through a second via hole H2, and a diameter of the first via hole H1 is smaller than a diameter of the second via hole H2.
In one embodiment, as shown in fig. 2, in the pixel electrode layer m8, a direction pointing from the first via hole H1 to the second via hole H2 is parallel to the first direction (i.e., the direction in which the Data line Data is located).
In one embodiment, as shown in fig. 6, at least one of the data shielding lines is disposed on the same layer and made of the same material as the main pixel electrode and the auxiliary pixel electrode.
In one embodiment, the shape layout of the layers in fig. 2 is shown in fig. 7, and the shape layout cooperate to form the pixel unit shown in fig. 1.
In one embodiment, as shown in fig. 1 and 2, the main pixel driving module includes a main thin film transistor T1, the input terminal and the output terminal of the main pixel driving module include a source and a drain of the main thin film transistor T1, and the control terminal of the main pixel driving module includes a gate of the main thin film transistor T1; the auxiliary pixel driving module includes an auxiliary thin film transistor T2, the input and output terminals of the auxiliary pixel driving module include a source and a drain of the auxiliary thin film transistor T2, and the control terminal of the auxiliary pixel driving module includes a gate of the auxiliary thin film transistor T2; the main thin film transistor T1, the auxiliary thin film transistor T2, and the voltage dividing thin film transistor T3 are electrically connected to the same scan line Gate, and the main thin film transistor T1 and the auxiliary thin film transistor T2 are electrically connected to the same Data line Data.
Correspondingly, the embodiment of the invention also provides a display device which comprises the display panel provided by the invention. The display device is an electronic terminal with a display function, and can be a fixed terminal such as a desktop computer and a television, a mobile terminal such as a smart phone and a tablet computer, or a wearable device such as smart glasses, a virtual display device and an enhanced display device.
According to the above embodiment:
the invention provides a display panel and a display device, wherein the display panel comprises a plurality of data lines extending along a first direction, a plurality of scanning lines extending along a second direction, a plurality of data shielding lines and a plurality of pixel units, the plurality of scanning lines and the plurality of data lines enclose a plurality of pixel regions, the second direction crosses the first direction, and at least one data shielding line is positioned on the corresponding data line and at least partially overlapped with the data line; the pixel units are arranged in the pixel areas, at least one pixel unit comprises a main sub-pixel and an auxiliary sub-pixel, the main sub-pixel comprises a main pixel driving circuit and a main pixel electrode, the main pixel driving circuit comprises a main pixel driving module, the input end and the output end of the main pixel driving module are electrically connected between the corresponding data line and the main pixel electrode, and the control end of the main pixel driving module is electrically connected to the corresponding scanning line; the auxiliary sub-pixel comprises an auxiliary pixel driving circuit and an auxiliary pixel electrode, the auxiliary pixel driving circuit comprises an auxiliary pixel driving module and a voltage division thin film transistor, the input end and the output end of the auxiliary pixel driving module are electrically connected to the corresponding data line and the auxiliary pixel electrode, the control end of the auxiliary pixel driving module is electrically connected to the corresponding scanning line, the source electrode and the drain electrode of the voltage division thin film transistor are respectively electrically connected to the auxiliary pixel electrode and the corresponding data shielding line, and the grid electrode of the voltage division thin film transistor is electrically connected to the corresponding scanning line. According to the embodiment of the invention, the data shielding line is electrically connected with the voltage division thin film transistor to realize the voltage division function, so that the display panel can draw out a part of voltage of the corresponding pixel electrode without additionally arranging the voltage division line, the liquid crystal deflection angles of the auxiliary sub-pixel and the main sub-pixel are inconsistent, the voltage division line is not required to be arranged in the middle of the sub-pixel, the display area is increased, and the pixel aperture ratio is improved.
In view of the foregoing, it is intended that the present invention cover the preferred embodiment of the invention and not be limited thereto, but that various changes and modifications can be made therein by those skilled in the art without departing from the spirit and scope of the invention.
Claims (10)
1. A display panel, comprising:
a plurality of data lines extending in a first direction;
a plurality of scanning lines extending along a second direction and surrounding a plurality of pixel regions with the plurality of data lines, wherein the second direction is crossed with the first direction;
a plurality of data shielding lines, at least one of which is located on the corresponding data line and at least partially overlaps the data line;
the pixel driving circuit comprises a main pixel driving module, the input end and the output end of the main pixel driving module are electrically connected between the corresponding data line and the main pixel electrode, and the control end of the main pixel driving module is electrically connected with the corresponding scanning line; the auxiliary sub-pixel comprises an auxiliary pixel driving circuit and an auxiliary pixel electrode, the auxiliary pixel driving circuit comprises an auxiliary pixel driving module and a voltage division thin film transistor, the input end and the output end of the auxiliary pixel driving module are electrically connected with the corresponding data line and between the auxiliary pixel electrodes, the control end of the auxiliary pixel driving module is electrically connected with the corresponding scanning line, the source electrode and the drain electrode of the voltage division thin film transistor are respectively electrically connected with the auxiliary pixel electrode and the corresponding data shielding line, and the grid electrode of the voltage division thin film transistor is electrically connected with the corresponding scanning line.
2. The display panel according to claim 1, wherein at least one of the data shielding lines includes a shielding portion extending along the first direction and at least partially overlapping the corresponding data line, and a connecting portion extending from a side portion of the shielding portion in a direction away from the shielding portion, the connecting portion being electrically connected to one of the source electrode and the drain electrode of the voltage-dividing thin film transistor.
3. The display panel according to claim 2, wherein the connection portion of at least one of the data shielding lines includes a first segment extending from a side portion of the shielding portion in a direction away from the shielding portion, a second segment extending from an end portion of the first segment remote from the shielding portion in the direction away from the first segment, and a third segment extending from an end portion of the second segment remote from the first segment in the direction away from the first segment, the third segment being electrically connected to one of the source electrode and the drain electrode of the voltage-dividing thin film transistor.
4. The display panel according to claim 3, wherein the third segment includes a second segment and a first segment and a third segment extending from two opposite sides of the second segment, the second segment is electrically connected to one of the source and the drain of the voltage-dividing thin film transistor through a first via, the first segment is connected between the second segment and the second segment, and a width of the second segment is greater than a width of the first segment and a width of the third segment.
5. The display panel according to claim 4, wherein the third sub-section is connected between the second sub-section and the shield portion of the adjacent data shield line.
6. The display panel of claim 4, wherein the auxiliary pixel electrode comprises a pad portion electrically connected to the output end of the auxiliary pixel driving module through a second via, and a diameter of the first via is smaller than a diameter of the second via.
7. The display panel according to claim 6, wherein a direction from the first via to the second via is parallel to the first direction.
8. The display panel of claim 1, wherein at least one of the data shielding lines is disposed in the same layer and made of the same material as the main pixel electrode and the auxiliary pixel electrode.
9. The display panel according to claim 1, wherein the main pixel driving module comprises a main thin film transistor, the input terminal and the output terminal of the main pixel driving module comprise a source and a drain of the main thin film transistor, and the control terminal of the main pixel driving module comprises a gate of the main thin film transistor; the auxiliary pixel driving module comprises an auxiliary thin film transistor, the input end and the output end of the auxiliary pixel driving module comprise a source electrode and a drain electrode of the auxiliary thin film transistor, and the control end of the auxiliary pixel driving module comprises a grid electrode of the auxiliary thin film transistor; the main thin film transistor, the auxiliary thin film transistor and the voltage division thin film transistor are electrically connected to the same scanning line, and the main thin film transistor and the auxiliary thin film transistor are electrically connected to the same data line.
10. A display device characterized by comprising the display panel according to any one of claims 1 to 9.
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| CN202210410757.2A CN114755865A (en) | 2022-04-19 | 2022-04-19 | Display panel and display device |
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