CN114743487A - Pixel driving structure and display panel - Google Patents

Pixel driving structure and display panel Download PDF

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Publication number
CN114743487A
CN114743487A CN202210505678.XA CN202210505678A CN114743487A CN 114743487 A CN114743487 A CN 114743487A CN 202210505678 A CN202210505678 A CN 202210505678A CN 114743487 A CN114743487 A CN 114743487A
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pixel
data line
sub
group
line
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胡春晓
严允晟
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TCL Huaxing Photoelectric Technology Co Ltd
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TCL Huaxing Photoelectric Technology Co Ltd
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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007Display of intermediate tones
    • G09G3/2074Display of intermediate tones using sub-pixels
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3648Control of matrices with row and column drivers using an active matrix
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00Command of the display device
    • G09G2310/02Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0202Addressing of scan or signal lines
    • G09G2310/0205Simultaneous scanning of several lines in flat panels
    • G09G2310/021Double addressing, i.e. scanning two or more lines, e.g. lines 2 and 3; 4 and 5, at a time in a first field, followed by scanning two or more lines in another combination, e.g. lines 1 and 2; 3 and 4, in a second field
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/02Improving the quality of display appearance
    • G09G2320/0233Improving the luminance or brightness uniformity across the screen

Abstract

The application provides a pixel driving structure and a display panel, relates to the technical field of display, and solves the problem of feed-through effect of various types caused by parasitic capacitance among pixels, the pixel driving structure at least comprises a pixel unit, the pixel unit comprises a first pixel group and a second pixel group, and a grid line group, wherein the grid line group comprises an upper scanning line and a lower scanning line, all sub-pixels in the first pixel group are electrically connected with the same upper scanning line, all sub-pixels in the second pixel group are electrically connected with the same lower scanning line, the connection structure is adopted in the application, the types of various parasitic capacitances of the sub-pixels in the first pixel group and the second pixel group are reduced, and therefore compared with the pixel driving structure in the prior art, the feed-through effect types in the pixel driving process are reduced, therefore, the problem of uneven brightness of display is solved, and the risk of appearance of shaking marks in the display process is reduced.

Description

Pixel driving structure and display panel
Technical Field
The application relates to the technical field of display, in particular to a pixel driving structure and a display panel.
Background
A Thin film transistor-liquid crystal display (TFT-LCD) is one of the main products of the current flat panel display, and with the development of large-size high-resolution TFT-LCD display products, higher requirements are put forward on the display quality, wherein high resolution, crosstalk and moire fringes are several types of influencing factors that influence the display quality of the display.
Due to the fact that the cost of Chip On Film (COF) is high, in order to reduce the number of COFs and achieve the effect of reducing cost, a Data Line Sharing (DLS) structure appears in the existing product, namely two columns of sub-pixels (sub-pixels) adjacent to each other on the left and right share one Data Line.
However, in the current DLS structure, a plurality of different types of feed-through (feedthru) effects occur due to the difference of parasitic capacitances between pixels, and the pixels have the problem of uneven brightness due to the feed-through effects of a plurality of different degrees, which brings the risk of shaking head.
Disclosure of Invention
The application provides a through dividing into two sub data lines with a data line adoption parallel mode in leading-in pixel drive structure, a sub data line drives a pixel respectively to optimize the connected mode between the pixel, reduce the feed-through effect type in the pixel framework, improve and show the uneven problem of bright dark, reduce a pixel drive structure and a display panel of the risk of the line of shaking the head.
In one aspect, the present application provides a pixel driving structure, comprising at least:
a pixel unit including a first pixel group and a second pixel group, each of the first pixel group and the second pixel group including at least one sub-pixel, the pixel unit being repeatedly arranged along rows and columns on the pixel driving structure;
at least one grid line group, wherein the grid line group comprises an upper scanning line and a lower scanning line, the upper scanning line and the lower scanning line are used for transmitting scanning signals, any row of sub-pixels simultaneously corresponds to at least one upper scanning line and at least one lower scanning line, all sub-pixels in the first pixel group are electrically connected with the same upper scanning line, and all sub-pixels in the second pixel group are electrically connected with the same lower scanning line;
the pixel array comprises at least one data line group, wherein the data line group comprises a first data line and a second data line which are connected in parallel and arranged in parallel, the first data line and the second data line are both used for transmitting data signals, any column of sub-pixels corresponds to at least one first data line or at least one second data line, and one sub-pixel is electrically connected with the first data line or the second data line.
In one possible implementation manner of the present application, the voltage polarities of two adjacent data line groups are different.
In a possible implementation manner of the present application, the first pixel group and the second pixel group are adjacently arranged along a first direction, where the first direction is an extending direction of the upper scan line or the lower scan line.
In one possible implementation manner of the present application, two adjacent sub-pixels arranged along the first direction share the same first data line or the same second data line.
In a possible implementation manner of the present application, two adjacent sub-pixels arranged along the first direction do not share the same first data line or the same second data line.
In a possible implementation manner of the present application, two adjacent sub-pixels arranged along a second direction do not share the same first data line or the same second data line, and the second direction is an extending direction of the first data line or the second data line.
In one possible implementation manner of the present application, the first pixel group includes M first sub-pixels, the second pixel group includes N second sub-pixels, M and N are both natural numbers, and M ═ N.
In one possible implementation manner of the present application, the first pixel group and the second pixel group each correspond to K data line groups, where K is a natural number and K ═ M ═ N.
In one possible implementation manner of the present application, the first data line and the second data line of each data line group are separated by L subpixels, where L is a natural number and L ═ K.
In another aspect, the present application provides a display panel, which includes at least the pixel driving structure as described above.
In the present application, all the sub-pixels in the first pixel group are electrically connected to the same upper scan line, and all the sub-pixels in the second pixel group are electrically connected to the same lower scan line, that is, the connection distance between all the sub-pixels in the first pixel group and the upper scan line is shorter, and the connection distance between all the sub-pixels in the second pixel group and the lower scan line is shorter, with the above connection structure, the variety of the parasitic capacitances of the sub-pixels in the first pixel group and the second pixel group is reduced, so that when a scan signal is driven along the scan direction from the upper scan line to the lower scan line, the first feedthrough effect of the first pixel group and the second pixel group is smaller, and the second feedthrough effect of the first pixel group is larger than that of the pixel P3 in the prior art drive structure, but is much smaller than that of the first pixel group, the no secondary feed-through effect of second pixel group consequently compares in prior art's pixel drive structure, and this application has adopted simpler pixel drive structure, has reduced the feed-through effect type that appears among the pixel drive process, improves and shows the uneven problem of bright dark, has reduced the risk that the line of shaking the head appears in the display process.
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In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a pixel driving structure provided in the prior art;
FIG. 2 is a schematic structural diagram of an embodiment of a pixel driving structure provided in an embodiment of the present application;
FIG. 3 is a schematic structural diagram of an embodiment of a pixel driving structure provided in an embodiment of the present application;
FIG. 4 is a schematic structural diagram of an embodiment of a pixel driving structure provided in an embodiment of the present application;
FIG. 5 is a schematic structural diagram of an embodiment of a pixel driving structure provided in an embodiment of the present application;
fig. 6 is a schematic structural diagram of an embodiment of a pixel driving structure provided in the embodiment of the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In the description of the present invention, it is to be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc. indicate orientations or positional relationships based on those shown in the drawings, merely for convenience of description and simplicity of description, and do not indicate or imply that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus, are not to be construed as limiting the present invention. Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, features defined as "first", "second", may explicitly or implicitly include one or more of the described features. In the description of the present invention, "a plurality" means two or more unless specifically defined otherwise.
In this application, the word "exemplary" is used to mean "serving as an example, instance, or illustration. Any embodiment described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other embodiments. The following description is presented to enable any person skilled in the art to make and use the invention. In the following description, details are set forth for the purpose of explanation. It will be apparent to one of ordinary skill in the art that the present invention may be practiced without these specific details. In other instances, well-known structures and processes are not set forth in detail in order to avoid obscuring the description of the present invention with unnecessary detail. Thus, the present invention is not intended to be limited to the embodiments shown, but is to be accorded the widest scope consistent with the principles and features disclosed herein.
The liquid crystal display generally includes an upper substrate, a lower substrate, and a liquid crystal layer interposed between the upper substrate and the lower substrate, and the liquid crystal display includes a plurality of pixel units, each pixel unit includes a pixel electrode and a common electrode, a liquid crystal capacitor is formed between the pixel electrode and the common electrode, a voltage between the pixel electrode and the common electrode is referred to as a pixel voltage, and a deflection direction of liquid crystal molecules is changed according to a change in a voltage applied between the pixel electrode and the common electrode, so as to control a light transmittance of the liquid crystal layer, and thus, a luminance of each pixel unit of the liquid crystal display.
Specifically, taking a tft-lcd as an example, a conventional liquid crystal panel manufactures a plurality of gate lines and a plurality of source lines to define an area of each pixel, and accordingly manufactures a pixel electrode in the area of each pixel. The equivalent circuit of each pixel is composed of a Thin Film Transistor (TFT), a liquid crystal capacitor (Clc) and a pixel storage capacitor (Cst), and the pixel passes through the gate of the TFT and is electrically connected to a gate driver chip (gate driver ic) via the gate line, and passes through the source of the TFT and is electrically connected to a source driver chip (source driver ic) via the source line, and the drain of the TFT is electrically connected to a pixel electrode, and the liquid crystal capacitor and the pixel storage capacitor are formed between the drain of the TFT and the pixel electrode.
When the gate driving chip drives the gate of the thin film transistor to be turned on through the gate line, the data voltage signal input from the source driving chip can be received from the pixel electrode of the thin film transistor through the source line, and the received voltage signal is stored by the liquid crystal capacitor and the pixel storage capacitor.
However, in the conventional tft-lcd panel, there exist several parasitic capacitances, such as a parasitic capacitance Cgp and a parasitic capacitance Cgs, where the parasitic capacitance Cgp is a capacitance between the Gate electrode (Gate) and the Pixel electrode (Pixel), and the parasitic capacitance Cgs is a capacitance between the Gate electrode and the Source electrode (Source), the parasitic capacitance exists because a part of a projection area between the Gate line and the Pixel electrode is overlapped up and down, and a sum of the parasitic capacitance, the liquid crystal capacitance and the Pixel storage capacitance is referred to as a total capacitance value C, that is, C is Cgp + Cgs + Clc + Cst.
When the gate driver chip raises the voltage on the gate line to a gate line high voltage (Vgh), the source driver chip also raises the voltage on the source line to start charging the pixel electrode, and when the voltage on the pixel electrode is raised to a predetermined voltage, the voltage on the gate line is lowered to a gate line low voltage (Vgl). At this time, the voltage drop on the gate line causes a coupling effect on the pixel electrode, so that a voltage drop Δ Vp is also generated on the pixel electrode, and the voltage drop Δ Vp is also called a feed-through voltage (feed-through voltage), and is expressed by a mathematical relationship among the parasitic capacitance Cgp, the parasitic capacitance Cgs, the liquid crystal capacitance (Clc), the pixel storage capacitance (Cst), the gate line high voltage (Vgh), and the gate line low voltage (Vgl) as follows:
Figure BDA0003635906960000051
in the liquid crystal panel, the feed-through voltage Δ Vp causes imbalance when the polarity of the pixel voltage is inverted, so that the gray scale voltage reference of each pixel has a plurality of errors, and thus, the phenomenon of flicker of the display image is observed by human eyes, and the display quality of the liquid crystal panel is reduced.
At present, all tft-lcd panels adopt a structure of Sharing Data Lines (DLS), that is, one Data Line is divided into two Data lines and connected in parallel, and in this driving architecture, one column of pixels is driven by one Data Line, namely, the pixel is named as 1D _ like.
As shown in fig. 1, the DLS driving architecture is a schematic diagram, in fact, the DLS driving architecture in fig. 1 only cuts out a part of the panel, that is, two rows and twelve columns, corresponding to Data lines Data1 to Data7 and scan lines Gate1 to Gate4, if the product is Full High Definition (FHD), gateline is 2160 rows and dataline is 960 columns, if the product is Ultra High Definition (UHD/UD), gateline is 4320 rows and dataline is 1920 columns, the DLS structure shown in fig. 1 shares four pixel types, that is, a connection structure of a pixel with a Data line and a scan line, and the effect of the conventional DLS driving architecture corresponding to four pixels is shown in table 1.
TABLE 1 feedthrough effect of the existing DLS driving architecture for four pixels
Feedthrough effect Pixel P1 Pixel P2 Pixel P3 Pixel P4
The feed-through effect occurs once Is slightly small Greater and greater Is slightly small Is a little bit bigger
Feed-through effect occurs twice Is free of Greater and greater Is slightly small Is free of
The feedthrough effect analysis is performed on the four types of pixels shown in fig. 1, and the connection structures of the pixels P1-P4 with the data lines and the scan lines and the corresponding feedthrough effects are specifically:
the pixel P1 is connected from below, that is, the pixel P1 is connected with the scan line Gate2, and the connection distance between the scan line Gate2 and the pixel P1 is short, so in the driving process of the pixel along the scan direction shown in fig. 1, when the scan line Gate1 is turned on, the pixel P1 does not work, and when the scan line Gate2 is turned on, the parasitic capacitance between the pixel P1 and the scan line Gate2 is small, so that the one-time feedthrough effect of the pixel P1 is small, and no secondary feedthrough effect exists.
The P2 pixels are connected from above, that is, the pixel P2 is connected with the scan line Gate1, the connection distance between the scan line Gate1 and the pixel P2 is long, when the scan line Gate1 is turned on, the first feedthrough effect generated is larger due to the larger parasitic capacitance Cgs + Cgp between the pixel P2 and the scan line Gate1, when the next row scan electrode Gate2 is turned on, the parasitic capacitance Cgs + Cgp formed by the scan line Gate2 and the pixel P2 causes the second feedthrough effect, and the overlapping area between the scan line Gate2 and the pixel P2 is larger, so the second feedthrough effect is larger, that is, the first feedthrough effect of the P2 pixel is larger, and the second feedthrough effect is also larger.
Similarly, the pixel P3 is connected from above, that is, the pixel P3 is connected with the scan line Gate1, the connection distance between the scan line Gate1 and the pixel P3 is short, when the scan line Gate1 is turned on, because the parasitic capacitance Cgs + Cgp between the pixel P3 and the scan line Gate1 is small, and the connection line between the Gate2 and the sub-pixel P4 plays a role of shielding the Gate electric field, the primary feed-through effect generated by the pixel P3 is small, and the secondary feed-through effect is small.
The pixel P4 is connected from below, that is, the pixel P4 is connected with the scan line Gate2, the connection distance between the scan line Gate2 and the pixel P4 is long, when the scan line Gate1 is turned on, the pixel P4 is not activated, and when the next row of scan electrode Gate2 is turned on, because the parasitic capacitance Cgs + Cgp between the pixel P4 and the scan line Gate2 is large, the first feedthrough effect of the pixel P4 is large, and no second feedthrough effect exists.
The four types of pixels have different types and sizes of feed-through effect, so that the displayed brightness of the pixels is different, and the pan mark is easy to generate.
Therefore, on the basis of the existing DLS driving framework in the prior art, the pixel types are reduced by changing the connection structure between the pixels, the feed-through effect between the pixels is reduced, and therefore the shaking marks are improved, and the display effect is improved.
Embodiments of the present disclosure provide a pixel driving structure and a display panel, which are described in detail below.
As shown in fig. 2, which is a schematic structural diagram of an embodiment of a pixel driving structure in the embodiment of the present application, the pixel driving structure at least includes:
the pixel unit comprises a first pixel group and a second pixel group, wherein the first pixel group and the second pixel group respectively comprise at least one sub-pixel, and the pixel units are repeatedly arranged along rows and columns on a pixel driving structure;
the grid line group comprises an upper scanning line and a lower scanning line, the upper scanning line and the lower scanning line are used for transmitting scanning signals, any row of sub-pixels simultaneously corresponds to the at least one upper scanning line and the at least one lower scanning line, all sub-pixels in the first pixel group are electrically connected with the same upper scanning line, and all sub-pixels in the second pixel group are electrically connected with the same lower scanning line;
the pixel array comprises at least one data line group, wherein the data line group comprises a first data line and a second data line which are connected in parallel and arranged in parallel, the first data line and the second data line are both used for transmitting data signals, any column of sub-pixels corresponds to at least one first data line or at least one second data line, and one sub-pixel is electrically connected with the first data line or the second data line.
In the present application, all the sub-pixels in the first pixel group are electrically connected to the same upper scan line, and all the sub-pixels in the second pixel group are electrically connected to the same lower scan line, that is, the connection distance between all the sub-pixels in the first pixel group and the upper scan line is shorter, and the connection distance between all the sub-pixels in the second pixel group and the lower scan line is shorter, with the above connection structure, the variety of the multiple parasitic capacitances of the sub-pixels in the first pixel group and the second pixel group is reduced, so that when the scan signal is driven along the scan direction from the upper scan line to the lower scan line, the first feedthrough effect of the first pixel group and the second pixel group is smaller, and the second feedthrough effect of the first pixel group is larger than that of the pixel P3 (specifically refer to fig. 1) in the prior art driving structure, but is much smaller than the first feedthrough effect of the first pixel group, the no secondary feed-through effect of second pixel group consequently compares in prior art's pixel drive structure, and this application has adopted simpler pixel drive structure, has reduced the feed-through effect type that appears among the pixel drive process, improves and shows the uneven problem of bright dark, has reduced the risk that the line of shaking the head appears in the display process.
The technical solution of the present application will be described below with reference to specific examples.
In this embodiment, the voltage polarities of two adjacent data line groups are different.
As shown in fig. 2, the schematic diagram of the pixel architecture shown in fig. 2 is only a small part of the panel driving architecture, and a part of the structure of the pixel driving structure shown in fig. 2 includes at least one Data line group, specifically including a Data line group Data1, a Data line group Data2, a Data line group Data3, a Data line group Data4, a Data line group Data5, and a Data line group Data6, where the Data line group includes a first Data line and a second Data line that are parallel and parallel.
Specifically, the Data line group Data1 includes a first Data line Data1# D1 and a second Data line Data1# D2 which are parallel and parallel arranged, the Data line group Data2 includes a first Data line Data2# D1 and a second Data line Data2# D2 which are parallel and parallel arranged, the Data line group Data2 includes a first Data line Data2# D2 and a second Data line Data2# D2 which are parallel and parallel arranged, and the Data line group Data2 includes a first Data line Data2# D2 and a second Data line Data2# D2 which are parallel and parallel arranged.
In this embodiment, the voltage polarities of the Data line group Data1 and the Data line group Data2 are different, the voltage polarities of the Data line group Data3 and the Data line group Data4 are different, and the voltage polarities of the Data line group Data5 and the Data line group Data6 are different, as shown in fig. 2, the voltage polarities of the Data line group Data1, the Data line group Data3, and the Data line group Data5 are negative, and the voltage polarities of the Data line group Data2, the Data line group Data4, and the Data line group Data6 are positive, where the voltage polarities of the first Data line and the second Data line corresponding to each Data line group are the same, and the voltage polarities of the sub-pixels electrically connected to the first Data line or the second Data line corresponding to the same Data line group are also the same, where the voltage polarities of the first Data line, the second Data line, and each sub-pixel are not described again, which can be specifically shown in fig. 2.
In this embodiment, as shown in fig. 2 to 5, the first pixel group and the second pixel group are adjacently arranged along a first direction, the first direction is an extending direction of the upper scan line or the lower scan line, and the second direction is an extending direction of the first data line or the second data line.
Specifically, as shown in fig. 2 to 5 as an example, the upper scan line Gate1 and the lower scan line Gate2 above and below the first row of sub-pixels form one Gate line group, the upper scan line Gate3 and the lower scan line Gate4 above and below the second row of sub-pixels form another Gate line group, the upper scan line Gate1, the lower scan line Gate2, the upper scan line Gate3 and the lower scan line Gate4 are arranged in parallel, and the extending direction of the upper scan line Gate1 is the first direction.
In the present embodiment, as shown in fig. 2, the pixel unit includes a first pixel group 21 and a second pixel group 22, the first pixel group 21 and the second pixel group 22 are adjacently arranged along a first direction, and the plurality of first pixel groups 21 and the plurality of second pixel groups 22 are sequentially arranged at intervals along the first direction. All feature designations and positional descriptions used in this application are based on the orientation or positional relationship shown in the drawings and are presented solely for the purpose of facilitating a description and simplifying the description, and are not intended to indicate or imply that the device or element so referred to must have a particular orientation, be constructed and operated in a particular orientation, and are not to be construed as limiting the invention.
In another embodiment of the present application, the first pixel group includes M first sub-pixels, the second pixel group includes N second sub-pixels, M and N are natural numbers, in this embodiment, M and N have the same value and M ═ N, in this embodiment, the first pixel group and the second pixel group both correspond to K data line groups, L sub-pixels are spaced between the first data line and the second data line of each data line group, K and L are natural numbers and L ═ K ═ M ═ N. Based on the above principle, the present application specifically explains the above through a plurality of embodiments.
In another embodiment of the present application, M-N-L-K-2 may be set, that is, each pixel group includes 2 sub-pixels, the first pixel group and the second pixel group each correspond to 2 data line groups, and the first data line and the second data line of each data line group are spaced by 2 sub-pixels.
Specifically, as shown in fig. 2, the first pixel group 21 includes a second subpixel P201 and a second subpixel P202, and the second pixel group 22 includes a first subpixel P203 and a first subpixel P204;
the first pixel group 21 corresponds to a Data line group Data1 and a Data line group Data2, the first pixel group 22 corresponds to a Data line group Data2 and a Data line group Data3, 2 sub-pixels are arranged between a first Data line Data1# D1 and a second Data line Data1# D2 of the Data line group Data1, 2 sub-pixels are arranged between a first Data line Data2# D1 and a second Data line Data2# D2 of the Data line group Data2, and 2 sub-pixels are arranged between a first Data line Data3# D1 and a second Data line Data3# D2 of the Data line group Data 3;
the second subpixel P201 and the second subpixel P202 are connected to the upper scanning line Gate1 from above, and are electrically connected to the first Data line Data2# D1 of the Data line group Data2 and the second Data line Data1# D2 of the Data line group Data1, respectively, the first sub-pixel P203 and the first sub-pixel P204 are connected to the lower scan line Gate2 from below, and are electrically connected to the second Data line Data2# D2 of the Data line group Data2 and the first Data line Data3# D1 of the Data line group Data3 respectively, accordingly, the parasitic capacitances between the second subpixel P201 and the second subpixel P202 and the upper scan line Gate1 are all small, the parasitic capacitances between the first subpixel P203 and the first subpixel P204 and the lower scan line Gate2 are all small, the parasitic capacitances between the second subpixel P201 and the second subpixel P202 and the lower scan line Gate2 are all large, however, the second sub-pixel P201 and the second sub-pixel P202 are much smaller than the first sub-pixel P201 and P202.
The feedthrough effect among the first subpixel P203, the first subpixel P204, the second subpixel P201 and the second subpixel P202 is specifically analyzed based on the above structure:
in the process of driving the sub-pixels along the scanning direction from the upper scanning line Gate1 to the lower scanning line Gate2, when the upper scanning line Gate1 is turned on, the first feedthrough effect of the second sub-pixel P201 and the second sub-pixel P202 is small, and the first feedthrough effect of the first sub-pixel P203 and the first sub-pixel P204 is not generated;
when the lower scan line Gate2 is turned on, the second sub-pixel P201 and the second sub-pixel P202 have larger second feedthrough effect than the pixel P3 (refer to fig. 1 in particular) in the prior art, but much smaller first feedthrough effect than the second sub-pixel P201 and the second sub-pixel P202, and the first feedthrough effect of the first sub-pixel P203 and the first sub-pixel P204 is smaller.
Therefore, when the second pixel group 21 includes the second sub-pixel P201 and the second sub-pixel P202, and the first pixel group 22 includes the first sub-pixel P203 and the first sub-pixel P204, and the above connection structure is adopted, compared with the prior art, the feedthrough effect between the sub-pixels is reduced in the present embodiment, and the display wobbling problem can be improved.
In another embodiment of the present application, it may be set that M ═ N ═ L ═ K ═ 3, that is, each pixel group may include 3 subpixels, and the first pixel group and the second pixel group each correspond to 3 data line groups, and the first data line and the second data line of each data line group are spaced by 3 subpixels.
Specifically, as shown in fig. 3, the first pixel group 31 includes a first sub-pixel P301 to a first sub-pixel P303, and the second pixel group 32 includes a second sub-pixel P304 to a second sub-pixel P306;
the first pixel group 31 corresponds to Data line groups Data 1-Data line group Data3, the first pixel group 32 corresponds to Data line groups Data 3-Data line groups Data5, 3 subpixels are spaced between the first Data line Data1# D1 and the second Data line Data1# D2 of the Data line group Data1, 3 subpixels are spaced between the first Data line Data2# D1 and the second Data line Data2# D2 of the Data line group Data2, 3 subpixels are spaced between the first Data line Data3# D1 and the second Data line Data3# D2 of the Data line group 3, and the Data line groups 4-Data line Data6 are the same;
the first sub-pixels P301 to P303 are all connected to the lower scan line Gate2 from below and are electrically connected to the second Data line Data1# D2 of the Data line group Data1, the second Data line Data2# D2 of the Data line group Data2 and the second Data line Data3# D2 of the Data line group Data3 respectively, the second sub-pixels P304 to P306 are all connected to the upper scan line Gate1 and are electrically connected to the second Data line Data3# D2 of the Data line group 3, the first Data line Data4# D1 of the Data line group 82data 56 and the first Data line Data5# D1 of the Data line group Data5 respectively, so that the parasitic capacitances between the second sub-pixels P304 to P306 and the lower scan line Gate2 are all smaller, the parasitic capacitances between the second sub-pixels P304 to P306 and the upper scan line Gate1 are all smaller than the parasitic capacitances between the second sub-pixels P304 and the second sub-pixels P304, but the parasitic capacitances between the second sub-pixels P304 and the second sub-pixels P304 are all smaller than the parasitic capacitances between the second sub-pixels P304, the feedthrough effect between the first sub-pixel P301 to the first sub-pixel P303 and the second sub-pixel P304 to the second sub-pixel P306 is specifically analyzed based on the above structure:
in the process of driving the sub-pixels along the scanning direction from the upper scanning line Gate1 to the lower scanning line Gate2, when the upper scanning line Gate1 is turned on, the first sub-pixel P301 to the first sub-pixel P303 have no feed-through effect, and the first feed-through effect of the second sub-pixel P304 to the second sub-pixel P306 is smaller;
when the lower scan line Gate2 is turned on, the first sub-pixel P301 to the first sub-pixel P303 have a smaller feedthrough effect, and the second sub-pixel P304 to the second sub-pixel P306 have a larger feedthrough effect than the pixel P3 (refer to fig. 1) in the prior art, but the feedthrough effect is much smaller than that of the second sub-pixel P304 to the second sub-pixel P306.
Therefore, when the first pixel group 31 includes the first sub-pixel P301 to the first sub-pixel P303, and the second pixel group 31 includes the second sub-pixel P304 to the second sub-pixel P306, and the connection structure is adopted, compared with the prior art, the feedthrough effect between the sub-pixels is reduced in the present embodiment, and the display wobbling problem can be improved.
In another embodiment of the present application, it may be set that M ═ N ═ L ═ K ═ 4, that is, each pixel group may include 4 subpixels, and the first pixel group and the second pixel group each correspond to 4 data line groups, and the first data line and the second data line of each data line group are spaced by 4 subpixels.
Specifically, as shown in fig. 4, the first pixel group 41 includes a first subpixel P401 to a first subpixel P404, and the second pixel group 42 includes a second subpixel P405 to a second subpixel P408;
wherein, the first sub-pixel P401 to the first sub-pixel P404 are all connected with the lower scanning line Gate2 from the bottom, and are respectively electrically connected with the second Data line Data1# D2 of the Data line group Data1, the second Data line Data2# D2 of the Data line group Data2, the second Data line Data3# D2 of the Data line group Data3 and the second Data line Data4# D2 of the Data line group Data4, the second sub-pixel P405 to the second sub-pixel P408 are all connected with the upper scanning line Gate2 from the top, and are respectively electrically connected with the second Data line Data2# D2 of the Data line group Data2, the first Data line Data2# D2 of the Data line group Data2 and the first Data line Data2# D2 of the Data line Data2 and the first Data line Data2# D2 of the Data line 2, therefore, the parasitic capacitances between the first sub-pixel P404 and the lower scanning line Gate2 are all smaller than the parasitic capacitances between the second sub-pixel P408 and the second Data lines P2, and the parasitic capacitances between the second sub-pixel P2 of the scanning lines P2 are all smaller than the parasitic scanning lines P2, however, the second sub-pixel P405 to the second sub-pixel P408 are caused to generate a second feedthrough effect much smaller than the first feedthrough effect, and the feedthrough effects between the first sub-pixel P401 to the first sub-pixel P404 and the second sub-pixel P405 to the second sub-pixel P408 are specifically analyzed based on the above structure:
in the process of driving the sub-pixels along the scanning direction from the upper scanning line Gate1 to the lower scanning line Gate2, when the upper scanning line Gate1 is turned on, the first sub-pixel P401 to the first sub-pixel P404 have no feed-through effect, and the first feed-through effect of the second sub-pixel P405 to the second sub-pixel P408 is small;
when the lower scan line Gate2 is turned on, the first sub-pixel P401 to the first sub-pixel P404 have a smaller first feedthrough effect, and the second sub-pixel P405 to the second sub-pixel P408 have a larger second feedthrough effect than the above-mentioned exemplary prior art pixel P3 (refer to fig. 1 in particular), but the second feedthrough effect is much smaller than the first feedthrough effect of the second sub-pixel P405 to the second sub-pixel P408.
Therefore, when the first pixel group 41 includes the first sub-pixel P401 to the first sub-pixel P404, and the second pixel group 42 includes the second sub-pixel P405 to the second sub-pixel P408, and the connection structure is adopted, compared with the prior art, the feedthrough effect between the sub-pixels is reduced in the present embodiment, and the display wobbling problem can be improved.
In another embodiment of the present application, M ═ N ═ L ═ K ═ 6 may be set, that is, each pixel group may include 6 subpixels, and the first pixel group and the second pixel group each correspond to 6 data line groups, with 6 subpixels spaced between the first data line and the second data line of each data line group.
Specifically, as shown in fig. 5, the first pixel group 61 includes a first subpixel P601 to a first subpixel P606, and the second pixel group 62 includes a second subpixel P607 to a second subpixel P612;
wherein the first sub-pixel P601 to the first sub-pixel P606 are connected with the scan line Gate from above, and are respectively electrically connected with the first Data line Data # D of the Data line group Data, the first Data line Data # D of the Data line group Data and the first Data line Data # D of the Data line group Data, the second sub-pixel P607 to the second sub-pixel P612 are connected with the lower scan line Gate from below, and are respectively electrically connected with the second Data line Data # D of the Data line group Data, the second Data line Data # D of the Data line group Data and the second Data line # D of the Data, therefore, parasitic capacitances between the first sub-pixel P601 to the first sub-pixel P606 and the lower scan line Gate are smaller, the parasitic capacitances between the second sub-pixel P607 to the second sub-pixel P612 and the upper scan line Gate1 are all small, but the parasitic capacitances between the second sub-pixel P607 to the second sub-pixel P612 and the lower scan line Gate2 are all large, but actually, the second sub-pixel P607 to the second sub-pixel P612 generate the second feedthrough effect far smaller than the first feedthrough effect, and the feedthrough effects between the first sub-pixel P601 to the first sub-pixel P606 and the second sub-pixel P607 to the second sub-pixel P612 are specifically analyzed based on the above structure:
in the process of driving the sub-pixels along the scanning direction from the upper scanning line Gate1 to the lower scanning line Gate2, when the upper scanning line Gate1 is turned on, the first sub-pixel P601 to the first sub-pixel P606 have small one-time feed-through effect, and the second sub-pixel P607 to the second sub-pixel P612 have no feed-through effect;
when the lower scan line Gate2 is turned on, the second feedthrough effect of the first sub-pixel P601-the first sub-pixel P606 is larger than that of the pixel P3 (refer to fig. 1 in particular), but the second feedthrough effect is much smaller than that of the first sub-pixel P601-the first sub-pixel P606, and the first feedthrough effect of the second sub-pixel P607-the second sub-pixel P612 is smaller.
Therefore, when the first pixel group 61 includes the first sub-pixel P601 to the first sub-pixel P606, and the second pixel group 61 includes the second sub-pixel P607 to the second sub-pixel P612, and the connection structure is adopted, compared with the prior art, the feedthrough effect between the sub-pixels is reduced in the present embodiment, and the display wobbling problem can be improved.
In another embodiment of the present application, two adjacent sub-pixels arranged along the first direction share the same first data line or the same second data line, and two adjacent sub-pixels arranged along the first direction may not share the same first data line or the same second data line.
Specifically, as shown in fig. 3, the first subpixel P303 and the first subpixel P304 share the first data line D6. As shown in fig. 4, the first subpixel P404 and the first subpixel P405 may share the second data line D8, and here, the two adjacent subpixels arranged along the first direction may not share the same first data line or share the same second data line, which is not specifically exemplified.
In this embodiment, two adjacent sub-pixels arranged along the first direction do not share the same first data line or the same second data line, so that the voltage polarities of the two adjacent sub-pixels are different, that is, single-point inversion can be realized in the first direction for the two adjacent sub-pixels, and the first data line or the same second data line is shared by the two adjacent sub-pixels arranged along the first direction, that is, the voltage polarities of the two adjacent sub-pixels are the same, that is, two-point inversion can be realized in the first direction for the two adjacent sub-pixels, thereby effectively improving the problem of displaying moving patterns.
In another embodiment of the present application, two adjacent sub-pixels arranged in the second direction do not share the same first data line or the same second data line.
Specifically, as shown in fig. 6, the pixel unit includes a second pixel group 23 and a second pixel group 24, the second pixel group 23 and the second pixel group 24 are arranged along the second direction, a second sub-pixel P205 and a second sub-pixel P207 in the second pixel group 23 are arranged adjacently along the second direction, and a second sub-pixel P206 and a second sub-pixel P208 in the second pixel group 24 are arranged adjacently along the second direction, for understanding of the present embodiment, the second pixel group 23 and the second pixel group 24 are two examples provided by the present embodiment, and a connection structure between the second pixel group 23 and the second pixel group 24 is not specifically described herein.
In this embodiment, in fact, all the subpixels arranged along the second direction in this application do not share the same first data line or the same second data line, and the voltage polarities of the two adjacent subpixels are different, that is, the single-point inversion can be realized in the two adjacent subpixels in the second direction, so that the problem of displaying the moving patterns is effectively solved.
In another embodiment of the present application, a display panel is provided, which includes at least the pixel driving structure as described above.
The above detailed description is provided for the pixel driving structure and the display panel provided in the embodiments of the present application, and the principles and embodiments of the present invention are explained in detail herein by applying specific examples, and the above description of the embodiments is only used to help understanding the method and the core idea of the present invention; meanwhile, for those skilled in the art, according to the idea of the present invention, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present invention.

Claims (10)

1. A pixel driving structure, comprising at least:
a pixel unit including a first pixel group and a second pixel group, each of the first pixel group and the second pixel group including at least one sub-pixel, the pixel unit being repeatedly arranged along rows and columns on the pixel driving structure;
at least one grid line group, wherein the grid line group comprises an upper scanning line and a lower scanning line, the upper scanning line and the lower scanning line are used for transmitting scanning signals, any row of sub-pixels simultaneously corresponds to at least one upper scanning line and at least one lower scanning line, all sub-pixels in the first pixel group are electrically connected with the same upper scanning line, and all sub-pixels in the second pixel group are electrically connected with the same lower scanning line;
the pixel array comprises at least one data line group, wherein the data line group comprises a first data line and a second data line which are connected in parallel and arranged in parallel, the first data line and the second data line are both used for transmitting data signals, any column of sub-pixels corresponds to at least one first data line or at least one second data line, and one sub-pixel is electrically connected with the first data line or the second data line.
2. The pixel driving structure as claimed in claim 1, wherein the voltage polarities of two adjacent data line groups are different.
3. The pixel driving structure according to claim 2, wherein the first pixel group and the second pixel group are adjacently arranged in a first direction, the first direction being an extending direction of the upper scan line or the lower scan line.
4. The pixel driving structure according to claim 3, wherein two adjacent sub-pixels arranged along the first direction share the same first data line or the same second data line.
5. The pixel driving structure according to claim 3, wherein two adjacent sub-pixels arranged in the first direction do not share the same first data line or the same second data line.
6. The pixel driving structure according to claim 3, wherein two adjacent sub-pixels arranged along a second direction do not share the same first data line or the same second data line, and the second direction is an extending direction of the first data line or the second data line.
7. The pixel driving structure according to claim 1, wherein the first pixel group includes M first sub-pixels, the second pixel group includes N second sub-pixels, M and N are natural numbers, and M ═ N.
8. The pixel driving structure according to claim 7, wherein the first pixel group and the second pixel group each correspond to K data line groups, K is a natural number and K-M-N.
9. The pixel driving structure according to claim 8, wherein the first data line and the second data line of each of the data line groups are spaced apart by L subpixels, L being a natural number and L ═ K.
10. A display panel comprising at least a pixel driving structure as claimed in any one of claims 1 to 9.
CN202210505678.XA 2022-05-10 2022-05-10 Pixel driving structure and display panel Pending CN114743487A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115497428A (en) * 2022-08-17 2022-12-20 Tcl华星光电技术有限公司 Brightness compensation method, readable storage medium and display device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115497428A (en) * 2022-08-17 2022-12-20 Tcl华星光电技术有限公司 Brightness compensation method, readable storage medium and display device
CN115497428B (en) * 2022-08-17 2023-10-17 Tcl华星光电技术有限公司 Brightness compensation method, readable storage medium, and display device

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