CN114726450A - Dispersion-tolerant clock recovery method and system - Google Patents
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Abstract
The invention discloses a dispersion-tolerant clock recovery method and a system, and provides an improved square timing error detection based on a signal Cyclic Autocorrelation Function (CAF), popularizes a classical corresponding function and shows larger dispersion tolerance, provides a dispersion-tolerant timing error detection time domain solution, and reestablishes equivalence between time domain and frequency domain time error detection in a frequency spectrum correlation framework. The invention analyzes the common square timing error detection from the angle of the cyclostationary theory, thereby naturally solving the problem of dispersion fault-tolerant timing error detection. By the solution, a generalized square timing error detection is obtained, the method can tolerate larger dispersion without performing dispersion equalization in advance, and can be widely applied to the technical field of signal processing.
Description
Technical Field
The invention relates to the technical field of signal processing, in particular to a dispersion-tolerant clock recovery method and a dispersion-tolerant clock recovery system.
Background
Coherent optical receivers equipped with analog-to-digital converters (ADCs) and Digital Signal Processing (DSPs) have been the subject of intensive research. Coherent detection of optical signals provides excellent sensitivity and supports the use of complex modulation formats such as Polarization Division Multiplexing (PDM) Quadrature Phase Shift Keying (QPSK) and hexadecimal quadrature amplitude modulation (16 QAM). These modulation formats allow for a multiple increase in optical communication capacity. Meanwhile, in coherent detection, linear transmission impairments such as dispersion (CD) and Polarization Mode Dispersion (PMD) of the optical fiber can be equalized by digital signal processing. One of the core tasks of digital signal processing is to synchronize the receiver and the transmitter, since in practice they use separate clock signals. Independent clock signals generated by crystal oscillators are not connected with each other, and slight frequency and phase jitter can cause clock asynchronization of a transmitting end and a receiving end in high-speed coherent optical communication. While a coherent receiver must resample the input data correctly so that a symbol-spaced or fractionally-spaced equalizer can be implemented correctly. Coherent receivers rely on a local clock to collect the incoming optical signal. A common case of digital signal processing is to sample the data using a nominal clock, but at a sampling rate close to an integer multiple of the baud rate. The sampling error is corrected by Timing Error Detection (TED) and by, for example, a feedback loop and a digital interpolator. This process is then equivalent to Timing Phase Recovery (TPR) of the sampling clock at the receiver. Some timing phase recovery implementations also support direct extraction of the clock as a clock reference for other modules of the receiver. Accurate and robust timing error detection is therefore central to clock recovery and has long been recognized as a key issue in digital signal processing. However, conventional timing error detection is sensitive to other optical channel distortions, such as chromatic dispersion and polarization mode dispersion. To reduce the effects, it is common practice to perform blind equalization of dispersion and polarization mode dispersion before the timing phase recovery module. Nevertheless, residual dispersion may still exist and cause jitter in timing recovery.
Disclosure of Invention
In view of this, embodiments of the present invention provide a dispersion-tolerant clock recovery method and system, which can tolerate a larger dispersion without performing dispersion equalization in advance.
In a first aspect, an embodiment of the present invention provides a dispersion-tolerant clock recovery method, including:
oversampling the input dual-polarized optical signal to obtain sampling data;
performing signal autocorrelation processing according to the sampling data to determine a delay data point;
according to the delay data points, carrying out shift processing on the sampling data to obtain a first sequence and a second sequence;
determining a first autocorrelation sequence by the first sequence, determining a second autocorrelation sequence by the second sequence, determining a third sequence from the first autocorrelation sequence in combination with a delayed data sequence length, determining a fourth sequence from the second autocorrelation sequence; the length of the delay data sequence is determined according to the delay data points, the frequency resolution of the length of the delay data sequence is divided according to the target quota number, and the quota of the frequency resolution of the length of the delay data sequence is increased from 1 to the target quota number;
determining a fifth sequence from the third sequence and the fourth sequence;
determining the number of distance points from the target sampling point in the time domain according to the fifth sequence;
and recovering the clock according to the distance points.
Optionally, the method further comprises:
and performing clock recovery quality evaluation according to the clock component strength and the clock jitter variance.
Optionally, the oversampling the input dual-polarized optical signal to obtain sampling data includes:
oversampling the first polarization state signal according to a sample function to obtain first sampling data;
and oversampling the second polarization state signal according to a response function to obtain second sampling data.
Optionally, the performing signal autocorrelation processing according to the sampling data to determine delay data points includes:
determining signal autocorrelation data according to the sampling data;
introducing delay data time, and performing cycle processing on the signal autocorrelation data;
determining a delay data point from the cyclically processed signal autocorrelation data.
Optionally, the determining a fifth sequence according to the third sequence and the fourth sequence includes:
summing and adding elements of the third sequence and the fourth sequence to obtain a fifth sequence;
wherein the number of the fifth sequence is the number of target quota.
Optionally, the determining, according to the fifth sequence, the number of distance points from a target sampling point in the time domain includes:
when the value of the fifth sequence is zero, determining the number of distance points from a target sampling point in a time domain according to the frequency resolution share of the length of the delay data sequence;
wherein the number of distance points is a ratio of a share of the frequency resolution of the length of the delayed data sequence to the target share number.
Optionally, the method further comprises:
and carrying out simulation verification according to a simulation system of the optical communication system numerical simulation.
In a second aspect, embodiments of the invention provide a dispersion-tolerant clock recovery system, comprising:
the device comprises a first module, a second module and a third module, wherein the first module is used for oversampling an input dual-polarization optical signal to obtain sampling data;
the second module is used for carrying out signal autocorrelation processing according to the sampling data and determining a delay data point;
a third module, configured to perform shift processing on the sampled data according to the delayed data point to obtain a first sequence and a second sequence;
a fourth module, configured to determine a first autocorrelation sequence by the first sequence, determine a second autocorrelation sequence by the second sequence, determine a third sequence according to the first autocorrelation sequence in combination with a length of a delayed data sequence, and determine a fourth sequence according to the second autocorrelation sequence; the length of the delay data sequence is determined according to the delay data points, the frequency resolution of the length of the delay data sequence is divided according to the target quota number, and the quota of the frequency resolution of the length of the delay data sequence is increased from 1 to the target quota number;
a fifth module for determining a fifth sequence from the third sequence and the fourth sequence;
a sixth module, configured to determine, according to the fifth sequence, a number of distance points from a target sampling point in a time domain;
and the seventh module is used for recovering the clock according to the distance points.
In a third aspect, an embodiment of the present invention provides an electronic device, including a processor and a memory;
the memory is used for storing programs;
the processor executes the program to implement the method according to the first aspect of the embodiment of the present invention.
In a fourth aspect, embodiments of the present invention provide a computer-readable storage medium storing a program for execution by a processor to implement a method as described above.
The embodiment of the invention also discloses a computer program product or a computer program, which comprises computer instructions, and the computer instructions are stored in a computer readable storage medium. The computer instructions may be read by a processor of a computer device from a computer-readable storage medium, and the computer instructions executed by the processor cause the computer device to perform the foregoing method.
The embodiment of the invention firstly carries out oversampling on an input dual-polarization state optical signal to obtain sampling data; then, performing signal autocorrelation processing according to the sampling data to determine delay data points; then, according to the delay data points, the sampling data is subjected to shift processing to obtain a first sequence and a second sequence; then determining a first autocorrelation sequence by the first sequence, determining a second autocorrelation sequence by the second sequence, determining a third sequence according to the first autocorrelation sequence and determining a fourth sequence according to the second autocorrelation sequence by combining the length of a delayed data sequence; the length of the delay data sequence is determined according to the delay data points, the frequency resolution of the length of the delay data sequence is divided according to the target quota number, and the quota of the frequency resolution of the length of the delay data sequence is increased from 1 to the target quota number; then determining a fifth sequence from the third sequence and the fourth sequence; then determining the number of distance points from the target sampling point in the time domain according to the fifth sequence; and finally, performing clock recovery according to the distance point number. The invention analyzes common square timing error detection from the perspective of cyclostationary theory based on signal autocorrelation, can tolerate larger dispersion, and does not need dispersion equalization in advance.
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In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings required to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the description below are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 is a schematic flow chart of a dispersion-tolerant clock recovery method according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of a dispersion tolerant clock recovery method according to an embodiment of the present invention;
fig. 3 is an autocorrelation spectrum diagram of a phase recovery compensation signal transmitting a 32 gbaud rate according to an embodiment of the present invention;
FIG. 4 is a graph comparing the variance of the timing jitter according to the embodiment of the present invention with the conventional algorithm;
FIG. 5 is a graph comparing the clock component intensity of the present invention and the conventional algorithm.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
In a first aspect, referring to fig. 1, an embodiment of the present invention provides a dispersion-tolerant clock recovery method, including:
oversampling the input dual-polarization state optical signal to obtain sampling data;
performing signal autocorrelation processing according to the sampling data to determine a delay data point;
according to the delay data points, carrying out shift processing on the sampling data to obtain a first sequence and a second sequence;
determining a first autocorrelation sequence by the first sequence, determining a second autocorrelation sequence by the second sequence, determining a third sequence from the first autocorrelation sequence in combination with a delayed data sequence length, determining a fourth sequence from the second autocorrelation sequence; the length of the delay data sequence is determined according to the delay data points, the frequency resolution of the length of the delay data sequence is divided according to the target quota number, and the quota of the frequency resolution of the length of the delay data sequence is increased from 1 to the target quota number;
determining a fifth sequence from the third sequence and the fourth sequence;
determining the number of distance points from the target sampling point in the time domain according to the fifth sequence;
and recovering the clock according to the distance points.
Optionally, the method further comprises:
and performing clock recovery quality evaluation according to the clock component strength and the clock jitter variance.
Optionally, the oversampling the input dual-polarized optical signal to obtain sampling data includes:
oversampling the first polarization state signal according to a sample function to obtain first sampling data;
and oversampling the second polarization state signal according to a response function to obtain second sampling data.
Optionally, the performing signal autocorrelation processing according to the sampling data to determine delay data points includes:
determining signal autocorrelation data according to the sampling data;
introducing delay data time, and performing cycle processing on the signal autocorrelation data;
determining a delay data point from the cyclically processed signal autocorrelation data.
Optionally, the determining a fifth sequence according to the third sequence and the fourth sequence includes:
summing and adding elements of the third sequence and the fourth sequence to obtain a fifth sequence;
wherein the number of the fifth sequence is the target volume number.
Optionally, the determining, according to the fifth sequence, the number of distance points from a target sampling point in the time domain includes:
when the value of the fifth sequence is zero, determining the number of distance points from a target sampling point in a time domain according to the frequency resolution share of the length of the delay data sequence;
wherein the number of distance points is a ratio of a share of the frequency resolution of the length of the delayed data sequence to the target share number.
Optionally, the method further comprises:
and carrying out simulation verification according to a simulation system of the optical communication system numerical simulation.
In a second aspect, embodiments of the invention provide a dispersion-tolerant clock recovery system, comprising:
the device comprises a first module, a second module and a third module, wherein the first module is used for oversampling an input dual-polarization optical signal to obtain sampling data;
the second module is used for carrying out signal autocorrelation processing according to the sampling data and determining a delay data point;
a third module, configured to perform shift processing on the sampled data according to the delayed data point to obtain a first sequence and a second sequence;
a fourth module, configured to determine a first autocorrelation sequence by the first sequence, determine a second autocorrelation sequence by the second sequence, determine a third sequence according to the first autocorrelation sequence in combination with a length of a delayed data sequence, and determine a fourth sequence according to the second autocorrelation sequence; the length of the delay data sequence is determined according to the delay data points, the frequency resolution of the length of the delay data sequence is divided according to the target quota number, and the quota of the frequency resolution of the length of the delay data sequence is increased from 1 to the target quota number;
a fifth module for determining a fifth sequence from the third sequence and the fourth sequence;
a sixth module, configured to determine, according to the fifth sequence, a number of distance points from a target sampling point in a time domain;
and the seventh module is used for carrying out clock recovery according to the distance point number.
The content of the embodiment of the method of the invention is all applicable to the embodiment of the system, the function of the embodiment of the system is the same as the embodiment of the method, and the beneficial effect achieved by the embodiment of the system is the same as the beneficial effect achieved by the method.
Another aspect of the embodiments of the present invention further provides an electronic device, including a processor and a memory;
the memory is used for storing programs;
the processor executes the program to implement the method as described above.
The contents of the embodiment of the method of the present invention are all applicable to the embodiment of the electronic device, the functions specifically implemented by the embodiment of the electronic device are the same as those of the embodiment of the method, and the beneficial effects achieved by the embodiment of the electronic device are also the same as those achieved by the method.
Yet another aspect of the embodiments of the present invention provides a computer-readable storage medium, which stores a program, which is executed by a processor to implement the method as described above.
The contents of the embodiment of the method of the present invention are all applicable to the embodiment of the computer-readable storage medium, the functions specifically implemented by the embodiment of the computer-readable storage medium are the same as those of the embodiment of the method described above, and the advantageous effects achieved by the embodiment of the computer-readable storage medium are also the same as those achieved by the method described above.
The embodiment of the invention also discloses a computer program product or a computer program, which comprises computer instructions, and the computer instructions are stored in a computer readable storage medium. The computer instructions may be read by a processor of a computer device from a computer-readable storage medium, and the computer instructions executed by the processor cause the computer device to perform the foregoing method.
The present invention is further illustrated in detail below with reference to specific examples. It should be understood that the specific embodiments described herein are merely illustrative of the invention and do not limit the invention.
First, the timing error detection principle is as follows:
the types of modulation signals commonly used in coherent optical communication systems (e.g., QPSK and 16QAM) can be modeled as cyclostationary random processes because of the periodicity in the mean and autocorrelation functions (ACFs) of these modulation signals, as in equation (1):
mx(t+T0)＝mx(t)
Rx(t+τ/2+T0,τ)＝Rx(t+τ/2,τ)
wherein R isx(t,τ)＝E{x(t)x*(t-τ)}，mx(T) represents a signal sequence, T0Denotes the period, τ is the delay time, E { } denotes the mathematical expectation, which is the same as the symbol interval of the modulated signal.
The fourier coefficients of the autocorrelation function are as in equation (2):
wherein, at the harmonic frequency alpha is k/T0Is non-zero and harmonic frequencies are for time varying signal mx(t) is cyclic and is therefore called the Cyclic Autocorrelation Function (CAF). The zeroth coefficient with α ═ 0 is considered a time-averaged autocorrelation function. It can be shown that a non-zero cyclic autocorrelation function implies a sequence mx(T) correlation between two frequency shifted signals, relative frequency shift α ═ k/T0。
Furthermore, the correlation can be characterized in the frequency domain by using a fourier transform of a cyclic autocorrelation function, as in equations (3) and (4):
wherein,
known as the Spectral Correlation Function (SCF), which is a generalization of the normal Power Spectral Density (PSD). The power spectral density is also only at the harmonic frequency α -k/T0Is non-zero and drops to power spectral density when α is 0.
Wherein XWRepresenting a short-time fourier transform of a signal segment of duration W. It gives the original signal mx(t) a frequency distribution of the correlation between the two frequency shifted versions of (t). With uncorrelated symbols [ a ]n]And timing error τ0Is written as x (t) ═ Σ an g(t-τ0-nT0) Where g (t) is the pulse shaping function.
By using the cyclic property of the cyclic autocorrelation function, the spectral correlation function of the signal is as shown in formula (5):
i.e. the information of the timing error is contained in the spectral correlation function. For bandwidth limitation of + -1/T0Of the signal of (g), (f), the spectral correlation function being non-zero only at the first two harmonic frequencies, i.e. α -0 and α -1/T0When the user wants to use the device. The timing error can be estimated from the frequency averaged spectral correlation function, and α ═ 1/T0The estimated timing error is as in equation (6):
the first equation is referred to as the Goldol timing error detection. The integration can be done in a small frequency range of around 0, which is equivalent to a weighting function for the spectral correlation function. This is considered a pre-filtering technique that improves the performance of such timing error detection jitter. The second equation in equation (5) derives from the relationship in equation (2) and is also a direct result of the spectral correlation function and the cyclic autocorrelation function being a pair of fourier transforms. Using a non-probabilistic expression, the second part is as in equation (6):
this is known as square timing error detection. In practice, it uses the baud rate of the signal to estimate the phase of the spectral line. Kikuchi considers that this is the second order periodicity of the cyclostationary stochastic process x (t) converted to the first order periodicity (harmonic frequency of baud rate) by a second order transform. Here, the use of the cyclic autocorrelation function and the spectral correlation function for description is equivalent because α ═ 1/T0。
It is well known that the dispersion effect of optical fibers reduces the spectral dependence and hence the timing error detection, since it introduces a secondary phase response in the signal spectrum. Thus, the spectral correlation function (considering equation (3)) obtains an additional linear phase term due to chromatic dispersion. A straightforward way to mitigate the effects of chromatic dispersion and restore spectral correlation is of course to compensate for the linear phase term in the spectral correlation function. On the other hand, the frequency domain linear phase term in the spectral correlation function due to chromatic dispersion is equivalent to a constant time offset in the cyclic autocorrelation function. The shift is proportional to the accumulated dispersion, i.e., Δ τ ═ λ 2 DL/(cT)0) Where λ is the wavelength of light, D is the dispersion coefficient, L is the length of the fiber, and c is the speed of light. Δ τ is the amount of signal delay caused by dispersion. Thus, one way to recover spectral correlation without compensating for dispersion is to set the correlation in a cyclic autocorrelation functionΔ τ is the same appropriate delay.
The invention provides a new timing error detection calculation formula, such as formula (7):
wherein,
in practice, the clock phase delay in timing error detection can be quickly located based on a linear search, thereby achieving an optimal estimate of the timing error. The proposed architecture for dispersion tolerant timing error detection is shown in fig. 2. Let N be the block size of the data samples used to calculate a cyclic autocorrelation function value in equation (7), corresponding to a particular delay τ, and let M be the number of cyclic autocorrelation function points needed to search for the maximum value. The additional complexity of the proposed timing error detection includes a length-2 NM multiplier for evaluating the modulo-square, an M comparator for maximization, and an N sample buffer space. The block size N may be 512 samples and is proportional to the maximum amount of dispersion to be scanned.
Specifically, the embodiment of the present invention implements a clock recovery algorithm at a receiving end of a coherent optical communication system, and specifically implements the clock recovery algorithm by the following process steps:
first, the input signals are x (t) and y (t), where x (t) is Ix + i × Qx; similarly, Y (t) is also true. i is an imaginary number, where Ix is the in-phase signal and Qx is the quadrature signal, so x (t) and y (t) are both complex signals. But Ix and Qx alone are real numbers. The following operations operate on both X and Y, but for simplicity, the description of Y is omitted, since X and Y polarizations experience the same impairments in the channel, and only the course of the X polarization state is stated.
The first step is as follows:
the input optical signal is oversampled for both polarization states, i.e., x (t) repeat (x (t)), y (t) repeat (y (t)), where x (t) is the received raw data, and x (t) is the oversampled data. The number of samples per symbol at this time is greater than 2. I.e., SPS greater than 2. Similarly, Y (t) is also true.
The second step is that:
p ═ x (t) × (t), Q ═ y (t) × (t) are calculated. x (t) and y (t) are each a complex sequence. P and Q are here meant to be signal autocorrelation. Since x (t) and y (t) are higher order modulations, there are in-phase and quadrature components. Contains phase information but becomes a real number by conjugate multiplication with itself. In this case, both P and Q have no phase information and are both real number domains. And P and Q are only positive and negative, because several data points (i.e. SPS) in x (t) and y (t) represent a symbol of 32G baud rate, two very high peaks appear in P and Q obtained after autocorrelation where the frequency is equal to the baud rate in the frequency domain, as shown in fig. 3, which is the frequency spectrum of P. The dispersed secondary phase acts on the intensity, weakening the intensity of the two peaks. It is not possible to determine whether or not the peak intensity at this time is maximum. The dispersion causes signal delays of different frequencies in the signal, and therefore makes a cycle P ═ x (t) × (t-t)0),Q＝y(t)*y*(t-t0) The point where the peak intensity is the largest is found and this method is also the method of compensating for dispersion, since the dispersion is the smallest when the peak is the largest. T here0Is the delayed sequence x (t) data time (but corresponds to only an integer number of points of the sequence in digital signal processing). When P and Q are calculated, each t0P and Q are both in memory, so that the delay data point TT is calculated when P and Q are multiplied to obtain the maximum value0。
The third step:
shifting the signal x (t) by TT calculated in the second step0To shift TT for signal x (t)0One data point, namely x (t-TT)0) The sequence m (t) is obtained.
The fourth step:
calculating a (m (t), where a is already the autocorrelation sequence, multiplied by the phase
(if multiplied by)
Corresponding to an integer point of movement in the time domain. But n is 32, n0Increasing gradually from 1 to 32. The phase multiplied in the frequency domain is therefore shifted by less than one point in the time domain, the second step has previously stated that the step can be shifted by only an integer number of points, but the step can be shifted by not an integer number of points) to obtain a sequence
The same operation for Y polarization gives F (w). Summing and adding all elements in the sequences G (w) and F (w) to obtain S (w), taking the imaginary part of the complex number S (w), and obtaining the calculated imaginary part value as the result of the timing error detection. Where f is the signal frequency, T0Is the symbol period and n is the division of the frequency resolution into n (frequency resolution refers to the difference in frequency represented between two points in the frequency domain in digital signal processing). The XY two additions are used to average out to avoid chance for single polarization states.
The fifth step:
the fourth step is an iterative process, n0Repeated 32 times and gradually increased, (previously mentioned that if there is no time shift, there is no phase in the frequency domain, when the in-phase signal and the quadrature signal satisfy the signal (Ix)2＝(Qx)2Since Ix and Qx are loaded onto lasers expressed by sine and cosine functions, respectively, and Ix and Qx are random sequences. And if sampling is done at the best instant, the above equation is satisfied, but the frequency domain introduces phase due to clock error, and the equation is not satisfied) to obtain 32 s (w). If S (w) calculated at this time is zero, it indicates sampling at the optimal sampling point. If S (w) is not zero, it indicates that a clock error exists. Therefore, the method of determining the clock error is the abscissa of s (w) 0. Since the abscissa is n0The value of (c). That is, the frequency domain signal is multiplied by a phase, and then whether the sampling point is the best sampling point is detected, if not, the next phase is continuously multiplied.
And a sixth step:
the abscissa obtained in the fifth step is one of the 32 points moved in the fifth step, and is assumed to be the lth point. Then the phase introduced due to the clock error is
The number of distance points in the time domain from the optimal sample point is L/32.
It should be noted that the clock recovery quality can be evaluated by performance indexes such as clock component strength and clock jitter variance.
In some embodiments, a simulation verification method is further included, the method is based on a simulation system of numerical simulation of an optical communication system, the simulation system includes: the optical transmitter, the dispersion leading-in module, the receiving part and the signal processing part; the method comprises the following steps:
A) the optical transmitter electro-optically modulates the laser emitted by the laser, and generates an emitted optical signal carrying a modulation signal by adopting modulation formats such as quadrature amplitude modulation;
B) as the transmitted optical signal passes through the optical transmission link, dispersion effects present in the optical fiber distort it. Signal distortion caused by fiber dispersion effects can affect the strength of clock components related to the baud rate of the signal;
C) the output optical signal after passing through the optical transmission link is subjected to photoelectric detection at a receiving part, and then is quantized and converted into a digital signal at a proper sampling rate through an analog-to-digital conversion circuit;
D) the digital signal output from the receiving section is subjected to timing error detection by a signal processing section through a clock recovery algorithm.
The simulation verification of the system scheme is as follows:
in the simulation, MATLAB software is used for numerically simulating a dispersion-tolerant clock recovery algorithm system, and the system consists of an optical transmitter, a dispersion introduction module, a receiving part and a signal processing part. The signal processing part comprises an oversampling module, a timing detection part and a timing performance evaluation three-part function.
In this simulated system, the Cumulative Dispersion (CD) value of the optical transmission link was set to be in the range of 0-10 ns/nm. And for the digital signals acquired by the receiving part, resampling the signals to different signal baud rate multiples based on the digital interpolation. And then, the over-sampled digital signal is subjected to timing detection by applying the dispersion tolerance timing detection method provided by the invention, so that a timing phase is obtained. The timing phase obtained by timing detection of the dispersion tolerance timing detection method provided by the invention is compared with the performance of the traditional timing detection method under different accumulated dispersion conditions, and the clock component strength, the timing jitter variance and the S curve performance of the timing phase and the traditional timing detection method are compared. When the accumulated dispersion in the optical fiber transmission exceeds a certain amount, the traditional clock recovery in the signal processing of the receiving end cannot lock and determine the optimal sampling time. The dispersion tolerance timing detection method provided by the invention can still obtain an accurate timing phase under the accumulated dispersion amount of 10ns/nm, the clock component intensity is kept at a higher level, the timing jitter variance is kept at a lower level, and the accuracy of the optimal sampling phase indicated by the S curve is high. The simulation results are shown in fig. 3 and fig. 4, and it can be seen that the timing jitter variance and the clock component strength of the algorithm of the present invention at 2.1 times, 3 times and 4 times oversampling are all smaller than those of the conventional algorithm, and the performance of the algorithm of the present invention is superior to that of the conventional algorithm.
In summary, the clock recovery algorithm plays an important role in Digital Signal Processing (DSP) of modern coherent optical communication systems. At the receiving end, the baud rate of the signal and the local sampling clock are referenced, and the optimal sampling moment is found through continuous timing error correction. In the algorithm of clock recovery, Timing Error Detection (TED) is mainly used to provide instantaneous error tracking. However, typical timing error detection is affected by Chromatic Dispersion (CD) and polarization Rotation (ROP), and therefore additional compensation algorithms are required to remove these linear impairments prior to timing error detection. In response to the problems of the prior art, embodiments of the present invention provide an improved square timing error detection based on a Cyclic Autocorrelation Function (CAF) of a signal, which generalizes its classical correspondence function and exhibits greater dispersion tolerance. It provides a dispersion tolerant time domain solution for timing error detection. The equivalence between time-domain and frequency-domain time-error detection is re-established in the framework of spectral correlation. The modified square timing error detection requires minimal additional complexity. Numerical simulations were performed to investigate the performance of the proposed timing error detection. Specifically, the invention analyzes common square timing error detection from the perspective of cyclostationary theory, thereby naturally solving the problem of dispersion fault-tolerant timing error detection. By this solution a generalized square timing error detection is obtained which can tolerate large dispersion without prior dispersion equalization.
In alternative embodiments, the functions/acts noted in the block diagrams may occur out of the order noted in the operational illustrations. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality/acts involved. Furthermore, the embodiments presented and described in the flow charts of the present invention are provided by way of example in order to provide a more thorough understanding of the technology. The disclosed methods are not limited to the operations and logic flows presented herein. Alternative embodiments are contemplated in which the order of various operations is changed and in which sub-operations described as part of larger operations are performed independently.
Furthermore, although the present invention is described in the context of functional modules, it should be understood that, unless otherwise indicated to the contrary, one or more of the described functions and/or features may be integrated in a single physical device and/or software module, or one or more functions and/or features may be implemented in separate physical devices or software modules. It will also be appreciated that a detailed discussion of the actual implementation of each module is not necessary for an understanding of the present invention. Rather, the actual implementation of the various functional modules in the apparatus disclosed herein will be understood within the ordinary skill of an engineer, given the nature, function, and internal relationship of the modules. Accordingly, those skilled in the art can, using ordinary skill, practice the invention as set forth in the claims without undue experimentation. It is also to be understood that the specific concepts disclosed are merely illustrative of and not intended to limit the scope of the invention, which is defined by the appended claims and their full scope of equivalents.
The functions, if implemented in the form of software functional units and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present invention may be embodied in the form of a software product, which is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes.
The logic and/or steps represented in the flowcharts or otherwise described herein, such as an ordered listing of executable instructions that can be considered to implement logical functions, can be embodied in any computer-readable medium for use by or in connection with an instruction execution apparatus, device, or device (e.g., a computer-based apparatus, processor-containing apparatus, or other device that can fetch the instructions from the instruction execution apparatus, device, or device and execute the instructions). For the purposes of this description, a "computer-readable medium" can be any means that can contain, store, communicate, propagate, or transport the program for use by or in connection with the instruction execution apparatus, device, or apparatus.
More specific examples (a non-exhaustive list) of the computer-readable medium would include the following: an electrical connection (electronic device) having one or more wires, a portable computer diskette (magnetic device), a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber device, and a portable compact disc read-only memory (CDROM). Additionally, the computer-readable medium could even be paper or another suitable medium upon which the program is printed, as the program can be electronically captured, via for instance optical scanning of the paper or other medium, then compiled, interpreted or otherwise processed in a suitable manner if necessary, and then stored in a computer memory.
It should be understood that portions of the present invention may be implemented in hardware, software, firmware, or a combination thereof. In the above embodiments, the various steps or methods may be implemented in software or firmware stored in memory and executed by suitable instruction execution devices. For example, if implemented in hardware, as in another embodiment, any one or combination of the following techniques, which are known in the art, may be used: a discrete logic circuit having a logic gate circuit for implementing a logic function on a data signal, an application specific integrated circuit having an appropriate combinational logic gate circuit, a Programmable Gate Array (PGA), a Field Programmable Gate Array (FPGA), or the like.
In the description herein, references to the description of the term "one embodiment," "some embodiments," "an example," "a specific example," or "some examples," etc., mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
While embodiments of the present invention have been shown and described, it will be understood by those of ordinary skill in the art that: various changes, modifications, substitutions and alterations can be made to the embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the claims and their equivalents.
While the preferred embodiments of the present invention have been illustrated and described, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.
Claims (10)
1. A dispersion tolerant clock recovery method, comprising:
oversampling the input dual-polarized optical signal to obtain sampling data;
performing signal autocorrelation processing according to the sampling data to determine a delay data point;
according to the delay data points, carrying out shift processing on the sampling data to obtain a first sequence and a second sequence;
determining a first autocorrelation sequence by the first sequence, determining a second autocorrelation sequence by the second sequence, determining a third sequence from the first autocorrelation sequence in combination with a delayed data sequence length, determining a fourth sequence from the second autocorrelation sequence; the length of the delay data sequence is determined according to the delay data points, the frequency resolution of the length of the delay data sequence is divided according to the target quota number, and the quota of the frequency resolution of the length of the delay data sequence is increased from 1 to the target quota number;
determining a fifth sequence from the third sequence and the fourth sequence;
determining the number of distance points from the target sampling point in the time domain according to the fifth sequence;
and recovering the clock according to the distance points.
2. A dispersion-tolerant clock recovery method as recited in claim 1, further comprising:
and performing clock recovery quality evaluation according to the clock component strength and the clock jitter variance.
3. The dispersion-tolerant clock recovery method of claim 1, wherein oversampling the input dual-polarized optical signal to obtain sampled data comprises:
oversampling the first polarization state signal according to a sample function to obtain first sampling data;
and oversampling the second polarization state signal according to a response function to obtain second sampling data.
4. A dispersion-tolerant clock recovery method as claimed in claim 1, wherein said performing signal autocorrelation processing on said sampled data to determine delay data points comprises:
determining signal autocorrelation data according to the sampling data;
introducing delay data time, and performing cycle processing on the signal autocorrelation data;
determining a delay data point from the cyclically processed signal autocorrelation data.
5. A dispersion-tolerant clock recovery method according to claim 1, wherein said determining a fifth sequence from said third sequence and said fourth sequence comprises:
summing and adding elements of the third sequence and the fourth sequence to obtain a fifth sequence;
wherein the number of the fifth sequences is a target volume number.
6. A dispersion-tolerant clock recovery method according to claim 1, wherein said determining the number of distance points in the time domain from a target sample point from said fifth sequence comprises:
when the value of the fifth sequence is zero, determining the number of distance points from a target sampling point in a time domain according to the frequency resolution share of the length of the delay data sequence;
wherein the number of distance points is a ratio of a share of the frequency resolution of the length of the delayed data sequence to the target share number.
7. A dispersion tolerant clock recovery method according to any one of claims 1 to 6, further comprising:
and carrying out simulation verification according to a simulation system of the optical communication system numerical simulation.
8. A dispersion tolerant clock recovery system comprising:
the device comprises a first module, a second module and a third module, wherein the first module is used for oversampling an input dual-polarization optical signal to obtain sampling data;
the second module is used for carrying out signal autocorrelation processing according to the sampling data and determining a delay data point;
a third module, configured to perform shift processing on the sampled data according to the delayed data point to obtain a first sequence and a second sequence;
a fourth module, configured to determine a first autocorrelation sequence by the first sequence, determine a second autocorrelation sequence by the second sequence, determine a third sequence according to the first autocorrelation sequence in combination with a length of a delayed data sequence, and determine a fourth sequence according to the second autocorrelation sequence; the length of the delay data sequence is determined according to the delay data points, the frequency resolution of the length of the delay data sequence is divided according to the target quota number, and the quota of the frequency resolution of the length of the delay data sequence is increased from 1 to the target quota number;
a fifth module for determining a fifth sequence from the third sequence and the fourth sequence;
a sixth module, configured to determine, according to the fifth sequence, a number of distance points from a target sampling point in a time domain;
and the seventh module is used for carrying out clock recovery according to the distance point number.
9. An electronic device comprising a processor and a memory;
the memory is used for storing programs;
the processor executing the program realizes the method of any one of claims 1 to 7.
10. A computer-readable storage medium, characterized in that the storage medium stores a program, which is executed by a processor to implement the method according to any one of claims 1 to 7.
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