CN114709326A - Superconducting quantum interferometer and preparation method thereof - Google Patents

Abstract

The invention relates to a superconducting quantum interferometer and a preparation method thereof, wherein the superconducting quantum interferometer comprises: a substrate; the ground plane is formed on the surface of the substrate; the first insulating layer is formed on the surface, far away from the substrate, of the ground plane; a Josephson junction including a first superconducting layer, a second insulating layer, and a second superconducting layer stacked in this order as a bottom electrode; the third insulating layer covers the exposed first insulating layer and the Josephson junction, a third through hole and a fourth through hole are arranged in the third insulating layer, the third through hole is exposed out of the first superconducting layer, and the fourth through hole is exposed out of the bottom electrode; the resistor is formed on the surface, far away from the first insulating layer, of the third insulating layer; the third superconducting layer covers the third insulating layer, fully fills the third through hole and the fourth through hole and serves as a top electrode; an opening is arranged in the third superconducting layer, and the opening divides the third superconducting layer into two parts which are connected through a resistor. By adding the ground wire superconducting layer, the pinned magnetic flux quantum is limited in the first through hole, so that the influence of magnetic flux pinning is reduced.

Description

Superconducting quantum interferometer and preparation method thereof

Technical Field

The application relates to the technical field of superconducting quantum interferometers, in particular to a superconducting quantum interferometer and a preparation method thereof.

Background

Superconducting quantum interference devices (SQUIDs) are used in many detection fields because of their extremely high sensitivity to current and magnetic fields.

However, in the working process of the SQUID, unnecessary magnetic fields easily influence the test result of the SQUID, and mainly come from two aspects, namely the first is to test the magnetic field in the natural environment; secondly, when the temperature of the device is reduced to a critical temperature, the magnetic flux is easy to be pinned in the device. For the first case, the influence of the magnetic field in nature can be avoided as much as possible by building a magnetic shielding test environment. However, in the second case, especially for SQUID devices with large size or line width, there is no effective method to solve the problem at present.

Disclosure of Invention

Based on the above, it is necessary to provide a superconducting quantum interferometer, a method for manufacturing the same, and a superconducting transition edge detector array readout system for the problem that the magnetic flux pinning affects the test result of the SQUID device.

To achieve the above object, in one aspect, the present invention provides a superconducting quantum interferometer comprising:

a substrate;

the ground plane is formed on the surface of the substrate, and a first through hole is formed in the ground plane;

the first insulating layer is formed on the surface, far away from the substrate, of the ground plane and is filled with the first through hole, and a second through hole is formed in the first insulating layer;

the Josephson junction comprises a first superconducting layer, a second insulating layer and a second superconducting layer which are sequentially stacked, wherein the second superconducting layer is positioned on the surface, away from the ground plane, of the first insulating layer and filled in the second through hole to serve as a bottom electrode;

a third insulating layer covering the exposed first insulating layer and the josephson junction, wherein a third through hole and a fourth through hole are arranged in the third insulating layer, the third through hole exposes the first superconducting layer, and the fourth through hole exposes the bottom electrode;

the resistor is formed on the surface, far away from the first insulating layer, of the third insulating layer;

the third superconducting layer covers the surface of the third insulating layer, which is far away from the first insulating layer, and the resistor, fills the third through hole and the fourth through hole and is used as a top electrode; an opening is formed in the third superconducting layer, and the opening divides the third superconducting layer into two parts which are connected through the resistor;

wherein the bottom electrode and the top electrode form a superconducting ring.

According to the superconducting quantum interferometer, the current of the Josephson junction is led out through the Josephson junction, the resistor and the superconducting ring formed by the second superconducting layer and the third superconducting layer, and the value of the detected physical parameter can be obtained based on the led-out current. In addition, by additionally arranging the ground wire superconducting layer, the pinned magnetic flux is easily driven to the position of the first through hole of the ground wire superconducting layer and limited in the first through hole, so that the influence of the magnetic flux pinning is reduced, and the detection precision of the superconducting quantum interferometer is improved.

In one embodiment, the ground plane is a layer of superconducting material.

Because the superconducting metal film has diamagnetism in a superconducting state, the pinned magnetic flux quantum can be pushed to the first through hole in the ground wire layer by using the ground wire layer as a superconducting material layer, so that the influence of magnetic flux pinning is reduced.

In one embodiment, the ground line layer is a niobium layer or a niobium nitride layer, the first insulating layer is a silicon dioxide layer, the thickness of the ground line layer is 100-.

The thickness of the ground plane is limited to 100-1000nm, and the thickness of the first insulating layer is limited to 100-1000nm, so that the requirement on the processing technology is not too high, and the volume of the finally formed superconducting quantum interferometer is prevented from being too large. In addition, the thickness of the ground plane is limited to be less than or equal to that of the first insulating layer, so that the first insulating layer can fill the first through hole of the ground plane, and the ground plane is isolated from the second superconducting layer above the first insulating layer at the position of the first through hole and is isolated and protected.

In one embodiment, the ground plane comprises: the ground wire superconducting layers and the ground wire insulating layers are alternately arranged in sequence at intervals along the thickness direction; a fifth through hole is formed in the ground wire superconducting layer, and the fifth through hole in the next ground wire superconducting layer is filled in the ground wire insulating layer; and a sixth through hole is formed in the ground wire insulating layer, and the sixth through hole in the ground wire insulating layer positioned below the ground wire superconducting layer is filled with the ground wire superconducting layer so as to connect the adjacent ground wire superconducting layers.

Through the ground wire layer and the ground wire insulating layer of interval arrangement in turn along thickness direction to make each layer ground wire superconductive layer interconnect, and then make the ground wire layer that includes multilayer ground wire superconductive layer can reach approximate effect with the same ground wire layer that comprises superconducting material of thickness, simultaneously, keep apart the ground wire layer through the protection of ground wire insulating layer, thereby guarantee the stability of ground wire layer.

In one embodiment, the ground superconducting layer is a niobium layer or a niobium nitride layer, the ground insulating layer is a silicon dioxide layer, the thickness of the ground superconducting layer is 100-.

In one embodiment, the first superconducting layer comprises a niobium layer or a niobium nitride layer, the second insulating layer comprises an aluminum-aluminum oxide layer, the resistor comprises a palladium-gold film, the second superconducting layer comprises a niobium layer or a niobium nitride layer, the third insulating layer comprises a silicon dioxide layer, the third superconducting layer comprises a niobium layer or a niobium nitride layer, the thickness of the first superconducting layer is 100-500nm, the thickness of the second insulating layer is 5-30nm, the thickness of the second superconducting layer is 100-500nm, the thickness of the third insulating layer is 100-1000nm, the thickness of the palladium-gold film is 50-500nm, the thickness of the third superconducting layer is 200-800nm, the thickness of the second superconducting layer is larger than or equal to that of the first insulating layer, and the thickness of the third superconducting layer is larger than or equal to that of the third insulating layer.

The invention also provides a preparation method of the superconducting quantum interferometer, which comprises the following steps:

providing a substrate;

forming a ground wire layer on the surface of a substrate, and forming a first through hole in the ground wire layer;

forming a first insulating layer on the surface of the ground plane far away from the substrate, wherein the first through hole is filled with the first insulating layer, and a second through hole is formed in the insulating layer;

forming a Josephson junction on a surface of the first insulating layer away from the ground plane, the Josephson junction including a first superconducting layer, a second insulating layer and a second superconducting layer stacked in this order, the second superconducting layer being located on a surface of the first insulating layer away from the ground plane and filling up the second via hole as a bottom electrode;

forming a third insulating layer on the exposed first insulating layer and the Josephson junction, and opening a third through hole and a fourth through hole in the third insulating layer, wherein the third through hole exposes the first superconducting layer, and the fourth through hole exposes the bottom electrode;

forming a resistor on the surface of the third insulating layer far away from the first insulating layer;

and forming a third superconducting layer on the surface of the third insulating layer, which is far away from the first insulating layer, wherein the third superconducting layer fills the third through hole and the fourth through hole and is used as a top electrode, and an opening is formed in the third superconducting layer and divides the third superconducting layer into two parts connected through the resistor, wherein the top electrode and the bottom electrode form a superconducting ring.

According to the preparation method of the superconducting quantum interferometer, the ground plane is formed, and the first through hole is formed in the ground plane, so that the pinned magnetic flux is easily driven to the position of the first through hole of the ground plane and is limited in the first through hole, and the influence of magnetic flux pinning is reduced. In addition, the ground wire superconducting layer, the Josephson junction, the third insulating layer, the resistor and the third superconducting layer can be prepared by the existing method, so that the preparation process does not need to be greatly changed, and the modification cost is low.

In one embodiment, forming a ground plane on a substrate comprises the steps of:

the method comprises the steps of depositing ground wire superconducting layers and ground wire insulating layers which are alternately arranged in sequence at intervals in the thickness direction on a substrate, forming a fifth through hole in the ground wire superconducting layers when the ground wire superconducting layers are deposited, and forming a sixth through hole in the ground wire insulating layers when the ground wire insulating layers are deposited, wherein the fifth through hole in the ground wire superconducting layer positioned below the ground wire insulating layers is filled with the ground wire insulating layers, and the sixth through hole in the ground wire insulating layer positioned below the ground wire superconducting layers is filled with the ground wire superconducting layers so as to connect the adjacent ground wire superconducting layers.

Through the above mode deposit in proper order ground wire layer and the ground wire insulating layer of interval arrangement in turn along thickness direction to make each layer ground wire superconductive layer interconnect, and then make the ground wire layer including multilayer ground wire superconductive layer can reach approximate effect with the same ground wire layer that comprises superconductive material of thickness, simultaneously, keep apart the ground wire layer through the ground wire insulating layer protection, thereby guarantee the stability of ground wire layer.

In one embodiment, forming a josephson junction on the first insulating layer comprises:

depositing a second superconducting layer, a second insulating layer and a first superconducting layer on the first insulating layer in sequence;

sequentially processing the first superconducting layer, the second insulating layer and the second superconducting layer through a micro-machining process to machine the first superconducting layer, the second insulating layer and the second superconducting layer to a predetermined pattern.

In one embodiment, after forming the third superconducting layer on the surface of the third insulating layer away from the first insulating layer, the method further includes:

and processing the third superconducting layer through a micro-processing technology to obtain a required top electrode pattern.

The third superconducting layer can be used as a top electrode by processing the third superconducting layer into a required top electrode pattern, in addition, the third superconducting layer and the second superconducting layer form a superconducting ring, and the Josephson junction is embedded into the superconducting ring, so that in the detection process, the current in the Josephson junction is led out through the superconducting ring, and the detection of corresponding physical parameters is realized.

The invention also provides a superconducting transition edge detector array reading system, which comprises the superconducting quantum interferometer, wherein the superconducting quantum interferometer is used for reading signals of the superconducting transition edge detector array.

The superconducting transition edge detector array reading system comprises the superconducting quantum interferometer, and the detection precision of the superconducting quantum interferometer is high, so that the accuracy of the superconducting quantum interferometer for reading signals of the superconducting transition edge detector array is high, and the superconducting transition edge detector array reading system has high reading precision.

Drawings

In order to more clearly illustrate the technical solutions in the embodiments or the conventional technologies of the present application, the drawings used in the descriptions of the embodiments or the conventional technologies will be briefly introduced below, it is obvious that the drawings in the following descriptions are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.

FIG. 1 is a schematic cross-sectional view of a superconducting quantum interferometer provided in an embodiment;

FIG. 2 is a schematic flow chart of a method of fabricating a superconducting quantum interferometer provided in one embodiment;

FIGS. 3-14 are schematic diagrams of structures of step-wise formed superconducting quantum interferometers provided by embodiments of the present invention;

fig. 15 is a schematic flowchart illustrating a step of forming a josephson junction on a surface of the first insulating layer away from the ground plane according to an embodiment of the present invention.

Description of reference numerals:

101-substrate, 102-ground plane, 1021-first via, 103-first insulation layer, 1031-second via, 104-first superconducting layer, 105-second insulation layer, 106-second superconducting layer, 107-third insulation layer, 1071-third via, 1072-fourth via, 108-resistor, 109-third superconducting layer, 1091-opening.

Detailed Description

To facilitate an understanding of the present application, the present application will now be described more fully with reference to the accompanying drawings. Embodiments of the present application are set forth in the accompanying drawings. This application may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.

Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used in the description of the present application herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.

It will be understood that when an element or layer is referred to as being "on," "adjacent to," "connected to," or "coupled to" other elements or layers, it can be directly on, adjacent to, connected or coupled to the other elements or layers or intervening elements or layers may be present. In contrast, when an element is referred to as being "directly on," "directly adjacent to," "directly connected to" or "directly coupled to" other elements or layers, there are no intervening elements or layers present. It will be understood that, although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers, doping types and/or sections, these elements, components, regions, layers, doping types and/or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer, doping type or section from another element, component, region, layer, doping type or section. Thus, a first element, component, region, layer, doping type or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the present invention; for example, the first doping type may be made the second doping type, and similarly, the second doping type may be made the first doping type; the first doping type and the second doping type are different doping types, for example, the first doping type may be P-type and the second doping type may be N-type, or the first doping type may be N-type and the second doping type may be P-type.

Spatial relational terms, such as "under," "below," "under," "over," and the like may be used herein to describe one element or feature's relationship to another element or feature as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, elements or features described as "below" or "beneath" other elements or features would then be oriented "above" the other elements or features. Thus, the exemplary terms "under" and "under" can encompass both an orientation of above and below. In addition, the device may also include additional orientations (e.g., rotated 90 degrees or other orientations) and the spatial descriptors used herein interpreted accordingly.

As used herein, the singular forms "a", "an" and "the" may include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises/comprising," "includes" and "including," or "having," and the like, specify the presence of stated features, integers, steps, operations, elements, components, or combinations thereof, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, or combinations thereof.

Embodiments of the invention are described herein with reference to cross-sectional illustrations that are schematic illustrations of idealized embodiments (and intermediate structures) of the invention, such that variations from the shapes shown are to be expected, for example, due to manufacturing techniques and/or tolerances. Thus, embodiments of the invention should not be limited to the particular shapes of regions illustrated herein but are to include deviations in shapes that result, for example, from manufacturing techniques. For example, an implanted region shown as a rectangle will typically have rounded or curved features and/or implant concentration gradients at its edges rather than a binary change from implanted to non-implanted region. Also, a buried region formed by implantation may result in some implantation in the region between the buried region and the surface through which the implantation is performed. Thus, the regions illustrated in the figures are schematic in nature and their shapes are not intended to illustrate the actual shape of a region of a device and are not intended to limit the scope of the present invention.

In one embodiment, as shown in FIG. 1, the present invention provides a superconducting quantum interferometer comprising:

a substrate 101;

a ground layer 102 formed on a surface of the substrate 101, the ground layer 102 having a first through hole 1021 therein;

a first insulating layer 103 formed on the surface of the ground plane 102 away from the substrate 101 and filling the first through hole 1021, wherein a second through hole 1031 is formed in the first insulating layer 103;

a josephson junction including a first superconducting layer 104, a second insulating layer 105 and a second superconducting layer 106 stacked in this order, the second superconducting layer 106 being located on the surface of the first insulating layer 103 away from the ground plane 102 and filling the second via 1031 as a bottom electrode;

a third insulating layer 107 covering the exposed first insulating layer 103 and the josephson junction, wherein a third through hole 1071 and a fourth through hole 1072 are formed in the third insulating layer 107, the first superconducting layer 104 is exposed from the third through hole 1071, and the bottom electrode is exposed from the fourth through hole 1072;

a resistor 108 formed on the surface of the third insulating layer 107 away from the first insulating layer 103;

a third superconducting layer 109 covering the surface of the third insulating layer 107 away from the first insulating layer 103 and the resistor 108, and filling the third through hole 1071 and the fourth through hole 1072 as a top electrode; an opening 1091 is provided in the third superconducting layer 109, and the opening 1091 divides the third superconducting layer 109 into two parts connected by a resistor 108;

wherein the bottom electrode and the top electrode form a superconducting ring.

In the above structure, the substrate 101 may be a flat base with high resistance 108 rate and small roughness. The substrate 101 may be a high-resistivity silicon wafer, a sapphire substrate, or a high-resistivity intrinsic silicon wafer. The ground plane 102 may be a layer of superconducting material formed of the same superconducting material, such as niobium.

In application, when the superconducting quantum interferometer comprises one Josephson junction, the superconducting quantum interferometer can be used as a radio-frequency superconducting quantum interferometer through adaptive design, and when the superconducting quantum interferometer comprises two Josephson junctions, the superconducting quantum interferometer can be used as a direct-current superconducting quantum interferometer through adaptive design.

Specifically, since the ground plane 102 has diamagnetism in the superconducting state, the pinned flux quantum is pushed to the first via 1021, and secondly, when the temperature just starts to be lower than the superconducting transition temperature, the thermal energy is larger than the pinning potential energy, so the thermal disturbance causes the magnetic flux to migrate to the first via 1021, and the pinned flux is easily driven to the position of the metal via under the dual actions of the diamagnetism and the thermal disturbance of the thin film.

In the superconducting quantum interferometer, a current for leading out the josephson junction is formed by the josephson junction, the resistor 108, the superconducting ring formed by the second superconducting layer 106 and the third superconducting layer 109, and a detected physical parameter value can be obtained based on the led-out current. In addition, by additionally arranging the ground wire superconducting layer, the pinned magnetic flux is easily driven to the position of the first through hole 1021 of the ground wire superconducting layer and is limited in the first through hole 1021, so that the influence of the magnetic flux pinning is reduced, and the detection precision of the superconducting quantum interferometer is improved.

In one embodiment, the ground plane 102 is a layer of superconducting material.

Preferably, the ground plane 102, the first superconducting layer 104, and the second superconducting layer 106 are made of the same material, and when the first superconducting layer 104 and the second superconducting layer 106 are brought into a superconducting state, the ground plane 102 is also brought into a superconducting state.

Since the superconducting metal thin film has diamagnetism in a superconducting state, by making the ground layer 102 a superconducting material layer, the pinned magnetic flux quantum is pushed toward the first through hole 1021 in the ground layer 102, thereby reducing the influence of magnetic flux pinning.

In one embodiment, the ground layer 102 is a niobium layer or a niobium nitride layer, the first insulating layer 103 is a silicon dioxide layer, the thickness of the ground layer 102 is 100-1000nm, the thickness of the first insulating layer 103 is 100-1000nm, and the thickness of the ground layer 102 is less than or equal to the thickness of the first insulating layer 103.

It is to be understood that the ground plane 102 may be made of other superconducting materials, and the first insulating layer 103 may be made of other insulating materials, such as silicon nitride. Since silicon dioxide is a good insulator and has stable chemical properties, and can be kept stable in the extreme environment in which the superconducting quantum interferometer operates, the stability of the first insulating layer 103 is ensured and isolation protection of the ground plane 102 is achieved by making the first insulating layer 103 a silicon dioxide layer.

Specifically, it can be understood that the smaller the thicknesses of the ground layer 102 and the first insulating layer 103, the higher the process requirements, and the higher the thicknesses of the ground layer 102 and the first insulating layer 103, the larger the superconducting quantum interferometer volume is easily caused, and thus, in order to balance the process requirements and the superconducting quantum interferometer volume, the thickness of the ground layer 102 is limited to 100-. When the thickness of the ground plane 102 is less than or equal to the thickness of the first insulating layer 103, the first through hole 1021 on the ground plane 102 can be filled with the first insulating layer 103, so as to achieve the isolation function of the first insulating layer 103. The thickness of the ground plane 102 may be 100nm, 200nm, 300nm, 400nm, 500nm, 600nm, 700nm, 800nm, 900nm, 1000nm, and likewise, the thickness of the first insulating layer 103 may be 100nm, 200nm, 300nm, 400nm, 500nm, 600nm, 700nm, 800nm, 900nm, 1000nm, preferably, the thickness of the ground plane 102 is 200nm, and the thickness of the first insulating layer 103 may be 210 nm.

By limiting the thickness of the ground line layer 102 to 100-1000nm and the thickness of the first insulating layer 103 to 100-1000nm, the requirement on the processing technology is not too high, and the volume of the finally formed superconducting quantum interferometer is not too large. In addition, the thickness of the ground layer 102 is defined to be equal to or less than the thickness of the first insulating layer 103, so that the first insulating layer 103 can fill the first through hole 1021 of the ground layer 102, and further isolate the ground layer 102 from the second superconducting layer 106 above the first insulating layer 103 at the position of the first through hole 1021, and isolate and protect the ground layer 102.

In one embodiment, the ground plane 102 includes: ground superconducting layers and ground insulating layers (not shown in the figure) alternately arranged in sequence at intervals along the thickness direction; a fifth through hole is formed in the ground wire superconducting layer, and the ground wire insulating layer is filled in the fifth through hole in the ground wire superconducting layer positioned below the ground wire insulating layer; and a sixth through hole is formed in the ground wire insulating layer, and the ground wire superconducting layer fills the sixth through hole in the ground wire insulating layer positioned below the ground wire superconducting layer so as to connect the adjacent ground wire superconducting layers.

When the ground plane 102 includes a plurality of ground superconducting layers, the uppermost layer of the ground plane 102 is a ground superconducting layer. The thickness of the ground wire superconducting layer is larger than or equal to that of the lower ground wire insulating layer so as to fill the sixth through hole in the lower ground wire insulating layer, and the thickness of the ground wire insulating layer is larger than or equal to that of the lower ground wire superconducting layer so as to fill the fifth through hole in the lower ground wire superconducting layer. Preferably, the fifth via holes of the ground superconducting layers of the respective layers are located at the same position in the thickness direction.

Specifically, the ground wire insulating layer is arranged between two adjacent ground wire superconducting layers, and it can be understood that when the first ground wire superconducting layer is deposited, a fifth through hole is formed in the first ground wire superconducting layer. Then, depositing a first ground wire insulating layer on the first ground wire superconducting layer, obviously, the ground wire insulating layer at the position of the sixth through hole is sunk into the fifth through hole, and the fifth through hole on the first ground wire superconducting layer is filled with the first ground wire insulating layer; and when the first ground wire insulating layer is deposited, forming a sixth through hole on the first ground wire insulating layer. Then, continuously depositing a second ground wire superconducting layer on the first ground wire insulating layer, wherein the second ground wire superconducting layer deposited on the first ground wire insulating layer can fill the fifth through hole to be connected with the first ground wire superconducting layer; and when the deposition of the second layer of ground wire superconducting layer is finished, a hole is formed in the position, corresponding to the fifth through hole of the first layer of ground wire superconducting layer, of the second layer of ground wire superconducting layer. The ground wire superconducting layers and the ground wire insulating layers are continuously deposited in the above mode until the ground wire layer 102 is deposited, and finally the positions of the fifth through holes of the ground wire superconducting layers in the thickness direction are the same, and the ground wire superconducting layers are connected with each other.

In this embodiment, the ground plane 102 and the ground insulating layer are alternately arranged in sequence along the thickness direction at intervals, and the ground superconducting layers of the ground lines are connected with each other, so that the ground plane 102 including the plurality of ground superconducting layers can achieve an approximate effect with the ground plane 102 having the same thickness and made of superconducting materials, and meanwhile, the ground plane 102 is protected and isolated by the ground insulating layer, thereby ensuring the stability of the ground plane 102.

In one embodiment, the ground superconducting layer is a niobium layer or a niobium nitride layer, the ground insulating layer is a silicon dioxide layer, the thickness of the ground superconducting layer is 100-.

The thickness of the ground superconducting layer may be 100nm, 200nm, 300nm, 400nm, 500nm, 600nm, 700nm, 800nm, 900nm, 1000nm, and the thickness of the ground insulating layer may be 100nm, 200nm, 300nm, 400nm, 500nm, 600nm, 700nm, 800nm, 900nm, 1000nm, preferably, the thickness of the ground layer 102 is 150nm, and the thickness of the first insulating layer 103 may be 160 nm.

In the embodiment, the thickness of the ground wire superconducting layer and the ground wire insulating layer is limited, so that the process requirements and the volume of the superconducting quantum interferometer are balanced, in addition, the thickness of the ground wire insulating layer is limited to be more than or equal to that of the ground wire superconducting layer positioned below the ground wire insulating layer, so that the ground wire insulating layer fills the fifth through hole positioned in the ground wire superconducting layer positioned below the ground wire insulating layer, further the adjacent ground wire superconducting layers at the position are isolated, and the thickness of the ground wire superconducting layer is more than or equal to that of the ground wire insulating layer positioned below the ground wire superconducting layer, so that the ground wire superconducting layer fills the sixth through hole positioned in the ground wire insulating layer positioned below the ground wire superconducting layer, so that the adjacent ground wire superconducting layers are connected, and the ground wire superconducting layers are mutually connected.

In one embodiment, the first superconducting layer 104 comprises a niobium layer or a niobium nitride layer, the second insulating layer 105 comprises an aluminum-aluminum oxide layer, the resistor 108 comprises a palladium-gold film, the second superconducting layer 106 comprises a niobium layer or a niobium nitride layer, the third insulating layer 107 comprises a silicon dioxide layer, the third superconducting layer 109 comprises a niobium layer or a niobium nitride layer, the first superconducting layer 104 has a thickness of 100-500nm, the second insulating layer 105 has a thickness of 5-30nm, the second superconducting layer 106 has a thickness of 100-500nm, the third insulating layer 107 has a thickness of 100-1000nm, the palladium-gold film has a thickness of 50-500nm, the third superconducting layer 109 has a thickness of 200-800nm, the second superconducting layer 106 has a thickness greater than or equal to the thickness of the first insulating layer 103, and the third superconducting layer 109 has a thickness greater than or equal to the thickness of the third insulating layer 107.

Among them, the thickness of the first superconducting layer 104 may be 100nm, 150nm, 200nm, 250nm, 300nm, 350nm, 400nm, 450nm, 500nm, the thickness of the second insulating layer 105 may be 5nm, 10nm, 15nm, 25nm, 30nm, the thickness of the second superconducting layer 106 may be 100nm, 150nm, 200nm, 250nm, 300nm, 350nm, 400nm, 450nm, 500nm, and in view of the thickness of the first insulating layer 103, it is preferable that the thickness of the first superconducting layer 104 is 220nm, the thickness of the second insulating layer 105 is 16nm, and the thickness of the second superconducting layer 106 is 220 nm. The thickness of the third insulating layer 107 may be 100nm, 200nm, 300nm, 400nm, 500nm, 600nm, 700nm, 800nm, 900nm, 1000 nm. It is understood that after the second superconducting layer 106 can fill the second via 1031, a recessed groove may be formed in the corresponding position of the second superconducting layer 106, and the third insulating layer 107 formed on the second superconducting layer 106 may fill the groove, whereby the thickness of the third insulating layer 107 is equal to or greater than the depth of the groove. However, in practical applications, the depth of the groove is difficult to be determined accurately, and therefore, the thickness of the third insulating layer 107 should be equal to or greater than the thickness of the second superconducting layer 106; preferably, the third insulating layer 107 is 220 nm. The thickness of the palladium-gold film can be 50nm, 100nm, 150nm, 200nm, 250nm, 300nm, 350nm, 400nm, 450nm and 500 nm; since the thickness of pd/au film affects the resistance 108 of the resistor 108, the thickness of pd/au film needs to be determined according to actual situation. It is understood that resistor 108 may be made of other materials, such as copper and aluminum. The thickness of the third superconducting layer 109 may be 200nm, 300nm, 400nm, 500nm, 600nm, 700nm, 800 nm; preferably, the thickness of the third superconducting layer 109 is 230 nm.

Specifically, the josephson junction is a three-layer structure including an insulating layer in the middle and superconducting layers at both ends. It is understood that the josephson junction of the present embodiment may be a Nb/Al-AlOx/Nb structure, and may also be a NbN/Al-AlOx/NbN structure. And by defining the thickness of the second superconducting layer 106 to be equal to or greater than the thickness of the first insulating layer 103, the second superconducting layer 106 can fill the second via 1031, thereby connecting and conducting the second superconducting layer 106 with the ground plane 102.

In this embodiment, since a typical low-temperature superconducting quantum interferometer uses Nb material and NbN material as superconducting materials, and a process for manufacturing the superconducting quantum interferometer by using the Nb material and NbN thin film material is mature, the second superconducting layer 106 of the present application includes a niobium layer or a niobium nitride layer. In addition, the thickness of the second superconducting layer 106 is limited to be greater than or equal to that of the first insulating layer 103, so that the second superconducting layer 106 can fill the second through hole 1031, the second superconducting layer 106 is connected and conducted with the ground plane 102, and further, the pinned magnetic flux in the josephson junction is driven to the position of the first through hole 1021 of the ground plane 102, the influence of the pinning magnetic flux is reduced, and the measurement accuracy of the superconducting quantum interferometer is improved. Meanwhile, since silicon dioxide is a good insulator and has stable chemical properties, and can be kept stable in the extreme environment in which the superconducting quantum interferometer operates, stability of the third insulating layer 107 is ensured and isolation protection of the josephson junction is achieved by including the silicon dioxide layer in the third insulating layer 107. In addition, the chemical property of palladium gold is corrosion resistant and is not easy to wear, so that the resistance 108 value of the resistance 108 is stable, and the stability of the measurement result of the superconducting quantum interferometer is further ensured.

It is understood that since the third superconducting layer 109 is formed on the third insulating layer 107 and fills the third through hole 1071 and the fourth through hole 1072, the third superconducting layer 109 connects the first superconducting layer 104 and the second superconducting layer 106 (bottom electrodes), respectively, and when the third superconducting layer 109 serves as a top electrode and the second superconducting layer 106 serves as a bottom electrode, the third superconducting layer 109 and the second superconducting layer 106 constitute a superconducting ring, and the josephson junction is embedded in the superconducting ring, so that a current of the josephson junction is drawn through the third superconducting layer 109 and the second superconducting layer 106.

In one embodiment, based on the same concept, as shown in fig. 1 to 14, the present invention further provides a method for manufacturing a superconducting quantum interferometer, comprising the steps of:

s201: a substrate 101 is provided.

The substrate 101 may be a high-resistance silicon wafer, a sapphire substrate, or a high-resistance intrinsic silicon wafer.

S202: a ground plane 102 is formed on the surface of the substrate 101 and a first via 1021 is provided within the ground plane 102, as shown in fig. 3 and 4.

In particular, the ground plane 102 may be deposited on the substrate 101 using a chemical vapor deposition method. Preferably, the ground plane 102 is deposited on the substrate 101 using magnetron sputtering. After deposition is complete, a first via 1021 is etched at the end of the ground plane 102 through a micro-machining process, including but not limited to photolithography and etching.

S203: a first insulating layer 103 is formed on the surface of the ground plane 102 away from the substrate 101, the first insulating layer 103 fills the first through hole 1021, and a second through hole 1031 is opened in the insulating layer, as shown in fig. 5 and 6.

Specifically, the first insulating layer 103 may be formed on the ground layer 102 using a low temperature chemical vapor deposition method. It can be understood that, during the deposition process, since the ground layer 102 has the first via 1021, the first insulating layer 103 at the position of the first via 1021 may be sunk into the first via 1021 to fill the first via 1021. After forming the first insulating layer 103 on the ground plane 102, a second via 1031 is formed on the insulating layer by a micro-machining process.

S204: a josephson junction is formed on the surface of the first insulating layer 103 away from the ground layer 102, the josephson junction including a first superconducting layer 104, a second insulating layer 105 and a second superconducting layer 106 stacked in this order, the second superconducting layer 106 being located on the surface of the first insulating layer 103 away from the ground layer 102 and filling up the second via 1031 as a bottom electrode, as shown in fig. 7 to 10.

The superconducting quantum interferometer comprises a Josephson junction if the radio-frequency superconducting quantum interferometer is prepared, and comprises two Josephson junctions if the direct-current superconducting quantum interferometer is prepared.

Specifically, a magnetron sputtering method may be employed to deposit a three-layer film on the first insulating layer 103, and then processing is performed by a micromachining process to form a josephson junction, in which the second superconducting layer 106 needs to be processed into a predetermined pattern to serve as a bottom electrode.

S205: a third insulating layer 107 is formed on the exposed first insulating layer 103 and the josephson junction, and a third via 1071 and a fourth via 1072 are formed in the third insulating layer 107, the first superconducting layer 104 being exposed from the third via 1071, and the bottom electrode being exposed from the fourth via 1072, as shown in fig. 11 and 12.

After steps S201 to S204, the first insulating layer 103, the first superconducting layer 104 and the second superconducting layer 106 are partially exposed, and the third insulating layer 107 may be deposited on the exposed portions of the first insulating layer 103, the first superconducting layer 104 and the second superconducting layer 106 by a low temperature chemical vapor deposition method. And after the deposition is completed, a third via 1071 exposing the first superconducting layer 104 and a fourth via 1072 exposing the bottom electrode are etched in the third insulating layer 107.

S206: a resistor 108 is formed on the surface of the third insulating layer 107 remote from the first insulating layer 103, as shown in fig. 13.

The resistor 108 can be prepared in two ways, namely, a layer of resistor 108 thin film is deposited on the third insulating layer 107, and then the redundant resistor 108 thin film is removed; secondly, a layer of photoresist is formed on the third insulating layer 107, then the resistor 108 region is etched, a resistor 108 thin film is formed on the resistor 108 region, and then the photoresist is stripped. The thin film of resistor 108 may be formed by electron beam evaporation, preferably by the second method.

S207: a third superconducting layer 109 is formed on the surface of the third insulating layer 107 remote from the first insulating layer 103, the third superconducting layer 109 fills the third through hole 1071 and the fourth through hole 1072 as a top electrode, and an opening 1091 is formed in the third superconducting layer 109, the opening 1091 dividing the third superconducting layer 109 into two parts connected by a resistor 108, wherein the top electrode and the bottom electrode form a superconducting loop, as shown in fig. 14 and 1.

The third superconducting layer 109 may be deposited on the third insulating layer 107 by magnetron sputtering, and during the deposition, the third superconducting layer 109 may be trapped and fill the third through hole 1071 and the fourth through hole 1072, and further be connected and conducted with the first superconducting layer 104 and the second superconducting layer 106.

According to the preparation method of the superconducting quantum interferometer, the ground layer 102 is formed, and the first through hole 1021 is formed in the ground layer 102, so that the pinned magnetic flux is easily driven to the position of the first through hole 1021 of the ground layer 102 and is limited in the first through hole 1021, and the influence of magnetic flux pinning is reduced. In addition, the ground superconducting layer, the josephson junction, the third insulating layer 107, the resistor 108 and the third superconducting layer 109 can be prepared by the existing method, so that the preparation process does not need to be greatly changed, and the modification cost is low.

In one embodiment, S202 may include the steps of: the ground wire superconducting layers and the ground wire insulating layers which are alternately arranged in sequence at intervals in the thickness direction are deposited on the substrate 101, fifth through holes are formed in the ground wire superconducting layers when the ground wire superconducting layers are deposited, and sixth through holes are formed in the ground wire insulating layers when the ground wire insulating layers are deposited, wherein the fifth through holes in the ground wire superconducting layers positioned below the ground wire insulating layers are filled with the ground wire insulating layers, and the sixth through holes in the ground wire insulating layers positioned below the ground wire superconducting layers are filled with the ground wire superconducting layers so as to connect the adjacent ground wire superconducting layers.

When the ground plane 102 includes a plurality of ground superconducting layers, the uppermost layer of the ground plane 102 is a ground superconducting layer.

Specifically, a first ground superconducting layer is deposited on the substrate, and a fifth through hole is formed in the first ground superconducting layer after the first ground superconducting layer is deposited. Then, depositing a first ground wire insulating layer on the first ground wire superconducting layer, obviously, the ground wire insulating layer at the position of the fifth through hole can be sunk into the fifth through hole, and the first ground wire insulating layer can fill the fifth through hole on the first ground wire superconducting layer; and when the first ground wire insulating layer is deposited, forming a sixth through hole on the first ground wire insulating layer. Then, continuously depositing a second ground wire superconducting layer on the first ground wire insulating layer, wherein the second ground wire superconducting layer deposited on the first ground wire insulating layer can fill the sixth through hole to be connected with the first ground wire superconducting layer; and when the deposition of the second layer of ground wire superconducting layer is finished, a hole is formed in the position, corresponding to the fifth through hole of the first ground wire superconducting layer, of the second layer of ground wire superconducting layer. And continuously depositing the ground wire superconducting layer and the ground wire insulating layer in the manner until the ground wire layer 102 is deposited, wherein the positions of the fifth through holes of the ground wire superconducting layers in the horizontal direction are the same, and the ground wire superconducting layers are connected with each other.

In this embodiment, the ground plane 102 and the ground insulating layer alternately arranged in turn along the thickness direction are deposited in the above manner, and the ground superconducting layers of the layers are connected to each other, so that the ground plane 102 including the plurality of ground superconducting layers can achieve an approximate effect with the ground plane 102 made of superconducting materials having the same thickness, and meanwhile, the ground plane 102 is isolated by the ground insulating layer protection, thereby ensuring the stability of the ground plane 102.

In one embodiment, as shown in fig. 15, step S204 may include the steps of:

s2041: second superconducting layer 106, second insulating layer 105, and first superconducting layer 104 are deposited in this order on first insulating layer 103, as shown in fig. 7.

If the first superconducting layer 104 may be a niobium layer, the second insulating layer 105 may be an aluminum-aluminum oxide layer, and the second superconducting layer 106 is a niobium layer, the josephson junction may have a Nb/Al-AlOx/Nb structure. The oxidation pressure for preparing the Al-AlOx film is 100-5000 mTorr, and the oxidation time is 5-24 hours.

Specifically, first, second superconducting layer 106 is deposited on first insulating layer 103, second insulating layer 105 is deposited on second superconducting layer 106 after deposition of second superconducting layer 106 is completed, and first superconducting layer 104 is deposited on second insulating layer 105 after deposition of second insulating layer 105 is completed.

S2042: first superconducting layer 104, second insulating layer 105, and second superconducting layer 106 are processed in this order by a micromachining process to process first superconducting layer 104, second insulating layer 105, and second superconducting layer 106 to a predetermined pattern, as shown in fig. 8 to 10.

Specifically, the first superconducting layer 104 is etched and etched in the non-opening region to define a josephson junction region, then the second insulating layer 105 is etched and etched to remove the redundant second insulating layer 105, and finally the second superconducting layer 106 is etched and etched to obtain a bottom electrode pattern required by the superconducting quantum interferometer loop. Wherein the Josephson junction area is 1-100 μm²。

In this embodiment, a josephson junction is obtained through the above steps, and the josephson junction is embedded in a superconducting quantum interferometer loop, so that a current in the josephson junction can be drawn out, and detection of a corresponding physical parameter can be realized according to the current.

In one embodiment, as shown in fig. 1, step S204 may further include the following steps: after the third superconducting layer 109 is formed on the surface of the third insulating layer 107 remote from the first insulating layer 103, the third superconducting layer 109 is processed by a micromachining process to obtain a desired top electrode pattern.

In this embodiment, the third superconducting layer 109 is processed into a desired top electrode pattern, so that the third superconducting layer 109 can be used as a top electrode, in addition, the third superconducting layer 109 and the second superconducting layer 106 form a superconducting ring, and the josephson junction is embedded in the superconducting ring, so that in the detection process, the current in the josephson junction is led out through the superconducting ring, and the detection of the corresponding physical parameters is realized.

In one embodiment, the following steps may be further included after S207: the resulting samples were scribed.

In application, it is understood that the second superconducting layer 106 may also be processed to a predetermined pattern by a micromachining process when the second superconducting layer 106 is deposited; then depositing a second insulating layer 105 on the second superconducting layer 106, and after the deposition of the second insulating layer 105 is completed, removing the excess second insulating layer 105; thereafter, first superconducting layer 104 is deposited on second insulating layer 105, and excess first superconducting layer 104 is removed.

The invention also provides a superconducting transition edge detector array reading system, which comprises the superconducting quantum interferometer, wherein the superconducting quantum interferometer is used for reading signals of the superconducting transition edge detector array.

In this embodiment, since the superconducting transition edge detector array readout system includes the above-described superconducting quantum interferometer, and since the detection precision of the above-described superconducting quantum interferometer is high, the accuracy of the superconducting quantum interferometer for reading out the signal of the superconducting transition edge detector array is high, and the superconducting transition edge detector array readout system has high readout precision.

It should be understood that, although the steps in the flowchart of fig. 2 are shown in order as indicated by the arrows, the steps are not necessarily performed in order as indicated by the arrows. The steps are not performed in the exact order shown and described, and may be performed in other orders, unless explicitly stated otherwise. Moreover, at least a portion of the steps in fig. 2 may include multiple steps or multiple stages, which are not necessarily performed at the same time, but may be performed at different times, which are not necessarily performed in sequence, but may be performed in turn or alternately with other steps or at least a portion of the other steps or stages.

In the description herein, references to the description of "some embodiments," "other embodiments," "desired embodiments," etc., mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, a schematic description of the above terminology may not necessarily refer to the same embodiment or example.

All possible combinations of the technical features of the embodiments described above may not be described for the sake of brevity, but should be considered as within the scope of the present disclosure as long as there is no contradiction between the combinations of the technical features.

The above-mentioned embodiments only express several embodiments of the present application, and the description thereof is more specific and detailed, but not construed as limiting the claims. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the concept of the present application, which falls within the scope of protection of the present application. Therefore, the protection scope of the present patent application shall be subject to the appended claims.

Claims (11)

1. A superconducting quantum interferometer, comprising:

a substrate;

the ground wire layer is formed on the surface of the substrate, and a first through hole is formed in the ground wire layer;

the first insulating layer is formed on the surface, far away from the substrate, of the ground plane and is filled with the first through hole, and a second through hole is formed in the first insulating layer;

the Josephson junction comprises a first superconducting layer, a second insulating layer and a second superconducting layer which are sequentially stacked, wherein the second superconducting layer is positioned on the surface, away from the ground plane, of the first insulating layer and is filled in the second through hole to serve as a bottom electrode;

a third insulating layer covering the exposed first insulating layer and the josephson junction, wherein a third through hole and a fourth through hole are formed in the third insulating layer, the third through hole exposes the first superconducting layer, and the fourth through hole exposes the bottom electrode;

the resistor is formed on the surface, far away from the first insulating layer, of the third insulating layer;

the third superconducting layer covers the surface, far away from the first insulating layer, of the third insulating layer and the resistor, fills the third through hole and the fourth through hole and serves as a top electrode; an opening is formed in the third superconducting layer, and the opening divides the third superconducting layer into two parts which are connected through the resistor;

wherein the bottom electrode and the top electrode form a superconducting ring.

2. The superconducting quantum interferometer of claim 1, wherein the ground plane is a layer of superconducting material.

3. The superconducting quantum interferometer of claim 2, wherein the ground layer is a niobium layer or a niobium nitride layer, the first insulating layer is a silicon dioxide layer, the thickness of the ground layer is 100-1000nm, the thickness of the first insulating layer is 100-1000nm, and the thickness of the ground layer is less than or equal to the thickness of the first insulating layer.

4. The superconducting quantum interferometer of claim 1, wherein the ground plane comprises: the ground wire superconducting layers and the ground wire insulating layers are alternately arranged in sequence at intervals along the thickness direction; a fifth through hole is formed in the ground wire superconducting layer, and the fifth through hole in the next ground wire superconducting layer is filled in the ground wire insulating layer; and a sixth through hole is formed in the ground wire insulating layer, and the sixth through hole in the ground wire insulating layer positioned below the ground wire superconducting layer is filled with the ground wire superconducting layer so as to connect the adjacent ground wire superconducting layers.

5. The superconducting quantum interferometer of claim 4, wherein the ground superconducting layer is a niobium layer or a niobium nitride layer, the ground insulating layer is a silicon dioxide layer, the thickness of the ground superconducting layer is 100-.

6. The superconducting quantum interferometer of claim 1, wherein the first superconducting layer comprises a niobium layer or a niobium nitride layer, the second insulating layer comprises an aluminum-aluminum oxide layer, the resistor comprises a palladium-gold film, the second superconducting layer comprises a niobium layer or a niobium nitride layer, the third insulating layer includes a silicon dioxide layer, the third superconducting layer includes a niobium layer or a niobium nitride layer, the thickness of the first superconducting layer is 100-500nm, the thickness of the second insulating layer is 5-30nm, the thickness of the second superconducting layer is 100-500nm, the thickness of the third insulating layer is 100-1000nm, the thickness of the palladium-gold film is 50-500nm, the thickness of the third superconducting layer is 200-800nm, the thickness of the second superconducting layer is equal to or greater than that of the first insulating layer, and the thickness of the third superconducting layer is equal to or greater than that of the third insulating layer.

7. A preparation method of a superconducting quantum interferometer is characterized by comprising the following steps:

providing a substrate;

forming a ground wire layer on the surface of a substrate, and forming a first through hole in the ground wire layer;

forming a first insulating layer on the surface of the ground plane far away from the substrate, wherein the first through hole is filled with the first insulating layer, and a second through hole is formed in the insulating layer;

forming a Josephson junction on a surface of the first insulating layer away from the ground plane, the Josephson junction including a first superconducting layer, a second insulating layer and a second superconducting layer stacked in this order, the second superconducting layer being located on a surface of the first insulating layer away from the ground plane and filling up the second via hole as a bottom electrode;

forming a third insulating layer on the exposed first insulating layer and the Josephson junction, and opening a third through hole and a fourth through hole in the third insulating layer, wherein the third through hole exposes the first superconducting layer, and the fourth through hole exposes the bottom electrode;

forming a resistor on the surface of the third insulating layer far away from the first insulating layer;

and forming a third superconducting layer on the surface of the third insulating layer, which is far away from the first insulating layer, wherein the third superconducting layer fills the third through hole and the fourth through hole and is used as a top electrode, and an opening is formed in the third superconducting layer and divides the third superconducting layer into two parts connected through the resistor, wherein the top electrode and the bottom electrode form a superconducting ring.

8. The method of claim 7, wherein forming a ground plane on the substrate comprises the steps of:

the method comprises the steps of depositing ground wire superconducting layers and ground wire insulating layers which are alternately arranged in sequence at intervals in the thickness direction on a substrate, forming a fifth through hole in the ground wire superconducting layers when the ground wire superconducting layers are deposited, and forming a sixth through hole in the ground wire insulating layers when the ground wire insulating layers are deposited, wherein the fifth through hole in the ground wire superconducting layer positioned below the ground wire insulating layers is filled with the ground wire insulating layers, and the sixth through hole in the ground wire insulating layer positioned below the ground wire superconducting layers is filled with the ground wire superconducting layers so as to connect the adjacent ground wire superconducting layers.

9. The method of fabricating a superconducting quantum interferometer of claim 7, wherein forming a josephson junction on the first insulating layer comprises:

depositing a second superconducting layer, a second insulating layer and a first superconducting layer on the first insulating layer in sequence;

sequentially processing the first superconducting layer, the second insulating layer and the second superconducting layer through a micro-machining process to machine the first superconducting layer, the second insulating layer and the second superconducting layer to a predetermined pattern.

10. The method of claim 7, further comprising, after forming a third superconducting layer on a surface of the third insulating layer remote from the first insulating layer:

and processing the third superconducting layer through a micro-processing technology to obtain a required top electrode pattern.

11. A superconducting transition edge detector array readout system comprising a superconducting quantum interferometer according to any of claims 1 to 6, for reading out signals of a superconducting transition edge detector array.

Images