CN114696885A - Satellite-borne data broadcast distribution equipment and method - Google Patents
Satellite-borne data broadcast distribution equipment and method Download PDFInfo
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Abstract
The invention provides satellite-borne data broadcast distribution equipment and a method, wherein the satellite-borne data broadcast distribution equipment comprises the following steps: the device comprises a power supply module, an encryption control module and a coding modulation module; the power supply module is used for processing an input primary power supply into a secondary power supply required by other modules and generating a working clock fs of the code modulation module; the encryption control module is used for receiving the AOS data, encrypting the AOS data according to requirements, transmitting the encrypted AOS data to the code modulation module, completing the loading and refreshing of an FPGA of the code modulation module, receiving remote control data, analyzing an instruction and switching the data transmission rate; receiving analog quantity telemetry information of other modules and digital quantity telemetry information of a code modulation module; the coding modulation module is used for receiving the remote control command and the encrypted data, the encrypted data is subjected to blank frame filling, RS coding interleaving, scrambling, spread spectrum modulation, filtering, QPSK modulation and high-speed digital-to-analog conversion chip to generate a radio frequency signal of an S frequency band, and the radio frequency signal is output after being filtered, amplified and isolated.
Description
Technical Field
The invention relates to the technical field of satellite communication, in particular to satellite-borne data broadcast distribution equipment and a satellite-borne data broadcast distribution method.
Background
The transmission of satellite load data to a ground terminal system in a timely and rapid manner is a very important research topic. Conventionally, satellite load data is transmitted to the ground by using a data transmission subsystem, or a relay subsystem transmits data to the ground by using a relay satellite. And the load data is transmitted to the ground station, processed and then sent to a terminal system. The transmission method has the disadvantages of complex process, uncertain timeliness and limited data receiving coverage. Under the wartime environment, the load data can not be effectively and timely transmitted to the user terminal, the satellite effect can not be fully exerted, and the situation of passive hit is faced. Therefore, a method for transmitting the load data, which is different from the conventional data transmission method, is needed to transmit the satellite data more effectively and more timely.
The broadcast distribution system can meet the low-rate data transmission requirement of the satellite, and the effective load data is broadcast and transmitted to the ground through the broadcast distribution equipment, so that the data coverage of all user terminals in the satellite coverage range is realized, and the wartime effect of the satellite is fully exerted. Broadcast distribution equipment has gradually become the standard for satellites. The conventional transponder design idea is adopted by the conventional satellite common broadcast distribution equipment at present, a single machine information processing flow is low-intermediate frequency modulation and then is output after up-conversion filtering and amplification, single machine information flow is complex, product power consumption and size are large, and the requirements of miniaturization and light weight of a satellite cannot be met. Therefore, it is of great significance to research a broadcast distribution apparatus having high reliability, miniaturization, and low cost.
Disclosure of Invention
The invention aims to provide satellite-borne data broadcast distribution equipment and a satellite-borne data broadcast distribution method, and aims to solve the problems that the existing satellite common broadcast distribution equipment is complex in single-machine information flow, large in product power consumption and size and incapable of meeting the requirements of miniaturization and light weight of a satellite.
In order to achieve the above object, the present invention provides a satellite borne data broadcast distribution device, including: the device comprises a power supply module, an encryption control module and a coding modulation module; wherein the content of the first and second substances,
the power supply module is used for processing an input primary power supply into a secondary power supply required by other modules, the secondary power supply is connected with the other modules through an internal connector secondarily, and a working clock fs of the code modulation module is generated;
the encryption control module is used for receiving AOS data, encrypting the AOS data according to requirements, transmitting the encrypted data to the code modulation module, completing the loading and refreshing of an FPGA of the code modulation module, receiving remote control data of the whole device, analyzing instructions in the remote control data and switching the data transmission rate; receiving analog quantity telemetry information of other modules and digital quantity telemetry information of a coding modulation module, processing and packaging the telemetry information, and sending the telemetry information to an upper computer;
the code modulation module is used for receiving a remote control command and the encrypted data, carrying out blank frame filling on the encrypted data, carrying out RS code interleaving, scrambling, spread spectrum modulation, filtering, QPSK modulation, generating a radio frequency signal f0 of an S frequency band by a high-speed digital-to-analog conversion chip, and outputting the radio frequency signal f0 after filtering, amplification and isolation.
Preferably, the power module includes a fuse protection circuit, an anti-surge circuit, an EMI filter circuit, and a DCDC converter connected in series in sequence; the fusing protection circuit is used for fusing protection of an input primary power supply; the surge prevention circuit is used for suppressing surge current; the EMI filter circuit is used for filtering; the DCDC converter is used for performing power conversion to obtain a +5.5V secondary power supply;
the system also comprises a clock circuit which is used for generating a working clock fs and outputting the working clock fs to the code modulation module through the SMA output module.
Preferably, the encryption control module includes: the circuit comprises an RS422 interface circuit, an LVDS interface circuit, a power-on reset circuit, an AD acquisition circuit, a noise circuit and an antifuse FPGA; the RS422 interface circuit is used for receiving the remote control data and sending the telemetry information; the LVDS interface circuit is used for receiving the AOD data; the power-on reset circuit is used for resetting the antifuse FPGA at the moment of power-on; the AD acquisition circuit is used for acquiring analog quantity information in the single machine; the noise circuit is used for generating a noise source; the antifuse FPGA is used for executing remote control and telemetering acquisition on the code modulation module, encrypting received AOD data according to requirements and then forwarding the encrypted AOD data to the code modulation module.
Preferably, an FPGA encryption and interface configuration program is arranged in the antifuse FPGA, and when the FPGA encryption and interface configuration program is executed, the following operations are completed: receiving internal instructions and comment information, realizing data processing and key updating management, outputting remote measurement parameters, and realizing data communication between the encryption FPGA and the code modulation FPGA; instruction parsing, telemetry parsing framing, configuration file storage, configuration file loading, dynamic refreshing of V4, and power control.
Preferably, the code modulation module includes: the SRAM type FPGA is used for receiving the encrypted data, filling null frames, encoding and interweaving RS channels, scrambling, mapping QPSK constellations, shaping filtering at multiple rates and outputting the high-speed data after digital spread spectrum modulation; the high-speed digital-to-analog conversion chip is used for converting the high-speed data into an analog differential signal and converting the analog differential signal into an S-band radio frequency signal through the BALUN; the filter is used for filtering image signals; the temperature compensation amplifying circuit is used for attenuating and compensating the temperature of the radio frequency signal; the isolation circuit is used for isolating the intermediate frequency signal; the SMA connector is used for outputting the isolated radio frequency signal.
Preferably, the code modulation module is further loaded with an FPGA code modulation program, and when the FPGA code modulation program is executed, the following operations are completed: the method comprises the steps of instruction receiving processing, clock generation and monitoring, data spontaneous generation and receiving, frame header judgment, RS channel coding and constellation mapping, multi-rate forming filtering, digital spread spectrum modulation and data output.
Preferably, the conversion rate of the high-speed digital-to-analog conversion chip in the code modulation module is set to be greater than or equal to 3Gsps, so as to perform digital-to-analog conversion on the high-speed data output by the FPGA circuit, and then the high-speed data is output as a single machine after being filtered and amplified.
Preferably, the working clock fs generated by the power module and the radio frequency signal f0 generated by the code modulation module satisfy the following relationship:
f0＝fs-fs/N，
wherein N is an integer.
The invention also provides a satellite-borne data broadcast distribution method, which is used for encrypting the broadcast distribution data and modulating spread spectrum by applying the satellite-borne data broadcast distribution equipment.
The invention has the following beneficial effects:
the satellite-borne data broadcast distribution equipment and the satellite-borne data broadcast distribution method realize full-digital spread spectrum modulation and direct radio frequency output through a system comprising a power supply module, an encryption control module and a code modulation module, do not need an up-conversion module, and have the data transmission functions of adjustable radio frequency output frequency and adjustable coding mode and transmission rate.
Drawings
Fig. 1 is a schematic structural diagram of a satellite-borne data broadcast distribution device provided in the present invention;
FIG. 2 is a schematic diagram of a power module provided in the present invention;
FIG. 3 is a schematic diagram of an encryption control module provided in the present invention;
fig. 4 is a schematic diagram of a coded modulation module provided in the present invention.
Detailed Description
While the embodiments of the present invention will be described and illustrated in detail with reference to the accompanying drawings, it is to be understood that the invention is not limited to the specific embodiments disclosed, but is intended to cover various modifications, equivalents, and alternatives falling within the scope of the invention as defined by the appended claims.
For the convenience of understanding the embodiments of the present invention, the following description will be further explained by taking specific embodiments as examples with reference to the drawings, and the embodiments are not to be construed as limiting the embodiments of the present invention.
Referring to fig. 1, the present embodiment provides a satellite-borne data broadcast distribution apparatus, including: the device comprises a power supply module 10, an encryption control module 20 and a coding modulation module 30; the power module 10 is used for processing an input primary power into a secondary power required by other modules, the secondary power is secondarily connected with other modules through the internal connector 40, and a working clock fs of the code modulation module 30 is generated;
the encryption control module 20 is configured to receive AOS data (i.e., data conforming to Advanced orbital System protocol), encrypt the AOS data as required, transmit the encrypted data to the code modulation module 30, complete loading and refreshing of an FPGA of the code modulation module 30, receive remote control data of the entire device, analyze an instruction in the remote control data, and switch a data transmission rate; receiving analog quantity telemetry information of other modules and digital quantity telemetry information of a coding modulation module, processing and packaging the telemetry information, and sending the telemetry information to an upper computer; the code modulation module 30 is configured to receive the remote control command and the encrypted data, perform null frame filling on the encrypted data, perform RS code interleaving, scrambling, spread spectrum modulation, filtering, QPSK modulation, generate a radio frequency signal f0 in the S frequency band by using a high-speed digital-to-analog conversion chip, and output the radio frequency signal f0 after filtering, amplification and isolation.
In this embodiment, the satellite-borne data broadcasting distribution equipment adopts a mature modular structure form, and the equipment body is composed of the above 3 sub-modules, and the size of the body is 150mm × 100mm × 66. Each module tang overlap joint (be through unsmooth mouthful connection between two modules promptly), specifically concatenate each submodule piece by 4M 5 screw rods and become an organic whole. The weight of the single machine is 1 Kg.
The device directly realizes the broadcast distribution of the radio frequency signals in the S frequency band by using digital modulation and high-speed digital-to-analog conversion technology, and eliminates unnecessary radio frequency conversion processing flow, thereby reducing the volume and the weight of a single machine and meeting the requirements of miniaturization and light weight of a satellite.
Referring to fig. 2, the power module 10 in this embodiment specifically includes a fuse protection circuit, an anti-surge circuit, an EMI filter circuit, and a DC/DC converter, which are connected in series in sequence; the fuse protection circuit (composed of fuses F1, F2 and a protection resistor R1) is used for fuse protection of an input primary power supply (here, the input power supply is (+30 +/-3)), and the fuses F1 and F2 are connected in parallel, so that the reliability of a single power supply is ensured, wherein F1 and F2 are fuses of the same specification. In the embodiment, the single-machine power of the integrated device formed by the satellite-borne data broadcasting distribution equipment is about 18W, and the rated circuit of the fuse is 3A according to the derating requirement of the satellite design and construction specification; the resistance of the series protection resistor R1 is selected to be 0.1 omega, the rated power is 3W, and the dissipation power of the resistor is 0.025W. The anti-surge circuit is used for inhibiting surge current; in this embodiment, DVCL28 of VPT is selected as the surge preventing circuit to suppress the surge current. The EMI filter circuit is used for filtering; in this embodiment, the EMI filter selects LFC/(20-50) -461-. The DC/DC converter is used for performing power conversion to obtain a +5.5V secondary power supply; the primary power supply enters the DC/DC converter through the surge suppressor DVCL28 and the EMI filter LFC/(20-50) -461-135 to generate +5.5V secondary power supply respectively.
As further shown in fig. 2, the power module 10 further includes a clock circuit for generating the operation clock fs and outputting the operation clock fs to the code modulation module 30 through an SMA output module (SMA is a microwave high-frequency connector Sub-minimum-a). The clock circuit adopts a temperature compensation crystal oscillator and a phase-locked source to generate a main clock for the high-speed digital-to-analog conversion chip to work. The temperature compensated crystal oscillator uses a component ZC1306B-C107-00-100M as a reference clock of a phase-locked source. The phase-locked source selects the component PDRO-2752C8-2 DH.
In this embodiment, the power module includes two output interfaces, where the output clock interface outputs a main clock fs for the code modulation module to work.
Referring to fig. 3, the encryption control module 20 in the present embodiment includes: RS422 interface circuit, LVDS interface circuit, power-on reset circuit, AD acquisition circuit, noise circuit, antifuse FPGA, reference crystal oscillator, PROM and MRAM. The RS422 interface circuit is used for receiving remote control data and sending telemetering information; the chips DS26LV32AW-QML and DS26LV31W-QML are respectively adopted to realize the signal receiving and sending. The LVDS interface circuit is used for receiving the AOD data and receiving AOD parallel data with different rates; the LVDS interface circuit adopts a chip RHFVDS 32AK01V to realize data transceiving. The power-on reset circuit is used for resetting the antifuse FPGA at the moment of power-on; the power-on reset circuit is realized by adopting an RC delay reset circuit and a reverse trigger. The AD acquisition circuit is used for acquiring analog quantity information in the single machine; the AD acquisition circuit is realized by adopting a chip AD7821TE/883B, and is mainly used for acquiring analog quantity information such as power telemetering, locking telemetering, thermistors and the like in a single machine. The noise circuit is used for generating a noise source; the noise circuit here is implemented using a LM139A voltage comparator. Each LM139A chip contains 4 operational amplifiers, and can realize 2 noise sources. The antifuse FPGA is used for executing remote control and telemetering acquisition on the code modulation module, encrypting the received AOD data according to requirements and then forwarding the encrypted AOD data to the code modulation module. The anti-fuse FPGA adopts AX500-1PQ208I of Actel company to complete loading and dynamic refreshing of the SRAM type FPGA of the code modulation module. The reference crystal oscillator selects SAST grade ZA715CB3-16.0000MHz as a reference clock for the operation of the antifuse FPGA. And the PROM selects a V-level XQ17V16CC44M for loading the configuration information of the SRAM type FPGA of the code modulation module. MRAM chooses 3DMR4M08VS4428SSA40M to store the key.
Further preferably, an FPGA encryption and interface configuration program is provided in the antifuse FPGA, and when the FPGA encryption and interface configuration program is executed, the following operations are completed: receiving internal instructions and comment information, realizing data processing and key updating management, outputting remote measurement parameters, and realizing data communication between the encryption FPGA and the code modulation FPGA; command parsing, telemetry parsing framing, profile storage, profile loading, dynamic refresh of V4, power control.
Referring to fig. 4, the code modulation module 30 in the present embodiment includes: SRAM type FPGA, high-speed D/A conversion chip, and BALUN, filter, temperature compensation amplifying circuit, isolation circuit and SMA connector connected in sequence. The SRAM type FPGA is used for receiving the encrypted data from the encryption control module, filling a null frame, encoding and interleaving RS channels, scrambling, QPSK constellation mapping, multi-rate forming filtering and digital spread spectrum modulation, and then outputting high-speed data; in this embodiment, the SRAM-type FPGA is selected from Virtex4 series military grade product XQ4VSX55-10FF1148M (CAST S) of Xilinx corporation. The high-speed digital-to-analog conversion chip is used for converting high-speed data output by the SRAM type FPGA into an analog differential signal and converting the analog differential signal into an S-band radio frequency signal through the BALUN; wherein, the high-speed conversion chip is an enterprise V-level chip EV10DS130AMGS9NB1 of E2V company; BALUN is the BAL-0003SMG product of Marki company. The clock output by the power supply module is converted into a differential signal through another BALUN and then is used as a working clock of the high-speed digital-to-analog conversion chip. The filter is used for filtering the image signal; here, an LC filter is used, with a model size of 6MB/E-2 XXX/H200-S5L. The temperature compensation amplifying circuit is used for attenuating and compensating the temperature of the radio frequency signal; the temperature compensation amplifying circuit consists of a temperature compensation attenuator and a radio frequency amplifier, and the temperature compensation attenuator is a MTVA0500N09W 3. The isolation circuit is used for isolating the intermediate frequency signal; the isolation circuit adopts a pi decay circuit to isolate the output intermediate frequency signal. The SMA connector is used for outputting the isolated radio frequency signal. The connector is SMA (B) -KFD 1353.
Further, the code modulation module in this embodiment is further loaded with an FPGA code modulation program, and when the FPGA code modulation program is executed, the following operations are completed: the method comprises the steps of instruction receiving processing, clock generation and monitoring, data spontaneous generation and receiving, frame header judgment, RS channel coding and constellation mapping, multi-rate forming filtering, digital spread spectrum modulation and data output.
Specifically, the encryption control module encrypts the received data according to the instruction and transmits the encrypted data to the code modulation module through the internal bus. The encryption control module receives remote control instruction information from an upper computer through an RS422 interface, analyzes the instruction information, controls data encryption and transmission rate, and forwards the instruction to the coding modulation module; and receiving analog quantity telemetry information of other modules and digital quantity telemetry information of the coding modulation module, processing and packaging the telemetry information, and sending the telemetry information to an upper computer through an RS422 interface. Referring to fig. 1 again, the internal connector is further configured to complete functions of serial communication, remote command sending, baseband data transmission, and the like between the encryption control module and the code modulation module.
In a further preferred embodiment, the conversion rate of the high-speed digital-to-analog conversion chip in the code modulation module is set to be greater than or equal to 3Gsps, so that the high-speed data output by the FPGA circuit is subjected to digital-to-analog conversion, and then filtered and amplified to be output as a single machine.
In a further preferred embodiment, the following relationship is satisfied between the working clock fs generated by the power supply module and the radio frequency signal f0 generated by the code modulation module:
f0＝fs-fs/N，
wherein N is an integer.
The embodiment also provides a satellite-borne data broadcast distribution method, which applies the satellite-borne data broadcast distribution equipment provided by the embodiment to encrypt broadcast distribution data and perform spread spectrum modulation. The device and the corresponding method can realize the transmission of broadcast distribution data such as 2Kbps, 8Kbps, 64Kbps, 256Kbps, 512Kbps, 1Mbps, 2Mbps and the like according to a working mode, can adjust software to realize data transmission with higher speed as required, realize the output of any data speed input at the same sampling speed by matching an interpolation filter and a plug-in filter, directly convert a spread spectrum modulated digital signal into an S-band radio frequency signal by a high-speed digital-to-analog conversion chip, remove unnecessary up-conversion information processing flow, reduce the size and the weight of a product, and meet the requirements of miniaturization and light weight.
It should be noted that, the steps in the satellite-borne data broadcast distribution device and the method provided by the present invention may be implemented by using corresponding modules, devices, units, and the like in the satellite-borne data broadcast distribution device, and those skilled in the art may refer to the technical scheme of the system to implement the step flow of the method, that is, the embodiment in the system may be understood as a preferred example of the implementation method, and will not be described herein again.
Those skilled in the art will appreciate that, in addition to implementing the system and its various means provided by the present invention in purely computer readable program code means, the system and its various means provided by the present invention can be implemented with the same functionality in the form of logic gates, switches, application specific integrated circuits, programmable logic controllers, embedded microcontrollers and the like by entirely programming the method steps logically. Therefore, the system and various devices thereof provided by the present invention can be regarded as a hardware component, and the devices included in the system and various devices thereof for realizing various functions can also be regarded as structures in the hardware component; means for performing the functions may also be regarded as structures within both software modules and hardware components for performing the methods.
The above description is only an embodiment of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art should be able to make modifications or substitutions within the technical scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the appended claims.
Claims (9)
1. An on-board data broadcast distribution apparatus, comprising: the device comprises a power supply module, an encryption control module and a coding modulation module; wherein the content of the first and second substances,
the power supply module is used for processing an input primary power supply into a secondary power supply required by other modules, the secondary power supply is connected with the other modules through an internal connector secondarily, and a working clock fs of the code modulation module is generated;
the encryption control module is used for receiving AOS data, encrypting the AOS data according to requirements, transmitting the encrypted data to the code modulation module, completing the loading and refreshing of an FPGA of the code modulation module, receiving remote control data of the whole device, analyzing instructions in the remote control data and switching the data transmission rate; receiving analog quantity telemetry information of other modules and digital quantity telemetry information of a coding modulation module, processing and packaging the telemetry information, and sending the telemetry information to an upper computer;
the code modulation module is used for receiving a remote control command and the encrypted data, carrying out blank frame filling on the encrypted data, carrying out RS code interleaving, scrambling, spread spectrum modulation, filtering, QPSK modulation, generating a radio frequency signal f0 of an S frequency band by a high-speed digital-to-analog conversion chip, and outputting the radio frequency signal f0 after filtering, amplification and isolation.
2. The satellite-borne data broadcasting distribution equipment according to claim 1, wherein the power supply module comprises a fusing protection circuit, an anti-surge circuit, an EMI filter circuit and a DCDC converter which are connected in series in sequence; the fusing protection circuit is used for fusing protection of an input primary power supply; the surge prevention circuit is used for inhibiting surge current; the EMI filter circuit is used for filtering; the DCDC converter is used for performing power conversion to obtain a +5.5V secondary power supply;
the system also comprises a clock circuit which is used for generating a working clock fs and outputting the working clock fs to the code modulation module through the SMA output module.
3. The on-board data broadcast distribution apparatus according to claim 1, wherein the encryption control module includes: the circuit comprises an RS422 interface circuit, an LVDS interface circuit, a power-on reset circuit, an AD acquisition circuit, a noise circuit and an antifuse FPGA; the RS422 interface circuit is used for receiving the remote control data and sending the telemetry information; the LVDS interface circuit is used for receiving the AOD data; the power-on reset circuit is used for resetting the antifuse FPGA at the moment of power-on; the AD acquisition circuit is used for acquiring analog quantity information in the single machine; the noise circuit is used for generating a noise source; the antifuse FPGA is used for executing remote control and telemetering acquisition on the code modulation module, encrypting received AOD data according to requirements and then forwarding the encrypted AOD data to the code modulation module.
4. The satellite-borne data broadcasting distribution equipment according to claim 3, wherein the antifuse FPGA is internally provided with an FPGA encryption and interface configuration program, and when the FPGA encryption and interface configuration program is executed, the following operations are performed: receiving internal instructions and comment information, realizing data processing and key updating management, outputting remote measurement parameters, and realizing data communication between the encryption FPGA and the code modulation FPGA; instruction parsing, telemetry parsing framing, configuration file storage, configuration file loading, dynamic refreshing of V4, and power control.
5. The on-board data broadcast distribution device according to claim 1, wherein the code modulation module includes: the SRAM type FPGA is used for receiving the encrypted data, filling null frames, encoding and interweaving RS channels, scrambling, mapping QPSK constellations, shaping filtering at multiple rates and outputting the high-speed data after digital spread spectrum modulation; the high-speed digital-to-analog conversion chip is used for converting the high-speed data into an analog differential signal and converting the analog differential signal into an S-band radio frequency signal through the BALUN; the filter is used for filtering image signals; the temperature compensation amplifying circuit is used for attenuating and compensating the temperature of the radio frequency signal; the isolation circuit is used for isolating the intermediate frequency signal; the SMA connector is used for outputting the isolated radio frequency signal.
6. The on-board data broadcasting distribution device according to claim 5, wherein the code modulation module is further loaded with an FPGA code modulation program, and when the FPGA code modulation program is executed, the following operations are performed: the method comprises the steps of instruction receiving processing, clock generation and monitoring, data spontaneous generation and receiving, frame header judgment, RS channel coding and constellation mapping, multi-rate forming filtering, digital spread spectrum modulation and data output.
7. The on-board data broadcasting distribution device according to any one of claims 1 to 6, wherein a slew rate of a high-speed digital-to-analog conversion chip in the code modulation module is set to be greater than or equal to 3Gsps, so as to perform digital-to-analog conversion on the high-speed data output by the FPGA circuit, and output a single machine after filtering and amplification.
8. The on-board data broadcasting distribution device according to any one of claims 1 to 6, wherein the following relationship is satisfied between the operating clock fs generated by the power supply module and the radio frequency signal f0 generated by the code modulation module:
f0＝fs-fs/N，
wherein N is an integer.
9. A method for distributing data broadcast on board a satellite, characterized in that, the device for distributing data broadcast on board a satellite according to any one of claims 1-8 is used to perform encryption and spread spectrum modulation of the broadcast distribution data.
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| CN202110086140.5A Active CN114696885B (en) | 2021-01-21 | 2021-01-21 | Satellite-borne data broadcast distribution equipment and method |
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| CN117220698A (en) * | 2023-11-08 | 2023-12-12 | 广州龙之音电子科技有限公司 | Broadcast transmitter |
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