CN114695654A - Resistive memory - Google Patents

Resistive memory Download PDF

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Publication number
CN114695654A
CN114695654A CN202011563684.8A CN202011563684A CN114695654A CN 114695654 A CN114695654 A CN 114695654A CN 202011563684 A CN202011563684 A CN 202011563684A CN 114695654 A CN114695654 A CN 114695654A
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China
Prior art keywords
electrode
resistive memory
thickness
oxygen storage
storage layer
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CN202011563684.8A
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Chinese (zh)
Inventor
许博砚
吴伯伦
郭泽绵
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Winbond Electronics Corp
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Winbond Electronics Corp
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Priority to CN202011563684.8A priority Critical patent/CN114695654A/en
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/20—Multistable switching devices, e.g. memristors
    • H10N70/24—Multistable switching devices, e.g. memristors based on migration or redistribution of ionic species, e.g. anions, vacancies
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/881—Switching materials
    • H10N70/883—Oxides or nitrides

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Abstract

The invention provides a resistance type memory, which comprises a substrate, a first electrode, a second electrode, a variable resistance layer and an oxygen storage layer. The first electrode is located on the substrate. The second electrode is located between the first electrode and the substrate. The variable resistance layer is located between the first electrode and the second electrode. The oxygen storage layer is located between the first electrode and the variable resistance layer. The oxygen storage layer includes a first portion, a second portion, and a third portion. The second portion is connected to one side of the first portion. The third portion is connected to the other side of the first portion. The thickness of the first portion is greater than the thickness of the second portion and the thickness of the third portion. The first portion of the oxygen storage layer protrudes toward the first electrode. The resistive memory can effectively improve the electrical performance of the memory element.

Description

Resistive memory
Technical Field
The present invention relates to semiconductor devices, and more particularly to resistive memories.
Background
Resistive memory devices, such as Resistive Random Access Memory (RRAM), have the potential advantages of low power consumption, high speed operation, high density, and compatibility with Complementary Metal Oxide Semiconductor (CMOS) process technologies, and are therefore well suited as next generation memory devices. However, how to further enhance the electrical performance of the resistive memory (e.g., stably maintain a low current in a High Resistance State (HRS) and enhance a current in a Low Resistance State (LRS)) is a goal of active efforts at present.
Disclosure of Invention
The invention provides a resistive memory which can effectively improve the electrical performance of a memory element.
The invention provides a resistive memory, which comprises a substrate, a first electrode, a second electrode, a variable resistance layer (resistance changeable layer) and an oxygen storage layer (oxygen storage layer). The first electrode is located on the substrate. The second electrode is located between the first electrode and the substrate. The variable resistance layer is located between the first electrode and the second electrode. The oxygen storage layer is located between the first electrode and the variable resistance layer. The oxygen storage layer includes a first portion, a second portion, and a third portion. The second portion is connected to one side of the first portion. The third portion is connected to the other side of the first portion. The thickness of the first portion is greater than the thickness of the second portion and the thickness of the third portion. The first portion of the oxygen storage layer protrudes toward the first electrode.
According to an embodiment of the invention, the resistive memory may further include an oxygen barrier layer (oxygen barrier layer). The oxygen barrier layer is located between the first electrode and the oxygen storage layer.
According to an embodiment of the present invention, in the resistive memory, a material of the oxygen barrier layer is, for example, aluminum oxide (Al)2O3) Silicon dioxide (SiO)2) Hafnium oxide (HfO)2) Or hafnium silicon nitride oxide (HfSiON).
According to an embodiment of the invention, in the resistive memory, a material of the first electrode is, for example, titanium nitride (TiN), tantalum nitride (TaN), tungsten (W), hafnium nitride (HfN), aluminum nitride (AlN), iridium (Ir), platinum (Pt), or iridium-platinum alloy (Pt/Ir).
According to an embodiment of the invention, in the resistive memory, a material of the second electrode is, for example, titanium nitride (TiN), tantalum nitride (TaN), tungsten (W), hafnium nitride (HfN), or aluminum nitride (AlN).
According to an embodiment of the invention, in the resistive memory, a material of the variable resistance layer is, for example, hafnium oxide (HfO)2) Alumina (Al)2O3) Zirconium oxide (ZrO)2) Hafnium oxide (HfO)2) With alumina (Al)2O3) Hafnium oxide (HfO) or combinations thereof2) With zirconium oxide (ZrO)2) In combination with (1).
According to an embodiment of the invention, in the resistive memory, a material of the oxygen storage layer is, for example, titanium (Ti), tantalum (Ta), hafnium (Hf), or aluminum (Al).
According to an embodiment of the invention, in the resistive memory, the oxygen storage layer may have an inverted T shape (reverse T shape).
According to an embodiment of the invention, in the resistive memory, a lower surface of the oxygen storage layer faces the variable resistance layer, and may be a flat surface.
According to an embodiment of the invention, in the resistive memory, an entire lower surface of the oxygen storage layer and an entire upper surface of the variable resistance layer may contact each other.
According to an embodiment of the invention, in the resistive memory, a ratio of the thickness of the first portion to the thickness of the second portion may be greater than 1 and less than or equal to 5.
According to an embodiment of the invention, in the resistive memory, a ratio of the thickness of the first portion to the thickness of the third portion may be greater than 1 and less than or equal to 5.
According to an embodiment of the invention, in the resistive memory, a thickness of the first portion may be 5nm (nanometers) to 250 nm.
According to an embodiment of the invention, in the resistive memory, a thickness of the second portion may be 5nm to 50 nm.
According to an embodiment of the invention, in the resistive memory, a thickness of the third portion may be 5nm to 50 nm.
In view of the above, in the resistive memory provided by the present invention, the oxygen storage layer includes a first portion, a second portion and a third portion. The thickness of the first portion is greater than the thickness of the second portion and the thickness of the third portion, and the first portion of the oxygen storage layer protrudes toward the first electrode, so that the electrical performance of the memory device can be effectively improved. After the conductive filaments (filaments) are formed in the variable resistance layer, high density oxygen ions may be formed in the second and third portions of the oxygen storage layer, so that the oxygen ions may be recombined with the conductive filaments using a small bias voltage when performing an initial RESET (hereinafter referred to as InitRST) operation. In addition, the current of the LRS after a SET (SET) operation may be boosted by adjusting the thickness of the first portion, the thickness of the second portion, and/or the thickness of the third portion. In addition, since the second portion and the third portion of the oxygen storage layer have a small thickness, a recombination distance (recombined distance) between oxygen ions and the conductive filament is short, and thus, the efficiency of a RESET (hereinafter, referred to as RST) operation can be improved. On the other hand, after the RST operation is performed, since the diameters of the tops of the conductive filaments in the variable resistance layer adjacent to the second and third portions having a small thickness are small, oxygen ions re-bonded to the conductive filaments are less likely to diffuse into the oxygen storage layer, and thus a low current of HRS can be stably maintained. In addition, the resistive memory provided by the invention has excellent reliability in an accelerated test through high-temperature baking.
In order to make the aforementioned and other features and advantages of the invention more comprehensible, embodiments accompanied with figures are described in detail below.
Drawings
FIG. 1 is a cross-sectional view of a resistive memory according to an embodiment of the invention.
The reference numbers indicate:
10 resistive memory
100 base
102 first electrode
104 second electrode
106 variable resistance layer
108 oxygen storage layer
110 oxygen barrier layer
P1 first part
P2 second part
P3 third part
S1 lower surface
S2 upper surface
Thickness T1, T2, T3
Detailed Description
FIG. 1 is a cross-sectional view of a resistive memory according to an embodiment of the invention.
Referring to fig. 1, the resistive memory 10 includes a substrate 100, a first electrode 102, a second electrode 104, a variable resistance layer 106, and an oxygen storage layer 108. The substrate 100 may be a semiconductor substrate, such as a silicon substrate. In addition, other desired layers, interconnect structures and/or devices (e.g., active devices) (not shown) may be present on the substrate 100 depending on the product design.
The first electrode 102 is located on the substrate 100. The first electrode 102 may serve as an upper electrode of the resistive memory 10. The material of the first electrode 102 is, for example, titanium nitride (TiN), tantalum nitride (TaN), tungsten (W), hafnium nitride (HfN), aluminum nitride (AlN), iridium (Ir), platinum (Pt), or iridium-platinum alloy (Pt/Ir).
The second electrode 104 is located between the first electrode 102 and the substrate 100. The second electrode 104 can be used as a lower electrode of the resistive memory 10. The material of the second electrode 102 is, for example, titanium nitride (TiN), tantalum nitride (TaN), tungsten (W), hafnium nitride (HfN), or aluminum nitride (AlN).
The variable resistance layer 106 is located between the first electrode 102 and the second electrode 104. The material of the variable resistance layer 106 is, for example, hafnium oxide (HfO)2) Alumina (Al)2O3) Zirconium oxide (ZrO)2) Hafnium oxide (HfO)2) With alumina (Al)2O3) Hafnium oxide (HfO) or combinations thereof2) With zirconium oxide (ZrO)2) In combination with (1). Generally, the operation of the resistive memory 10 may include the following stages, but the invention is not limited thereto. A conductive wire forming stage: conductive filaments are formed in the variable resistance layer 106, and the variable resistance layer 106 is at LRS. Initial reset (InitRST) phase: the InitRST operation is performed to convert the variable resistance layer 106 from LRS to HRS. A SET (SET) phase: performing SET operation to change resistance layer106 are converted from HRS to LRS. A Reset (RST) phase, in which RST operation is performed to convert the varistor layer 106 from LRS to HRS.
The oxygen storage layer 108 is located between the first electrode 102 and the variable resistance layer 106. The lower surface S1 of the oxygen storage layer 108 faces the variable resistance layer 106, and may be a flat surface. In addition, the entire lower surface S1 of the oxygen storage layer 108 and the entire upper surface S2 of the variable resistance layer 106 may contact each other, and thus the formation range of the conductive filaments may be increased. The material of the oxygen storage layer 108 is, for example, titanium (Ti), tantalum (Ta), hafnium (Hf), or aluminum (Al).
The oxygen storage layer 108 includes a first portion P1, a second portion P2, and a third portion P3. The second portion P2 is connected to one side of the first portion P1. The third portion P3 is connected to the other side of the first portion P1. The thickness T1 of the first portion P1 is greater than the thicknesses T2 of the second portion P2 and the thickness T3 of the third portion P3. The first portion P1 of the oxygen storage layer 108 protrudes toward the first electrode 102. As such, the shape of the oxygen storage layer 108 may be an inverted T-shape. In some embodiments, the second portion P2 and the third portion P3 may be connected in a ring to encircle the side wall of the first portion P1. The ratio of the thickness T1 of the first portion P1 to the thickness T2 of the second portion P2 may be greater than 1 and equal to or less than 5. The ratio of the thickness T1 of the first portion P1 to the thickness T3 of the third portion P3 may be greater than 1 and equal to or less than 5. For example, the thickness T1 of the first portion P1 may be 5nm to 250nm, the thickness T2 of the second portion P2 may be 5nm to 50nm, and the thickness T3 of the third portion P3 may be 5nm to 50 nm.
In addition, the resistive memory 10 may further include an oxygen barrier layer 110. The oxygen barrier layer 110 is located between the first electrode 102 and the oxygen storage layer 108. The material of the oxygen barrier layer 110 is, for example, aluminum oxide (Al)2O3) Silicon dioxide (SiO)2) Hafnium oxide (HfO)2) Or hafnium silicon nitride oxide (HfSiON).
Based on the above embodiments, in the resistive memory 10, the oxygen storage layer 108 includes the first portion P1, the second portion P2, and the third portion P3. The thickness T1 of the first portion P1 is greater than the thickness T2 of the second portion P2 and the thickness T3 of the third portion P3, and the first portion P1 of the oxygen storage layer 108 protrudes toward the first electrode 102, so the electrical performance of the memory device can be effectively improved, as described below.
After forming the conductive filaments (filaments) in the variable resistance layer 106, a high density of oxygen ions may be formed in the second and third portions P2 and P3 of the oxygen storage layer 108, so that a smaller bias voltage may be used to recombine the oxygen ions with the conductive filaments when performing the InitRST operation.
In addition, the current of the LRS after the SET operation may be increased by adjusting the thickness T1 of the first portion P1, the thickness T2 of the second portion P2, and/or the thickness T3 of the third portion P3.
In addition, when performing the RST operation, since the thicknesses of the second portion P2 and the third portion P3 of the oxygen storage layer 108 are thin, the recombination distance of the oxygen ions and the conductive wires is short, thereby improving the efficiency of the RST operation.
On the other hand, since the thickness T1 of the first portion P1 is greater than the thicknesses T2 and T3 of the second and third portions P2 and P3, conductive filaments of different sizes may be formed in the variable-resistance layer 106. The top diameters of the conductive filaments in the variable resistance layer 106 adjacent to the second portion P2 and the third portion P3, which are thinner, are smaller, and the top diameters of the conductive filaments in the variable resistance layer 106 adjacent to the first portion P1, which is thicker, are larger. After RST operation is performed, since the top diameter of the conductive filament in the varistor layer 106 adjacent to the second and third portions P2 and P3 is smaller, oxygen ions re-bonded to the conductive filament are less likely to diffuse into the oxygen storage layer 108, and thus a low current of HRS can be stably maintained.
On the other hand, the resistive memory 10 has excellent reliability in an accelerated test by a high-temperature bake.
In summary, in the resistive memory provided in the above embodiments, the thickness of the first portion is greater than the thickness of the second portion and the thickness of the third portion, and the first portion of the oxygen storage layer protrudes toward the first electrode, so that the electrical performance of the memory device can be effectively improved.
Although the present invention has been described with reference to the above embodiments, it should be understood that various changes and modifications can be made therein by those skilled in the art without departing from the spirit and scope of the invention.

Claims (15)

1. A resistive memory, comprising:
a substrate;
a first electrode on the substrate;
a second electrode between the first electrode and the substrate;
a variable resistance layer between the first electrode and the second electrode; and
an oxygen storage layer between the first electrode and the variable resistance layer, and including:
a first portion;
a second portion connected to one side of the first portion; and
a third portion connected to the other side of the first portion, wherein the thickness of the first portion is greater than the thickness of the second portion and the thickness of the third portion, and the first portion of the oxygen storage layer protrudes toward the first electrode.
2. The resistive memory of claim 1, further comprising:
an oxygen barrier layer between the first electrode and the oxygen storage layer.
3. The resistive memory of claim 2, wherein the material of the oxygen barrier layer comprises aluminum oxide, silicon dioxide, hafnium dioxide, or hafnium silicon nitride oxide.
4. The resistive memory of claim 1, wherein the material of the first electrode comprises titanium nitride, tantalum nitride, tungsten, hafnium nitride, aluminum nitride, iridium, platinum, or iridium-platinum alloy.
5. The resistive memory of claim 1, wherein the material of the second electrode comprises titanium nitride, tantalum nitride, tungsten, hafnium nitride, or aluminum nitride.
6. The resistive memory of claim 1, wherein the material of the variable resistance layer comprises hafnium oxide, aluminum oxide, zirconium oxide, a combination of hafnium oxide and aluminum oxide, or a combination of hafnium oxide and zirconium oxide.
7. The resistive memory of claim 1, wherein the material of the oxygen storage layer comprises titanium, tantalum, hafnium, or aluminum.
8. The resistive memory of claim 1, wherein the shape of the oxygen storage layer comprises an inverted T-shape.
9. The resistive memory according to claim 1, wherein the lower surface of the oxygen storage layer faces the variable resistance layer and is a flat surface.
10. The resistive memory according to claim 1, wherein the entire lower surface of the oxygen storage layer and the entire upper surface of the variable resistance layer are in contact with each other.
11. The resistive memory according to claim 1, wherein a ratio of the thickness of the first portion to the thickness of the second portion is greater than 1 and equal to or less than 5.
12. The resistive memory according to claim 1, wherein a ratio of the thickness of the first portion to the thickness of the third portion is greater than 1 and equal to or less than 5.
13. The resistive memory of claim 1, wherein the first portion has a thickness of 5nm to 250 nm.
14. The resistive memory of claim 1, wherein the second portion has a thickness of 5nm to 50 nm.
15. The resistive memory of claim 1, wherein the third portion has a thickness of 5nm to 50 nm.
CN202011563684.8A 2020-12-25 2020-12-25 Resistive memory Pending CN114695654A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202011563684.8A CN114695654A (en) 2020-12-25 2020-12-25 Resistive memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202011563684.8A CN114695654A (en) 2020-12-25 2020-12-25 Resistive memory

Publications (1)

Publication Number Publication Date
CN114695654A true CN114695654A (en) 2022-07-01

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Application Number Title Priority Date Filing Date
CN202011563684.8A Pending CN114695654A (en) 2020-12-25 2020-12-25 Resistive memory

Country Status (1)

Country Link
CN (1) CN114695654A (en)

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