CN114695431A - Semiconductor device with a plurality of transistors - Google Patents
Semiconductor device with a plurality of transistors Download PDFInfo
- Publication number
- CN114695431A CN114695431A CN202011587176.3A CN202011587176A CN114695431A CN 114695431 A CN114695431 A CN 114695431A CN 202011587176 A CN202011587176 A CN 202011587176A CN 114695431 A CN114695431 A CN 114695431A
- Authority
- CN
- China
- Prior art keywords
- contact plug
- material layer
- magnetic shielding
- layer
- magnetic
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B61/00—Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices
- H10B61/20—Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices comprising components having three or more electrodes, e.g. transistors
- H10B61/22—Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices comprising components having three or more electrodes, e.g. transistors of the field-effect transistor [FET] type
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/481—Internal lead connections, e.g. via connections, feedthrough structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B61/00—Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N50/00—Galvanomagnetic devices
- H10N50/10—Magnetoresistive devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N59/00—Integrated devices, or assemblies of multiple devices, comprising at least one galvanomagnetic or Hall-effect element covered by groups H10N50/00 - H10N52/00
Abstract
The invention provides a semiconductor device which comprises a substrate, wherein a first conductive structure pattern and a magnetic tunnel junction array positioned above the first conductive structure pattern are arranged on the substrate, and each magnetic tunnel junction is electrically connected with the first conductive structure pattern through a first contact plug. And a second conductive structure pattern is also arranged on the substrate, the second conductive structure pattern is positioned on the second conductive structure pattern above the magnetic tunnel junction array, and each magnetic tunnel junction is electrically connected with the second conductive structure pattern through a second contact plug. The magnetic shielding material is contained in part or all of the first conductive structure pattern, the second conductive structure pattern, the first contact plug and the second contact plug. The magnetic shielding material is arranged in the area near each magnetic tunnel junction for magnetic shielding, so that the effect of magnetic shielding of each magnetic tunnel junction can be improved. And the magnetic shielding material can be added into the conductive structure pattern and the contact plug when the conductive structure pattern and the contact plug are processed, so that the processing technology can be simplified.
Description
Technical Field
The invention relates to the technical field of semiconductors, in particular to a semiconductor device.
Background
A Magnetic Random Access Memory (MRAM), a nonvolatile Magnetic Random Access Memory, which has been developed rapidly in recent years has excellent characteristics. The defects of large SRAM (Static Random-Access Memory) area and large electric leakage after the size is reduced are overcome; the defect that DRAM (Dynamic Random Access Memory) needs to be refreshed all the time and has large power consumption is overcome. Magnetic random access memory MRAM has several orders of magnitude better read/write time and read/write times than Flash memory.
A Magnetic Tunnel Junction (MTJ) is used as a carrier for information storage in MRAM, and information is recorded using relative magnetization states of a free layer and a reference layer of the Magnetic Tunnel Junction. Although the magnetic tunnel junction has several significant advantages under the current process conditions, the core memory cell of the current MRAM memory generally adopts the magnetic tunnel junction with perpendicular magnetization characteristics, and the principle of generating 0 and 1 states is that the magnetic moment directions of the device are different, so that the magnetic tunnel junction is easily interfered by an external magnetic field.
Disclosure of Invention
The invention provides a semiconductor device for improving a magnetic shielding effect and simplifying a process.
The invention provides a semiconductor device which comprises a substrate, wherein a first conductive structure pattern and a magnetic tunnel junction array positioned above the first conductive structure pattern are arranged on the substrate, the magnetic tunnel junction array comprises a plurality of magnetic tunnel junctions which are arrayed, and each magnetic tunnel junction is electrically connected with the first conductive structure pattern through a first contact plug. And a second conductive structure pattern is also arranged on the substrate, the second conductive structure pattern is positioned on the second conductive structure pattern above the magnetic tunnel junction array, and each magnetic tunnel junction is electrically connected with the second conductive structure pattern through a second contact plug. And part or all of the first conductive structure pattern, the second conductive structure pattern, the first contact plug and the second contact plug comprise magnetic shielding materials.
In the above scheme, the magnetic shielding material is contained in part or all of the first conductive structure pattern, the second conductive structure pattern, the first contact plug and the second contact plug below and above the magnetic tunnel junction array, and the magnetic shielding material is arranged in the area near each magnetic tunnel junction for magnetic shielding, so that the magnetic shielding effect of each magnetic tunnel junction can be improved. And magnetic shielding materials can be added in the conductive structure patterns and the contact plugs when the conductive structure patterns and the contact plugs are processed, so that the processing technology can be simplified.
In a specific embodiment, the first conductive structure pattern is an array of bottom metal layers, where the array of bottom metal layers includes a plurality of bottom metal layers corresponding to the plurality of magnetic tunnel junctions one to one, and each bottom metal layer is electrically connected to the corresponding magnetic tunnel junction through the first contact plug. And a transistor array is also arranged on the substrate and is positioned below the bottom metal layer array. The transistor array comprises a plurality of transistors which are in one-to-one correspondence with the bottom metal layers, and the drain electrode of each transistor is electrically connected with the corresponding bottom metal layer through a third contact plug. Each bottom metal layer in the bottom metal layer array is a magnetic shielding material layer or a composite material layer containing a magnetic shielding material layer and a low-resistivity material layer. The magnetic shielding material is added on the bottom metal layer which is closer to each magnetic tunnel junction, so that the effect of magnetic shielding of each magnetic tunnel junction is improved.
In a specific embodiment, a word line pattern is further disposed in the substrate, and the word line pattern is located above the transistor array and below the bottom metal layer array. The word line pattern includes a plurality of word lines arranged in parallel and extending in a first direction, and a gate of each transistor in the transistor array is electrically connected to one of the word lines through a fourth contact plug. Each word line in the word line pattern is a layer of magnetic shielding material, or a composite material layer comprising a layer of magnetic shielding material and a layer of low resistivity material. The effect of magnetically shielding each magnetic tunnel junction is further improved by adding a magnetic shielding material also in the word line pattern. And magnetic shielding materials can be added into the magnetic shielding material when the word line is processed, thereby simplifying the process.
In one embodiment, the second conductive structure pattern is a bit line pattern, the bit line pattern includes a plurality of bit lines arranged in parallel and extending along a second direction, and the first direction is not parallel to the second direction; each of the magnetic tunnel junctions is electrically connected to one of the bit lines through the second contact plug. And each bit line in the bit line pattern is a magnetic shielding material layer or a composite material layer containing a magnetic shielding material layer and a low-resistivity material layer. The magnetic shielding material is also added on the bit line which is closer to the magnetic tunnel junction, so that the magnetic shielding effect is improved.
In a specific embodiment, the substrate is further provided with redundant structures surrounding the magnetic tunnel junction, and each redundant structure comprises at least two redundant layers which are sequentially arranged from top to bottom. Any two adjacent redundant layers are arranged at intervals, and a redundant contact plug is connected between any two adjacent redundant layers. Each redundant layer is a magnetic shielding material layer or a composite material layer containing a magnetic shielding material layer and a low-resistivity material layer; the material of the redundant contact plug is magnetic shielding material. Through being provided with the redundant structure that includes the magnetic screen material around the magnetic tunnel junction for the area of magnetic screen is greater than the area of magnetic tunnel junction array, improves the magnetic screen effect.
In one embodiment, the redundancy layer located at the lowermost layer of the at least two redundancy layers is located at the same layer as the bottom metal layer pattern, and the redundancy layer located at the uppermost layer is located at the same layer as the bit line pattern. The magnetic tunnel junction array is enclosed in a smaller space by enabling the redundant layers in the redundant structure to be located in the area between the bit line pattern and the bottom metal layer, and therefore the magnetic shielding effect is improved.
In one specific embodiment, a source line pattern is further disposed in the substrate, the source line pattern being located above the transistors and below the word line pattern. The source line pattern includes a plurality of source lines arranged in parallel and extending in a third direction, and a source of each transistor is electrically connected to one of the source lines through a fifth contact plug. And each source line in the source line pattern is a magnetic shielding material layer or a composite material layer containing a magnetic shielding material layer and a low-resistivity material layer. The effect of magnetically shielding each magnetic tunnel junction is further improved by adding a magnetic shielding material also in the source line pattern. And magnetic shielding materials can be added into the source lines when the source lines are processed, so that the process is simplified.
In a specific embodiment, the composite material layer further comprises a barrier layer sandwiched between the magnetic shielding material layer and the low resistivity material layer to prevent the magnetic shielding material layer and the low resistivity material layer from mutually permeating, thereby affecting the respective performances.
In a specific embodiment, the material of part or all of the first contact plug, the second contact plug, the third contact plug, the fourth contact plug and the fifth contact plug is a low-resistivity material or can ensure the conductivity of the contact plugs and reduce the generation of defects.
In a specific embodiment, the material of part or all of the first contact plug, the second contact plug, the third contact plug, the fourth contact plug and the fifth contact plug is a magnetic shielding material, so that the magnetic shielding effect can be further improved.
In a specific embodiment, the magnetic shielding material is one or more of iron, cobalt and nickel, and the low-resistivity material is one or more of copper, tungsten and aluminum. So as to improve the magnetic shielding effect and the conductive effect of the conductive structure.
In a specific embodiment, the semiconductor device is an MRAM to improve the magnetic shielding effect of the MRAM.
Drawings
Fig. 1 is a cross-sectional view of a semiconductor device according to an embodiment of the present invention;
fig. 2 is a top view of a semiconductor device according to an embodiment of the present invention;
fig. 3 is a cross-sectional view of another semiconductor device provided in an embodiment of the present invention;
fig. 4 is a cross-sectional view of another semiconductor device provided in an embodiment of the present invention;
FIG. 5a is a cross-sectional view of one step in the manufacture of a contact plug and wire structure according to an embodiment of the present invention;
FIG. 5b is a cross-sectional view of another step in the fabrication of a contact plug and wire structure according to an embodiment of the present invention;
FIG. 5c is a cross-sectional view of another step in the fabrication of a contact plug and wire structure according to an embodiment of the present invention;
FIG. 5d is a cross-sectional view of another step in the fabrication of a contact plug and wire structure according to an embodiment of the present invention;
FIG. 5e is a cross-sectional view of another step in the fabrication of a contact plug and wire structure according to an embodiment of the present invention;
FIG. 6a is a cross-sectional view of another step in the fabrication of a contact plug and wire structure according to an embodiment of the present invention;
FIG. 6b is a cross-sectional view of another step in the fabrication of a contact plug and wire structure according to an embodiment of the present invention;
FIG. 6c is a cross-sectional view of another step in the fabrication of a contact plug and wire structure according to an embodiment of the present invention;
FIG. 7a is a cross-sectional view of another step in the fabrication of a contact plug and wire structure according to an embodiment of the present invention;
FIG. 7b is a cross-sectional view of another step in the fabrication of a contact plug and wire structure according to an embodiment of the present invention;
FIG. 7c is a cross-sectional view of another step in the fabrication of a contact plug and wire structure according to an embodiment of the present invention;
FIG. 7d is a cross-sectional view of another step in the fabrication of a contact plug and wire structure according to an embodiment of the present invention;
fig. 7e is a cross-sectional view of another step of processing the contact plug and wire structure according to another embodiment of the present invention.
Reference numerals:
10-substrate 11-dielectric layer 20-magnetic tunnel junction 21-bottom electrode 22-top electrode
31-first conductive structure 32-second conductive structure 33-word line 34-source line
41-first contact plug 42-second contact plug 43-third contact plug 44-fourth contact plug
45-fifth contact plug 50-redundant structure 51-redundant layer 52-redundant contact plug
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
To facilitate understanding of the semiconductor device provided in the embodiment of the present invention, an application scenario of the semiconductor device provided in the embodiment of the present invention is first described below, where the semiconductor device is used in a memory that uses a magnetic tunnel junction as a memory array. The semiconductor device will be described in detail with reference to the drawings.
Referring to fig. 1 and 2, a semiconductor device according to an embodiment of the present invention includes a substrate 10, a first conductive structure 31 pattern disposed on the substrate 10, and an array of magnetic tunnel junctions 20 disposed above the first conductive structure 31 pattern, wherein the array of magnetic tunnel junctions 20 includes a plurality of magnetic tunnel junctions 20 arranged in an array, and each of the magnetic tunnel junctions 20 is electrically connected to the first conductive structure 31 pattern through a first contact plug 41. A second pattern of conductive structures 32 is also provided on the substrate 10, the second pattern of conductive structures 32 being located over the array of magnetic tunnel junctions 20, and each magnetic tunnel junction 20 being electrically connected to the second pattern of conductive structures 32 by a second contact plug 42. Wherein, some or all of the first conductive structure 31 pattern, the second conductive structure 32 pattern, the first contact plug 41 and the second contact plug 42 comprise magnetic shielding material. Specifically, only the first conductive structure 31 pattern may include a magnetic shielding material, only the second conductive structure 32 pattern may include a magnetic shielding material, only the first contact plug 41 may include a magnetic shielding material, and only the second contact plug 42 may include a magnetic shielding material. Of course, the magnetic shielding material may be included in any two of the first conductive structure 31 pattern, the second conductive structure 32 pattern, the first contact plug 41 and the second contact plug 42, any three of the first conductive structure 31 pattern, the second conductive structure 32 pattern, the first contact plug 41 and the second contact plug 42, or all of the first conductive structure 31 pattern, the second conductive structure 32 pattern, the first contact plug 41 and the second contact plug 42. Wherein, each structure contains magnetic shielding material, the material of the structure can be all composed of magnetic shielding material, or the material of the structure can contain partial magnetic shielding material.
In the above solution, the magnetic shielding material is included in part or all of the first conductive structure 31 pattern, the second conductive structure 32 pattern, the first contact plug 41 and the second contact plug 42 under and above the array of magnetic tunnel junctions 20, and the magnetic shielding material is provided in the vicinity of each magnetic tunnel junction 20 for magnetic shielding, so that the effect of magnetically shielding each magnetic tunnel junction 20 can be improved. And the magnetic shielding material can be added into the conductive structure pattern and the contact plug when the conductive structure pattern and the contact plug are processed, so that the processing technology can be simplified. The above-described respective structures will be described in detail with reference to the accompanying drawings.
In providing the substrate 10, and referring to fig. 1, the substrate 10 acts as a carrier for supporting the various structures, and also has a dielectric layer 11 separating the various conductive structures. In determining the semiconductor device, the semiconductor device may be an MRAM comprising an array of magnetic tunnel junctions 20 to improve the magnetic shielding effect of the MRAM. Of course, the semiconductor device may also be other memories comprising an array of magnetic tunnel junctions 20.
In providing the first conductive structure 31 pattern, referring to fig. 1, the first conductive structure 31 pattern may be an array of bottom metal layers, wherein the array of bottom metal layers includes a plurality of bottom metal layers corresponding to the plurality of magnetic tunnel junctions 20 one to one, and each bottom metal layer is electrically connected to the corresponding magnetic tunnel junction 20 through the first contact plug 41. Specifically, when the first conductive structure 31 pattern is electrically connected to the magnetic tunnel junction 20 through the first contact plug 41, the first conductive pattern is electrically connected to the bottom electrode 21 through the first contact plug 41, and the bottom electrode 21 is in contact with the magnetic tunnel junction 20, so that the first conductive structure 31 pattern is electrically connected to the magnetic tunnel junction 20. A transistor array (not shown) is also disposed on the substrate 10 and is located below the bottom metal layer array. The transistor array includes a plurality of transistors corresponding to the plurality of bottom metal layers one to one, and a drain of each transistor is electrically connected to the corresponding bottom metal layer through the third contact plug 43. Each bottom metal layer in the bottom metal layer array is a magnetic shielding material layer or a composite material layer containing a magnetic shielding material layer and a low-resistivity material layer. The magnetic shielding material is added to the bottom metal layer which is closer to each magnetic tunnel junction 20, so that the effect of magnetically shielding each magnetic tunnel junction 20 is improved.
It should be noted that the low resistivity material in this context means a material with a resistivity less than a set value, and when the set value is specifically determined, the size of the set value is specifically related to a plurality of factors such as a processing technology and product requirements. When the bottom resistivity material is selected specifically, the low resistivity material may be one or more of copper, tungsten, and aluminum, so as to improve the conductive effect of the conductive structure. Correspondingly, a layer of low resistivity material refers to a layer structure consisting of a low resistivity material. When the magnetic shielding material is determined, the magnetic shielding material can be one or more of iron, cobalt and nickel, so that the magnetic shielding effect is improved. Of course, other materials having magnetic shielding effect can be selected as the magnetic shielding material.
In particular to arrange each bottom metal layer in the array of bottom metal layers, referring to fig. 1, the bottom metal layer may be a composite material layer including a magnetic shielding material layer and a low resistivity material layer. Specifically, the magnetic shield material layer may be located above the low resistivity material layer, and the magnetic shield material layer may be disposed closer to the magnetic tunnel junction 20 to improve the magnetic shield effect. Of course, it is also possible to have the magnetic shield material layer disposed below the low resistivity material layer. The composite material layer can also contain a barrier layer which is clamped between the magnetic shielding material layer and the low-resistivity material layer to prevent the two material layers from mutually permeating, thereby preventing the respective performances from being influenced. The material of the barrier layer may be Ta, TaN, Ti, TiN, etc. In addition, referring to fig. 3, the bottom metal layer may also be entirely composed of the magnetic shielding material layer to increase the thickness of the magnetic shielding material layer, improving the magnetic shielding effect. Meanwhile, the magnetic shielding material layer can conduct electricity, so that the normal electrical function is not influenced. As shown in fig. 1 and 4, the first contact plug 41 and the third contact plug 43 may be made of low resistivity material to improve the conductive effect and prevent electrical defects. Of course, referring to fig. 3, it is also possible to make the material of part or all of the first contact plug 41 and the third contact plug 43 be a magnetic shielding material to improve the magnetic shielding effect. Specifically, the material of the first contact plug 41 may be a low resistivity material, and the material of the third contact plug 43 may be a magnetic shielding material; the material of the first contact plug 41 can be made to be a magnetic shielding material, and the material of the third contact plug 43 can be made to be a low resistivity material; the material of the first contact plug 41 and the third contact plug 43 may be a magnetic shielding material. Of course, the first conductive structure 31 pattern may be other conductive structure patterns.
Referring to fig. 4, a word line 33 pattern may also be provided in the substrate 10, the word line 33 pattern being located above the array of transistors and below the array of bottom metal layers. The word line 33 pattern includes a plurality of word lines 33 arranged in parallel and extending in the first direction, and a gate of each transistor in the transistor array is electrically connected to one word line 33 through a fourth contact plug 44. Each word line 33 in the pattern of word lines 33 is a layer of magnetic shielding material, or a composite material layer comprising a layer of magnetic shielding material and a layer of low resistivity material. The effect of magnetically shielding each magnetic tunnel junction 20 is further enhanced by also incorporating a magnetic shielding material in the word line 33 pattern. And a magnetic shield material can be added thereto when the word line 33 is processed, thereby simplifying the process. When each word line 33 is specifically arranged, referring to fig. 4, each word line 33 can be formed by a composite material layer including a magnetic shielding material layer and a low resistivity material layer, specifically, the magnetic shielding material layer can be stacked above the low resistivity material layer, so that the distance between the magnetic shielding material layer and the magnetic tunnel junction 20 is closer, and the magnetic shielding effect is improved. Of course, it is also possible to have the layer of magnetic shielding material below the layer of low resistivity material. The composite material layer can also contain a barrier layer which is clamped between the magnetic shielding material layer and the low-resistivity material layer to prevent the two material layers from mutually permeating, thereby preventing the respective performances from being influenced. Of course, each word line 33 may also be entirely composed of a magnetic shield material layer to increase the thickness of the magnetic shield material layer to improve the magnetic shield effect. Meanwhile, the magnetic shielding material layer can conduct electricity, so that the normal electrical function is not influenced. Referring to fig. 4, the material of the fourth contact plug 44 may be a low resistivity material to improve the conductive effect and prevent electrical defects from occurring. Of course, the material of the fourth contact plug 44 may also be a magnetic shielding material to improve the magnetic shielding effect.
When the second conductive structure 32 pattern is disposed, referring to fig. 1, fig. 2 and fig. 4, the second conductive structure 32 pattern may be a bit line pattern, the bit line pattern includes a plurality of bit lines arranged in parallel and extending along a second direction, and the first direction is not parallel to the second direction. Each magnetic tunnel junction 20 is electrically connected to one bit line through the second contact plug 42, specifically, each magnetic tunnel junction 20 is in contact with the top electrode 22, and the top electrode 22 is electrically connected to one bit line through the second contact plug 42, thereby achieving the electrical connection between each magnetic tunnel junction 20 and the bit line pattern.
Each bit line in the bit line pattern may be made of a magnetic shielding material layer or a composite material layer including a magnetic shielding material layer and a low resistivity material layer. The magnetic shielding effect is improved by adding a magnetic shielding material also to the bit line located closer to the magnetic tunnel junction 20. In particular, when each bit line is provided, referring to fig. 1, each bit line may be formed of a composite material layer including a magnetic shield material layer and a low resistivity material layer, and in particular, a magnetic shield material layer may be stacked over the low resistivity material layer. Of course, the magnetic shielding material layer can be positioned below the low resistivity material layer, so that the distance between the magnetic shielding material layer and the magnetic tunnel junction 20 is closer, and the magnetic shielding effect is improved. The composite material layer can also contain a barrier layer which is clamped between the magnetic shielding material layer and the low-resistivity material layer to prevent the two material layers from mutually permeating, thereby preventing the respective performances from being influenced. Of course, referring to fig. 3, each bit line may also be entirely composed of the magnetic shielding material layer to increase the thickness of the magnetic shielding material layer, improving the magnetic shielding effect. Meanwhile, the magnetic shielding material layer can conduct electricity, so that the normal electrical function is not influenced. Referring to fig. 1, 3 and 4, the material of the second contact plug 42 may be a low resistivity material to improve the conductive effect and prevent electrical defects. Of course, the material of the second contact plug 42 may also be a magnetic shielding material to improve the magnetic shielding effect.
Referring to fig. 1, 2, 3 and 4, a redundant structure 50 surrounding the magnetic tunnel junction 20 may be further disposed on the substrate 10, and each redundant structure 50 includes at least two redundant layers 51 sequentially arranged above and below. Any two adjacent redundant layers 51 are arranged at intervals, and a redundant contact plug 52 is connected between any two adjacent redundant layers 51. Each redundant layer 51 is a magnetic shielding material layer or a composite material layer containing a magnetic shielding material layer and a low-resistivity material layer; the material of the redundant contact plug 52 is a magnetic shielding material. Through being provided with the redundant structure 50 that includes the magnetic shielding material around magnetic tunnel junction 20 for the area of magnetic shielding is greater than the area of magnetic tunnel junction 20 array, improves magnetic shielding effect.
Specifically, when the number of the redundant layers 51 is determined, the number of the redundant layers 51 may be two as shown in fig. 1, and the number of the redundant layers 51 may also be 3, 4, 5, or the like. At least two layers of redundant layers 51 are sequentially deposited from bottom to top, the two adjacent layers of redundant layers 51 are separated by the dielectric layer 11, and the two adjacent layers of redundant layers 51 are connected by the redundant contact plugs 52, so that the at least two layers of redundant layers 51 are connected into a whole, and the magnetic shielding effect is improved. In the specific determination of the shape of each of the redundant layers 51, the shape of each of the redundant layers 51 may be rectangular, circular, or the like, and the redundant layers 51 distributed on the same layer are spaced around the array of magnetic tunnel junctions 20 to prevent the redundant layers 51 from interfering with the arrangement of the interconnection lines.
In the specific arrangement of the at least two redundant layers 51, referring to fig. 1, the redundant layer 51 positioned at the lowermost layer among the at least two redundant layers 51 may be positioned at the same layer as the bottom metal layer pattern, and the redundant layer 51 positioned at the uppermost layer may be positioned at the same layer as the bit line pattern. By locating the redundant layers 51 in the redundant structure 50 in the region between the bit line pattern and the bottom metal layer, the array of magnetic tunnel junctions 20 is enclosed in a smaller space, thereby improving the magnetic shielding effect. Meanwhile, the bottom metal layer pattern and the bit line pattern can be processed together, so that the process is simplified.
When the material of the redundant structure 50 is specifically determined, referring to fig. 1, fig. 2, and fig. 4, the material of each redundant layer 51 can be made to be a magnetic shielding material, and each redundant layer 51 can be made to be composed of a magnetic shielding material layer, so that the magnetic shielding effect is improved. And the material of the redundant contact plug 52 connected between the two adjacent redundant layers 51 can also be made of magnetic shielding material, so that the magnetic shielding effect is further improved. In addition, the redundant structure 50 is composed of the redundant layers 51 and the redundant contact plugs 52, so that the surface area of each layer of the redundant layers 51 can be increased, and the magnetic shielding effect can be improved.
Referring to fig. 4, a source line 34 pattern may also be provided in the substrate 10, the source line 34 pattern being above the transistors and below the word line 33 pattern. The source line 34 pattern includes a plurality of source lines 34 arranged in parallel and extending in the third direction, and the source of each transistor is electrically connected to one source line 34 through a fifth contact plug 45. And each source line 34 in the pattern of source lines 34 is a layer of magnetic shielding material, or a composite material layer comprising a layer of magnetic shielding material and a layer of low resistivity material. The effect of magnetically shielding each magnetic tunnel junction 20 is further enhanced by also adding a magnetic shielding material in the source line 34 pattern. And a magnetic shield material can be added to the source line 34 when it is processed, thereby simplifying the process. When each source line 34 is specifically arranged, referring to fig. 1, each source line 34 can be formed by a composite material layer including a magnetic shielding material layer and a low resistivity material layer, specifically, the magnetic shielding material layer can be stacked above the low resistivity material layer, so that the distance from the magnetic shielding material layer to the magnetic tunnel junction 20 is shorter, and the magnetic shielding effect is improved. Of course, it is also possible to have the layer of magnetic shielding material below the layer of low resistivity material. The composite material layer can also contain a barrier layer which is clamped between the magnetic shielding material layer and the low-resistivity material layer to prevent the two material layers from mutually permeating, thereby preventing the respective performances from being influenced. Of course, referring to FIG. 3, each source line 34 may also be entirely comprised of a layer of magnetic shielding material to increase the thickness of the layer of magnetic shielding material to improve the magnetic shielding effect. Meanwhile, the magnetic shielding material layer can conduct electricity, so that the normal electrical function is not influenced. Referring to fig. 1, 3 and 4, the material of the fifth contact plug 45 may be a low resistivity material to improve the conductive effect, ensure the conductive performance of the contact plug, and prevent electrical defects. Of course, the material of the fifth contact plug 45 may also be a magnetic shielding material to improve the magnetic shielding effect.
In addition, it should be noted that each of the above-mentioned conductive structures and contact plugs may be separated from the dielectric layer 11 in the substrate 10 by a barrier layer to prevent interpenetration, thereby affecting the respective performance.
In the specific processing of the contact plug and the wire structure, there are various ways, such as one of the ways of processing the contact plug and the wire structure shown in fig. 5a to 5 e. First, referring to fig. 5a, a contact hole for filling and forming a contact plug and a line groove for filling and forming a composite material layer are processed on a substrate 10. Next, referring to fig. 5b, a barrier layer is formed in the contact hole and the line groove. Next, referring to fig. 5c, a low resistivity material layer is formed on the barrier layer, and the low resistivity material layer fills the contact holes but does not fill the trenches. Next, referring to fig. 5d, a magnetic shield material is filled, and the wire grooves are filled with the magnetic shield material. Next, referring to fig. 5e, the barrier layer, the low resistivity material layer and the magnetic shielding material layer outside the line groove on the surface of the substrate 10 are removed, and the contact plug and line structure is obtained. The specific removing method can adopt a CMP planarization mode to remove.
When the composite material further includes a barrier layer sandwiched between the magnetic shield material layer and the low resistivity material layer, referring to fig. 6a, after a low resistivity material layer is formed, a barrier layer is formed on the low resistivity material layer. Thereafter, referring to fig. 6b, the magnetic shield material layer is filled. Thereafter, referring to fig. 6c, two barrier layers, a low resistivity material layer and a magnetic shielding material layer are removed by one CMP planarization, resulting in a contact plug and line structure.
In addition, a single damascene process may be used to process the contact plug and the line structure, which is specifically referred to fig. 7a to 7 e. First, referring to fig. 7a, a contact hole is processed on a substrate 10. Referring to fig. 7b, a barrier layer is formed in the contact hole. Referring to fig. 7c, the low resistivity material layer is filled and removed outside the substrate 10 using a CMP planarization process, resulting in a contact plug composed of a low resistivity material. Next, referring to fig. 7d, a dielectric layer 11 is deposited on the substrate 10, and a wire groove communicating with the contact plug is processed. Next, referring to fig. 7e, the magnetic shield material layer is filled, and the magnetic shield material layer outside the substrate 10 is removed by a CMP planarization process, resulting in a line structure.
The magnetic shielding material is contained in part or all of the first conductive structure 31 pattern, the second conductive structure 32 pattern, the first contact plug 41 and the second contact plug 42 below and above the magnetic tunnel junction 20 array, and the magnetic shielding material is arranged in the area near each magnetic tunnel junction 20 for magnetic shielding, so that the magnetic shielding effect of each magnetic tunnel junction 20 can be improved. And magnetic shielding materials can be added in the conductive structure patterns and the contact plugs when the conductive structure patterns and the contact plugs are processed, so that the processing technology can be simplified.
The above description is only for the specific embodiment of the present invention, but the scope of the present invention is not limited thereto, and any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope of the present invention are included in the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (12)
1. A semiconductor device, comprising:
a substrate;
a first pattern of conductive structures disposed on the substrate;
a magnetic tunnel junction array disposed above the first conductive structure pattern, the magnetic tunnel junction array including a plurality of magnetic tunnel junctions arranged in an array, and each magnetic tunnel junction electrically connected to the first conductive structure pattern through a first contact plug;
a second conductive structure pattern disposed over the array of magnetic tunnel junctions, and each magnetic tunnel junction is electrically connected to the second conductive structure pattern through a second contact plug;
and part or all of the first conductive structure pattern, the second conductive structure pattern, the first contact plug and the second contact plug comprise magnetic shielding materials.
2. The semiconductor device according to claim 1, wherein the first conductive structure pattern is an array of bottom metal layers, wherein the array of bottom metal layers includes a plurality of bottom metal layers in one-to-one correspondence with the plurality of magnetic tunnel junctions, and each bottom metal layer is electrically connected to a corresponding magnetic tunnel junction through the first contact plug;
a transistor array is further arranged on the substrate and is positioned below the bottom metal layer array; the transistor array comprises a plurality of transistors which are in one-to-one correspondence with the plurality of bottom metal layers, and the drain electrode of each transistor is electrically connected with the corresponding bottom metal layer through a third contact plug;
each bottom metal layer in the bottom metal layer array is a magnetic shielding material layer or a composite material layer containing a magnetic shielding material layer and a low-resistivity material layer.
3. The semiconductor device of claim 2, wherein a word line pattern is further disposed in the substrate, the word line pattern being located above the array of transistors and below the array of bottom metal layers; the word line pattern comprises a plurality of word lines which are arranged in parallel and extend along a first direction, and the grid electrode of each transistor in the transistor array is electrically connected with one word line through a fourth contact plug;
each word line in the word line pattern is a magnetic shielding material layer or a composite material layer containing a magnetic shielding material layer and a low-resistivity material layer.
4. The semiconductor device according to claim 2, wherein the second conductive structure pattern is a bit line pattern including a plurality of bit lines arranged in parallel and extending in a second direction, wherein the first direction is not parallel to the second direction; each magnetic tunnel junction is electrically connected with the one bit line through the second contact plug;
and each bit line in the bit line pattern is a magnetic shielding material layer or a composite material layer containing a magnetic shielding material layer and a low-resistivity material layer.
5. The semiconductor device according to claim 4, wherein the substrate is further provided with redundant structures surrounding the magnetic tunnel junction, each redundant structure comprising at least two redundant layers arranged one above the other; any two adjacent redundant layers are arranged at intervals, and a redundant contact plug is connected between any two adjacent redundant layers;
each redundant layer is a magnetic shielding material layer or a composite material layer containing a magnetic shielding material layer and a low-resistivity material layer; the material of the redundant contact plug is magnetic shielding material.
6. The semiconductor device according to claim 5, wherein a lowermost redundant layer of the at least two redundant layers is located at the same layer as the bottom metal layer pattern, and an uppermost redundant layer is located at the same layer as the bit line pattern.
7. The semiconductor device according to claim 2, wherein a source line pattern is further provided in the substrate; the source line pattern is positioned above the transistor and below the word line pattern; the source line pattern includes a plurality of source lines arranged in parallel and extending in a third direction, and a source of each transistor is electrically connected to the one source line through a fifth contact plug;
and each source line in the source line pattern is a magnetic shielding material layer or a composite material layer containing a magnetic shielding material layer and a low-resistivity material layer.
8. The semiconductor device according to any one of claims 2 to 7, wherein the composite material layer further comprises a barrier layer interposed between the magnetic shielding material layer and the low resistivity material layer.
9. The semiconductor device according to claim 7, wherein a material of part or all of the first contact plug, the second contact plug, the third contact plug, the fourth contact plug, and the fifth contact plug is a low-resistivity material.
10. The semiconductor device according to claim 7, wherein a material of part or all of the first contact plug, the second contact plug, the third contact plug, the fourth contact plug, and the fifth contact plug is a magnetic shielding material.
11. The semiconductor device according to claim 1, wherein the magnetic shielding material is one or more of iron, cobalt, and nickel, and the low-resistivity material is one or more of copper, tungsten, and aluminum.
12. The semiconductor device of claim 1, wherein the semiconductor device is an MRAM.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011587176.3A CN114695431A (en) | 2020-12-28 | 2020-12-28 | Semiconductor device with a plurality of transistors |
| PCT/CN2021/127879 WO2022142700A1 (en) | 2020-12-28 | 2021-11-01 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011587176.3A CN114695431A (en) | 2020-12-28 | 2020-12-28 | Semiconductor device with a plurality of transistors |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN114695431A true CN114695431A (en) | 2022-07-01 |
Family
ID=82129697
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202011587176.3A Pending CN114695431A (en) | 2020-12-28 | 2020-12-28 | Semiconductor device with a plurality of transistors |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN114695431A (en) |
| WO (1) | WO2022142700A1 (en) |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7782660B2 (en) * | 2008-03-20 | 2010-08-24 | International Business Machines Corporation | Magnetically de-coupling magnetic memory cells and bit/word lines for reducing bit selection errors |
-
2020
- 2020-12-28 CN CN202011587176.3A patent/CN114695431A/en active Pending
-
2021
- 2021-11-01 WO PCT/CN2021/127879 patent/WO2022142700A1/en active Application Filing
Also Published As
| Publication number | Publication date |
|---|---|
| WO2022142700A1 (en) | 2022-07-07 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US8202737B2 (en) | Magnetic memory device and method for manufacturing the same | |
| KR100608248B1 (en) | Keepers for mram electrodes | |
| US9105572B2 (en) | Magnetic memory and manufacturing method thereof | |
| US9263674B2 (en) | ETCH bias homogenization | |
| TW546822B (en) | Magnetic semiconductor memory apparatus and method of manufacturing the same | |
| CN103069570A (en) | Mram device and integration techniques compatible with logic integration | |
| US10608045B2 (en) | Method of forming semiconductor device | |
| CN111435703B (en) | Magnetic tunneling junction device and forming method thereof | |
| CN112768488B (en) | Phase change memory and manufacturing method thereof | |
| US6806524B2 (en) | Thin film magnetic memory device | |
| CN100454433C (en) | Write line design in MRAM and its manufacturing method | |
| KR102564790B1 (en) | Magnetic memory device and Method for manufacturing the same | |
| CN114695431A (en) | Semiconductor device with a plurality of transistors | |
| KR101049589B1 (en) | Cell array of semiconductor memory device and manufacturing method thereof | |
| CN111584539A (en) | Magnetoresistive memory structure | |
| CN112786562B (en) | Buried magnetoresistive memory structure and method for fabricating the same | |
| CN113451357B (en) | Phase change memory | |
| US20220254990A1 (en) | Semiconductor devices and methods of fabricating the same | |
| US20120273844A1 (en) | Magnetic random access memory and method of manufacturing the same | |
| KR20240034383A (en) | Semiconductor devices | |
| CN113471246A (en) | Semiconductor structure and forming method thereof | |
| JP2013065778A (en) | Semiconductor magnetic storage device | |
| CN116171039A (en) | Memory device and method of manufacturing the same | |
| KR20050077157A (en) | Mram device and method of fabricating the same | |
| KR20230077595A (en) | Semiconductor device and manufacturing method thereof |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination |