CN114691605B

CN114691605B - DBC signal start bit format conversion method and system

Info

Publication number: CN114691605B
Application number: CN202210179121.1A
Authority: CN
Inventors: 殷婷婷
Original assignee: Zhiji Automobile Technology Co Ltd
Current assignee: Zhiji Automobile Technology Co Ltd
Priority date: 2022-02-25
Filing date: 2022-02-25
Publication date: 2024-05-14
Anticipated expiration: 2042-02-25
Also published as: CN114691605A

Abstract

The invention discloses a DBC signal start bit format conversion method and a system. The method includes defining a written text format specification; extracting data information in an Excel file to obtain a start bit, a byte length and a byte sequence; judging a signal format corresponding to the byte sequence; when the byte order is Intel format, writing the lowest signal bit LSB into the text format according to the definition writing text format specification; when the byte order is Motorola format, it is further determined whether the lowest signal bit LSB and the highest signal bit MSB of the signal are in the same byte, the highest signal bit MSB is calculated, written into the text format specification according to definition, and the highest signal bit MSB is filled into the text format. The method and the device can effectively solve the problem that the text format definition starting bit and the file starting bit are different when the existing DBC conversion tool converts the Motorola format signal, and generate a correct DBC file.

Description

DBC signal start bit format conversion method and system

Technical Field

The invention belongs to the technical field of automobile database development, and particularly relates to a DBC signal start bit format conversion method and system.

Background

DBC files are files describing data communications between CAN network nodes, DBC files are an ASCII format file, and DBC extensions may be used to define CAN networks. In the development process of the automobile network, the DBC database is not separated, with the development of automobile technology, the number of ECU nodes and messages on the automobile is increased, and manual editing of DBC files not only consumes a great deal of time of engineers, but also is easy to make mistakes. To solve this problem, there are many tools for converting DBC, some using Excel VBA, and some using Python. However, these conversion tools all face the problem that the start bit of the Motorola format signal is different from that in CANDB ++ in the file format in the conversion process, and many tools directly fill the start bit of the design and then adjust in CANDB ++ to finally complete the work of creating the DBC. Since manual operations are also required after the file is generated, bus parsing errors or software writing errors are easily caused.

Disclosure of Invention

Aiming at the defects or improvement demands of the prior art, the invention provides a DBC signal start bit format conversion method and a system, which can effectively solve the problem that a text format definition start bit and a file start bit are different when the existing DBC conversion tool converts a Motorola format signal, and generate a correct DBC file.

To achieve the above object, according to one aspect of the present invention, there is provided a DBC signal start bit format conversion method including: defining a written text format specification; extracting data information in an Excel file to obtain a start bit, a byte length and a byte sequence; judging a signal format corresponding to the byte sequence; when the byte order is Intel format, writing the lowest signal bit LSB into the text format according to the definition writing text format specification; when the byte order is Motorola format, it is further determined whether the lowest signal bit LSB and the highest signal bit MSB of the signal are in the same byte, the highest signal bit MSB is calculated, written into the text format specification according to definition, and the highest signal bit MSB is filled into the text format.

In some embodiments, it is further determined whether the lowest signal bit LSB and the highest signal bit MSB of the signal are in the same byte, specifically: judging whether the maximum bit of the byte where the lowest signal bit LSB is located is less than 8 or not by adding 1 to the maximum bit of the byte where the lowest signal bit LSB is located, if yes, determining that the lowest signal bit LSB and the highest signal bit MSB of the signal are in the same byte, otherwise, determining that the lowest signal bit LSB and the highest signal bit MSB of the signal are not in the same byte.

In some embodiments, when the lowest signal bit LSB and the highest signal bit MSB of the signal are in the same byte, calculating the highest signal bit MSB using a first strategy; when the lowest signal bit LSB and the highest signal bit MSB of the signal are not in the same byte, the second strategy is adopted to calculate the highest signal bit MSB.

In some embodiments, the highest signal bit msb=lsb+ Bitlen-1 is calculated using a first strategy, where Bitlen is a byte length.

In some embodiments, the calculation of the highest signal bit MSB using the second strategy is specifically: calculating an occupied bit number N (LSB) of a byte where the lowest signal bit LSB is located and the number R= BitLen-N (LSB) of the remaining bytes which are required to be occupied by the byte where the lowest signal bit LSB is located, wherein Bitlen is the byte length; the number of bits N (MSB) =r that the byte in which the highest signal bit MSB is located needs to occupy is specified; calculating the minimum Bit MSB (Min) of the byte where the MSB of the highest signal Bit is; the highest signal bit msb=msb (Min) +n (MSB) -1 is calculated.

In some embodiments, the written text format specification is defined as: the start bit byte length @ byte order.

In some embodiments, the start bit is the least significant bit LSB or the most significant bit MSB, and the byte order corresponds to Intel format or Motorola format.

In some embodiments, one of 0 and 1 is used to represent the Intel format and the other is used to represent the Motorola format.

In some embodiments, it is first determined whether the byte order is in Intel format, and when it is determined that the byte order is not in Intel format, it is further determined whether the byte order is in Motorola format.

In some embodiments, when it is determined that the byte order is not in Motorola format, it is determined that the byte format of the data information in the Excel file is abnormal and an error is reported.

According to another aspect of the present invention, there is provided a DBC signal start bit format conversion system including: the text format specification definition module is used for defining a writing specification of a text format; the file information extraction module is used for extracting data information in the Excel file to obtain a start bit, a byte length and a byte sequence; the format judging module is used for judging a signal format corresponding to the byte sequence; and the writing module is used for writing corresponding contents in the text format according to the writing specifications of the signal format and the text format.

In some embodiments, the writing module is configured to write the LSB into the text format according to a definition writing text format specification when the format determining module determines that the signal format is the Intel format.

In some embodiments, the format determining module is configured to further determine whether the LSB and the MSB of the signal are in the same byte when determining that the signal format is Motorola format.

In some embodiments, determining whether the LSB and MSB of the signal are in the same byte is specifically: judging whether the LSB is less than 8 or not by adding 1 to the maximum bit of the byte where the LSB is located, if yes, determining that the LSB and the MSB of the signal are in the same byte, otherwise, determining that the LSB and the MSB of the signal are not in the same byte.

In some embodiments, the system further comprises a calculation module for calculating the MSB using different strategies depending on whether the LSB and the MSB of the signal are in the same byte.

In some embodiments, the calculating module is configured to calculate msb=lsb+ Bitlen-1 when the format determining module recognizes that the LSB and the MSB of the signal are in the same byte, where Bitlen is a byte length.

In some embodiments, the calculating module is configured to calculate the MSB when the format determining module recognizes that the LSB and the MSB of the signal are not in the same byte, by: calculating an occupied bit number N (LSB) of a byte where the lowest signal bit LSB is located and the number R= BitLen-N (LSB) of the remaining bytes which are required to be occupied by the byte where the lowest signal bit LSB is located, wherein Bitlen is the byte length; the number of bits N (MSB) =r that the byte in which the highest signal bit MSB is located needs to occupy is specified; calculating the minimum Bit MSB (Min) of the byte where the MSB of the highest signal Bit is; the highest signal bit msb=msb (Min) +n (MSB) -1 is calculated.

In some embodiments, the writing module is configured to write the MSB calculated by the calculating module into the text format according to a defined writing text format specification when the format determining module determines that the signal format is the Motorola format.

In some embodiments, the system further includes a prompt module configured to determine that the byte format of the data information in the Excel file is abnormal and report an error when the format determination module determines that the byte order is neither Intel format nor Motorola format.

According to yet another aspect of the present invention, there is provided a vehicle including the DBC signal start bit format conversion system described above.

According to still another aspect of the present invention, there is provided an electronic apparatus including: a processor; a memory communicatively coupled to the processor; the memory stores instructions executable by the processor to enable the processor to perform the method described above.

According to yet another aspect of the present invention, there is provided a computer readable storage medium storing computer instructions which, when executed by a processor, implement the above-described method.

In general, the above technical solutions conceived by the present invention have the following beneficial effects compared with the prior art: and accurately calculating and converting the start bit of the signal defining the Motorola format in CANDB ++ into the start bit required by the text format, so that the start bit is required by design after the DBC file generated by conversion calculation is opened by CANDB ++.

Drawings

FIG. 1 is a schematic diagram of an Intel format signal when it is turned on in CANDB ++;

FIG. 2 is a schematic diagram of a Motorola format signal when it is on in CANDB ++;

FIG. 3 is a flowchart of a DBC file conversion method according to an embodiment of the present invention;

Fig. 4 is a block diagram of an electronic device according to an embodiment of the present invention.

Detailed Description

The present application will be described in further detail with reference to the drawings and examples, in order to make the objects, technical solutions and advantages of the present application more apparent. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the application. As will be recognized by those of skill in the pertinent art, the described embodiments may be modified in various different ways without departing from the spirit or scope of the present application. Accordingly, the drawings and description are to be regarded as illustrative in nature and not as restrictive.

The DBC file opened in CANDB ++ has the Lowest Signal Bit (LSB) in either Motorola or Intel format, and both Intel and Motorola formats are signals with a start bit of 30 and a signal length of 24 Bit as shown in fig. 1 and 2. In the text format, the start bit defined by the Intel format is the Least Significant Bit (LSB), and the start bit defined by the Motorola format is the Most Significant Bit (MSB), so that the start bit defined by the Motorola format in CANDB ++ cannot be directly written into the text format, but the LSB needs to be converted into the MSB and then written into the text format to generate the DBC file, and thus the start bit generated by conversion calculation is required by design after the start bit is opened by CANDB ++.

As shown in fig. 3, the method for converting the DBC signal start bit format according to an embodiment of the present invention includes the following steps:

A written text format specification is defined. In some embodiments, the text format specification is: the start bit byte length @ byte order. Wherein the start bit is the lowest signal bit LSB or the highest signal bit MSB. The byte length is indicated by BitLen. Byte Order is expressed by Byte Order, and two types of Byte Order correspond to Intel format and Motorola format respectively. In some embodiments, the Intel format and Motorola format are represented by 0 and 1. In some embodiments, the Intel format is represented by 0 and the Motorola format is represented by 1. In some embodiments, the Motorola format is represented by 0 and the Intel format is represented by 1.

And extracting data information in the Excel file to obtain a start bit, a byte length and a byte sequence.

And judging whether the byte sequence is in an Intel format, if so, writing the text format specification according to the definition, and filling the LSB into the text format. In some embodiments, lsb| BitLen @ Byte Order is written in text format, e.g., lsb| BitLen @ 1; otherwise, further judging whether the byte order is in a Motorola format.

When the byte order is judged not to be in the Motorola format, judging that the byte format of the data information in the Excel file is abnormal, and reporting errors; in determining that the byte order is in Motorola format, it is further determined whether the LSB and MSB of the signal are in the same byte.

The MSB is calculated by adopting different strategies according to whether the LSB and the MSB of the signal are in the same byte or not.

In some embodiments, msb=lsb+ Bitlen-1 is calculated when the LSB and MSB of the asserted signal are in the same byte.

In some embodiments, when the LSB and MSB of the asserted signal are not in the same byte, the MSB is calculated as follows.

Specifically, the number of occupied bits N (LSB) of the byte in which the LSB is located and the number of remaining bytes r= BitLen-N (LSB) that the byte in which the LSB is located need to occupy are calculated, wherein ,N(LSB)=((Int(LSB/ 8) + 1) * 8 - LSB) - 8 * Int( (BitLen - ( (Int(LSB / 8) + 1) * 8 - LSB) - 1) / 8）,Int() represents an integer of numbers within () and the number of bytes in which the LSB is located.

According to the number R of the remaining bytes needing to be occupied by the byte with the LSB, the byte with the MSB and the bit number N (MSB) =R needing to be occupied by the byte with the MSB are defined.

The minimum Bit MSB (Min) = (Int (LSB/8) - (Int ((BitLen- ((Int (LSB/8) +1) ×8-LSB) -1)/8) +1)) 8 of the byte in which the MSB is located is calculated.

Msb=msb (Min) +n (MSB) -1 is calculated.

And filling the MSB into the text format according to the definition writing text format specification to generate the DBC file. In some embodiments, msb| BitLen @ Byte Order, such as msb| BitLen @0, is written in text format.

By the method, after the start bit of the Motorola format signal is converted, a correct DBC file is generated, and the start bit is required by design after the file is opened by CANDB ++.

Correspondingly, the embodiment of the invention also provides a DBC signal start bit format conversion system, which comprises:

The text format specification definition module is used for defining the writing specification of the text format. In some embodiments, the text format specification is: the start bit byte length @ byte order.

And the file information extraction module is used for extracting the data information in the Excel file to obtain a start bit, a byte length and a byte sequence.

And the format judging module is used for judging the signal format corresponding to the byte sequence.

And the writing module is used for writing corresponding contents in the text format according to the writing specifications of the signal format and the text format. In some embodiments, when the format judging module judges that the signal format is Intel format, the writing module fills the LSB into the text format according to the defined written text format specification, for example, the writing module writes the lsb| BitLen @byte Order in the text format.

In some embodiments, when the format determining module determines that the signal format is Motorola format, it further determines whether the LSB and the MSB of the signal are in the same byte. In some embodiments, determining whether the LSB and MSB of the signal are in the same byte is specifically: judging whether the LSB is less than 8 or not by adding 1 to the maximum bit of the byte where the LSB is located, if yes, determining that the LSB and the MSB of the signal are in the same byte, otherwise, determining that the LSB and the MSB of the signal are not in the same byte.

And the calculation module is used for calculating the MSB by adopting different strategies according to whether the LSB and the MSB of the signal are in the same byte or not. In some embodiments, the calculation module calculates msb=lsb+ Bitlen-1 when the format determination module asserts the LSB and MSB of the signal in the same byte.

In some embodiments, when the format determination module asserts that the LSB and the MSB of the signal are not in the same byte, the computation module computes the MSB as follows.

Msb=msb (Min) +n (MSB) -1 is calculated.

In some embodiments, when the format determining module determines that the signal format is Motorola format, the writing module writes the MSB calculated by the calculating module into the text format according to the defined written text format specification, and generates the DBC file. For example, the write module writes MSB| BitLen @ Byte Order in text format.

And the prompting module is used for judging that the byte format of the data information in the Excel file is abnormal and reporting errors when the format judging module judges that the byte sequence is neither an Intel format nor a Motorola format.

Embodiments of the present application also provide a vehicle, which in some implementations may include the DBC signal start bit format conversion system described above.

Fig. 4 is a block diagram of an electronic device according to an embodiment of the application. The embodiment of the application also provides an electronic device, as shown in fig. 4, which comprises: at least one processor 401, and a memory 403 communicatively coupled to the at least one processor 401. The memory 403 stores instructions executable by the at least one processor 401. The instructions are executed by at least one processor 401. The processor 401, when executing the instruction, implements the driving scene reconstruction method in the above-described embodiment. The number of memories 403 and processors 401 may be one or more. The electronic device is intended to represent various forms of digital computers, such as laptops, desktops, workstations, personal digital assistants, servers, blade servers, mainframes, and other appropriate computers. The electronic device may also represent various forms of mobile devices, such as personal digital processing, cellular telephones, smartphones, wearable devices, and other similar computing devices. The components shown herein, their connections and relationships, and their functions, are meant to be exemplary only, and are not meant to limit implementations of the applications described and/or claimed herein.

The electronic device may further include a communication interface 405 for communicating with an external device for data interactive transmission. The various devices are interconnected using different buses and may be mounted on a common motherboard or in other manners as desired. The processor 401 may process instructions executing within the electronic device, including instructions stored in or on memory to display graphical information of a graphical user interface (GRAPHICAL USER INTERFACE, GUI) on an external input/output device, such as a display device coupled to the interface. In other embodiments, multiple processors and/or multiple buses may be used, if desired, along with multiple memories and multiple memories. Also, multiple electronic devices may be connected, each providing a portion of the necessary operations (e.g., as a server array, a set of blade servers, or a multiprocessor system). The bus may be classified as an address bus, a data bus, a control bus, etc. For ease of illustration, only one thick line is shown in fig. 4, but not only one bus or one type of bus.

Alternatively, in a specific implementation, if the memory 403, the processor 401, and the communication interface 405 are integrated on a chip, the memory 403, the processor 401, and the communication interface 405 may complete communication with each other through internal interfaces.

It should be appreciated that the processor may be a central Processing unit (Central Processing Unit, CPU), other general purpose processor, digital signal processor (DIGITAL SIGNAL Processing, DSP), application SPECIFIC INTEGRATED Circuit (ASIC), field programmable gate array (Field Programmable GATE ARRAY, FPGA) or other programmable logic device, discrete gate or transistor logic device, discrete hardware components, or the like. A general purpose processor may be a microprocessor or any conventional processor or the like. It is noted that the processor may be a processor supporting an advanced reduced instruction set machine (ADVANCED RISC MACHINES, ARM) architecture.

An embodiment of the present application provides a computer-readable storage medium (such as the memory 403 described above) storing computer instructions that, when executed by a processor, implement the method provided in the embodiment of the present application.

Alternatively, the memory 403 may include a storage program area and a storage data area, wherein the storage program area may store an operating system, at least one application program required for a function; the storage data area may store data created according to the use of the electronic device of the driving scene reconstruction method, and the like. In addition, memory 403 may include high-speed random access memory, and may also include non-transitory memory, such as at least one magnetic disk storage device, flash memory device, or other non-transitory solid state storage device. In some embodiments, the memory 403 may optionally include memory remotely located with respect to the processor 401, which may be connected to the electronic device of the driving scenario reconstruction method via a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.

In the description of the present specification, a description referring to terms "one embodiment," "some embodiments," "examples," "specific examples," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present application. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, the different embodiments or examples described in this specification and the features of the different embodiments or examples may be combined and combined by those skilled in the art without contradiction.

Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include at least one such feature. In the description of the present application, the meaning of "a plurality" is two or more, unless explicitly defined otherwise.

Any process or method description in a flowchart or otherwise described herein may be understood as representing modules, segments, or portions of code which include one or more (two or more) executable instructions for implementing specific logical functions or steps of the process. And the scope of the preferred embodiments of the present application includes additional implementations in which functions may be performed in a substantially simultaneous manner or in an opposite order from that shown or discussed, including in accordance with the functions that are involved.

Logic and/or steps represented in the flowcharts or otherwise described herein, e.g., a ordered listing of executable instructions for implementing logical functions, can be embodied in any computer-readable medium for use by or in connection with an instruction execution system, apparatus, or device, such as a computer-based system, processor-containing system, or other system that can fetch the instructions from the instruction execution system, apparatus, or device and execute the instructions.

It is to be understood that portions of the present application may be implemented in hardware, software, firmware, or a combination thereof. In the above-described embodiments, the various steps or methods may be implemented in software or firmware stored in a memory and executed by a suitable instruction execution system. All or part of the steps of the methods of the embodiments described above may be performed by a program that, when executed, comprises one or a combination of the steps of the method embodiments, instructs the associated hardware to perform the method.

In addition, each functional unit in the embodiments of the present application may be integrated in one processing module, or each unit may exist alone physically, or two or more units may be integrated in one module. The integrated modules may be implemented in hardware or in software functional modules. The integrated modules described above, if implemented in the form of software functional modules and sold or used as a stand-alone product, may also be stored in a computer-readable storage medium. The storage medium may be a read-only memory, a magnetic or optical disk, or the like.

The foregoing is merely illustrative of the present application, and the present application is not limited thereto, and any person skilled in the art will readily recognize that various changes and substitutions are possible within the scope of the present application. Therefore, the protection scope of the application is subject to the protection scope of the claims.

Claims

1. A method for converting a DBC signal start bit format, comprising:

defining a written text format specification;

extracting data information in an Excel file to obtain a start bit, a byte length and a byte sequence;

Judging a signal format corresponding to the byte sequence;

when the byte order is Intel format, writing the lowest signal bit LSB into the text format according to the definition writing text format specification;

When the byte sequence is in a Motorola format, further judging whether the lowest signal bit LSB and the highest signal bit MSB of the signal are in the same byte, calculating the highest signal bit MSB, writing the highest signal bit MSB into a text format according to definition, and filling the highest signal bit MSB into the text format;

Wherein, the written text format specification is defined as: the start bit byte length @ byte order.

2. The DBC signal start bit format conversion method according to claim 1, further determining whether a lowest signal bit LSB and a highest signal bit MSB of the signal are in the same byte is specifically:

Judging whether the maximum bit of the byte where the lowest signal bit LSB is located is less than 8 or not by adding 1 to the maximum bit of the byte where the lowest signal bit LSB is located, if yes, determining that the lowest signal bit LSB and the highest signal bit MSB of the signal are in the same byte, otherwise, determining that the lowest signal bit LSB and the highest signal bit MSB of the signal are not in the same byte.

3. The DBC signal start bit format conversion method according to claim 1, wherein when a lowest signal bit LSB and a highest signal bit MSB of the signal are in the same byte, calculating the highest signal bit MSB using a first strategy; when the lowest signal bit LSB and the highest signal bit MSB of the signal are not in the same byte, the second strategy is adopted to calculate the highest signal bit MSB.

4. The DBC signal start bit format conversion method of claim 3, wherein the highest signal bit MSB = LSB + Bitlen-1 is calculated using a first strategy, wherein Bitlen is a byte length.

5. The DBC signal start bit format conversion method according to claim 3, wherein the calculating the highest signal bit MSB using the second strategy is specifically:

calculating an occupied bit number N (LSB) of a byte where the lowest signal bit LSB is located and the number R= BitLen-N (LSB) of the remaining bytes which are required to be occupied by the byte where the lowest signal bit LSB is located, wherein Bitlen is the byte length;

the number of bits N (MSB) =r that the byte in which the highest signal bit MSB is located needs to occupy is specified;

Calculating the minimum Bit MSB (Min) of the byte where the MSB of the highest signal Bit is;

the highest signal bit msb=msb (Min) +n (MSB) -1 is calculated.

6. The method of claim 1, wherein the start bit is the Least Significant Bit (LSB) or the Most Significant Bit (MSB), and the byte sequence corresponds to the Intel format or the Motorola format.

7. The method of claim 6, wherein one of 0 and 1 is used to represent Intel format and the other is used to represent Motorola format.

8. The DBC signal start bit format conversion method according to any one of claims 1-7, wherein determining whether the byte order is in Intel format is performed first, and further determining whether the byte order is in Motorola format when determining that the byte order is not in Intel format.

9. The DBC signal start bit format conversion method according to claim 8, wherein when it is determined that the byte order is not Motorola format, it is determined that the byte format of the data information in the Excel file is abnormal and an error is reported.

10. A DBC signal start bit format conversion system, comprising:

The text format specification definition module is used for defining a writing specification of a text format;

The file information extraction module is used for extracting data information in the Excel file to obtain a start bit, a byte length and a byte sequence;

the format judging module is used for judging a signal format corresponding to the byte sequence, and the format judging module is used for further judging whether the LSB and the MSB of the signal are in the same byte or not when judging that the signal format is a Motorola format;

The writing module is used for writing corresponding content in the text format according to the writing specifications of the signal format and the text format, and the writing module is used for writing the text format specification according to definition when the format judging module judges that the signal format is the Intel format and filling the LSB into the text format;

11. The DBC signal start bit format conversion system according to claim 10, wherein determining whether LSB and MSB of the signal are in the same byte is specifically: judging whether the LSB is less than 8 or not by adding 1 to the maximum bit of the byte where the LSB is located, if yes, determining that the LSB and the MSB of the signal are in the same byte, otherwise, determining that the LSB and the MSB of the signal are not in the same byte.

12. The DBC signal start bit format conversion system of claim 10, further comprising a calculation module for calculating the MSB using different strategies based on whether the LSB and the MSB of the signal are in the same byte.

13. The DBC signal start bit format conversion system of claim 12, wherein the calculating module is configured to calculate MSB = LSB + Bitlen-1 when the format determining module recognizes the LSB and the MSB of the signal are in the same byte, wherein Bitlen is a byte length.

14. The DBC signal start bit format conversion system according to claim 12, wherein the calculating module is configured to calculate the MSB when the format determining module recognizes that the LSB and the MSB of the signal are not in the same byte by:

the highest signal bit msb=msb (Min) +n (MSB) -1 is calculated.

15. The DBC signal start bit format conversion system according to any one of claims 12-14, wherein the writing module is configured to write the MSB calculated by the calculating module into the text format according to a defined writing text format specification when the format determining module determines that the signal format is Motorola format.

16. The DBC signal start bit format conversion system of claim 10, further comprising a hint module for determining that the byte format of the data information in the Excel file is abnormal and reporting an error when the format determination module determines that the byte order is neither Intel format nor Motorola format.

17. A vehicle comprising the DBC signal start bit format conversion system of any one of claims 10-16.

18. An electronic device, comprising:

A processor;

a memory communicatively coupled to the processor;

The memory stores instructions executable by the processor to enable the processor to perform the method of any one of claims 1 to 9.

19. A computer readable storage medium storing computer instructions which, when executed by a processor, implement the method of any one of claims 1 to 9.