CN114691605A

CN114691605A - DBC signal start bit format conversion method and system

Info

Publication number: CN114691605A
Application number: CN202210179121.1A
Authority: CN
Inventors: 殷婷婷
Original assignee: Zhiji Automobile Technology Co Ltd
Current assignee: Zhiji Automobile Technology Co Ltd
Priority date: 2022-02-25
Filing date: 2022-02-25
Publication date: 2022-07-01
Anticipated expiration: 2042-02-25
Also published as: CN114691605B

Abstract

The invention discloses a DBC signal start bit format conversion method and a DBC signal start bit format conversion system. The method includes defining a written text format specification; extracting data information in the Excel file to obtain a start bit, a byte length and a byte sequence; judging a signal format corresponding to the byte sequence; when the byte sequence is in an Intel format, filling the LSB of the lowest signal bit into the text format according to the specification of the writing text format defined; when the byte sequence is Motorola format, further judging whether the LSB and MSB of the signal are in the same byte, calculating the MSB of the highest signal, writing the MSB of the highest signal into text format according to definition, and filling the MSB of the highest signal into the text format. The invention can effectively solve the problem that the text format definition start bit is different from the file start bit when the conventional DBC conversion tool converts Motorola format signals, and generates a correct DBC file.

Description

DBC signal start bit format conversion method and system

Technical Field

The invention belongs to the technical field of automobile database development, and particularly relates to a DBC signal start bit format conversion method and system.

Background

DBC files are files that describe data communications between nodes of a CAN network, DBC files are files in ASCII format, which DBC extensions CAN be used to define the CAN network. In the automobile network development process, the DBC database cannot be opened, along with the development of automobile technology, the number of ECU nodes and messages on an automobile is more and more, manual editing of the DBC file consumes a large amount of time of engineers, and mistakes are easy to make. In order to solve the problem, a plurality of tools for converting the DBC exist at present, some tools adopt Excel VBA, and some tools adopt Python. However, these conversion tools all face the problem that the starting bits of the Motorola-format signals are different in the file format and in CANDB + +, and many tools directly fill the starting bits of the design and then perform adjustment in CANDB + +, so as to finally complete the work of compiling the DBC. Because manual operation is required after the file is generated, bus parsing errors or software writing errors are easily caused.

Disclosure of Invention

Aiming at the defects or the improvement requirements of the prior art, the invention provides a DBC signal start bit format conversion method and a DBC signal start bit format conversion system, which can effectively solve the problem that the text format definition start bit is different from the file start bit when the conventional DBC conversion tool converts Motorola format signals, and generate correct DBC files.

To achieve the above object, according to an aspect of the present invention, there is provided a DBC signal start bit format conversion method including: defining a written text format specification; extracting data information in the Excel file to obtain a start bit, a byte length and a byte sequence; judging a signal format corresponding to the byte sequence; when the byte sequence is in an Intel format, filling the LSB of the lowest signal bit into the text format according to the specification of the writing text format defined; when the byte sequence is Motorola format, further judging whether the LSB and MSB of the signal are in the same byte, calculating the MSB of the highest signal, writing the MSB of the highest signal into text format according to definition, and filling the MSB of the highest signal into the text format.

In some embodiments, the determining whether the least significant bit LSB and the most significant bit MSB of the signal are in the same byte is further specified as: and judging whether the maximum bit of the byte where the LSB of the lowest signal bit is positioned is added with 1 and subtracted by the LSB of the lowest signal bit to be less than 8, if so, determining that the LSB of the lowest signal bit and the MSB of the highest signal bit of the signal are in the same byte, otherwise, determining that the LSB of the lowest signal bit and the MSB of the highest signal bit of the signal are not in the same byte.

In some embodiments, when the least significant bit LSB and the most significant bit MSB of a signal are in the same byte, the most significant bit MSB is calculated using a first strategy; and when the LSB and the MSB of the signal are not in the same byte, calculating to obtain the MSB of the highest signal bit by adopting a second strategy.

In some embodiments, the highest signal bit MSB = LSB + Bitlen-1 is calculated using a first strategy, where Bitlen is the byte length.

In some embodiments, the calculation of the highest signal bit MSB using the second strategy is specifically: calculating the occupied bit number N (LSB) of the byte where the LSB of the lowest signal bit is located and the residual byte number R = BitLen-N (LSB) which needs to be occupied by the byte where the LSB of the lowest signal bit is located, wherein Bitlen is the length of the byte; defining the bit number N (MSB) = R required to be occupied by the byte where the MSB is located and the byte where the MSB is located; calculating the minimum Bit MSB (Min) of the byte where the highest signal Bit MSB is; the highest signal bit MSB = MSB (min) + n (MSB) -1 is calculated.

In some embodiments, the written text format specification is defined as: start bit | byte length @ byte order.

In some embodiments, the start bit is the lowest signal bit LSB or the highest signal bit MSB, and the byte order corresponds to the Intel format or Motorola format.

In some embodiments, one of 0 and 1 is used to represent the Intel format and the other is used to represent the Motorola format.

In some embodiments, it is first determined whether the byte order is in an Intel format, and when it is determined that the byte order is not in the Intel format, it is further determined whether the byte order is in a Motorola format.

In some embodiments, when the byte order is determined not to be in the Motorola format, the byte format of the data information in the Excel file is determined to be abnormal, and an error is reported.

According to another aspect of the present invention, there is provided a DBC signal start bit format conversion system including: the text format specification defining module is used for defining the writing specification of the text format; the file information extraction module is used for extracting data information in the Excel file and obtaining a start bit, a byte length and a byte sequence; the format judging module is used for judging the signal format corresponding to the byte sequence; and the writing module is used for writing corresponding contents in the text format according to the writing specifications of the signal format and the text format.

In some embodiments, the writing module is configured to fill the LSB in the text format according to the written text format specification when the format determining module determines that the signal format is the Intel format.

In some embodiments, the format determining module is configured to further determine whether the LSB and the MSB of the signal are in the same byte when the signal format is determined to be Motorola format.

In some embodiments, determining whether the LSB and MSB of the signal are in the same byte is specified by: and judging whether the maximum bit of the byte where the LSB is positioned is added with 1 and subtracted by the LSB to be less than 8, if so, determining that the LSB and the MSB of the signal are in the same byte, otherwise, determining that the LSB and the MSB of the signal are not in the same byte.

In some embodiments, the system further comprises a calculation module for calculating the MSB using different strategies depending on whether the LSB and the MSB of the signal are in the same byte.

In some embodiments, the calculation module is configured to calculate MSB = LSB + Bitlen-1 when the format determination module asserts the LSB and the MSB of the signal to be in the same byte, where Bitlen is the length of the byte.

In some embodiments, the calculation module is configured to calculate the MSB by, when the format determination module asserts that the LSB and the MSB of the signal are not in the same byte: calculating the occupied bit number N (LSB) of the byte where the LSB of the lowest signal bit is located and the residual byte number R = BitLen-N (LSB) which needs to be occupied by the byte where the LSB of the lowest signal bit is located, wherein Bitlen is the length of the byte; defining the bit number N (MSB) = R required to be occupied by the byte where the MSB is located and the byte where the MSB is located; calculating the minimum Bit MSB (Min) of the byte where the maximum signal Bit MSB is; the highest signal bit MSB = MSB (min) + n (MSB) -1 is calculated.

In some embodiments, the writing module is configured to write the MSB calculated by the calculating module into the text format according to a defined written text format specification when the format judging module judges that the signal format is the Motorola format.

In some embodiments, the system further includes a prompt module, configured to determine that the byte format of the data information in the Excel file is abnormal and report an error when the format determination module determines that the byte order is neither in the Intel format nor in the Motorola format.

According to still another aspect of the present invention, there is provided a vehicle including the above DBC signal start bit format conversion system.

According to still another aspect of the present invention, there is provided an electronic apparatus including: a processor; a memory communicatively coupled to the processor; the memory stores instructions executable by the processor to enable the processor to perform the above-described method.

According to yet another aspect of the present invention, there is provided a computer readable storage medium storing computer instructions which, when executed by a processor, implement the above-described method.

Generally, compared with the prior art, the above technical solution conceived by the present invention has the following beneficial effects: and accurately calculating and converting the start bit of the signal defined in the Motorola format in the CANDB + + into the start bit required in the text format, so that the start bit is required by design after the DBC file generated by conversion calculation is opened through the CANDB + +.

Drawings

FIG. 1 is a schematic diagram of an Intel formatted signal when it is open in CANDB + +;

FIG. 2 is a schematic illustration of a Motorola-format signal when it is open in CANDB + +;

FIG. 3 is a flow chart of a DBC file conversion method according to an embodiment of the invention;

fig. 4 is a block diagram of an electronic device according to an embodiment of the present invention.

Detailed Description

In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention. As those skilled in the art will recognize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present application. Accordingly, the drawings and description are to be regarded as illustrative in nature, and not as restrictive.

In both the Motorola format and the Motorola format, the start Bit of the DBC file opened in CANDB + + is the Least Significant Bit (LSB), and as shown in fig. 1 and 2, both the Intel format and the Motorola format are signals with a start Bit of 30 and a signal length of 24 bits. In the text format, the start bit defined by the Intel format is the Least Significant Bit (LSB), and the start bit defined by the Motorola format is the Most Significant Bit (MSB), so that the start bit defined by the Motorola format in CANDB + + cannot be directly written into the text format, but the LSB needs to be converted into the MSB and then written into the text format to generate the DBC file, and thus the start bit is required for design after the DBC file generated by conversion calculation is opened by CANDB + +.

As shown in fig. 3, the method for converting the format of the start bit of the DBC signal according to the embodiment of the present invention includes the following steps:

a written text format specification is defined. In some embodiments, the text format specification is: start bit | byte length @ byte order. Wherein, the start bit is the least significant bit LSB or the most significant bit MSB. The byte length is indicated by BitLen. The Byte sequence is expressed by Byte Order, and the Byte sequence has two types which respectively correspond to Intel format and Motorola format. In some embodiments, the Intel format and the Motorola format are represented by 0 and 1. In some embodiments, the Intel format is represented by 0 and the Motorola format is represented by 1. In some embodiments, the Motorola format is represented by 0 and the Intel format is represented by 1.

And extracting data information in the Excel file to obtain a start bit, a byte length and a byte sequence.

And judging whether the byte sequence is in an Intel format, if so, filling the LSB into the text format according to the definition write text format specification. In some embodiments, the LSB | BitLen @ Byte Order is written in a text format, e.g., LSB | BitLen @ 1; otherwise, further judging whether the byte sequence is in Motorola format.

When the byte sequence is judged not to be in a Motorola format, judging that the byte format of the data information in the Excel file is abnormal, and reporting an error; in determining that the byte order is Motorola format, it is further determined whether the LSB and MSB of the signal are in the same byte.

In some embodiments, determining whether the LSB and the MSB of the signal are in the same byte is specifically: and judging whether the maximum bit of the byte where the LSB is positioned is added with 1 and subtracted by the LSB to be less than 8, if so, determining that the LSB and the MSB of the signal are in the same byte, otherwise, determining that the LSB and the MSB of the signal are not in the same byte.

The MSB is calculated by different strategies according to whether the LSB and the MSB of the signal are in the same byte or not.

In some embodiments, when the LSB and MSB of the signal are asserted in the same byte, the calculation results in MSB = LSB + Bitlen-1.

In some embodiments, when the LSB and the MSB of the asserted signal are not in the same byte, the MSB is calculated as follows.

Specifically, the number of occupied bits n (LSB) of the byte where the LSB is located and the remaining number of bytes R = BitLen-n (LSB) that the byte where the LSB is located need to occupy are calculated, where n (LSB) = ((Int (LSB/8) + 1) × 8-LSB) -8 × Int ((BitLen- ((Int (LSB/8) + 1) × 8-LSB) -1)/8), and Int () represents an integer for the number in ().

According to the remaining byte number R required to be occupied by the byte where the LSB is located, the byte where the MSB is located and the bit number N (MSB) = R required to be occupied by the byte where the MSB is located are determined.

The minimum Bit MSB (min) = (Int (LSB/8) - (Int ((BitLen- ((Int (LSB/8) + 1) × 8-LSB) -1)/8) + 1)) of the byte where the MSB is located is calculated as MSB (min) = (Int (LSB/8) - (Int) ((LSB) ((Int (LSB/8) + 1))) 8).

MSB = MSB (min) + n (MSB) -1 was calculated.

And according to the definition writing text format specification, filling the MSB into the text format to generate the DBC file. In some embodiments, the MSB | BitLen @ Byte Order, e.g., MSB | BitLen @0, is written in a text format.

By the method, the start bit of the Motorola format signal is converted to generate a correct DBC file, and the start bit is required by design after the file is opened by CANDB + +.

Correspondingly, an embodiment of the present invention further provides a system for converting a start bit format of a DBC signal, including:

and the text format specification defining module is used for defining the writing specification of the text format. In some embodiments, the text format specification is: start bit | byte length @ byte order.

And the file information extraction module is used for extracting data information in the Excel file and obtaining a start bit, a byte length and a byte sequence.

And the format judging module is used for judging the signal format corresponding to the byte sequence.

And the writing module is used for writing corresponding contents in the text format according to the writing specifications of the signal format and the text format. In some embodiments, when the format determining module determines that the signal format is an Intel format, the writing module fills the LSB in the text format according to a defined written text format specification, for example, the writing module writes the LSB | BitLen @ Byte Order in the text format.

In some embodiments, when the format determination module determines that the signal format is a Motorola format, it further determines whether the LSB and the MSB of the signal are in the same byte. In some embodiments, determining whether the LSB and MSB of the signal are in the same byte is specified by: and judging whether the maximum bit of the byte where the LSB is positioned is added with 1 and subtracted by the LSB to be less than 8, if so, determining that the LSB and the MSB of the signal are in the same byte, otherwise, determining that the LSB and the MSB of the signal are not in the same byte.

And the calculating module is used for calculating the MSB by adopting different strategies according to whether the LSB and the MSB of the signal are in the same byte or not. In some embodiments, the calculation module calculates MSB = LSB + Bitlen-1 when the format determination module asserts the LSB and MSB of the signal in the same byte.

In some embodiments, when the format determining module asserts that the LSB and the MSB of the signal are not in the same byte, the calculating module calculates the MSB as follows.

The minimum Bit MSB (min) = (Int (LSB/8) - (Int ((BitLen- ((Int (LSB/8) + 1) × 8-LSB) -1)/8) + 1)) of the byte in which the MSB is located is calculated as MSB 8 (min) = 8).

MSB = MSB (min) + n (MSB) -1 was calculated.

In some embodiments, when the format determining module determines that the signal format is a Motorola format, the writing module writes the MSB calculated by the calculating module into a text format according to a defined written text format specification to generate a DBC file. For example, the write module writes the MSB | BitLen @ Byte Order in a text format.

And the prompting module is used for judging that the byte format of the data information in the Excel file is abnormal and reporting an error when the format judging module judges that the byte sequence is not in an Intel format or a Motorola format.

Embodiments of the present application further provide a vehicle, and in some implementations, the vehicle may include the above-described DBC signal start bit format conversion system.

Fig. 4 is a block diagram of an electronic device according to an embodiment of the present application. An embodiment of the present application further provides an electronic device, as shown in fig. 4, the electronic device includes: at least one processor 401, and a memory 403 communicatively coupled to the at least one processor 401. The memory 403 has stored therein instructions executable by the at least one processor 401. The instructions are executed by at least one processor 401. The processor 401, when executing the instructions, implements the driving scenario reconstruction method in the above-described embodiments. The number of the memory 403 and the processor 401 may be one or more. The electronic device is intended to represent various forms of digital computers, such as laptops, desktops, workstations, personal digital assistants, servers, blade servers, mainframes, and other appropriate computers. The electronic device may also represent various forms of mobile devices, such as personal digital processing, cellular phones, smart phones, wearable devices, and other similar computing devices. The components shown herein, their connections and relationships, and their functions, are meant to be examples only, and are not meant to limit implementations of the present application that are described and/or claimed herein.

The electronic device may further include a communication interface 405 for communicating with an external device for data interactive transmission. The various devices are interconnected using different buses and may be mounted on a common motherboard or in other manners as desired. The processor 401 may process instructions for execution within an electronic device, including instructions stored in or on a memory to display Graphical information for a Graphical User Interface (GUI) on an external input/output device, such as a display device coupled to an Interface. In other embodiments, multiple processors and/or multiple buses may be used, along with multiple memories and multiple memories, as desired. Also, multiple electronic devices may be connected, with each device providing portions of the necessary operations (e.g., as a server array, a group of blade servers, or a multi-processor system). The bus may be divided into an address bus, a data bus, a control bus, etc. For ease of illustration, only one thick line is shown in FIG. 4, but that does not indicate only one bus or one type of bus.

Optionally, in a specific implementation, if the memory 403, the processor 401, and the communication interface 405 are integrated on a chip, the memory 403, the processor 401, and the communication interface 405 may complete communication with each other through an internal interface.

It should be understood that the processor may be a Central Processing Unit (CPU), other general purpose processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA) or other Programmable logic device, discrete Gate or transistor logic, discrete hardware components, etc. A general purpose processor may be a microprocessor or any conventional processor or the like. It is noted that the processor may be a processor supporting an Advanced reduced instruction set machine (ARM) architecture.

Embodiments of the present application provide a computer-readable storage medium (such as the above-mentioned memory 403), which stores computer instructions, and when executed by a processor, the program implements the method provided in the embodiments of the present application.

Alternatively, the memory 403 may include a program storage area and a data storage area, wherein the program storage area may store an operating system, an application program required for at least one function; the storage data area may store data created according to use of the electronic device of the driving scene reconstruction method, and the like. Further, the memory 403 may include high speed random access memory, and may also include non-transitory memory, such as at least one magnetic disk storage device, flash memory device, or other non-transitory solid state storage device. In some embodiments, the memory 403 may optionally include a memory remotely located from the processor 401, and these remote memories may be connected to the electronic device of the driving scenario reconstruction method through a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.

In the description herein, references to the description of the term "one embodiment," "some embodiments," "an example," "a specific example," or "some examples," etc., mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the application. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, various embodiments or examples and features of different embodiments or examples described in this specification can be combined and combined by one skilled in the art without contradiction.

Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In the description of the present application, "a plurality" means two or more unless specifically limited otherwise.

Any process or method descriptions in flow charts or otherwise described herein may be understood as representing modules, segments, or portions of code which include one or more (two or more) executable instructions for implementing specific logical functions or steps in the process. And the scope of the preferred embodiments of the present application includes other implementations in which functions may be performed out of the order shown or discussed, including substantially concurrently or in reverse order, depending on the functionality involved.

The logic and/or steps represented in the flowcharts or otherwise described herein, e.g., an ordered listing of executable instructions that can be considered to implement logical functions, can be embodied in any computer-readable medium for use by or in connection with an instruction execution system, apparatus, or device, such as a computer-based system, processor-containing system, or other system that can fetch the instructions from the instruction execution system, apparatus, or device and execute the instructions.

It should be understood that portions of the present application may be implemented in hardware, software, firmware, or a combination thereof. In the above embodiments, various steps or methods may be implemented in software or firmware stored in a memory and executed by a suitable instruction execution system. All or part of the steps of the method of the above embodiments may be implemented by hardware that is configured to be instructed to perform the relevant steps by a program, which may be stored in a computer-readable storage medium, and which, when executed, includes one or a combination of the steps of the method embodiments.

In addition, functional units in the embodiments of the present application may be integrated into one processing module, or each unit may exist alone physically, or two or more units are integrated into one module. The integrated module can be realized in a hardware mode, and can also be realized in a software functional module mode. The integrated module may also be stored in a computer-readable storage medium if it is implemented in the form of a software functional module and sold or used as a separate product. The storage medium may be a read-only memory, a magnetic or optical disk, or the like.

The above description is only for the specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily conceive various changes or substitutions within the technical scope of the present application, and these should be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims

1. A method for converting a format of a start bit of a DBC signal, comprising:

defining a written text format specification;

extracting data information in the Excel file to obtain a start bit, a byte length and a byte sequence;

judging a signal format corresponding to the byte sequence;

when the byte sequence is in an Intel format, filling the LSB of the lowest signal bit into the text format according to the specification of the writing text format defined;

when the byte sequence is Motorola format, further judging whether the LSB and MSB of the signal are in the same byte, calculating the MSB of the highest signal, writing the MSB of the highest signal into text format according to definition, and filling the MSB of the highest signal into the text format.

2. The method of converting a format of a start bit of a DBC signal of claim 1, further determining whether a least significant bit LSB and a most significant bit MSB of the signal are in a same byte by:

and judging whether the maximum bit of the byte where the LSB of the lowest signal bit is positioned adds 1 to subtract the LSB of the lowest signal bit to be less than 8, if so, determining that the LSB of the lowest signal bit and the MSB of the highest signal bit of the signal are in the same byte, otherwise, determining that the LSB of the lowest signal bit and the MSB of the highest signal bit of the signal are not in the same byte.

3. The method of converting a format of a start bit of a DBC signal of claim 1 wherein a first strategy is used to calculate a highest signal bit MSB when a lowest signal bit LSB and a highest signal bit MSB of a signal are in a same byte; and when the LSB and the MSB of the signal are not in the same byte, calculating to obtain the MSB of the highest signal bit by adopting a second strategy.

4. The method of converting a format of a start bit of a DBC signal of claim 3, wherein the highest signal bit MSB = LSB + Bitlen-1 is calculated using a first strategy, wherein Bitlen is a byte length.

5. The method as claimed in claim 3, wherein the calculation of the MSB of the highest signal bit by the second strategy is specifically:

calculating the occupied bit number N (LSB) of the byte where the LSB of the lowest signal bit is located and the residual byte number R = BitLen-N (LSB) which needs to be occupied by the byte where the LSB of the lowest signal bit is located, wherein Bitlen is the length of the byte;

defining the bit number N (MSB) = R required to be occupied by the byte where the MSB is located and the byte where the MSB is located;

calculating the minimum Bit MSB (Min) of the byte where the highest signal Bit MSB is;

the highest signal bit MSB = MSB (min) + n (MSB) -1 is calculated.

6. The method of converting a format of a start bit of a DBC signal as claimed in claim 1, wherein the written text format specification is defined as: start bit | byte length @ byte order.

7. The method of converting a format of a start bit of a DBC signal of claim 6 wherein the start bit is a least significant bit LSB or a most significant bit MSB, and the byte order corresponds to an Intel format or a Motorola format.

8. The method of converting a format of a start bit of a DBC signal of claim 7 wherein one of 0 and 1 represents an Intel format and the other represents a Motorola format.

9. The method of converting a format of a start bit of a DBC signal according to any one of claims 1 to 8, wherein it is determined whether a byte order is an Intel format or not first, and when it is determined that the byte order is not the Intel format, it is further determined whether the byte order is a Motorola format or not.

10. The DBC signal start bit format converting method of claim 9, wherein when it is determined that the byte order is not Motorola format, it is determined that the byte format of the data information in the Excel file is abnormal, and an error is reported.

11. A DBC signal start bit format conversion system, comprising:

the text format specification defining module is used for defining the writing specification of the text format;

the file information extraction module is used for extracting data information in the Excel file and obtaining a start bit, a byte length and a byte sequence;

the format judging module is used for judging the signal format corresponding to the byte sequence;

and the writing module is used for writing corresponding content in the text format according to the writing specifications of the signal format and the text format.

12. The DBC signal start bit format conversion system of claim 11, wherein the writing module is configured to fill the LSB in the text format according to a definition-written text format specification when the format determination module determines that the signal format is the Intel format.

13. The DBC signal start bit format conversion system of claim 11, wherein the format decision module is further for deciding whether the LSB and the MSB of the signal are in the same byte when the format of the signal is decided to be Motorola format.

14. The DBC signal start bit format conversion system of claim 13 wherein the determining whether the LSB and MSB of the signal are in the same byte is specifically: and judging whether the maximum bit of the byte where the LSB is positioned is added with 1 and subtracted by the LSB to be less than 8, if so, determining that the LSB and the MSB of the signal are in the same byte, otherwise, determining that the LSB and the MSB of the signal are not in the same byte.

15. The DBC signal start bit format conversion system of claim 13 further comprising a calculation module for calculating the MSB using different strategies based on whether the LSB and the MSB of the signal are in the same byte.

16. The DBC signal start bit format conversion system of claim 15, wherein the calculating module is configured to calculate MSB = LSB + Bitlen-1 when the format determining module recognizes LSB and MSB of the signal as being in a same byte, wherein Bitlen is a byte length.

17. The DBC signal start bit format conversion system of claim 15 wherein the calculating module is configured to calculate the MSB by, when the format determining module asserts that the LSB and the MSB of the signal are not in the same byte:

the highest signal bit MSB = MSB (min) + n (MSB) -1 is calculated.

18. The DBC signal start bit format conversion system of any one of claims 15 to 17, wherein the writing module is configured to write the MSB calculated by the calculating module into the text format according to a definition-written text format specification when the format judging module judges that the signal format is a Motorola format.

19. The DBC signal start bit format conversion system of claim 11, further comprising a hinting module for determining a byte format abnormality of the data information in the Excel file and reporting an error when the format determination module determines that the byte order is neither the Intel format nor the Motorola format.

20. A vehicle characterized by comprising the DBC signal start bit format conversion system according to any one of claims 11 to 19.

21. An electronic device, comprising:

a processor;

a memory communicatively coupled to the processor;

the memory stores instructions executable by the processor to enable the processor to perform the method of any one of claims 1 to 10.

22. A computer readable storage medium storing computer instructions which, when executed by a processor, implement the method of any one of claims 1 to 10.