CN114675606A - Interlock condition detection method and semiconductor process equipment - Google Patents
Interlock condition detection method and semiconductor process equipment Download PDFInfo
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- CN114675606A CN114675606A CN202210257421.7A CN202210257421A CN114675606A CN 114675606 A CN114675606 A CN 114675606A CN 202210257421 A CN202210257421 A CN 202210257421A CN 114675606 A CN114675606 A CN 114675606A
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- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/418—Total factory control, i.e. centrally controlling a plurality of machines, e.g. direct or distributed numerical control [DNC], flexible manufacturing systems [FMS], integrated manufacturing systems [IMS] or computer integrated manufacturing [CIM]
- G05B19/41865—Total factory control, i.e. centrally controlling a plurality of machines, e.g. direct or distributed numerical control [DNC], flexible manufacturing systems [FMS], integrated manufacturing systems [IMS] or computer integrated manufacturing [CIM] characterised by job scheduling, process planning, material flow
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- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
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Abstract
The embodiment of the invention provides an interlocking condition detection method and semiconductor process equipment, which are applied to the technical field of semiconductor equipment, and the method comprises the following steps: in the process of detecting the interlocking condition, responding to a starting signal of an action device of the semiconductor process equipment, acquiring a plurality of interlocking lists of the action device, wherein each interlocking list comprises a class of interlocking condition and a target condition value of the interlocking condition, and storing error information of the interlocking condition according to the class to which the interlocking condition belongs under the condition that the target condition value of the interlocking condition is not matched with the acquired actual condition value. A plurality of interlocking conditions of the action device are divided into a plurality of categories, and when error information of the interlocking conditions is stored according to the categories of the interlocking conditions, the fault troubleshooting range can be narrowed, fault points can be determined quickly, and the fault troubleshooting efficiency can be improved.
Description
Technical Field
The invention relates to the technical field of semiconductor equipment, in particular to an interlocking condition detection method and semiconductor process equipment.
Background
In the control of semiconductor processing equipment, a plurality of interlock conditions are generally set for an action device. Before controlling the action of an action device, a lower computer in the semiconductor process equipment firstly detects whether various interlocking conditions are met, if the interlocking conditions which are not met exist, the interlocking is triggered, and the action of the action device is forbidden, so that the safety and the reliability of the semiconductor process equipment in the operation process are improved.
When the lower computer detects that a certain interlocking condition is not satisfied, the lower computer can trigger interlocking and prohibit the action of the action device, and can record error information that the interlocking condition is not satisfied. In the subsequent troubleshooting stage, the user can search the fault point according to the record. Because the related process of semiconductor process equipment is more complicated, more kinds and quantity of interlocking conditions exist, and the fault point cannot be quickly determined when the fault point is searched according to records in the prior art.
Disclosure of Invention
The technical problem to be solved by the embodiment of the invention is that the semiconductor process equipment cannot rapidly determine the fault point in the troubleshooting stage.
In order to solve the above problem, a first aspect of an embodiment of the present invention discloses an interlock condition detection method applied to semiconductor processing equipment, including:
responding to a starting signal of an action device of the semiconductor process equipment, and acquiring a plurality of interlocking lists of the action device; each interlock list comprises a class of interlock conditions and target condition values of the interlock conditions respectively;
and under the condition that the target condition value of the interlocking condition is not matched with the obtained actual condition value, storing error information of the interlocking condition according to the category to which the interlocking condition belongs.
Optionally, when the target condition value of the interlock condition does not match the obtained actual condition value, storing error information of the interlock condition according to a category to which the interlock condition belongs includes:
simultaneously acquiring actual condition values of interlocking conditions included in each interlocking list;
under the condition that the target condition value of the target interlocking condition is not matched with the actual condition value, generating error information of the target interlocking condition;
storing error information of the target interlocking condition in a target storage area of a plurality of preset storage areas; the target storage area corresponds to a category of the target interlock condition.
Optionally, when the target condition value of the interlock condition does not match the obtained actual condition value, storing error information of the interlock condition according to a category to which the interlock condition belongs includes:
sequentially acquiring actual condition values of the interlocking conditions included in each interlocking list;
generating error information of a target interlock condition under the condition that a target condition value of the target interlock condition does not match an actual condition value;
storing error information of the target interlocking condition in a target storage area of a plurality of preset storage areas; the target storage area corresponds to a category of the target interlock condition.
Optionally, the method further comprises:
and setting an error identifier at a flag bit of the target storage area to identify that the interlocking condition in the category to which the target interlocking condition belongs is not met.
Optionally, the storage area includes a storage location of each interlock condition of the corresponding category; the storing of the error information of the target interlock condition in a target storage area among a plurality of storage areas set in advance includes:
and determining a target storage position of the target interlocking condition in the target storage area, and storing error information of the target interlocking condition in the target storage position.
Optionally, the plurality of interlocking lists includes a first interlocking list, a second interlocking list, and a third interlocking list; wherein the interlock condition in the first interlock list is a device identifier of at least one other action device associated with the action device in the semiconductor process equipment, and the target condition value in the first interlock list is a target switch state of the other action device; the interlocking condition in the second interlocking list is a parameter identification of at least one process parameter of the semiconductor process equipment, which is associated with the action device, and the target condition value in the second interlocking list is a target parameter state of the process parameter; the interlock condition in the third interlock list is a state identification of at least one system state in the semiconductor process equipment associated with the action device, and the target condition value in the third interlock list is a target system state of the system state.
Optionally, the action devices comprise valves, chamber doors and pumps in the semiconductor processing equipment.
A second aspect of the embodiments of the present invention discloses a semiconductor process apparatus, which includes an action device and a lower computer, where the lower computer is configured to respond to a start signal of the action device and obtain a plurality of interlocking lists of the action device; each interlock list comprises a class of interlock conditions and target condition values of the interlock conditions respectively; and the lower computer is also used for storing the error information of the interlocking condition according to the category of the interlocking condition under the condition that the target condition value of the interlocking condition is not matched with the obtained actual condition value.
Optionally, the semiconductor process equipment further comprises an upper computer connected with the lower computer; the lower computer is also used for sending the error information to the upper computer so that the upper computer displays the error information.
Optionally, the action devices comprise valves, chamber doors and pumps in the semiconductor processing equipment.
Compared with the prior art, in the embodiment of the invention, in the detection process of the interlocking condition, in response to the starting signal of the action device of the semiconductor process equipment, a plurality of interlocking lists of the action device are obtained, each interlocking list respectively comprises a class of interlocking condition and a target condition value of the interlocking condition, and under the condition that the target condition value of the interlocking condition is not matched with the obtained actual condition value, the error information of the interlocking condition is stored according to the class to which the interlocking condition belongs. The interlocking conditions of the action device are divided into a plurality of categories, and when the error information of the interlocking conditions is stored according to the categories of the interlocking conditions, the troubleshooting range can be narrowed, the fault point can be quickly determined, and the troubleshooting efficiency can be improved.
Drawings
FIG. 1 is a flow chart illustrating steps of an embodiment of an interlock condition detection method provided by the present embodiment;
FIG. 2 is a schematic diagram illustrating an interlock condition detection method according to the present embodiment;
FIG. 3 is a schematic diagram of a data storage provided by the present embodiment;
fig. 4 shows a schematic structural diagram of the furnace tube apparatus provided in this embodiment;
fig. 5 is a schematic structural diagram of a semiconductor processing apparatus provided in this embodiment.
Detailed Description
In order to make the aforementioned objects, features and advantages of the embodiments of the present invention more comprehensible, embodiments of the present invention are described in detail below with reference to the accompanying drawings and the detailed description.
Referring to fig. 1, a flowchart illustrating steps of an embodiment of an interlock condition detection method provided in this embodiment is applied to a semiconductor processing apparatus, and may include:
step 101, responding to a starting signal of an action device of semiconductor process equipment, and acquiring a plurality of interlocking lists of the action device.
Each interlock list respectively comprises an interlock condition of one category and a target condition value of the interlock condition.
In this embodiment, the interlock condition detection method may be implemented by a lower computer in the semiconductor process equipment, for example, a Programmable Logic Controller (PLC). The semiconductor processing equipment comprises a process chamber, and the process chamber is used for carrying out process treatment on a wafer placed in the process chamber, such as a deposition process, an etching process, an epitaxial growth process and an annealing process. Semiconductor processing equipment also includes different types of devices such as temperature sensors, pressure sensors, gas flow sensors, as well as valves, chamber doors, evacuation pumps, and gas composition analyzers. The action device is a device which can act under the control of the lower computer, such as a valve, a chamber door, a vacuum pump and the like. When the action device acts, the type of process gas introduced into the process chamber and various process parameters in the process chamber are changed, dangerous gas may be generated due to the mixing of different process gases, the safety of equipment is threatened, and wafers in the process chamber may be damaged due to the change of the process parameters, so that a plurality of interlocking conditions must be set for the action device, and the action device acts in a safe state. The start signal may be a start signal automatically generated by the lower computer when a preset condition is reached when the semiconductor process equipment is controlled to operate according to a predetermined process flow, or may be a start signal input from an external device. The method of acquiring the start signal may include, but is not limited to, the above examples.
Wherein, for an action device in a semiconductor process equipment, a user can set a plurality of interlock conditions for the action device in advance and determine a target condition value for each interlock condition. Furthermore, a plurality of interlocking conditions can be divided into a plurality of categories according to a certain rule, the interlocking conditions of each category and the corresponding target condition values are stored in an interlocking list, and the interlocking list can be stored in a preset position in a lower computer.
Optionally, the plurality of interlocking lists includes a first interlocking list, a second interlocking list, and a third interlocking list; the interlocking condition in the first interlocking list is a device identifier of at least one other action device associated with the action device in the semiconductor process equipment, and the target condition value in the first interlocking list is a target switch state of the other action device; the interlocking condition in the second interlocking list is a parameter identification of at least one process parameter of the semiconductor process equipment, which is associated with the action device, and the target condition value in the second interlocking list is a target parameter state of the process parameter; the interlock condition in the third interlock list is a status indicator of at least one system status in the semiconductor processing equipment associated with the action device, and the target condition value in the third interlock list is a target system status of the system status.
In one embodiment, the actuating devices may include valves, chamber doors, pumps, etc. in semiconductor processing equipment. Such as an inlet valve for introducing a specific process gas into the process chamber, the pump may be a vacuum pump, an exhaust pump, etc. disposed in the semiconductor processing apparatus, and the actuating device may include, but is not limited to, the above examples. Taking a valve in a semiconductor processing equipment as an example, the valve in the semiconductor processing equipment usually has a plurality of interlock conditions, and before the valve is opened, it is necessary to determine whether the actual condition value of each interlock condition matches the target condition value. The interlocking conditions of the valve mainly comprise three categories, wherein the first category is the interlocking conditions between the valve and the valve, the second category is the interlocking conditions between the valve and the process parameters, and the third category is the interlocking conditions between the valve and the system state. A first interlock list may be set for the first category of interlock conditions, the first interlock list storing therein device identifications of one or more other action devices associated with the action device, and target switch states of the other action devices corresponding to the device identifications, the device identifications being interlock conditions, and the target switch states being target condition values. And setting a second interlocking list aiming at the interlocking conditions of the second category, wherein the second interlocking list stores parameter identifications of one or more process parameters of the semiconductor process equipment associated with the valve and target parameter states of the process parameters corresponding to the parameter identifications, the parameter identifications are used as the interlocking conditions, and the target parameter states are used as target condition values. A third interlock list may be set for a third category of interlock conditions, where the third interlock list stores therein state identifiers of one or more system states associated with the valve and a target system state corresponding to the state identifiers, the state identifiers being interlock conditions, and the target system state being a target condition value.
The semiconductor processing equipment comprises a plurality of air inlet valves, and different air inlet valves are used for controlling the introduction of different types of process gases into a process chamber at different stages in the process treatment process. Multiple process gases may need to be introduced into the process chamber at the same stage, and the process gases at different stages cannot be mixed, so that before a certain inlet valve is opened, part of the inlet valves associated with the certain inlet valve need to be in a closed state, and part of the inlet valves need to be in an opened state. For example, if the intake valve to be opened is valve a, valve B needs to be in an open state and valve C needs to be in a closed state before valve a opens. For the valve a, an interlock condition 1 corresponding to the valve B and an interlock condition 2 corresponding to the valve C may be set, a target condition value of the interlock condition 1 may be set to 1, 1 represents an open state, is a target open-close state of the valve B, and represents that the valve B needs to be in an open state when the valve a is opened; the target condition value of interlock condition 2 may be set to 0, where 0 represents a closed state, and is a target open-close state of the valve C, which represents that the valve C needs to be in a closed state when the valve a is opened. Interlock condition 1 may be set as the device identification of valve B, and interlock condition 2 may be set as the device identification of valve C. Therefore, for all interlock conditions that the valve a has, the interlock conditions between the valve a and other valves may be divided into interlock conditions of a first category, and a first interlock list including all interlock conditions of the first category and corresponding target condition values is set.
In the process of processing the wafer, a plurality of process parameters are involved, and each process parameter can be processed only when reaching a target range, for example, the chamber pressure in the process chamber, the gas concentration of the target process gas, and the like. The process parameters associated with the valve need to reach the target range before the valve is opened. For example, for the valve a, an interlock condition 3 corresponding to the chamber pressure and an interlock condition 4 corresponding to the gas concentration of the target process gas may be set, a target condition value of the interlock condition 3 may be set to 1,1 indicates that the chamber pressure is within the target pressure range as a target parameter state of the chamber pressure, and a target condition value of the interlock condition 4 may be set to 1,1 indicates that the gas concentration of the target process gas within the process chamber is within the target concentration range as a target parameter state of the gas concentration. Interlock condition 3 may be set as a parameter indication of the chamber pressure and interlock condition 4 may be set as a parameter indication of the gas concentration of the target process gas. Therefore, for all the interlock conditions of the valve a, the interlock conditions between the valve a and the related process parameters may be divided into the second kind of interlock conditions, and a second interlock list is set, where the second interlock list includes all the second kind of interlock conditions and the corresponding target condition values. It should be noted that the process parameters may include, but are not limited to, chamber pressure and gas concentration, and may also include other process parameters of the semiconductor processing tool.
In the operation process of the semiconductor process equipment, a plurality of system states are set, when the system state reaches a target state, the semiconductor process equipment is in a stable state, the process treatment can be carried out on the wafer, and when the semiconductor process equipment is in a non-target state, the semiconductor process equipment is not in the stable state, and the process treatment cannot be carried out on the wafer. The system state may be a system alarm state of the semiconductor process equipment, such as a pipeline pressure state and a working state of the vacuum pump, where if the pipeline pressure value is below a safe pressure value, the pipeline pressure state is in a target state, which indicates that the semiconductor process equipment is in a stable state, and if the working state of the vacuum pump is in a running state, which indicates that the semiconductor process equipment can perform process treatment on the wafer. For the valve a, an interlock condition 5 and an interlock condition 6 may be set, a target condition value of the interlock condition 5 may be set to 1, and 1 represents that a pipeline pressure value is below a safety pressure value, which is a target system state of a pipeline pressure state; the target condition value of the interlock condition 6 may be set to 1, indicating that the evacuation pump is in an operating state, which is a target system state of the evacuation pump. The interlock condition 5 can be set as a status flag of a line pressure status, and the interlock condition 6 can be set as a status flag of a vacuum pump. Therefore, for all interlock conditions that the valve a has, the interlock conditions between the valve a and each associated system state may be divided into a third category of interlock conditions, and a third interlock list is set, where the third interlock list includes all the third category of interlock conditions and corresponding target condition values. It should be noted that the system status may include, but is not limited to, the system alarm status in the above example, and may also include other system statuses of the semiconductor process equipment.
In combination with the above example, the multiple interlock conditions of the valve a may be classified into a first category, a second category, and a third category, where the first category includes interlock condition 1 and interlock condition 2, the second category includes interlock condition 3 and interlock condition 4, and the third category includes interlock condition 5 and interlock condition 6. Aiming at the interlocking conditions of the three categories, a user can set three interlocking lists respectively and prestore the three interlocking lists at three different preset positions in the lower computer.
In this embodiment, after acquiring the activation signal of the action device, the lower computer may acquire the plurality of interlock lists of the action device from the preset position in response to the activation signal. With reference to the above example, after the start signal of the valve a is obtained, the first interlock list, the second interlock list, and the third interlock list of the valve a may be obtained from three different preset positions in response to the start signal.
In practical applications, other types of interlock conditions may also be added according to requirements, for example, a fourth type of interlock condition may be added, and a corresponding fourth interlock list is set, where the fourth type of interlock condition is an interlock condition between a valve and an associated sensor in the semiconductor process equipment. The above is merely an illustrative example, and the class division of the interlock condition may be performed by using other principles. The specific form of the interlock list, and the specific storage manner of the interlock condition and the target condition value may include, but are not limited to, the above examples.
And 102, under the condition that the target condition value of the interlocking condition is not matched with the obtained actual condition value, storing error information of the interlocking condition according to the category of the interlocking condition.
In this embodiment, after acquiring the interlock list of the action device, the lower computer may acquire the interlock condition and the target condition value of the interlock condition from the interlock list. Meanwhile, the lower computer can acquire the actual condition value of the interlocking condition, compare and determine whether the actual condition value is matched with the target condition value, generate error information of the interlocking condition when the actual condition value is not matched with the target condition value, and store the error information according to the type of the interlocking condition.
With reference to the above example, after the three interlock lists of the valve a are obtained, for the interlock condition 1 in the first interlock list, the lower computer may obtain the on-off state of the valve B according to the device identifier of the interlock condition 1 (i.e., the device identifier of the valve B), where the on-off state of the valve B is the actual condition value of the interlock condition 1, and if the valve B is in the open state, determine that the actual condition value of the valve B matches the target condition value; on the contrary, if the valve B is in the closed state, it is determined that the actual condition value of the valve B does not match the target condition value, and first error information corresponding to the interlock condition 1 may be generated, where the first error information may be the actual state of the valve. For the interlock condition 3 in the second interlock list, the lower computer may obtain the chamber pressure of the process chamber according to the parameter identifier of the interlock condition 3 (i.e., the parameter identifier of the chamber pressure), and if the chamber pressure is within the target pressure range, determine that the actual condition value of the interlock condition 3 is 1 and match the target condition value 1; on the contrary, if the chamber pressure is outside the target pressure range, it is determined that the actual condition value of the interlock condition 3 is 0, and the actual condition value is not matched with the target condition value 1, and the second error information corresponding to the interlock condition 3 may be generated, where the second error information may be the actual pressure value of the chamber pressure. Similarly, for the interlock condition 5 in the third interlock list, the lower computer may obtain the pipeline pressure state according to the state identifier of the interlock condition 5 (i.e., the state identifier of the pipeline pressure state), and if the pipeline pressure state is below the safety pressure, determine that the actual condition value of the interlock condition 5 is 1 and is matched with the target condition value 1; on the contrary, if the line pressure state is above the safe pressure, it is determined that the actual condition value of the interlock condition 5 is not matched with the target condition value 1, and third error information corresponding to the interlock condition 5 may be generated, where the third error information may be an actual line pressure value.
Alternatively, the error information may include both the actual condition value and the target condition value of the interlock condition. For example, when generating the error message of the interlock condition 1, the error message may include a target condition value and an actual condition value of the valve B, where the target condition value is in an open state and the actual condition value is in a closed state.
Wherein the first error information, the second error information, and the third error information may be stored in different locations by category. When a certain interlocking condition is not satisfied, that is, the actual condition value of the interlocking condition is not matched with the target condition value, the semiconductor process equipment needs to be maintained, and a fault point in the semiconductor process equipment is searched. At this time, the lower computer may obtain the error information from different positions, determine the category to which the interlock condition belongs according to the error information at different positions, and search for the failure point according to the interlock condition included in the category. For example, after the first error information is obtained, it may be determined that there may be an abnormality with respect to valve a for the other valves associated with valve a, and a check may be performed with respect to the valve associated with valve a. Similarly, after the second error information is obtained, it may be determined that the process parameter associated with the valve a is abnormal with respect to the valve a, and the device associated with the process parameter may be inspected. Since the interlock condition is classified by category, when a failure point is searched, the failure point can be searched by category, so that the failure point can be quickly determined.
Meanwhile, because the types and the number of the devices in the semiconductor process equipment are more, and the devices of the same type are generally arranged at the same position in the semiconductor process equipment, when the fault point is searched according to the type of the interlocking condition, the searching range can be reduced, the searching can be carried out at the same position, and the fault point can be quickly determined.
In summary, in the embodiment of the present invention, in the detection process of the interlock condition, in response to a start signal of an action device of the semiconductor process equipment, multiple interlock lists of the action device are obtained, each interlock list includes an interlock condition of a category and a target condition value of the interlock condition, and when the target condition value of the interlock condition does not match the obtained actual condition value, the error information of the interlock condition is stored according to the category to which the interlock condition belongs. A plurality of interlocking conditions of the action device are divided into a plurality of categories, and when error information of the interlocking conditions is stored according to the categories of the interlocking conditions, the fault troubleshooting range can be narrowed, fault points can be determined quickly, and the fault troubleshooting efficiency can be improved.
Optionally, step 102 may include:
simultaneously acquiring actual condition values of interlocking conditions included in each interlocking list;
Under the condition that the target condition value of the target interlocking condition is not matched with the actual condition value, generating error information of the target interlocking condition;
storing error information of a target interlocking condition in a target storage area of a plurality of preset storage areas; the target storage area corresponds to a category of the target interlock condition.
In one embodiment, a user may set a corresponding storage area for each category of interlock condition, and the storage area is used for storing error information of the interlock condition of the corresponding category. As shown in fig. 2, fig. 2 shows an execution schematic diagram of the interlock condition detection method provided in this embodiment, taking a valve a as an example, a lower computer configures a first storage area, a second storage area, and a third storage area for the valve a in advance, where the first storage area corresponds to a first interlock list, the second storage area corresponds to a second interlock list, and the third storage area corresponds to a third interlock list. After acquiring the start signal of the valve, the lower computer may acquire three interlock lists of the valve a, and then simultaneously start three detection subroutines, which run in parallel, each detection subroutine detecting interlock conditions in one interlock list, respectively. For example, the first detection subroutine may read a target condition value of the interlock condition 1 from the first interlock list, acquire an actual condition value of the interlock condition 1, if the actual condition value of the interlock condition 1 does not match the target condition value, the interlock condition 1 is the target interlock condition, generate error information of the interlock condition 1, and store the error information of the interlock condition 1 in the first storage area. Meanwhile, the second detection sub-program detects the interlocking conditions in the second interlocking list, generates error information when detecting that the actual condition value of a certain interlocking condition in the second interlocking list is not matched with the target condition value, and stores the error information in a second storage area; the third detection subroutine detects interlock conditions in the third interlock list, generates error information when detecting that an actual condition value of a certain interlock condition in the third interlock list does not match the target condition value, and stores the error information in the third storage area.
In the embodiment of the invention, based on a plurality of interlocking lists, the interlocking conditions in the interlocking lists can be detected at the same time, the interlocking detection time can be shortened, and the interlocking detection efficiency can be improved.
Optionally, step 102 may include:
sequentially acquiring actual condition values of interlocking conditions included in each interlocking list;
generating error information of the interlocking condition under the condition that the target condition value of the interlocking condition is not matched with the actual condition value;
storing error information of the interlock condition in a target storage area of a plurality of preset storage areas; the target storage area corresponds to a category to which the interlock condition belongs.
In another embodiment, after obtaining the plurality of interlock lists, the lower computer may sequentially detect the interlock conditions included in each interlock list. In combination, for example, after three interlock lists of the valve a are obtained, the lower computer may start a detection program, and the detection program may first read a target condition value of each interlock condition from the first interlock list, then obtain an actual condition value of the interlock condition, generate corresponding error information when it is determined that the target condition value of the interlock condition does not match the actual condition value, and store the error information in the first storage area. After the interlock condition detection in the first interlock list is completed, the target condition value of each interlock condition may be read from the second interlock list, then the actual condition value of the interlock condition is acquired, and when it is determined that the target condition value of the interlock condition does not match the actual condition value, corresponding error information is generated and stored in the second storage area. Similarly, after the interlock condition detection in the second interlock list is completed, the target condition value of each interlock condition may be read from the third interlock list, then the actual condition value of the interlock condition may be acquired, and when it is determined that the target condition value of the interlock condition does not match the actual condition value, corresponding error information may be generated and stored in the third storage area.
Optionally, the method may further include:
and setting an error identifier at a flag bit of the target storage area to identify that the interlocking condition in the category to which the target interlocking condition belongs is not met.
In one embodiment, after generating the error information of the target interlock condition, the lower computer may set an error flag to a flag bit of the target storage area while storing the error information, the error flag indicating that the interlock condition of the class to which the interlock condition belongs is not satisfied, that is, an actual condition value of the interlock condition does not match the target condition value. As shown in fig. 2, each storage area may be configured with a flag bit, and the initial value stored in the flag bit is 0. When it is determined that the actual condition value of the interlock condition 1 does not match the target condition value, the interlock condition 1 is the target interlock condition, the first storage area is the target storage area, and an error flag, which may be 1 for example, may be stored in a flag bit of the first storage area. In the fault searching stage, the lower computer can only read the first storage area with the error flag bit of 1 to acquire the error information stored in the first storage area, so that a user can conveniently and quickly determine which type of interlocking condition is not met.
Optionally, a storage location for each interlock condition of the corresponding category is included in the storage area.
The step of storing the error information of the target interlock condition in a target storage area among a plurality of storage areas set in advance may include: a target storage location of the target interlock condition is determined in the target storage area, and error information of the target interlock condition is stored in the target storage location.
In one embodiment, in each storage area, a storage location may be configured for each of all interlock conditions of the corresponding category. As shown in fig. 3, fig. 3 illustrates a schematic data storage diagram provided by this embodiment, in the diagram, a first column 301, a second column 302, and a third column 303 represent interlock lists of a valve a, where the first column is an identifier of the valve a, the second column 302 sequentially includes three interlock lists from top to bottom, and sequentially stores a plurality of interlock conditions, and the third column 303 is a target condition value corresponding to each interlock condition. The fourth column 304 represents the plurality of memory regions of the interlocking list, the first memory region being 305, the second memory region being 306, the third memory region being 307, the symbol F1 representing the flag bit of the first memory region, the symbol F2 representing the flag bit of the second memory region, and the symbol F3 representing the flag bit of the third memory region. In connection with the above example, the first storage area 305 includes two storage locations of interlock condition 1 and interlock condition 2. When it is determined that the target condition value of the interlock condition 1 does not coincide with the actual condition value, a target storage location of the interlock condition 1 may be determined from the first storage area 305, and the error information of the interlock condition 1 may be stored in the target storage location. Likewise, when it is determined that the target condition value of the interlock condition 2 does not coincide with the actual condition value, the target storage location of the interlock condition 2 may be determined from the first storage area, and the error information of the interlock condition 2 may be stored in the target storage location.
In the prior art, only one storage position is usually set for the operating device, so when a plurality of interlock conditions of the operating device are not satisfied, the error information of one interlock condition previously stored in the storage position is overwritten by the error information of another interlock condition stored later. In the troubleshooting stage, only one error message can be acquired from the storage position, and the comprehensive troubleshooting can not be performed according to the error message. In this embodiment, a corresponding storage location is set for each interlock condition in the storage area, so that the problem of data coverage can be avoided, error information of the interlock condition can be continuously maintained in the storage location, and a user can conveniently and quickly search for a fault point according to all the error information in a troubleshooting stage.
It should be noted that, in different semiconductor processing apparatuses, the interlocking conditions of the operation devices are different, taking a furnace apparatus in the semiconductor processing apparatus as an example, fig. 4 illustrates a schematic structural diagram of the furnace apparatus provided in this embodiment, the furnace apparatus includes a normal pressure furnace apparatus 401 and a low pressure furnace apparatus 402, and compared with the normal pressure furnace apparatus 401, an exhaust pump 405 needs to be disposed at an exhaust port of the low pressure furnace apparatus 402, and in the process of performing a process on a wafer, a process gas in the furnace apparatus needs to be exhausted through the exhaust pump 405. For the intake valve 404 in the low-pressure furnace apparatus 402, when the intake valve 404 is opened, the exhaust pump 405 needs to be in a closed state, and when an interlock condition is set for the intake valve 404, an interlock condition corresponding to the exhaust pump 405 may be set, with a target condition value of the interlock condition being the closed state. For the air inlet valve 403 in the atmospheric furnace tube equipment 401, corresponding interlocking conditions do not need to be set.
The embodiment further provides semiconductor process equipment, which comprises a lower computer and an action device, wherein the lower computer is used for responding to a starting signal of the action device and acquiring a plurality of interlocking lists of the action device; each interlocking list comprises a category of interlocking condition and a target condition value of the interlocking condition; and the lower computer is also used for storing the error information of the interlocking condition according to the class to which the interlocking condition belongs under the condition that the target condition value of the interlocking condition is not matched with the obtained actual condition value.
Optionally, the lower computer is configured to obtain actual condition values of the interlock conditions included in each interlock list at the same time; generating error information of the target interlock condition under the condition that the target condition value of the target interlock condition is not matched with the actual condition value; storing error information of a target interlocking condition in a target storage area of a plurality of preset storage areas; the target storage area corresponds to a category of the target interlock condition.
Optionally, the lower computer is configured to sequentially obtain actual condition values of the interlock conditions included in each interlock list; generating error information of the target interlock condition under the condition that the target condition value of the target interlock condition is not matched with the actual condition value; storing error information of a target interlocking condition in a target storage area of a plurality of preset storage areas; the target storage area corresponds to a category of the target interlock condition.
Optionally, the lower computer is further configured to set an error identifier at a flag bit of the target storage area, so as to identify that the interlock condition in the category to which the target interlock condition belongs is not satisfied.
Optionally, a storage location of each interlock condition of the corresponding category is included in the storage area; the lower computer is specifically used for determining a target storage position of the target interlocking condition in the target storage area and storing error information of the target interlocking condition in the target storage position.
Referring to fig. 5, a schematic structural diagram of a semiconductor processing apparatus provided in this embodiment is shown, the semiconductor processing apparatus includes an upper computer 501 and a lower computer 502, and the lower computer 502 is connected to the upper computer 501; the lower computer 502 is further configured to send error information to the upper computer 501, so that the upper computer 501 displays the error information. The upper computer can send data requests to the lower computer at intervals of preset duration, and the lower computer can respond to the data requests sent by the upper computer and send stored error information to the upper computer. After the upper computer receives the error information, the error information can be displayed in a display included by the upper computer. The information interaction method between the upper computer and the lower computer and the display method of the error information can be specifically set according to requirements, and the embodiment does not limit the method.
The embodiments in the present specification are all described in a progressive manner, and each embodiment focuses on differences from other embodiments, and portions that are the same and similar between the embodiments may be referred to each other.
While preferred embodiments of the present invention have been described, additional variations and modifications of these embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, it is intended that the appended claims be interpreted as including the preferred embodiment and all changes and modifications that fall within the true scope of the embodiments of the present invention.
Finally, it should also be noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or mobile device that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or mobile device. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in the process, method, article, or mobile device that comprises the element.
The interlock condition detection method and the semiconductor process equipment provided by the embodiment of the invention are described in detail, and a specific example is applied to explain the principle and the implementation mode of the embodiment of the invention, and the description of the embodiment is only used for helping to understand the method and the core idea of the embodiment of the invention; meanwhile, for a person skilled in the art, according to the idea of the embodiment of the present invention, there may be a change in the specific implementation and application scope, and in summary, the content of the present specification should not be construed as a limitation to the embodiment of the present invention.
Claims (10)
1. An interlock condition detection method is applied to semiconductor process equipment and is characterized by comprising the following steps:
responding to a starting signal of an action device of the semiconductor process equipment, and acquiring a plurality of interlocking lists of the action device; each interlock list comprises a class of interlock conditions and target condition values of the interlock conditions respectively;
and under the condition that the target condition value of the interlocking condition is not matched with the obtained actual condition value, storing error information of the interlocking condition according to the category to which the interlocking condition belongs.
2. The method according to claim 1, wherein, in a case where the target condition value of the interlock condition does not match the obtained actual condition value, storing the error information of the interlock condition by the category to which the interlock condition belongs includes:
simultaneously acquiring actual condition values of the interlocking conditions included in each interlocking list;
generating error information of a target interlock condition under the condition that a target condition value of the target interlock condition does not match an actual condition value;
storing error information of the target interlocking condition in a target storage area of a plurality of preset storage areas; the target storage area corresponds to a category of the target interlock condition.
3. The method according to claim 1, wherein, in a case where the target condition value of the interlock condition does not match the obtained actual condition value, storing the error information of the interlock condition by the category to which the interlock condition belongs includes:
sequentially acquiring actual condition values of the interlocking conditions included in each interlocking list;
generating error information of a target interlock condition under the condition that a target condition value of the target interlock condition does not match an actual condition value;
Storing error information of the target interlocking condition in a target storage area of a plurality of preset storage areas; the target storage area corresponds to a category of the target interlock condition.
4. The method of claim 2 or 3, further comprising:
and setting an error identifier at a flag bit of the target storage area to identify that the interlocking condition in the category to which the target interlocking condition belongs is not met.
5. A method according to claim 2 or 3, characterized in that the storage area comprises a storage location for each interlock condition of the corresponding category; the storing of the error information of the target interlock condition in a target storage area among a plurality of storage areas set in advance includes:
and determining a target storage position of the target interlocking condition in the target storage area, and storing error information of the target interlocking condition in the target storage position.
6. The method of claim 1, wherein the plurality of interlock lists comprises a first interlock list, a second interlock list, and a third interlock list;
wherein the interlock condition in the first interlock list is a device identifier of at least one other action device associated with the action device in the semiconductor process equipment, and the target condition value in the first interlock list is a target switch state of the other action device; the interlocking condition in the second interlocking list is a parameter identification of at least one process parameter of the semiconductor process equipment, which is associated with the action device, and the target condition value in the second interlocking list is a target parameter state of the process parameter; the interlock condition in the third interlock list is a state identification of at least one system state in the semiconductor process equipment associated with the action device, and the target condition value in the third interlock list is a target system state of the system state.
7. The method of claim 6, wherein said action devices comprise valves, chamber doors and pumps in said semiconductor processing equipment.
8. The semiconductor process equipment is characterized by comprising an action device and a lower computer, wherein the lower computer is used for responding to a starting signal of the action device and acquiring a plurality of interlocking lists of the action device; each interlock list comprises a category of interlock conditions and target condition values of the interlock conditions respectively; and the lower computer is also used for storing the error information of the interlocking condition according to the category of the interlocking condition under the condition that the target condition value of the interlocking condition is not matched with the obtained actual condition value.
9. The semiconductor processing equipment according to claim 8, further comprising an upper computer connected to the lower computer; the lower computer is also used for sending the error information to the upper computer so that the upper computer displays the error information.
10. The semiconductor processing apparatus of claim 8 or 9, wherein the motion device comprises a valve, a chamber door, and a pump in the semiconductor processing apparatus.
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