CN114660157A - Extended structure field effect transistor - Google Patents

Extended structure field effect transistor Download PDF

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Publication number
CN114660157A
CN114660157A CN202210269899.1A CN202210269899A CN114660157A CN 114660157 A CN114660157 A CN 114660157A CN 202210269899 A CN202210269899 A CN 202210269899A CN 114660157 A CN114660157 A CN 114660157A
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layer
dielectric layer
gate dielectric
grid
field effect
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CN202210269899.1A
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Inventor
王轶卿
杨敏
吴斐
汪洵
王婷
丁松
薄翠梅
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Nanjing Tech University
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Nanjing Tech University
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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N27/00—Investigating or analysing materials by the use of electric, electrochemical, or magnetic means
    • G01N27/26—Investigating or analysing materials by the use of electric, electrochemical, or magnetic means by investigating electrochemical variables; by using electrolysis or electrophoresis
    • G01N27/403—Cells and electrode assemblies
    • G01N27/414—Ion-sensitive or chemical field-effect transistors, i.e. ISFETS or CHEMFETS
    • G01N27/4146—Ion-sensitive or chemical field-effect transistors, i.e. ISFETS or CHEMFETS involving nanosized elements, e.g. nanotubes, nanowires
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N27/00—Investigating or analysing materials by the use of electric, electrochemical, or magnetic means
    • G01N27/26—Investigating or analysing materials by the use of electric, electrochemical, or magnetic means by investigating electrochemical variables; by using electrolysis or electrophoresis
    • G01N27/403—Cells and electrode assemblies
    • G01N27/414—Ion-sensitive or chemical field-effect transistors, i.e. ISFETS or CHEMFETS
    • G01N27/4145—Ion-sensitive or chemical field-effect transistors, i.e. ISFETS or CHEMFETS specially adapted for biomolecules, e.g. gate electrode with immobilised receptors

Abstract

The invention discloses a field effect transistor with an extended structure, and relates to the technical field of medical inspection, biosensing and semiconductors. Is divided into a transduction area and a sensing area. The transduction zone includes: the device comprises a substrate, a bottom gate dielectric layer, a channel layer, a source electrode, a drain electrode, a top gate dielectric layer, a back gate and a grid electrode; the sensing area includes: the liquid crystal display device comprises a substrate, a bottom gate dielectric layer, an expansion gate, a sensing layer, a liquid storage device and a liquid gate. The whole transduction area is divided into five layers, the bottom layer is a substrate, the upper layer is a bottom gate dielectric layer, the middle layer is composed of a channel layer, a source electrode and a drain electrode, the upper layer is a top gate dielectric layer, the uppermost layer is a gate electrode, and the back gate is positioned on the substrate. The whole sensing area is divided into five layers, the bottom layer is a substrate, the upper layer is a bottom grid dielectric layer, the middle layer is an extension grid which is connected to a grid of the transduction area, the upper layer is a sensing layer, and the uppermost layer is a liquid grid. The invention transmits signals to the transduction area through the extension grid electrode, and further causes the current between the source electrode and the drain electrode to change.

Description

Extended structure field effect transistor
Technical Field
The invention relates to the technical field of medical inspection, biosensing and semiconductors, in particular to a field effect transistor with a semiconductor extended structure.
Background
Ion sensitive field effect transistors are the earliest developed, ultra-small, pH sensors for the measurement of biological samples. The method is realized on the basis of the insulated gate field effect transistor, and a reference electrode and an ion sensitive film are used for replacing a metal gate electrode of the insulated gate field effect transistor. The biosensor prepared by the ion sensitive field effect transistor has the advantages of small volume, good selectivity, high analysis speed, low cost, high integration degree and the like, and is widely applied to the fields of environmental monitoring, biomedicine, food, industry and the like. In the biomedical field in particular, ion-sensitive field effect transistors have been used for the detection of various biomarkers.
The first ion sensitive field effect transistor devices were invented by Bergveld in 1970, and subsequently researchers developed various technologies and sensing films in succession. These solid state devices have attracted considerable attention, which have many advantages, such as miniaturization, low cost of chip circuit design and fabrication, and the like, particularly for integrating biosensors into microelectronics. However, the sensitivity of these devices in detecting the pH of a substance cannot break through the Nernst limit (59 mV/pH). Breakthrough of nernst limit requires optimization of material properties or improvement of device structure, and especially attention is paid to an ion sensitive field effect transistor of a double gate structure, and the pH sensitivity of the ion sensitive field effect transistor can be improved by the capacitive coupling ratio of a top gate dielectric layer and a bottom gate dielectric layer.
However, the ion sensitive film of the conventional ion sensitive field effect transistor is in direct contact with the solution to be measured, and when the sensing area is exposed in the electrolyte for a long time, corrosive ions can damage the surface of the sensing area, thereby seriously affecting the service life of the device. Therefore, the service life of the device can be effectively prolonged by reasonably separating the transduction area and the sensing area, namely, the sensing area is used for being in contact with a solution to be tested and transferring potential change to a grid electrode of the field effect transistor, and the transduction area converts the potential change into the change of a current signal. The field effect transistor with the structure has the advantages of low cost, high benefit, simple packaging, insensitivity to temperature and light, excellent long-term stability and the like.
Disclosure of Invention
The invention aims to design and manufacture an extended structure field effect transistor.
The technical scheme is as follows:
an extended structure field effect transistor, which comprises a transduction area and a sensing area, wherein the sensing area comprises the following components in sequence from bottom to top:
the sensor comprises a substrate (1), a bottom gate dielectric layer (2), an extension gate (9), a sensing layer (10), a liquid reservoir (11) and a reference electrode (12);
wherein: the reference electrode (12) and the solution to be measured in the liquid reservoir (11) are combined to form a liquid grid; the extension grid (9) is connected with the grid (8) of the transduction area;
electric signals obtained by the liquid grid are transmitted to the transduction area through the sensing layer (10) and the extension grid (9); the transduction zone comprises a field effect transistor structure, and the effect of converting potential change into change of a current signal is realized.
Preferably, the transduction areas sequentially from bottom to top are: the structure comprises a substrate (1), a bottom gate dielectric layer (2), a channel layer (3), a top gate dielectric layer (6) and a grid electrode (8), wherein the channel layer (3) is positioned between the bottom gate dielectric layer (2) and the top gate dielectric layer (6); the source electrode (4) and the drain electrode (5) are positioned at two sides of the channel layer (3), are in contact with the channel layer (3), and are also deposited on the bottom gate dielectric layer (2); the back gate (7) is located on the substrate (1).
Preferably, the substrate (1) of the sensing region and the substrate (1) of the transduction region are integrally formed; the bottom gate dielectric layer (2) of the sensing area and the bottom gate dielectric layer (2) of the transduction area are integrally formed. The size of the field effect transistor with the preferred extension structure is as follows: a length of 10 to 30mm, a width of 3 to 20mm and a thickness of 0.67 to 3 mm.
Preferably, the substrate (1) is Si, Si/SiO2A wafer, glass or plastic substrate; preferred dimensions are: a length of 10 to 30mm, a width of 3 to 20mm, and a thickness of 0.5 to 1.2 mm. The bottom gate dielectric layer (2) is deposited on the substrate (1) by utilizing a Plasma Enhanced Chemical Vapor Deposition (PECVD) method, and the material is selected from SiO2、Si3O4、SiN、Al2O3、HfO2、Ta2O5Or Si3N4(ii) a Preferred dimensions are: a length of 10 to 30mm, a width of 3 to 20mm, and a thickness of 100 to 1000 nm. The channel layer (3) is made of a semiconductor material selected from SnO2、ZnO、Si、TiO2、TiO、GaN、MoS2、CeO2、V2O5、In2O3InGaZnO or graphene; preferred dimensions are: a length of 30 to 800 μm, a width of 20 to 300 μm, and a thickness of 10 to 100 nm. The source electrode (4) and the drain electrode (5) are made of Au, Ag, Pt, Ti/Au or Cr/Au; preferred dimensions are: a length of 100 to 400 μm, a width of 80 to 300 μm, and a thickness of 10 to 100 nm. The material of the back gate (7) is selected from Au, Ag, Pt, Ti/Au or Cr/Au; preferred dimensions are: a rectangle having a length of 0.1 to 2.0mm and a width of 0.1 to 2.0mm, or a circle having a radius of 0.1 to 2.0mm and a thickness of 10 to 100 nm. The material of the top gate dielectric layer (6) is selected from SiO2、Si3O4、SiN、Al2O3、HfO2、Ta2O5Or Si3N4(ii) a Preferred dimensions are: a length of 6 to 20mm, a width of 2 to 10mm and a thickness of 50 to 500 nm. The material of the grid (8) is selected from Au, Ag, Pt, Ti/Au or Cr/Au. Preferred dimensions are: a length of 2 to 10mm, a width of 500 to 2000 μm, and a thickness of 10 to 200 nm.
Preferably, the channel layer (3) is of a nanoribbon structure: the channel layer (3) is arranged on the bottom gate dielectric layer (2), photoresist is coated on the channel layer, and a channel mask is formed after photoetching; and sputtering to form a nano-band structure by adopting a magnetron sputtering technology.
Preferably, photoresist is coated on the bottom gate dielectric layer (2), and a source shadow mask and a drain shadow mask are formed through etching; and stripping by adopting an electron beam evaporation mode to form a source electrode (4) and a drain electrode (5).
Preferably, a back gate shadow mask is formed by coating photoresist on the substrate (1) and etching; and stripping by adopting an electron beam evaporation method to form a back gate (7).
Preferably, a top gate dielectric layer (6) is obtained on the channel layer (3) by PECVD deposition.
Preferably, photoresist is coated on the top gate dielectric layer (6), and a gate shadow mask is formed through etching; and stripping by adopting an electron beam evaporation method to form a grid (8).
Preferably, the extension grid electrode (9) is deposited on the bottom grid dielectric layer (2) in an electron beam evaporation mode, and the material is selected from Au, Ag, Al, Pt, ITO, Ti/Au or Cr/Au; preferred dimensions are: a length of 4 to 12mm, a width of 4 to 12mm, and a thickness of 10 to 200 nm. The sensing layer (10) is deposited on the extension grid (9) by adopting a Plasma Enhanced Chemical Vapor Deposition (PECVD) method, and the material is selected from SnO2、TiO2、PdO、SiO2、Si3N4、HfO2、ZrO2、Ta2O5Or graphene; preferred dimensions are: a length of 4 to 12mm, a width of 4 to 12mm, and a thickness of 10 to 200 nm. The liquid grid is composed of a solution to be measured in the liquid storage device (11) and a reference electrode (12), and the reference electrode is made of Ag or Ag/AgCl. Preferred dimensions are: the length is 2 to 10cm and the diameter is 1 to 12 mm.
The invention has the advantages of
Due to the fact that different pH values of solutions are applied in the biological sensing process, voltage is applied to a liquid gate, the change of the pH value of the solution to be detected causes the change of the surface potential of a pH sensitive film, signals are transferred to a gate of an energy conversion area through an expansion gate, the change of a local electric field of a field effect transistor with an expansion structure is caused, the concentration of carriers in a channel is caused to change, voltage is applied between a source electrode and a drain electrode, the carriers in the channel are caused to move directionally, and a current signal is generated between the source electrode and the drain electrode. And the detection of the biological substances is realized by analyzing the corresponding relation between the concentration of the biological marker, the pH value of the solution and the current signal output by the pH sensitive element.
The field effect transistor with the extended structure has two parts of a transduction area and a sensing area. The energy conversion area adopts a double-gate structure, and the detection sensitivity can be obviously improved under the condition of no additional circuit through the capacitive coupling effect between the gate dielectric layers above and below the channel. The sensing area has a simple structure, and is separated from the transduction area, so that hysteresis and drift of the channel layer caused by an ion induction phenomenon and dissolution of a channel material can be overcome, and the detection stability is improved; the corrosion of ions in the solution is avoided, and the service life of the device can be effectively prolonged.
The field effect transistor with the extended structure has the advantages of convenience in operation, high sensitivity, strong specificity, miniaturization, long service life and the like, and has extremely high application value.
Drawings
Fig. 1 is a schematic structural diagram of an extended structure field effect transistor provided in an embodiment of the present invention.
Fig. 2 is a cross-sectional view of an extended structure field effect transistor provided by an embodiment of the present invention through line 2-2 of fig. 1.
Fig. 3 is a side view of an extended configuration field effect transistor provided by an embodiment of the present invention.
Detailed Description
The invention is further illustrated by the following examples, without limiting the scope of the invention:
an embodiment of an extended structure field effect transistor according to the present invention is shown in fig. 1 to 3. The present invention will be described in further detail with reference to the accompanying drawings and specific embodiments.
Example 1:
the invention provides an extended structure field effect transistor which is divided into a transduction area and a sensing area. The transduction region is composed of a substrate 1, a bottom gate dielectric layer 2, a channel layer 3, a source 4, a drain 5, a top gate dielectric 6, a back gate 7 and a gate 8; the bottom layer is a substrate 1; the upper surface of the substrate 1 is provided with a bottom gate dielectric layer 2 and a back gate 7; the channel layer 3 is sputtered on the bottom gate dielectric layer 2; the source electrode 4 and the drain electrode 5 are positioned at two sides of the channel layer 3, are in contact with the channel layer 3 and are also deposited on the bottom gate medium layer 2; the upper surface of the channel layer 3 is provided with a top gate medium 6; a gate 8 is sputtered on the top gate dielectric layer 6. The sensing area is composed of a substrate 1, a bottom gate dielectric layer 2, an extended gate 9, a sensing layer 10, a liquid storage device 11 and a reference electrode 12; the expansion grid 9 is sputtered on the bottom grid dielectric layer 2, and the sensing layer 10 is deposited on the expansion grid 9; the sensing layer 10 is connected with a liquid storage device 11 containing solution; the liquid grid is composed of a reference electrode 12 and a solution to be measured.
Size of the entire extended structure field effect transistor: length 20mm, width 10mm, thickness 1001.3 μm; the substrate 1 is made of P-type silicon and N-type doped, and has the length of 20mm, the width of 10mm and the thickness of 1 mm; ta is selected as the material of the bottom gate dielectric layer 22O5The length is 20mm, the width is 10mm, and the thickness is 1000 nm; the material of the channel layer 3 is In2O3The length is 30 μm, the width is 150 μm, and the thickness is 50 nm; the source electrode 4 and the drain electrode 5 are made of Cr/Au, the length is 200 mu m, the width is 200 mu m, and the thickness is 50 nm; ta is selected as the material of the top gate dielectric 62O5The length is 8.5mm, the width is 4mm, and the thickness is 100 nm; the back gate 7 is made of Cr/Au with the radius of 0.5 mm; the grid 8 is made of Al, the length is 4mm, the width is 1.5mm, and the thickness is 150 nm; the extension grid 9 and the grid 8 are integrated, the length is 10mm, the width is 10mm, and the thickness is 150 nm; SnO is selected as the material of the sensing layer 102The length is 8mm, the width is 8mm, and the thickness is 150 nm; the material of the liquid storage device 11 is Polydimethylsiloxane (PDMS), the length is 8mm, the width is 8mm, the thickness is 10mm, and the inner diameter is 6 mm; the reference electrode 12 is made of Ag/Cl, 8cm in length and 1mm in diameter.
In this example, the pH sensitivity of the extended structure field effect transistor can be above 275mV/pH with a time stability of over 60 days.
Example 2:
example 2 the structure of the field effect transistor is the same as in example 1.
For an extended structure field effect transistor, overall size: the length is 25mm, the width is 15mm, and the thickness is 1001 mu m; the substrate 1 is made of P-type silicon and N-type doped, and has the length of 25mm, the width of 15mm and the thickness of 1 mm; the material of the bottom gate dielectric layer 2 is SiO2A length of 25mm and a width of15mm and 500nm in thickness; the channel layer 3 is made of InGaZnO, the length is 100 micrometers, the width is 100 micrometers, and the thickness is 50 nm; the source electrode 4 and the drain electrode 5 are made of Au, the length is 100 micrometers, the width is 100 micrometers, and the thickness is 50 nm; HfO is selected as the material of the top gate dielectric 62The length is 12.5mm, the width is 10mm, and the thickness is 500 nm; the back gate 7 is preferably made of Au, and has the length of 1mm and the width of 1 mm; the grid electrode 8 is made of Au, the length is 10mm, the width is 2.5mm, and the thickness is 100 nm; the extension grid 9 and the grid 8 are integrated, the length is 15mm, the width is 12.5mm, and the thickness is 100 nm; the sensing layer 10 is made of graphene, the length is 15mm, the width is 12.5mm, and the thickness is 100 nm; the material of the liquid storage device 11 is Polydimethylsiloxane (PDMS), the length is 10mm, the width is 10mm, the thickness is 8mm, and the inner diameter is 8 mm; the reference electrode 12 is made of Ag/Cl, and has a length of 10cm and a diameter of 1 mm.
In this example, the pH sensitivity of the extended structure field effect transistor can be above 275mV/pH with a time stability of over 60 days.
The specific embodiments described herein are merely illustrative of the spirit of the invention. Various modifications or additions may be made to the described embodiments or alternatives may be employed by those skilled in the art without departing from the spirit or ambit of the invention as defined in the appended claims.

Claims (10)

1. An extended structure field effect transistor, characterized in that, it includes transduction zone and sensing zone, sensing zone is from bottom to top in proper order:
the sensor comprises a substrate (1), a bottom gate dielectric layer (2), an extension gate (9), a sensing layer (10), a liquid reservoir (11) and a reference electrode (12);
wherein: the reference electrode (12) and the solution to be detected in the liquid storage device (11) are combined to form a liquid grid; the extension grid (9) is connected with the grid (8) of the transduction area;
electric signals obtained by the liquid grid are transmitted to the transduction area through the sensing layer (10) and the extension grid (9); the transduction zone comprises a field effect transistor structure, and the effect of converting potential change into change of a current signal is realized.
2. An extended structure field effect transistor according to claim 1, wherein the transduction regions are, from bottom to top: the field effect transistor comprises a substrate (1), a bottom gate dielectric layer (2), a channel layer (3), a top gate dielectric layer (6) and a grid (8), wherein the channel layer (3) is positioned between the bottom gate dielectric layer (2) and the top gate dielectric layer (6); the source electrode (4) and the drain electrode (5) are positioned at two sides of the channel layer (3), are in contact with the channel layer (3), and are also deposited on the bottom gate dielectric layer (2); the back gate (7) is located on the substrate (1).
3. An extended structure field effect transistor according to claim 2, characterised in that the substrate (1) of the sensing region and the substrate (1) of the transducing region are formed integrally; the bottom gate dielectric layer (2) of the sensing area and the bottom gate dielectric layer (2) of the transduction area are integrally formed.
4. An extended structure field effect transistor according to claim 1 or 2, characterised in that the substrate (1) is Si, Si/SiO2A wafer, glass or plastic substrate; the bottom gate dielectric layer (2) is deposited on the substrate (1) by utilizing a Plasma Enhanced Chemical Vapor Deposition (PECVD) method, and the material is selected from SiO2、Si3O4、SiN、Al2O3、HfO2、Ta2O5Or Si3N4(ii) a The channel layer (3) is made of a semiconductor material selected from SnO2、ZnO、Si、TiO2、TiO、GaN、MoS2、CeO2、V2O5、In2O3InGaZnO or graphene; the source electrode (4) and the drain electrode (5) are made of Au, Ag, Pt, Ti/Au or Cr/Au; the material of the back gate (7) is selected from Au, Ag, Pt, Ti/Au or Cr/Au; the material of the top gate dielectric layer (6) is selected from SiO2、Si3O4、SiN、Al2O3、HfO2、Ta2O5Or Si3N4(ii) a The material of the grid electrode (8) is selected from Au, Ag, Pt, Ti/Au or Cr/Au.
5. An extended structure field effect transistor according to claim 4, characterised in that the channel layer (3) is a nanoribbon structure: the channel layer (3) is arranged on the bottom gate dielectric layer (2), photoresist is coated on the channel layer, and a channel mask is formed after photoetching; and sputtering by adopting a magnetron sputtering technology to form a nanoribbon structure.
6. The extended structure Field Effect Transistor (FET) of claim 4, wherein the source and drain shadow masks are formed by applying a photoresist over the bottom gate dielectric layer (2) and etching; and stripping by adopting an electron beam evaporation mode to form a source electrode (4) and a drain electrode (5).
7. The extended structure field effect transistor according to claim 4, wherein a back gate shadow mask is formed by coating a photoresist on the substrate (1) and etching; and stripping by adopting an electron beam evaporation method to form a back gate (7).
8. An extended structure field effect transistor according to claim 4, characterized in that the top gate dielectric layer (6) is obtained by plasma enhanced chemical vapor deposition PECVD deposition on the channel layer (3).
9. The extended structure field effect transistor of claim 4, wherein the gate shadow mask is formed by coating a photoresist on the top gate dielectric layer (6) and etching; and stripping by adopting an electron beam evaporation method to form a grid (8).
10. The FET of claim 4, wherein the expansion gate (9) is deposited on the bottom gate dielectric layer (2) by electron beam evaporation, and is made of a material selected from Au, Ag, Al, Pt, ITO, Ti/Au or Cr/Au; the sensing layer (10) is deposited on the extension grid (9) by adopting a Plasma Enhanced Chemical Vapor Deposition (PECVD) method, and the material is selected from SnO2、TiO2、PdO、SiO2、Si3N4、HfO2、ZrO2、Ta2O5Or graphene; the liquid grid is composed of a solution to be measured in the liquid storage device (11) and a reference electrode (12), and the reference electrode is made of Ag or Ag/AgCl.
CN202210269899.1A 2022-03-18 2022-03-18 Extended structure field effect transistor Pending CN114660157A (en)

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