CN114649214A - Method for manufacturing electronic device - Google Patents

Abstract

The present disclosure provides a method for manufacturing an electronic device. The method of manufacturing an electronic device includes the following steps. A substrate is provided. A first opening is formed so that the first opening penetrates through the substrate. A polymer layer is formed in the first opening. The polymer layer contacts the sidewall of the substrate at the first opening. The manufacturing method of the electronic device of the embodiment of the disclosure can shorten the distance of signal transmission.

Description

Method for manufacturing electronic device

Technical Field

The present disclosure relates to electronic devices, and particularly to a method for reducing signal transmission distance.

Background

Electronic devices or tiled electronic devices have been widely used in mobile phones, televisions, monitors, tablet computers, vehicle displays, wearable devices, and desktop computers. With the rapid development of electronic devices, the quality requirements for electronic devices are higher.

Disclosure of Invention

The present disclosure provides a method for manufacturing an electronic device, which can shorten the distance of signal transmission.

According to an embodiment of the present disclosure, a method of manufacturing an electronic device includes: firstly, providing a substrate; then, forming a first opening so that the first opening penetrates through the substrate; then, a polymer layer is formed in the first opening. The polymer layer can contact the sidewall of the substrate at the first opening.

Drawings

The accompanying drawings are included to provide a further understanding of the disclosure, and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the disclosure and together with the description serve to explain the principles of the disclosure.

Fig. 1A to 1K are schematic cross-sectional views illustrating a method for manufacturing an electronic device according to an embodiment of the disclosure.

Description of the reference numerals

100: an electronic device;

110: a substrate;

110 a: a surface;

110 b: another surface;

112: a first opening;

1121. 1221: a side wall;

120: a polymer layer;

120 a: a first surface;

120 b: a second surface;

122: a second opening;

130: a first conductive layer;

130 a: a first conductive layer pattern;

132: a second conductive layer;

132 a: a second conductive layer pattern;

134 a: a conductive layer pattern;

136: a third conductive layer;

1361: a first conductive material;

1362: a second conductive material;

1363: a third opening;

138: a conductive material;

140. 142: a protective layer;

150: a dielectric layer;

152: a dielectric layer pattern;

1501: an opening;

160. 162: a surface treatment layer;

170: a chip;

t: and (4) thickness.

Detailed Description

The present disclosure may be understood by reference to the following detailed description taken in conjunction with the accompanying drawings, in which it is noted that, for the sake of clarity and brevity of the drawings, the various drawings in the present disclosure depict only some of the electronic devices and are not necessarily drawn to scale. In addition, the number and size of the elements in the figures are merely illustrative and are not intended to limit the scope of the present disclosure.

In the following specification and claims, the words "comprise", "comprising", "includes" and "including" are open-ended words that should be interpreted as meaning "including, but not limited to …".

It will be understood that when an element or layer is referred to as being "on" or "connected to" another element or layer, it can be directly on or connected to the other element or layer or intervening elements or layers may be present (not directly). In contrast, when an element is referred to as being "directly on" or "directly connected to" another element or film, there are no intervening elements or films present between the two.

Although the terms "first," "second," and "third" … may be used to describe various components, the components are not limited by this term. This term is used only to distinguish a single component from other components within the specification. The same terms may not be used in the claims, but instead first, second, and third … may be substituted for the elements in the claims in the order in which they are presented. Therefore, in the following description, a first constituent element may be a second constituent element in the claims.

As used herein, the term "about," "substantially," "approximately" generally refers to within 10%, or within 5%, or within 3%, or within 2%, or within 1%, or within 0.5% of a given value or range. The amounts given herein are approximate, that is, the meanings of "about", "substantially" and "approximately" may be implied without specifically stating "about", "substantially" and "approximately".

In some embodiments of the present disclosure, terms such as "connected," "interconnected," and the like, with respect to bonding, connecting, and the like, may refer to two structures being in direct contact, or may also refer to two structures not being in direct contact, unless otherwise specified, with respect to the structure between which they are disposed. And the terms coupled and connected should also be construed to include both structures being movable or both structures being fixed. Furthermore, the term "coupled" encompasses any direct and indirect electrical coupling.

The electronic device may include, but is not limited to, a display device, an antenna device (e.g., a liquid crystal antenna), a sensing device, a light-emitting device, a touch device, or a tile device. The electronic device may include a bendable electronic device. The exterior of the electronic device may be rectangular, circular, polygonal, shaped with curved edges, or other suitable shapes. The display device may include, for example, but not limited to, a Light Emitting Diode (LED), a liquid crystal (liquid crystal), a fluorescent (fluorescent), a phosphorescent (phosphor), a Quantum Dot (QD), other suitable materials, or a combination thereof. The light emitting diode may include, for example, an Organic Light Emitting Diode (OLED), an inorganic light emitting diode (inorganic light-emitting diode), a sub-millimeter light emitting diode (mini LED), a micro LED (micro LED), or a Quantum Dot Light Emitting Diode (QDLED), other suitable materials, or any combinations thereof, but not limited thereto. The display device may also include, but is not limited to, a tiled display device, for example. The antenna device may be, for example, a liquid crystal antenna, but is not limited thereto. The antenna device may include, for example, but is not limited to, an antenna splicing device. It should be noted that the electronic device can be any permutation and combination of the foregoing, but not limited thereto. In addition, the exterior of the electronic device may be rectangular, circular, polygonal, a shape with curved edges, or other suitable shapes. The electronic device may have a driving system, a control system, a light source system, a shelf system, and other peripheral systems to support the display device, the antenna device, or the splicing device. The present disclosure will be described in the context of an electronic device, but the present disclosure is not limited thereto.

It is to be understood that the following illustrative embodiments may be implemented by replacing, recombining, and mixing features of several different embodiments without departing from the spirit of the present disclosure. Features of the various embodiments may be combined and matched as desired, without departing from the spirit or ambit of the invention.

Reference will now be made in detail to the exemplary embodiments of the present disclosure, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers will be used throughout the drawings and the description to refer to the same or like parts.

Fig. 1A to 1K are schematic cross-sectional views illustrating a method for manufacturing an electronic device according to an embodiment of the disclosure. The method for manufacturing the electronic device 100 of the present embodiment may include the following steps:

first, referring to fig. 1A, a substrate 110 is provided. The substrate 110 has a surface 110a and another surface 110b, and the surface 110a and the another surface 110b are opposite to each other. The substrate 110 has a thickness T, and the thickness T is, for example, the maximum thickness of the substrate 110 measured along the normal direction thereof. In the present embodiment, the thickness T is, for example, 0.05 millimeters (mm) to 2mm (i.e., 0.05mm ≦ T ≦ 2mm), but not limited thereto. In addition, in the embodiment, the substrate 110 may include a rigid substrate, a flexible substrate, or a combination thereof. For example, the material of the substrate 110 may include glass, quartz, silicon wafer, sapphire (sapphire), III-V semiconductor material, ceramic, Polycarbonate (PC), Polyimide (PI), polyethylene terephthalate (PET), other suitable substrate materials, or a combination thereof, but is not limited thereto. In some embodiments, the substrate 110 may be a printed circuit board.

Next, referring to fig. 1A, a first opening 112 is formed in the substrate 110, and a polymer layer 120 is formed in the first opening 112. Specifically, in the present embodiment, the first opening 112 is formed by, for example, laser drilling or etching, and the polymer layer 120 is formed by, for example, vacuum screen printing, but the forming method of the first opening 112 and the polymer layer 120 is not limited by the disclosure. The first opening 112 may penetrate through the substrate 110. The polymer layer 120 may fill the first opening 112, and the polymer layer 120 may contact the sidewall 1121 of the substrate 110 at the first opening 112. The polymer layer 120 may have a first surface 120a and a second surface 120b opposite to each other. The first surface 120a may be aligned with the surface 110a of the substrate 110, and the second surface 120b may be aligned with the other surface 110b of the substrate 110. In some embodiments, the first surface 120a is higher than the surface 110a of the substrate 110, and the second surface 120b is higher than the other surface 110b of the substrate 110. In some embodiments, the first surface 120a is lower than the surface 110a of the substrate 110, and the second surface 120b is lower than the other surface 110b of the substrate 110. In addition, in the present embodiment, the material of the polymer layer 120 may include, but is not limited to, epoxy resin, polyimide, other suitable resin materials, or a combination of the foregoing materials. In the embodiment, the polymer layer 120 is filled in the first opening 112 to protect the first opening 112 from being directly filled with metal, because the difference between the thermal expansion coefficients of the metal and the substrate 110 is too large, the first opening 112 is broken if the metal is directly filled in the first opening 112. In addition, the polymer layer 120 is filled in the first opening 112 to prevent the etching solution in the subsequent process from flowing into the first opening 112 and even flowing to the bottom of the substrate 110 to damage the bottom film.

Then, referring to fig. 1A again, a first conductive layer 130 is formed on the surface 110a of the substrate 110, so that the first conductive layer 130 can cover and contact the surface 110a of the substrate 110 and the first surface 120a of the polymer layer 120. The first conductive layer 130 is formed by sputtering (coating), Chemical vapor deposition (Chemical vapor deposition), but not limited thereto.

Then, referring to fig. 1B, a protection layer 140 is formed on the surface 110a of the substrate 110, and then the substrate 110 is turned upside down, and a second conductive layer 132 is formed on the other surface 110B of the substrate 110, wherein the first conductive layer 130 is not damaged by the process after turning upside down through the protection layer 140. Specifically, in the present embodiment, the second conductive layer 132 is formed by, for example, sputtering, coating (coating), Chemical vapor deposition (Chemical vapor deposition), but not limited thereto. The protection layer 140 may cover the first conductive layer 130 to protect the first conductive layer 130. The second conductive layer 132 may cover and contact the second surface 120b of the polymer layer 120. In addition, in the present embodiment, the protection layer 140 may be, for example, tpf (temporal protective film), but not limited thereto.

Then, referring to fig. 1C, a patterned second conductive layer pattern 132a is formed. In the present embodiment, the second conductive layer 132 is etched by, for example, a photolithography (photolithography) method to form the second conductive layer pattern 132a, but not limited thereto. The second conductive layer pattern 132a may cover and contact the other surface 110b of the portion of the substrate 110 and the second surface 120b of the polymer layer 120. The second conductive layer pattern 132a may expose a portion of the other surface 110 b.

Then, referring to fig. 1D, a protection layer 142 is formed on the other surface 110b of the substrate 110, and after the substrate 110 is turned upside down, the protection layer 140 is removed, and a patterned first conductive layer pattern 130a is formed. In the present embodiment, the first conductive layer 130 is etched by, for example, a photolithography method to form the first conductive layer pattern 130a, but not limited thereto. The passivation layer 142 may cover the second conductive layer pattern 132a to protect the second conductive layer pattern 132a from being damaged during the process after the substrate 110 is turned upside down. The first conductive layer pattern 130a may expose a portion of the surface 110 a. The first conductive layer pattern 130a may cover and contact a portion of the first surface 120a of the polymer layer 120.

Then, referring to fig. 1E, a dielectric layer 150 is formed on the surface 110a of the substrate 110, such that the dielectric layer 150 covers the first conductive layer pattern 130a and the surface 110a and the first surface 120a exposed by the first conductive layer pattern 130 a. The dielectric layer 150 has an opening 1501 to expose a portion of the first conductive layer pattern 130 a. The material of the dielectric layer 150 may include, but is not limited to, an organic material, an inorganic material, or a combination thereof.

Then, referring to fig. 1F, a conductive layer pattern 134a is formed on the dielectric layer 150, and a dielectric layer pattern 152 is formed on the conductive layer pattern 134 a. The conductive layer pattern 134a may be disposed in the opening 1501, so that the conductive layer pattern 134a may be electrically coupled to the first conductive layer pattern 130 a. The dielectric layer pattern 152 may cover the dielectric layer 150 exposed by the conductive layer pattern 134a, a portion of the conductive layer pattern 134a, and the opening 1501. The material of the dielectric layer pattern 152 may include, but is not limited to, epoxy resin, silicon nitride, other suitable dielectric materials, or a combination thereof.

Then, referring to fig. 1G, a second opening 122 is formed in the polymer layer 120. The second opening 122 may penetrate through the polymer layer 120, the first conductive layer pattern 130a and the dielectric layer 150 to expose a portion of the second conductive layer pattern 132 a. In the present embodiment, the second opening 122 is formed by, for example, a laser drilling method, but not limited thereto. In addition, in the present embodiment, when the second opening 122 is formed, most of the polymer layer 120 can be removed, and the polymer layer 120 attached on the sidewall 1121 is left.

Then, referring to fig. 1H, a third conductive layer 136 is formed in the second opening 122, the third conductive layer 136 partially fills the second opening 122, and the third conductive layer 136 has a third opening 1363 therein. The third conductive layer 136 may include a first conductive material 1361 and a second conductive material 1362. The first conductive material 1361 may contact the dielectric layer pattern 152, the dielectric layer 150, the first conductive layer pattern 130a, the polymer layer 120, and the second conductive layer pattern 132a, and the second conductive material 1362 may contact and cover the first conductive material 1361. The first conductive material 1361 and the second conductive material 1362 may cover sidewalls of the polymer layer 120 to modify the polymer layer 120. The material of the first conductive material 1361 may include palladium (Pd), platinum (Pt), other suitable metal materials, or combinations or alloys thereof, but is not limited thereto. The material of the second conductive material 1362 may include, but is not limited to, copper, aluminum, silver, other suitable metallic materials, or combinations or alloys of the foregoing.

In the present embodiment, the third conductive layer 136 is formed by the following steps, but not limited thereto: first, a first conductive material 1361 is formed in the second opening 122 by electroless plating (electroplating) so that the first conductive material 1361 can cover the sidewall 1221 of the second opening 122; next, a second conductive material 1362 is formed in the second opening 122 by a chemical plating method, so that the second conductive material 1362 covers the first conductive material 1361 and fills the second opening 122. In this embodiment, the first conductive material 1361 and the second conductive material 1362 are formed using the same method, and in other embodiments, the first conductive material 1361 and the second conductive material 1362 are formed using different methods. In the embodiment, since the third conductive layer 136 can contact and electrically couple the first conductive layer pattern 130a and the second conductive layer pattern 132a, a signal from the other surface 110b of the substrate 110 can be transmitted to the surface 110a of the substrate 110 through the third conductive layer 136 by the shortest line distance (i.e., the thickness T of the substrate 110), thereby having an effect of shortening the signal transmission distance. The shortest line distance is, for example, the shortest distance between the first conductive layer pattern 130a and the second conductive layer pattern 132a, and this design can simplify the line design and reduce the signal loss.

In addition, in the present embodiment, the third opening 1363 may penetrate the third conductive layer 136, and the third opening 1363 may expose a portion of the second conductive layer pattern 132 a.

Then, referring to fig. 1I, a conductive material 138 is formed in the third opening 1363. In the present embodiment, the conductive material 138 is formed by, for example, a vacuum screen printing method, but not limited thereto. The material of the conductive material 138 may include, but is not limited to, copper, aluminum, silver, other suitable metallic materials, or combinations or alloys thereof. In addition, in the present embodiment, the conductive material 138 may fill the third opening 1363. The conductive material 138 may contact the third conductive layer 136 and the second conductive layer pattern 132 a. Since the conductive material 138 can electrically couple the first conductive layer pattern 130a and the second conductive layer pattern 132a through the third conductive layer 136, a signal from the other surface 110b of the substrate 110 can be transmitted to the surface 110a of the substrate 110 through the third conductive layer 136 and the conductive material 138 by the shortest line distance (i.e., the thickness T of the substrate 110), thereby having an effect of shortening the signal transmission distance. In addition, in the present embodiment, the conductive material 138 may also serve a heat dissipation purpose.

Although the conductive material 138 is filled in the third opening 1363 in the embodiment, the disclosure does not limit the material filled in the third opening 1363. That is, in some embodiments, another polymer layer (not shown) may be used to replace the conductive material 138 of the present embodiment, i.e., another polymer layer (not shown) is formed in the third opening. Another polymer layer fills the third opening 1363 to protect the sidewall metal (i.e., the second conductive material 1362) from oxidation.

Then, referring to fig. 1J, after removing the passivation layer 142, a surface treatment layer 160 is formed on the conductive layer pattern 134a exposed by the dielectric layer pattern 152 and the third conductive layer 136, and a surface treatment layer 162 is formed on the second conductive layer pattern 132 a. The material of the surface treatment layer 160 and the surface treatment layer 162 is, for example, nickel immersion gold (ENIG), but not limited thereto.

In other embodiments, the third conductive layer 136 may be omitted, and the conductive material 138 may be directly filled in the second opening 122, wherein the conductive material 138 is electrically coupled to the first conductive layer pattern 130a and the second conductive layer pattern 132 a.

In other embodiments, the second opening 122 may not penetrate through the substrate 110, and the conductive material 138 is filled to electrically couple the first conductive layer pattern 130a and the second conductive layer pattern 132 a. Or the third opening 122 is partially filled with the third conductive layer 136, the third conductive layer 136 has a third opening 1363, and the third opening 1363 is filled with the conductive material 138 electrically coupled to the first conductive layer pattern 130a and the second conductive layer pattern 132 a.

Then, referring to fig. 1K, the chip 170 is disposed on the surface 110a of the substrate 110. The chip 170 has a plurality of pads 172, so that the chip 170 can be bonded to the surface treatment layer 160 through the pads 172 and the solder balls 180. In some embodiments, the chip 170 may also be bonded to the solder balls 180 through the pads 172 and electrically coupled to the conductive material 138. In addition, in the present embodiment, the chip 170 may include a radio frequency (radio frequency) chip, a phase shifter, a power amplifier (power amplifier), or a high speed digital chip (high speed digital IC), but is not limited thereto. Thus, the electronic device 100 of the present embodiment is completed.

In summary, in the manufacturing method of the electronic device according to the embodiment of the disclosure, since the third conductive layer can contact and electrically couple the first conductive layer and the second conductive layer, the signal from the other surface of the substrate can be transmitted to the surface of the substrate through the third conductive layer by the shortest line distance (i.e., the thickness of the substrate), so that the manufacturing method of the electronic device according to the embodiment of the disclosure has the effect of shortening the signal transmission distance. In addition, since the conductive material is disposed in the third opening, the conductive material can be electrically coupled to the first conductive layer and the second conductive layer through the third conductive layer, and the disposition of the conductive material can also have an effect of shortening the distance of signal transmission.

Finally, it should be noted that: the above embodiments are only used for illustrating the technical solutions of the present disclosure, and not for limiting the same; while the present disclosure has been described in detail with reference to the foregoing embodiments, it will be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; such modifications and substitutions do not depart from the spirit and scope of the disclosed embodiments.

Claims (10)

1. A method of manufacturing an electronic device, comprising:

providing a substrate;

forming a first opening so that the first opening penetrates through the substrate; and

forming a polymer layer in the first opening;

the polymer layer contacts the sidewall of the substrate at the first opening.

2. The method of manufacturing an electronic device according to claim 1, further comprising:

forming a first conductive layer pattern on the surface of the substrate; and

and forming a second conductive layer pattern on the other surface of the substrate, wherein the other surface is opposite to the surface.

3. The method of manufacturing an electronic device according to claim 2, further comprising:

forming a second opening in the polymer layer.

4. The method of manufacturing an electronic device according to claim 3, further comprising:

forming a conductive material in the second opening, the conductive material electrically coupling the first conductive layer pattern and the second conductive layer pattern.

5. The method of manufacturing an electronic device according to claim 3, further comprising:

and forming a third conductive layer in the second opening.

6. The method of manufacturing an electronic device according to claim 5, further comprising:

the third conductive layer partially fills the second opening, and the third conductive layer has a third opening.

7. The method according to claim 6, wherein the third opening penetrates the third conductive layer.

8. The method of manufacturing an electronic device according to claim 7, further comprising:

forming a conductive material in the third opening.

9. The method of claim 8, wherein the conductive material electrically couples the first conductive layer pattern and the second conductive layer pattern.

10. The method of manufacturing an electronic device according to claim 6, further comprising:

forming another polymer layer in the third opening.

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