CN114647120B - Liquid crystal handwriting board and control method thereof - Google Patents

Liquid crystal handwriting board and control method thereof Download PDF

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Publication number
CN114647120B
CN114647120B CN202210247920.8A CN202210247920A CN114647120B CN 114647120 B CN114647120 B CN 114647120B CN 202210247920 A CN202210247920 A CN 202210247920A CN 114647120 B CN114647120 B CN 114647120B
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voltage
thin film
film transistor
gate
liquid crystal
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CN202210247920.8A
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CN114647120A (en
Inventor
葛杨
赵宇
张勇
王建
王先
马建威
安亚帅
石磊
关星星
韩天洋
王修亮
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Shandong Lanbeisite Educational Equipment Group
BOE Technology Group Co Ltd
Beijing BOE Optoelectronics Technology Co Ltd
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Shandong Lanbeisite Educational Equipment Group
BOE Technology Group Co Ltd
Beijing BOE Optoelectronics Technology Co Ltd
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Priority to CN202210247920.8A priority Critical patent/CN114647120B/en
Publication of CN114647120A publication Critical patent/CN114647120A/en
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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/137—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells characterised by the electro-optical or magneto-optical effect, e.g. field-induced phase transition, orientation effect, guest-host interaction or dynamic scattering
    • G02F1/139—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells characterised by the electro-optical or magneto-optical effect, e.g. field-induced phase transition, orientation effect, guest-host interaction or dynamic scattering based on orientation effects in which the liquid crystal remains transparent
    • G02F1/1391—Bistable or multi-stable liquid crystal cells
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/033—Pointing devices displaced or positioned by the user, e.g. mice, trackballs, pens or joysticks; Accessories therefor
    • G06F3/0354—Pointing devices displaced or positioned by the user, e.g. mice, trackballs, pens or joysticks; Accessories therefor with detection of 2D relative movements between the device, or an operating part thereof, and a plane or surface, e.g. 2D mice, trackballs, pens or pucks
    • G06F3/03547—Touch pads, in which fingers can move on a surface
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3674—Details of drivers for scan electrodes
    • G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Nonlinear Science (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Chemical & Material Sciences (AREA)
  • Optics & Photonics (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Human Computer Interaction (AREA)
  • Liquid Crystal (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Liquid Crystal Display Device Control (AREA)

Abstract

The liquid crystal handwriting board provided by the embodiment of the application comprises a liquid crystal panel and a driving circuit which are mutually and electrically connected; the liquid crystal panel comprises a first substrate, a second substrate and a bistable liquid crystal layer, wherein the first substrate comprises a plurality of thin film transistors; when the liquid crystal handwriting board needs to erase the erasing area, the driving circuit is configured to determine gate-on voltage and gate-off voltage, send the gate-on voltage to the thin film transistor in the erasing area, send the gate-off voltage to the thin film transistor in the target area, wherein the target area is an area included in the non-erasing area, and the thin film transistor in the target area is connected with the thin film transistor in the erasing area by different gate lines, wherein the magnitude of the gate-off voltage can be adjusted, so that the thin film transistor in the target area of the liquid crystal handwriting board keeps an off state when receiving the gate-off voltage. Therefore, the thin film transistor in the target area can be completely turned off, the pixel electrode in the non-erasing area is prevented from being charged, and the phenomenon of error erasure is prevented.

Description

Liquid crystal handwriting board and control method thereof
Technical Field
The application relates to the technical field of display, in particular to a liquid crystal handwriting board and a control method thereof.
Background
The liquid crystal handwriting board is used as a simple input device, can realize the requirements of writing and drawing, and is favored by the vast users. At present, most of liquid crystal handwriting boards are made of bistable liquid crystals, in order to facilitate local erasure, pixel units arranged in an array are arranged on a lower substrate, and each pixel unit is independently controlled through a thin film transistor, so that an erasure unit can be smaller. When the liquid crystal handwriting board is erased, the thin film transistor in the erasing area needs to be turned on, and the thin film transistor in the non-erasing area needs to be turned off.
However, in the conventional liquid crystal handwriting pad, a part of the thin film transistors in the non-erasing area cannot be completely turned off, so that leakage current exists in a part of the thin film transistors in the non-erasing area, and a phenomenon of being erased by mistake occurs in the non-erasing area.
Disclosure of Invention
The application provides a liquid crystal handwriting board and a control method thereof aiming at the defects of the prior art, which are used for solving the problem that the liquid crystal handwriting board in the prior art is erased by mistake in a non-erasing area.
In a first aspect, an embodiment of the present application provides a liquid crystal handwriting pad, including a liquid crystal panel and a driving circuit electrically connected to each other;
The liquid crystal panel comprises a first substrate, a second substrate and a bistable liquid crystal layer, wherein the first substrate and the second substrate are oppositely arranged, the bistable liquid crystal layer is arranged between the first substrate and the second substrate, and the first substrate comprises a plurality of thin film transistors arranged in an array;
the driving circuit is configured to determine a gate-on voltage and a gate-off voltage when the liquid crystal handwriting board needs to erase the erasing area;
transmitting a gate-on voltage to a thin film transistor in an erasing area, and transmitting a gate-off voltage to a thin film transistor in a target area, wherein the target area is an area included in a non-erasing area, and the thin film transistor in the target area is connected with different gate lines to perform an erasing operation on an erasing area of a liquid crystal handwriting board;
the magnitude of the gate turn-off voltage can be adjusted, so that the thin film transistor of the target area of the liquid crystal handwriting board is kept in a turn-off state when the gate turn-off voltage is received.
Optionally, the driving circuit includes an adjustment module configured to adjust a magnitude of the gate-off voltage; and/or the adjusting module is configured to adjust the magnitude of the gate-on voltage.
Optionally, the driving circuit further includes a storage module configured to pre-store a corresponding relationship between a gate-off voltage and a source voltage, and/or configured to pre-store a corresponding relationship between a gate-on voltage and a source voltage;
the adjusting module is configured to adjust the gate turn-off voltage according to a corresponding relation between the turn-off voltage and the source voltage pre-stored in the storage module, and/or the adjusting module is configured to adjust the gate turn-on voltage according to a corresponding relation between the turn-on voltage and the source voltage pre-stored in the storage module.
Optionally, the liquid crystal handwriting board further comprises a detection device;
the detection device is configured to detect a source voltage of a thin film transistor sent to a target area when the liquid crystal handwriting board needs to erase an erasing area, and send the source voltage to the driving circuit;
the driving circuit judges whether the grid electrode cut-off voltage needs to be regulated according to the current source electrode voltage sent by the detection device and the corresponding relation between the grid electrode cut-off voltage and the source electrode voltage; and if the adjustment is needed, adjusting the output grid turn-off voltage.
Optionally, the liquid crystal handwriting board further comprises a detection device;
the detection device is configured to detect a source voltage of a thin film transistor sent to the erasing area when the liquid crystal handwriting board needs to erase the erasing area, and send the source voltage to the driving circuit;
the driving circuit judges whether the grid electrode opening voltage needs to be regulated according to the current source electrode voltage and the corresponding relation between the grid electrode opening voltage and the source electrode voltage sent by the detection device, and if the grid electrode opening voltage needs to be regulated, the magnitude of the output grid electrode opening voltage is regulated.
Optionally, the second substrate is a flexible substrate.
Optionally, the first substrate includes:
a first substrate;
the thin film transistor is arranged on the first substrate and comprises a grid electrode, a source electrode, a drain electrode and an active layer;
and the pixel electrode is arranged on one side of the thin film transistor, which is far away from the first substrate, and is electrically connected with the source electrode and the drain electrode.
Optionally, the display device further comprises a common electrode positioned on the second substrate and a pixel electrode positioned on the first substrate;
the first substrate comprises a plurality of grid lines extending along a first direction and a plurality of data lines extending along a second direction, wherein the grid lines are electrically connected with the grid electrodes of the thin film transistors, the data lines are electrically connected with the source electrodes of the thin film transistors, and the pixel electrodes are electrically connected with the drain electrodes of the thin film transistors;
The first direction and the second direction are different;
the grid line is used for transmitting the grid on voltage and the grid off voltage provided by the driving circuit to the thin film transistor; the data line is used for transmitting the source voltage provided by the driving circuit to the thin film transistor.
In a second aspect, an embodiment of the present application provides a method for controlling a liquid crystal handwriting pad, including:
when the liquid crystal handwriting board needs to erase the erasing area, a source voltage is sent to a thin film transistor in the erasing area and a thin film transistor connected with the same data line as the thin film transistor in the erasing area;
transmitting a gate-on voltage to the thin film transistor in the erasing area, and transmitting a gate-off voltage to the thin film transistor in the target area, wherein the target area is an area included in the non-erasing area, and the thin film transistor in the target area is connected with different gate lines with the thin film transistor in the erasing area;
the magnitude of the gate turn-off voltage can be adjusted, so that the thin film transistor in the target area can be kept in a turn-off state when the gate turn-off voltage is received.
Optionally, the liquid crystal handwriting board further includes a detection device, and the sending the gate turn-off voltage to the thin film transistor in the target area includes:
Detecting a source voltage of a thin film transistor transmitted to the same data line as the thin film transistor in the erase region;
and determining whether the grid electrode turn-off voltage needs to be regulated according to the source electrode voltage and the corresponding relation between the pre-stored source electrode voltage and the grid electrode turn-off voltage, if so, regulating the grid electrode turn-off voltage and then sending the regulated grid electrode turn-off voltage to a thin film transistor in a target area, otherwise, directly sending the grid electrode turn-off voltage to the thin film transistor in the target area.
Optionally, the sending the gate-on voltage to the thin film transistor in the erase region includes:
detecting a source voltage sent to a thin film transistor in the erase region;
and determining whether the grid electrode starting voltage needs to be regulated according to the source electrode voltage and the corresponding relation between the pre-stored grid electrode starting voltage and the source electrode voltage, if so, regulating the grid electrode starting voltage and then sending the regulated grid electrode starting voltage to the thin film transistor in the erasing area, otherwise, directly sending the grid electrode starting voltage to the thin film transistor in the erasing area.
Optionally, sending a source voltage to the thin film transistor in the erase region and the thin film transistor connected to the same data line as the thin film transistor in the erase region includes:
Determining a preset time corresponding to the current source voltage according to a pre-stored corresponding relation between the source voltage and the continuous transmission time of the source voltage;
and controlling the continuous sending time of the source voltage to enable the continuous sending time to be the preset time.
The technical scheme provided by the embodiment of the application at least has the following beneficial effects:
the liquid crystal handwriting board provided by the embodiment of the application comprises a liquid crystal panel and a driving circuit which are mutually and electrically connected; the liquid crystal panel comprises a first substrate, a second substrate and a bistable liquid crystal layer, wherein the first substrate and the second substrate are oppositely arranged, the bistable liquid crystal layer is arranged between the first substrate and the second substrate, and the first substrate comprises a plurality of thin film transistors arranged in an array; when the liquid crystal handwriting board needs to erase the erasing area, the driving circuit is configured to determine gate-on voltage and gate-off voltage, send the gate-on voltage to the thin film transistor in the erasing area, send the gate-off voltage to the thin film transistor in the target area, wherein the target area is an area included in the non-erasing area, and the thin film transistor in the target area is connected with the thin film transistor in the erasing area by different gate lines, wherein the magnitude of the gate-off voltage can be adjusted, so that the thin film transistor in the target area of the liquid crystal handwriting board keeps an off state when receiving the gate-off voltage. By enabling the grid electrode cut-off voltage sent by the driving circuit to be adjustable, when the voltage of the thin film transistor which can be completely cut-off is changed due to the increase of the source electrode voltage, the driving circuit can send the adjusted grid electrode cut-off voltage to the thin film transistor in the target area, so that the thin film transistor in the target area can be completely cut-off, the pixel electrode in the non-erasing area is prevented from being charged, and the phenomenon of error erasure is prevented.
Additional aspects and advantages of the application will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the application.
Drawings
The foregoing and/or additional aspects and advantages of the application will become apparent and readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings, in which:
FIG. 1 is a timing diagram of a pixel voltage of a liquid crystal display panel according to the related art when a source voltage is low;
FIG. 2 is a timing diagram of a pixel voltage of a liquid crystal display panel according to the related art when a source voltage is high;
fig. 3 is a schematic structural diagram of a liquid crystal handwriting board according to an embodiment of the present application;
FIG. 4 is a schematic diagram of a pixel structure of a liquid crystal handwriting board;
FIG. 5 is a schematic diagram of a film structure of a liquid crystal handwriting board;
FIG. 6 is a transfer characteristic curve of a TFT in a liquid crystal display panel according to an embodiment of the present application when a source voltage is 20V;
FIG. 7 is a graph showing transfer characteristics of thin film transistors under different source voltages in a liquid crystal display panel according to an embodiment of the present application;
fig. 8 is a flow chart of a control method of a liquid crystal handwriting board according to an embodiment of the application.
In the figure:
10-a liquid crystal handwriting board; 11-a liquid crystal panel; 12-a driving circuit; 110-a bistable liquid crystal layer; 111-a first substrate; 112-a second substrate; a 100-thin film transistor; 101-gate lines; 102-data lines; 121-an adjustment module; 122-a drive module; 123-detecting means; 130-pixel electrodes; 131-a common electrode; 124-a memory module;
1001-gate; 1002-an active layer; 1003-source drain electrode layer; 1004-a first insulating layer; 1005-a second insulating layer; 200-liquid crystal molecules; 1110-a first substrate; 1120-a second substrate;
21-an erase region; 22-non-erase region.
Detailed Description
The present application is described in detail below, examples of embodiments of the application are illustrated in the accompanying drawings, wherein the same or similar reference numerals refer to the same or similar components or components having the same or similar functions throughout. Further, if detailed description of the known technology is not necessary for the illustrated features of the present application, it will be omitted. The embodiments described below by referring to the drawings are illustrative only and are not to be construed as limiting the application.
It will be understood by those skilled in the art that all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs unless defined otherwise. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the prior art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.
As used herein, the singular forms "a", "an", "the" and "the" are intended to include the plural forms as well, unless expressly stated otherwise, as understood by those skilled in the art. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. It will be understood that when an element is referred to as being "connected" or "coupled" to another element, it can be directly connected or coupled to the other element or intervening elements may also be present. Further, "connected" or "coupled" as used herein may include wirelessly connected or wirelessly coupled. The term "and/or" as used herein includes all or any element and all combination of one or more of the associated listed items.
The liquid crystal handwriting board has the advantages of low power consumption and clear handwriting as one of the liquid crystal handwriting boards, and occupies a large market share in recent years. The liquid crystal handwriting board generally comprises two substrates which are oppositely arranged, and a bistable liquid crystal layer which is positioned between the two substrates and comprises bistable liquid crystal molecules. The bistable liquid crystal molecules have a Planar Texture state (P-state for short), a focal conic Texture state (Focal Conic Texture FC-state for short) and a vertical Texture state (Hometropic Texture H-state for short). The P state and the FC state are stable states, the P state and the FC state can be kept without voltage, the H state is unstable, and the P state and the FC state are displayed when the voltage is continuously transmitted.
When the liquid crystal handwriting board receives external pressure, bistable liquid crystal molecules in the bistable liquid crystal layer are turned to be in a P state under the action of the external pressure, visible light can be reflected, and writing is displayed in the area of the liquid crystal handwriting board receiving the external pressure; when handwriting is required to be erased, the thin film transistor in the erasing area is controlled to be started and source voltage is sent to the thin film transistor so as to charge the pixel electrode in the erasing area, so that a voltage difference is formed between the pixel electrode in the erasing area and the common electrode, bistable liquid crystal molecules positioned in the erasing area are rearranged into an FC state under the action of the voltage difference, visible light is not reflected, and handwriting written in the erasing area can be erased; meanwhile, the pixel electrode in the non-erasing area is controlled not to be charged, handwriting in the non-erasing area is not changed, and therefore local erasing of the liquid crystal handwriting board can be achieved.
Specifically, referring to fig. 1, 2 and 4, a source voltage is sent to the thin film transistor 100 corresponding to the erase region 21 (the same source voltage is applied to the thin film transistor 100 in the same column as the thin film transistor 100 in the erase region 21, the source voltage is not applied to the thin film transistors 100 in other columns), and a gate-on voltage is sent to the thin film transistor 100 in the erase region 21 through the gate line 101 (the same gate-on voltage is applied to the thin film transistor 100 in the same row as the thin film transistor 100 in the erase region 21), and a gate-off voltage is applied to the thin film transistor 100 in a different row from the thin film transistor 100 in the erase region 21 through the gate line 101 (i.e., the target region in fig. 4, the region included in the non-erase region). The thin film transistor 100 (i.e., the thin film transistor 100 in the erase region of fig. 4) to which the gate turn-on voltage and the source voltage are simultaneously applied is turned on, the pixel electrode 130 in the erase region 21 is charged, a voltage difference is formed between the pixel electrode 130 in the erase region 21 and the common electrode, bistable liquid crystal molecules located in the erase region 21 are turned back to the FC state under the voltage difference, and writing in the erase region 21 can be erased. The thin film transistor 100 in the non-erase region 22 is in an off state, the pixel electrode 130 in the non-erase region 22 is not charged, and writing in the non-erase region 22 is not changed.
The inventors of the present application considered that since the liquid crystal molecules become difficult to invert with the increase of the use time, it was necessary to make a larger voltage difference between the pixel electrode and the common electrode, that is, it was necessary to send a larger source voltage to the thin film transistor. However, as the source voltage increases, the transfer characteristic curve of the thin film transistor shifts, and the gate turn-off voltage of the thin film transistor also changes (it is generally considered that the leakage current of the thin film transistor is less than 10 -10 In the off state at a). As shown in fig. 1, 2 and 4, when the source voltage increases, if the gate turn-off voltage of the thin film transistor 100 sent to the first sub-target area and the second sub-target area in the non-erase area 22 is kept unchanged, the first sub-target area and the second sub-target area may be used as target areas, so that the thin film transistor 100 in the second sub-target area in the non-erase area 22 (the thin film transistor 100 in the same column as the thin film transistor 100 in the erase area 21 in fig. 4) cannot be completely turned off, the pixel electrode in the second sub-target area may be charged, so that bistable liquid crystal molecules in the second sub-target area deflect, and handwriting in the non-erase area is macroscopically erased, that is, an erroneous erase phenomenon appears, which affects the use of the liquid crystal handwriting board.
The application provides a liquid crystal handwriting board and a control method thereof, which aim to solve the technical problems in the prior art.
The liquid crystal handwriting board and the control method thereof provided by the embodiment of the application are described in detail below with reference to the accompanying drawings.
First, an embodiment of the present application provides a liquid crystal handwriting board 10, as shown in fig. 3 and 4, including a liquid crystal panel 11 and a driving circuit 12 electrically connected to each other;
the liquid crystal panel 11 includes a first substrate 111 and a second substrate 112 disposed opposite to each other, and a bistable liquid crystal layer 110 disposed between the first substrate 111 and the second substrate 112, the first substrate 111 including a plurality of thin film transistors 100 disposed in an array;
the driving circuit 12 is configured to determine a gate-on voltage and a gate-off voltage when the liquid crystal handwriting board 10 needs to erase the erase region 21;
transmitting a gate-on voltage to the thin film transistor 100 in the erase region 21, transmitting a gate-off voltage to the thin film transistor 100 in the target region, which is a region included in the non-erase region 22, and connecting the thin film transistor 100 in the target region and the thin film transistor 100 in the erase region 21 to different gate lines 101 to perform an erase operation on the erase region 21 of the liquid crystal display panel 10;
The gate-off voltage can be adjusted, so that the thin film transistor 100 in the target area of the liquid crystal handwriting board 10 maintains the off state when receiving the gate-off voltage.
Specifically, as shown in fig. 3, 4 and 5, the liquid crystal handwriting board 10 includes a first substrate 111 and a second substrate 112 disposed opposite to each other, and a bistable liquid crystal layer 110 disposed between the first substrate 111 and the second substrate 112, the first substrate 111 includes a plurality of thin film transistors 100 disposed in an array and a pixel electrode 130, the thin film transistors 100 include a gate electrode 1001, an active layer 1002 and a source drain 1003, the source drain 1003 is electrically connected to the data line 102, the gate electrode 1001 is electrically connected to the gate line 101, a first insulating layer 1004 is disposed between the gate electrode 1001 and the active layer 1002, and a second insulating layer 1005 is disposed between the pixel electrode 130 and the source drain 1003. The gate line 101 extends in a first direction in fig. 4, and the data line 102 extends in a second direction in fig. 4, the first direction crossing the second direction. The source and drain electrodes 1003 and 130 of the thin film transistor 100 are electrically connected, and the second substrate 112 includes a common electrode 131. The bistable liquid crystal layer 110 includes bistable liquid crystal molecules, and when a voltage difference exists between the pixel electrode 130 and the common electrode 131, the bistable liquid crystal molecules deflect under the action of an electric field force. When the liquid crystal handwriting board 10 receives external pressure, bistable liquid crystal molecules are turned to be in a P state, visible light can be reflected, and the area of the liquid crystal handwriting board 10 pressed by external force displays written handwriting. Alternatively, referring to fig. 5, the second substrate 112 is a flexible substrate, that is, the second substrate 1120 is made of a flexible material, so that the force is more easily transferred to the bistable liquid crystal layer 110 when the external pressure is applied, which is beneficial to improving the writing effect of the liquid crystal handwriting board 10.
As shown in fig. 3 and 4, when writing is required to be erased, the source driving circuit (not shown in fig. 3) in the driving circuit 12 sends a source voltage to the thin film transistor 100 corresponding to the erase region 21 through the data line 102 (the same column of thin film transistors 100 as the thin film transistor 100 in the erase region 21 is also applied with the source voltage, and the thin film transistors 100 in other columns are not applied with the source voltage), and simultaneously sends a gate-on voltage to the thin film transistor 100 in the erase region 21 through the gate line 101 (the same row of thin film transistors 100 as the thin film transistor 100 in the erase region 21 is also applied with the gate-on voltage), and applies a gate-off voltage to the thin film transistor 100 in a different row from the thin film transistor 100 in the erase region 21 through the gate line 101 (i.e., the thin film transistors in the first sub-target region and the second sub-target region in fig. 4). The thin film transistor 100 (i.e., the thin film transistor 100 in the erase region of fig. 4) to which the gate-on voltage and the source voltage are applied is turned on, the pixel electrode 130 in the erase region 21 is charged, a voltage difference is formed between the pixel electrode 130 in the erase region 21 and the common electrode, bistable liquid crystal molecules located in the erase region 21 are turned back to the FC state by the voltage difference, and writing written in the erase region 21 can be erased. The thin film transistor 100 in the non-erase region 22 is in an off state, the pixel electrode 130 in the non-erase region 22 is not charged, and writing in the non-erase region 22 is not changed.
It should be noted that the output of the thin film transistor 100 can be usedThe magnitude of the current (drain current of the thin film transistor 100) is used to determine whether the thin film transistor 100 is completely turned off, and when the output current of the thin film transistor 100 is less than 10 -10 At a, the thin film transistor 100 is considered to be in a fully off state, otherwise the thin film transistor 100 is considered to be on.
It should be noted that, as shown in fig. 4, the non-erasing area 22 in the embodiment of the present application includes a first sub-target area, a second sub-target area and a third sub-target area, in which the sending of the gate-off voltage to the thin film transistor in the target area refers to sending of the gate-off voltage to the thin film transistor in the second sub-target area, and the thin film transistor in the third sub-target area is located in the same row as the thin film transistor in the erasing area 21, so that the thin film transistor in the third sub-target area receives the gate-on voltage, and the thin film transistor in the third sub-target area is also in the off state, that is, the thin film transistor in the third sub-target area is not charged because the source voltage is not applied to the thin film transistor in the third sub-target area; similarly, the source voltage is not applied to the thin film transistor in the first sub-target area, and therefore the thin film transistor in the first sub-target area is also in an off state, that is, the thin film transistor in the first sub-target area is not charged either. In practice, since the source voltage is applied only to the thin film transistor in the second sub-target area during the erasing process, it is only necessary to ensure that the thin film transistor in the second sub-target area is completely turned off.
It should be noted that, in the embodiment of the present application, before sending the gate-off voltage to the thin film transistor in the target area, the determined gate-off voltage (which may be considered as the initial gate-off voltage) needs to be determined, if it is determined that there is a false erasure in the second sub-target area (the specific determination method will be described in detail below), the determined gate-off voltage is adjusted (i.e., the initial gate-off voltage is adjusted), and the adjusted gate-off voltage is sent to the thin film transistor in the target area; if it is determined that the second sub-target area is not erased by mistake, the determined gate turn-off voltage is directly sent to the thin film transistor in the target area (i.e., the initial gate turn-off voltage is sent to the thin film transistor in the target area).
In an embodiment of the present application, as shown in fig. 3, the driving circuit 12 includes an adjustment module 121, the adjustment module 121 is configured to adjust the magnitude of the gate-off voltage, and/or the adjustment module 121 is configured to adjust the magnitude of the gate-on voltage. Specifically, during the use of the liquid crystal handwriting board 10, firstly, whether the second sub-target area is erased by mistake is judged, and if so, the magnitude of the gate turn-off voltage is adjusted by the adjusting module 121; in specific implementation, determining whether the second sub-target area has erroneous erasure includes: and the user judges whether the second sub-target area is erased by mistake or not through observation of the erased state, and then manually adjusts the gate turn-off voltage.
Referring to fig. 4, when the writing on the liquid crystal handwriting board 10 is erased, if the writing on the area where the writing is to be kept (the area where the erasing is to be avoided, i.e. the second sub-target area in fig. 4) is found to be diluted, it is indicated that the characteristics of the thin film transistor 100 in the second sub-target area have been shifted at this time, and the gate-off voltage of the thin film transistor 100 sent by the driving module 122 to the second sub-target area cannot completely turn off the thin film transistor 100. At this time, the user can manually adjust the gate turn-off voltage, so that the thin film transistor 100 in the second sub-target area can be completely turned off, and the occurrence of the error erasure phenomenon is avoided. Specifically, the adjusting module 121 may be a knob disposed in the liquid crystal handwriting board 10, where the knob may correspond to a plurality of adjusting gears, when a user finds that the writing of the second sub-target area is diluted, the user may observe the writing change condition of the second sub-target area by rotating the knob, and when the writing of the second sub-target area is diluted and returns to be the same as other writing, the user stops rotating the knob, and the gate-off voltage adjustment is completed, and the driving module 122 sends the gate-off voltage after current adjustment to the thin film transistor of the second sub-target area so as to turn off the thin film transistor of the second sub-target area; the manual adjustment mode of the gate turn-off voltage can be determined according to practical situations.
It should be noted that, as the usage time increases, the deflection of the liquid crystal molecules in the liquid crystal writing pad 10 becomes difficult, and the erasing effect of the erasing area 21 is poor, so that the source voltage to be sent to the thin film transistor 100 needs to be increased to completely deflect the liquid crystal molecules in the erasing area 21. Specifically, the source voltage may be manually increased by observing the erased state in the erase region 21, or may be automatically increased according to a specific value, for example, according to the characteristics (channel length-width ratio, etc.) of the thin film transistor 100 in the liquid crystal handwriting pad 10, the initial source driving voltage is set to 15v (to ensure that the leakage current reaches a certain requirement when the thin film transistor 100 is turned on), and then increased to 20v,25v, etc.
Referring to fig. 3, the driving circuit further includes a memory module 124, where the memory module 124 is configured to pre-store a corresponding relationship between a gate-off voltage and a source voltage, and/or is configured to pre-store a corresponding relationship between a gate-on voltage and a source voltage; the adjusting module 121 is configured to adjust the gate-off voltage according to a correspondence between the off voltage and the source voltage pre-stored in the memory module 124, and/or the adjusting module 121 is configured to adjust the gate-on voltage according to a correspondence between the on voltage and the source voltage pre-stored in the memory module 124. In specific implementation, the storage module 124 may be located inside the adjustment module 121, or may be located outside the adjustment module 121; when the signal transmission device is positioned outside the adjusting module 121, the signal transmission device is connected with the adjusting module 121.
Specifically, the thin film transistor 100 to be employed in the liquid crystal handwriting board 10 is tested before the liquid crystal handwriting board 10 is manufactured. A fixed voltage is sent to the source electrode of the thin film transistor 100, then different voltages are sent to the gate electrode of the thin film transistor 100, the magnitude of the drain current of the thin film transistor 100 under the different gate voltages is measured, the values of the different gate voltages and the drain current are recorded, and a curve is drawn, so that a transfer characteristic curve of the thin film transistor 100 can be obtained, as shown in fig. 6. Similarly, by changing the source voltage of the thin film transistor 100, transfer characteristic curves of the thin film transistor 100 corresponding to a plurality of different source voltages can be obtained, as shown in fig. 7. According to the transfer characteristic curve, the corresponding relationship between the gate-off Voltage (VGL), the gate-on Voltage (VGH), the source voltage and the output current can be obtained, and the corresponding relationship between the gate-off voltage and the source voltage is pre-stored in the memory module 124. The magnitude of the output current (drain current) of the thin film transistor 100 is related to the magnitude of the source voltage and the self-structural characteristics of the thin film transistor 100 (channel aspect ratio of the thin film transistor 100). In an embodiment of the present application, the thin film transistor 100 has a channel aspect ratio of 50 μm/4 μm, and the transfer characteristic curve obtained by the test is for a thin film transistor having a channel aspect ratio of 50 μm/4 μm. It will be appreciated that the structure of the thin film transistor 100 in practical applications may be determined according to the specific situation.
As shown in fig. 6, when the source voltage is 20V, the output current of the thin film transistor 100 is less than 10 -10 A, the gate-off voltage needs to be between-11V and-2V, i.e., the optimum range of gate-off voltage is between-11V and-2V. The optimal range of the specific gate-off voltage can be determined according to practical situations.
Optionally, in an embodiment of the present application, as shown in fig. 3, the liquid crystal handwriting board 10 further includes a detecting device 123, where the detecting device 123 is configured to detect a source voltage sent to the thin film transistor 100 in the target area and send the source voltage to the driving module 122 when the liquid crystal handwriting board needs to erase the erasing area; the driving module 122 determines whether the gate-off voltage needs to be adjusted according to the current source voltage sent by the detecting device 123 and the corresponding relationship between the gate-off voltage and the source voltage; and if the adjustment is needed, adjusting the magnitude of the output gate-off voltage.
Specifically, as shown in fig. 3 and fig. 4, the detecting device 123 is electrically connected to the adjusting module 121, and when the liquid crystal handwriting board 10 is erased, the detecting device 123 detects the source voltage sent to the thin film transistor 100 in the target area 22 in real time, and sends the detected result to the adjusting module 121; the adjusting module 121 is configured to adjust the current gate-off voltage to be within a preset value range according to the current source voltage sent by the detecting device 123 and the corresponding relationship between the pre-stored gate-off voltage and the source voltage. When the source voltages are different, the output current of the thin film transistor 100 is made small At 10 -10 The optimum range of gate-off voltages for a is also different. As shown in fig. 7, when the source voltage is 20V, the output current of the thin film transistor 100 is less than 10 -10 A, the gate-off voltage needs to be between-11V and-2V, i.e., the optimum range of gate-off voltage is between-11V and-2V. The optimal range of the specific gate-off voltage can be determined according to practical situations.
Referring to fig. 3 and 4, when the liquid crystal handwriting board 10 is erased, the detecting device 123 detects the source voltage of the thin film transistor 100 in the target area in real time, and sends the detected source voltage to the adjusting module 121. The adjusting module 121 determines an optimal range of the gate-off voltage corresponding to the source voltage according to the pre-stored correspondence between the gate-off voltage and the source voltage, adjusts the current gate-off voltage to be within the optimal range, sends the adjusted gate-off voltage to the driving module 122, and the driving module 122 sends the adjusted gate-off voltage to the thin film transistor 100 in the target area, so that the output current of the thin film transistor 100 in the target area is less than 10 -10 A, the turning off of the thin film transistor 100 in the non-erase region 22 is ensured, and the occurrence of erroneous erasure is avoided.
Optionally, the optimum value of the gate turn-off voltage can be determined through the transfer characteristic curve, and the gate turn-off voltage is adjusted to the optimum value, so that the occurrence of the erroneous erasure phenomenon can be avoided to the greatest extent. As shown in fig. 7, when the source voltage is 20V, the output current is the smallest when the gate-off voltage is-5V, so-5V is the optimal value of the gate-off voltage; as shown in fig. 7, when the source voltage is 30V, the output current is the smallest at-3V, so-3V is the optimal value of the gate-off voltage. The optimum value of the gate-off voltage can be determined according to the actual situation. By adjusting the gate turn-off voltage to an optimal value, the leakage current of the thin film transistor in the target region in fig. 4 can be minimized (even if the thin film transistor in the non-erase region is completely turned off), thereby avoiding the occurrence of the erroneous erase phenomenon to the greatest extent. Table 1 below shows the values of the gate-off voltage at different source voltages when the output current of the thin film transistor 100 is at a minimum: in table 1, the first column indicates the source voltage of the thin film transistor applied to the erase region at the time of erasing, the second column indicates the minimum output current of the thin film transistors of the first and second sub-target regions, and the third column indicates the optimal gate-off voltage of the thin film transistor applied to the first and second sub-target regions.
TABLE 1
The source voltage is detected in real time, and the gate turn-off voltage is regulated in real time according to the detection result, so that regulation is more convenient and intelligent, and error erasure phenomenon is avoided. It should be noted that, the transfer characteristic curves of the thin film transistor 100 in fig. 7 only include five cases that the source voltages are 15V, 20V, 30V, 40V and 50V, and in the practical use process, the transfer characteristic curves of the thin film transistor 100 under more different source voltages can be tested, and the corresponding relationship between the gate-off voltage and the source voltage is pre-stored in the memory module 124 according to the transfer characteristic curves, so that the adjustment of the gate-off voltage can be more accurate.
Optionally, in an embodiment of the present application, the detecting device 123 is configured to detect the source voltage of the thin film transistor 100 sent to the erasing area 21 and send the source voltage to the driving module 122 when the liquid crystal handwriting board 10 needs to erase the erasing area 21; the driving module 122 determines whether the gate-on voltage needs to be adjusted according to the current source voltage and the corresponding relationship between the gate-on voltage and the source voltage sent by the detecting device 123, and adjusts the output gate-on voltage if the gate-on voltage needs to be adjusted.
Specifically, the thin film transistor 100 to be employed in the liquid crystal handwriting board 10 is tested before the liquid crystal handwriting board 10 is manufactured. Transmitting a fixed voltage to the source of the thin film transistor 100, then transmitting different voltages to the gate of the thin film transistor 100, and measuring the drain current of the thin film transistor 100 under different gate voltages to obtain different gatesThe values of the electrode voltage and the drain current are recorded and plotted to obtain a transfer characteristic curve of the thin film transistor 100. The drain current of the thin film transistor 100 is related to the source voltage and the self-structural characteristics of the thin film transistor 100 (the channel aspect ratio of the thin film transistor 100). It is generally considered that when the drain current of the thin film transistor 100 is 10 or more -5 At a, the thin film transistor 100 has better turn-on performance, i.e., is in a fully on state. In the embodiment of the present application, the aspect ratio of the channel of the thin film transistor 100 is 50 μm/4 μm, the transfer characteristic curves of the thin film transistor 100 under different source voltages are measured, the output current and the corresponding gate voltage in each transfer characteristic curve under different source voltages can be obtained from the transfer characteristic curves, that is, the corresponding relationship between the gate-off voltage and the source voltage, and the corresponding relationship between the gate-off voltage and the source voltage is pre-stored in the memory module 124 as a preset condition. The adjusting module 121 is configured to adjust the magnitude of the gate-on voltage according to the corresponding relationship between the gate-off voltage and the source voltage, and the driving module 122 sends the adjusted gate-on voltage to turn on the thin film transistor 100 in the erase region 21, so that the pixel electrode 130 in the erase region 21 can be charged better, which is beneficial to improving the erase effect.
Optionally, in an embodiment of the present application, the liquid crystal handwriting board 10 includes a detecting device 123, where the detecting device 123 is configured to detect, in real time, a source voltage sent to the thin film transistor 100 in the erasing area 21 and send the source voltage to the adjusting module 121 when the liquid crystal handwriting board 10 is erased; the storage module 124 is configured to pre-store a corresponding relationship between the gate-on voltage and the source voltage, and the adjusting module 121 is configured to determine whether the current gate-on voltage needs to be adjusted according to the current source voltage and the corresponding relationship between the gate-on voltage and the source voltage sent by the detecting device 123, and if the current gate-on voltage needs to be adjusted, determine the adjusted gate-on voltage and send the adjusted gate-on voltage to the driving module 122. Specifically, from the transfer characteristic curve of the thin film transistor 100 obtained by the test, it can be determined that the output current of the thin film transistor 100 is made larger than or equal toAt 10 -5 A, the required gate turn-on voltage. For example, as shown in fig. 6 and 7, when the source voltage is 20V, the output current of the thin film transistor 100 is greater than 10 -5 A, the gate-on voltage needs to be made larger than 15V. After the adjusting module 121 adjusts the gate-on voltage to be more than 15V, the driving module 122 sends the adjusted gate-on voltage to make the output current of the thin film transistor 100 in the erase region 21 be greater than or equal to 10 -5 A。
By detecting the source voltage of the thin film transistor 100 sent to the erase region 21 in real time and adjusting the magnitude of the gate-on voltage according to the correspondence between the gate-off voltage and the source voltage, the output current of the thin film transistor 100 in the erase region 21 can be sufficiently large, so that the pixel electrode 130 in the erase region 21 can be charged better, which is beneficial to improving the erase effect.
Based on the same inventive concept, the embodiment of the present application further provides a control method of the liquid crystal handwriting board 10, as shown in fig. 8, including:
s101, when a liquid crystal handwriting board needs to erase an erasing area, a source voltage is sent to a thin film transistor in the erasing area and the thin film transistor which is connected with the same data line as the thin film transistor in the erasing area;
s102, sending a gate-on voltage to the thin film transistor in the erasing area, and sending a gate-off voltage to the thin film transistor in the target area, wherein the target area is an area included in the non-erasing area, and the thin film transistor in the target area is connected with different gate lines with the thin film transistor in the erasing area; the magnitude of the gate turn-off voltage can be adjusted, so that the thin film transistor in the target area can be kept in a turn-off state when the gate turn-off voltage is received.
In the control method of the liquid crystal handwriting board 10 provided by the embodiment of the application, by adjusting the gate turn-off voltage sent by the driving circuit 12, when the source voltage increases to cause the voltage of the thin film transistor 100 capable of being turned off completely to change, the driving circuit 12 can send the adjusted gate turn-off voltage to the thin film transistor 100 in the non-erasing area 22 to enable the thin film transistor 1 in the non-erasing area 22An output current of 00 is less than 10 -10 A, namely, the thin film transistor 100 in the non-erasing area 22 is ensured to be completely turned off, thereby avoiding the charge of the pixel electrode 130 in the non-erasing area 22 and preventing the occurrence of the false erasure phenomenon.
Optionally, in an embodiment of the present application, the liquid crystal handwriting pad 10 further includes a detecting device 123 for sending a gate-off voltage to the thin film transistor in the target area, including:
detecting a source voltage of a thin film transistor transmitted to the same data line as the thin film transistor in the erase region;
and determining whether the grid electrode cut-off voltage needs to be regulated according to the source electrode voltage and the corresponding relation between the pre-stored source electrode voltage and the grid electrode cut-off voltage, if so, regulating the grid electrode cut-off voltage and then sending the regulated grid electrode cut-off voltage to the thin film transistor in the target area, otherwise, directly sending the grid electrode cut-off voltage to the thin film transistor in the target area.
As shown in fig. 3 and 4, when handwriting needs to be erased, the source driving circuit (not shown in fig. 3) in the driving circuit 12 sends a source voltage to the thin film transistor 100 corresponding to the erase region 21 through the data line 102 (the same column of thin film transistors 100 as the thin film transistor 100 in the erase region 21 is also applied with the source voltage, and the thin film transistors 100 in other columns are not applied with the source voltage), and simultaneously sends a gate-on voltage to the thin film transistor 100 in the erase region 21 through the gate line 101 (the same row of thin film transistors 100 as the thin film transistor 100 in the erase region 21 is also applied with the gate-on voltage), and applies a gate-off voltage to the thin film transistor 100 in a different row from the thin film transistor 100 in the erase region 21 (i.e., the thin film transistor in the target region in fig. 4) through the gate line 101. The thin film transistor 100 (i.e., the thin film transistor 100 in the erase region of fig. 4) to which the gate-on voltage and the source voltage are applied is turned on, the pixel electrode 130 in the erase region 21 is charged, a voltage difference is formed between the pixel electrode 130 in the erase region 21 and the common electrode, bistable liquid crystal molecules located in the erase region 21 are turned back to the FC state by the voltage difference, and writing written in the erase region 21 can be erased. The thin film transistor 100 in the non-erase region 22 is in an off state, the pixel electrode 130 in the non-erase region 22 is not charged, and writing in the non-erase region 22 is not changed.
Before manufacturing the liquid crystal handwriting board 10, the thin film transistor 100 to be used in the liquid crystal handwriting board 10 is tested. A fixed voltage is sent to the source electrode of the thin film transistor 100, then different voltages are sent to the grid electrode of the thin film transistor 100, the magnitude of drain current of the thin film transistor 100 under different grid voltages is measured, the values of the different grid voltages and the drain current are recorded, and a curve is drawn, so that a transfer characteristic curve of the thin film transistor 100 can be obtained. The drain current of the thin film transistor 100 is related to the source voltage and the self-structural characteristics of the thin film transistor 100 (the channel aspect ratio of the thin film transistor 100). In the embodiment of the present application, referring to fig. 6 and 7, the channel aspect ratio of the thin film transistor 100 is 50 μm/4 μm, by measuring the transfer characteristic curves of the thin film transistor 100 under different source voltages, the output current and the corresponding gate voltage in each transfer characteristic curve under different source voltages, that is, the corresponding relationship between the gate-off voltage and the source voltage, can be obtained from the transfer characteristic curves, the corresponding relationship between the gate-off voltage and the source voltage is pre-stored in the memory module 124 as a preset condition, and the gate-source voltage correspondence can be pre-stored in the memory module 124 in a form similar to table 1.
It should be noted that, the transfer characteristic curves of the thin film transistor 100 in fig. 7 only include five cases that the source voltages are 15V, 20V, 30V, 40V and 50V, and in the practical use process, the transfer characteristic curves of the thin film transistor 100 under more different source voltages can be tested, and the corresponding relationship between the gate-off voltage and the source voltage is pre-stored in the memory module 124 according to the transfer characteristic curves, so that the adjustment of the gate-off voltage can be more accurate.
The detecting device 123 detects the source voltage of the thin film transistor 100 sent to the non-erasing area 22 in real time, sends the detected current source voltage to the adjusting module 121, and the adjusting module 121 determines whether the current gate-off voltage needs to be adjusted according to the current source voltage and the corresponding relationship between the pre-stored gate-off voltage and the source voltage, if so, determines the adjusted gate-off voltage, and sends the adjusted gate-off voltage to the thin film transistor 100 in the sub-target area (the target area includes the sub-target area).
Specifically, determining whether the current gate-off voltage needs to be adjusted according to the current source voltage sent by the detecting device 123 and the corresponding relationship between the pre-stored gate-off voltage and the source voltage includes:
Determining a preset numerical range of the gate-off voltage corresponding to the source voltage of the thin film transistor 100 sent to the non-erase region 22 according to the current source voltage and the corresponding relation between the gate-off voltage and the source voltage;
comparing the current gate turn-off voltage with a preset numerical range;
if the gate turn-off voltage is smaller than the minimum value in the preset numerical range, the gate turn-off voltage is increased until the magnitude of the gate turn-off voltage is in the preset numerical range;
and if the gate turn-off voltage is larger than the maximum value in the preset numerical range, reducing the gate turn-off voltage until the magnitude of the gate turn-off voltage is in the preset numerical range.
Specifically, if the detecting device 123 detects that the source voltage of the thin film transistor 100 sent to the sub-target area is 20V, the adjusting module 121 determines that the output current of the thin film transistor 100 needs to be smaller than 10 according to the source voltage and the corresponding relationship between the pre-stored gate-off voltage and the source voltage -10 At A, the gate-off voltage needs to be-11V to-2V, i.e. the preset value of the gate-off voltage ranges from-11V to-2V. The adjustment module 122 compares the current gate-off voltage with a preset range of pre-stored gate-off voltages, and if the current gate-off voltage is less than-11V (i.e., less than the minimum value in the preset range of values), increases the adjusted gate-off voltage until the gate-off voltage is between-11V and-2V (within the preset range of values); if the current gate-off voltage is greater than-2V (i.e., greater than the maximum value in the preset range), the gate-off voltage is adjusted by decreasing until The gate turn-off voltage is between-11V and-2V (within a preset value range).
Optionally, in an embodiment of the present application, sending a source voltage to a thin film transistor in an erase region and a thin film transistor connected to the same data line as the thin film transistor in the erase region includes:
determining a preset time corresponding to the current source voltage according to a pre-stored corresponding relation between the source voltage and the continuous transmission time of the source voltage;
and controlling the continuous transmission time of the source voltage to enable the continuous transmission time to be a preset time.
Optionally, in the embodiment of the present application, the driving module 122 is further configured to pre-store the corresponding relationship between the magnitude of the source voltage and the duration of the source voltage; and controlling the continuous transmission time of the source voltage according to the magnitude of the source voltage, so that the continuous transmission time is within a preset time range. Specifically, the duration of the source voltage can be determined by an actual erase test, and for the thin film transistor 100 having a channel aspect ratio of 50 μm/4 μm, the erase effect is ideal (no erroneous erase phenomenon occurs) when the duration of the source voltage (high level is illustrated) is 200 to 300 ms when the source voltage is 20V, and the erase effect is ideal when the duration of the source voltage (high level is illustrated) is 50 to 100 ms when the source voltage is 40V. Through the test, the source voltage continuous transmission time when the erasing effect is ideal under different source voltages is obtained, and the data of different source voltages and continuous transmission time (i.e. the corresponding relationship between the source voltage and the continuous transmission time) are pre-stored in the memory module 124. In the use process of the liquid crystal handwriting board 10, the duration time (preset time range) corresponding to the source voltage is determined according to the magnitude of the source voltage, and then the source voltage is transmitted to the thin film transistor 100 within the preset time range, namely according to the preset time range. By controlling the continuous transmission time of the source voltage, the charging time of the pixel electrode 130 can be reduced, so that even if the thin film transistor 100 in the non-erase region 22 has a certain leakage current, the pixel electrode 130 in the sub-target region is not fully charged, thereby avoiding the inversion of the liquid crystal molecules in the sub-target region and further reducing the risk of erroneous erasure.
Optionally, in an embodiment of the present application, the liquid crystal handwriting pad further includes a detecting device, sending a gate-on voltage to the thin film transistor in the erasing area, including:
detecting a source voltage sent to a thin film transistor in an erase region;
and determining whether the grid electrode starting voltage needs to be regulated according to the source electrode voltage and the corresponding relation between the pre-stored grid electrode starting voltage and the source electrode voltage, if so, regulating the grid electrode starting voltage and then sending the regulated grid electrode starting voltage to the thin film transistor in the erasing area, otherwise, directly sending the grid electrode starting voltage to the thin film transistor in the erasing area.
Specifically, the thin film transistor 100 to be employed in the liquid crystal handwriting board 10 is tested before the liquid crystal handwriting board 10 is manufactured. A fixed voltage is sent to the source electrode of the thin film transistor 100, then different voltages are sent to the grid electrode of the thin film transistor 100, the magnitude of drain current of the thin film transistor 100 under different grid voltages is measured, the values of the different grid voltages and the drain current are recorded, and a curve is drawn, so that a transfer characteristic curve of the thin film transistor 100 can be obtained. The drain current of the thin film transistor 100 is related to the source voltage and the self-structural characteristics of the thin film transistor 100 (the channel aspect ratio of the thin film transistor 100). In the embodiment of the present application, the channel aspect ratio of the thin film transistor 100 is 50 μm/4 μm, as shown in fig. 6 and 7, by measuring the transfer characteristic curves of the thin film transistor 100 under different source voltages, the output current and the corresponding gate voltage in each transfer characteristic curve under different source voltages, that is, the corresponding relationship between the gate-off voltage and the source voltage, can be obtained from the transfer characteristic curves, and the corresponding relationship between the gate-off voltage and the source voltage is pre-stored in the memory module 124 as a preset condition.
The detecting device 123 is also configured to detect the source voltage of the thin film transistor 100 sent to the erasing area 21 in real time when the liquid crystal handwriting board is erased, and according toThe corresponding relation between the gate turn-off voltage and the source voltage adjusts the magnitude of the gate turn-on voltage. Specifically, from the transfer characteristic curve of the thin film transistor 100 obtained by the test, it can be determined that the output current of the thin film transistor 100 is made to be 10 or more -5 A, the required gate turn-on voltage. For example, as shown in FIG. 7, when the source voltage is 20V, the output current of the TFT 100 is greater than 10 -5 A, the gate-on voltage needs to be made larger than 15V. After the adjusting module 121 adjusts the gate-on voltage to be more than 15V, the driving module 122 sends the adjusted gate-on voltage to make the output current of the thin film transistor 100 in the erase region 21 be greater than or equal to 10 -5 A. As shown in fig. 7, when the source voltage is 40V, the output current of the thin film transistor 100 is greater than 10 -5 A, the gate-on voltage needs to be made larger than 25V. After the adjusting module 121 adjusts the gate-on voltage to be more than 15V, the driving module 122 sends the adjusted gate-on voltage to make the output current of the thin film transistor 100 in the erase region 21 be greater than or equal to 10 -5 A。
By detecting the source voltage of the thin film transistor 100 sent to the erase region 21 in real time and adjusting the magnitude of the gate-on voltage according to the correspondence between the gate-on voltage and the source voltage, the output current of the thin film transistor 100 in the erase region 21 can be sufficiently large, so that the pixel electrode 130 in the erase region 21 can be charged better, which is beneficial to improving the erase effect.
By applying the embodiment of the application, at least the following beneficial effects can be realized:
1. the liquid crystal handwriting board 10 provided by the embodiment of the application comprises a first substrate 111, a second substrate 112 and a bistable liquid crystal layer 110, wherein the first substrate 111 comprises a plurality of thin film transistors 100; when the liquid crystal handwriting board 10 needs to erase the erasing area 21, the driving circuit 12 is configured to determine a gate-on voltage and a gate-off voltage, send the gate-on voltage to the thin film transistor 100 in the erasing area 21, send the gate-off voltage to the thin film transistor 100 in the target area, the target area is an area included in the non-erasing area 22, and the thin film transistor 100 in the target area is connected with the thin film transistor 100 in the erasing area 21 by different gate lines 101, wherein the magnitude of the gate-off voltage can be adjusted, so that the thin film transistor 100 in the target area of the liquid crystal handwriting board 10 maintains the off state when receiving the gate-off voltage. Therefore, the thin film transistor 100 in the target area can be completely turned off, the pixel electrode 130 in the non-erasing area is prevented from being charged, and the phenomenon of error erasure is prevented.
2. In the embodiment of the application, the detecting device 123 is arranged to detect the source voltage in real time, and pre-store the corresponding relation of the gate-source voltage obtained by the test as a preset condition in the storage module 124, and the gate-off voltage is regulated according to the detected source voltage and the pre-stored corresponding relation of the gate-off voltage and the source voltage by detecting the source voltage in real time, so that the regulation is more convenient and intelligent, and the phenomenon of error erasure is more facilitated to be avoided.
3. By detecting the source voltage, a duration (a preset time range) corresponding to the source voltage is determined, and then the source voltage is transmitted to the thin film transistor 100 so that the duration of the source voltage is within the preset time range, that is, the source voltage is transmitted in accordance with the preset time range. By controlling the continuous transmission time of the source voltage, the charging time of the pixel electrode 130 can be reduced, so that even if the thin film transistor 100 in the non-erase region 22 has a certain leakage current, the pixel electrode 130 in the non-erase region 22 is not fully charged, thereby avoiding the inversion of the liquid crystal molecules in the non-erase region 22 and further reducing the risk of erroneous erasure.
4. In the embodiment of the present application, by detecting the source voltage of the thin film transistor 100 sent to the erase region 21 in real time and adjusting the magnitude of the gate-on voltage according to the correspondence between the gate-off voltage and the source voltage, the output current of the thin film transistor 100 in the erase region 21 can be sufficiently large, so that the pixel electrode 130 in the erase region 21 can be better charged, which is beneficial to improving the erase effect.
Those of skill in the art will appreciate that the various operations, methods, steps in the flow, acts, schemes, and alternatives discussed in the present application may be alternated, altered, combined, or eliminated. Further, other steps, means, or steps in a process having various operations, methods, or procedures discussed herein may be alternated, altered, rearranged, disassembled, combined, or eliminated. Further, steps, measures, schemes in the prior art with various operations, methods, flows disclosed in the present application may also be alternated, altered, rearranged, decomposed, combined, or deleted.
In the description of the present application, it should be understood that the terms "center," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," and the like indicate orientations or positional relationships based on the orientation or positional relationships shown in the drawings, merely to facilitate describing the present application and simplify the description, and do not indicate or imply that the devices or elements referred to must have a specific orientation, be configured and operated in a specific orientation, and thus should not be construed as limiting the present application.
The terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature. In the description of the present application, unless otherwise indicated, the meaning of "a plurality" is two or more.
In the description of the present application, it should be noted that, unless explicitly specified and limited otherwise, the terms "mounted," "connected," and "connected" are to be construed broadly, and may be either fixedly connected, detachably connected, or integrally connected, for example; can be directly connected or indirectly connected through an intermediate medium, and can be communication between two elements. The specific meaning of the above terms in the present application will be understood in specific cases by those of ordinary skill in the art.
In the description of the present specification, a particular feature, structure, material, or characteristic may be combined in any suitable manner in one or more embodiments or examples.
It should be understood that, although the steps in the flowcharts of the figures are shown in order as indicated by the arrows, these steps are not necessarily performed in order as indicated by the arrows. The steps are not strictly limited in order and may be performed in other orders, unless explicitly stated herein. Moreover, at least some of the steps in the flowcharts of the figures may include a plurality of sub-steps or stages that are not necessarily performed at the same time, but may be performed at different times, the order of their execution not necessarily being sequential, but may be performed in turn or alternately with other steps or at least a portion of the other steps or stages.
The foregoing is only a partial embodiment of the present application, and it should be noted that it will be apparent to those skilled in the art that modifications and adaptations can be made without departing from the principles of the present application, and such modifications and adaptations are intended to be comprehended within the scope of the present application.

Claims (12)

1. The liquid crystal handwriting board is characterized by comprising a liquid crystal panel and a driving circuit which are electrically connected with each other;
the liquid crystal panel comprises a first substrate, a second substrate and a bistable liquid crystal layer, wherein the first substrate and the second substrate are oppositely arranged, the bistable liquid crystal layer is arranged between the first substrate and the second substrate, and the first substrate comprises a plurality of thin film transistors arranged in an array;
the driving circuit is configured to determine a gate-on voltage and a gate-off voltage when the liquid crystal handwriting board needs to erase the erasing area;
transmitting a gate-on voltage to a thin film transistor in an erasing area, and transmitting a gate-off voltage to a thin film transistor in a target area, wherein the target area is an area included in a non-erasing area, and the thin film transistor in the target area is connected with different gate lines to perform an erasing operation on an erasing area of a liquid crystal handwriting board;
The magnitude of the gate turn-off voltage can be adjusted, so that the thin film transistor of the target area of the liquid crystal handwriting board is kept in a turn-off state when the gate turn-off voltage is received.
2. The liquid crystal display panel according to claim 1, wherein the driving circuit includes an adjustment module configured to adjust a magnitude of the gate-off voltage; and/or the adjusting module is configured to adjust the magnitude of the gate-on voltage.
3. The liquid crystal display panel according to claim 1, wherein the driving circuit further comprises a memory module configured to pre-store a correspondence between a gate-off voltage and a source voltage and/or configured to pre-store a correspondence between a gate-on voltage and a source voltage;
the adjusting module is configured to adjust the gate turn-off voltage according to a corresponding relation between the turn-off voltage and the source voltage pre-stored in the storage module, and/or the adjusting module is configured to adjust the gate turn-on voltage according to a corresponding relation between the turn-on voltage and the source voltage pre-stored in the storage module.
4. A liquid crystal display tablet as defined in claim 3, further comprising detection means;
The detection device is configured to detect a source voltage of a thin film transistor sent to a target area when the liquid crystal handwriting board needs to erase an erasing area, and send the source voltage to the driving circuit;
the driving circuit judges whether the grid electrode cut-off voltage needs to be regulated according to the current source electrode voltage sent by the detection device and the corresponding relation between the grid electrode cut-off voltage and the source electrode voltage; and if the adjustment is needed, adjusting the output grid turn-off voltage.
5. A liquid crystal display tablet as defined in claim 3, further comprising detection means;
the detection device is configured to detect a source voltage of a thin film transistor sent to the erasing area when the liquid crystal handwriting board needs to erase the erasing area, and send the source voltage to the driving circuit;
the driving circuit judges whether the grid electrode opening voltage needs to be regulated according to the current source electrode voltage and the corresponding relation between the grid electrode opening voltage and the source electrode voltage sent by the detection device, and if the grid electrode opening voltage needs to be regulated, the magnitude of the output grid electrode opening voltage is regulated.
6. The liquid crystal display panel according to any one of claims 1 to 5, wherein,
the second substrate is a flexible substrate.
7. The liquid crystal display panel of any one of claims 1-5, wherein the first substrate comprises:
a first substrate;
the thin film transistor is arranged on the first substrate and comprises a grid electrode, a source electrode, a drain electrode and an active layer;
and the pixel electrode is arranged on one side of the thin film transistor, which is far away from the first substrate, and is electrically connected with the source electrode and the drain electrode.
8. The liquid crystal display panel according to any one of claims 1 to 5, further comprising a common electrode on the second substrate and a pixel electrode on the first substrate;
the first substrate comprises a plurality of grid lines extending along a first direction and a plurality of data lines extending along a second direction, wherein the grid lines are electrically connected with the grid electrodes of the thin film transistors, the data lines are electrically connected with the source electrodes of the thin film transistors, and the pixel electrodes are electrically connected with the drain electrodes of the thin film transistors;
the first direction and the second direction are different;
the grid line is used for transmitting the grid on voltage and the grid off voltage provided by the driving circuit to the thin film transistor; the data line is used for transmitting the source voltage provided by the driving circuit to the thin film transistor.
9. A method for controlling a liquid crystal handwriting board, comprising:
when the liquid crystal handwriting board needs to erase the erasing area, a source voltage is sent to a thin film transistor in the erasing area and a thin film transistor connected with the same data line as the thin film transistor in the erasing area;
transmitting a gate-on voltage to the thin film transistor in the erasing area, and transmitting a gate-off voltage to the thin film transistor in the target area, wherein the target area is an area included in the non-erasing area, and the thin film transistor in the target area is connected with different gate lines with the thin film transistor in the erasing area;
the magnitude of the gate turn-off voltage can be adjusted, so that the thin film transistor in the target area can be kept in a turn-off state when the gate turn-off voltage is received.
10. The control method according to claim 9, wherein the liquid crystal handwriting board further comprises a detection device, the sending the gate-off voltage to the thin film transistor in the target area includes:
detecting a source voltage of a thin film transistor transmitted to the same data line as the thin film transistor in the erase region;
and determining whether the grid electrode turn-off voltage needs to be regulated according to the source electrode voltage and the corresponding relation between the pre-stored source electrode voltage and the grid electrode turn-off voltage, if so, regulating the grid electrode turn-off voltage and then sending the regulated grid electrode turn-off voltage to a thin film transistor in a target area, otherwise, directly sending the grid electrode turn-off voltage to the thin film transistor in the target area.
11. The control method of claim 10, wherein the transmitting the gate-on voltage to the thin film transistor in the erase region comprises:
detecting a source voltage sent to a thin film transistor in the erase region;
and determining whether the grid electrode starting voltage needs to be regulated according to the source electrode voltage and the corresponding relation between the pre-stored grid electrode starting voltage and the source electrode voltage, if so, regulating the grid electrode starting voltage and then sending the regulated grid electrode starting voltage to the thin film transistor in the erasing area, otherwise, directly sending the grid electrode starting voltage to the thin film transistor in the erasing area.
12. The control method according to claim 9, wherein the transmitting the source voltage to the thin film transistor in the erase region and the thin film transistor connected to the same data line as the thin film transistor in the erase region includes:
determining a preset time corresponding to the current source voltage according to a pre-stored corresponding relation between the source voltage and the continuous transmission time of the source voltage;
and controlling the continuous sending time of the source voltage to enable the continuous sending time to be the preset time.
CN202210247920.8A 2022-03-14 2022-03-14 Liquid crystal handwriting board and control method thereof Active CN114647120B (en)

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5761127A (en) * 1991-11-20 1998-06-02 Fujitsu Limited Flash-erasable semiconductor memory device having an improved reliability
KR20060058421A (en) * 2004-11-25 2006-05-30 삼성전자주식회사 Liquid crystal display device and driving method for the same
CN112327546A (en) * 2020-11-18 2021-02-05 京东方科技集团股份有限公司 Liquid crystal handwriting board, handwriting device and control method of handwriting device
CN113419388A (en) * 2021-08-23 2021-09-21 山东蓝贝思特教装集团股份有限公司 Liquid crystal writing device and method adaptive to ambient light
CN113990235A (en) * 2021-10-29 2022-01-28 京东方科技集团股份有限公司 Display driving circuit, display driving method and display device

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5761127A (en) * 1991-11-20 1998-06-02 Fujitsu Limited Flash-erasable semiconductor memory device having an improved reliability
KR20060058421A (en) * 2004-11-25 2006-05-30 삼성전자주식회사 Liquid crystal display device and driving method for the same
CN112327546A (en) * 2020-11-18 2021-02-05 京东方科技集团股份有限公司 Liquid crystal handwriting board, handwriting device and control method of handwriting device
CN113419388A (en) * 2021-08-23 2021-09-21 山东蓝贝思特教装集团股份有限公司 Liquid crystal writing device and method adaptive to ambient light
CN113990235A (en) * 2021-10-29 2022-01-28 京东方科技集团股份有限公司 Display driving circuit, display driving method and display device

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