CN114628494A - Novel super floating junction silicon carbide power device and preparation method thereof - Google Patents
Novel super floating junction silicon carbide power device and preparation method thereof Download PDFInfo
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- 229910010271 silicon carbide Inorganic materials 0.000 title claims abstract description 27
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 title claims abstract description 25
- 238000002360 preparation method Methods 0.000 title claims abstract description 10
- 239000000758 substrate Substances 0.000 claims abstract description 24
- 238000005468 ion implantation Methods 0.000 claims description 12
- 229910052751 metal Inorganic materials 0.000 claims description 12
- 239000002184 metal Substances 0.000 claims description 12
- 238000005229 chemical vapour deposition Methods 0.000 claims description 9
- 238000000034 method Methods 0.000 claims description 6
- 238000002513 implantation Methods 0.000 claims description 3
- 150000002739 metals Chemical class 0.000 claims description 3
- 238000000151 deposition Methods 0.000 claims 2
- 238000000137 annealing Methods 0.000 description 2
- 230000015556 catabolic process Effects 0.000 description 2
- 230000005684 electric field Effects 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
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Abstract
The invention provides a novel super-floating junction silicon carbide power device and a preparation method thereof, wherein the prepared novel super-floating junction silicon carbide power device comprises a back electrode 1, an N + substrate area 2, an N-epitaxial area 3, a P-type floating junction area 4, a P-type super junction area 5, a surface P + area 6 and a front electrode 7; one or more layers of discontinuous P + structures are added into the epitaxial layer, a PN junction structure is formed in the epitaxial layer similarly, meanwhile, in the design of the floating junction structure, the local floating junction structure is connected with the surface P + region 6 through the P column 5, so that negative charges in the P + region in the device can be extracted from the surface, and the device can still be normally conducted in the forward direction after being reversely cut off.
Description
Technical Field
The invention belongs to the technical field of semiconductors, and particularly relates to a novel super floating junction silicon carbide power device and a preparation method thereof.
Background
In order to further improve the performance of the 4H-SiC power device, a "super junction" or a "structure" represented by a floating junction is applied to a diode of a relevant schottky structure. The floating junction structure is formed by adding one or more discontinuous P + structures into an epitaxial layer of a traditional 4H-SiC power device, and is similar to a PN junction structure formed in the epitaxial layer. When the device works in a reverse state, the floating junction structure can change the original triangular or trapezoidal electric field distribution in the epitaxial layer into upper and lower double-triangular distribution taking the floating junction as a dividing line, so that the reverse breakdown voltage of the device is improved under the condition that the thickness and the concentration of the epitaxial layer are unchanged.
However, due to the floating junction structure added in the conventional device structure, although the reverse breakdown characteristic is improved well, negative charges inside the P-type floating junction cannot be neutralized due to the existence of the P-type floating junction in forward conduction, so that the device cannot be normally started.
Disclosure of Invention
In order to solve the problems in the prior art, the invention provides a novel super floating junction silicon carbide power device and a preparation method thereof. The technical problem to be solved by the invention is realized by the following technical scheme:
in a first aspect, the present invention provides a novel super floating junction silicon carbide power device, including:
the device comprises a back electrode 1, an N + substrate region 2, an N-epitaxial region 3, a P-type floating junction region 4, a P-type super junction region 5, a surface P + region 6 and a front electrode 7;
the N-epitaxial region 3 is positioned on the N + substrate 2, a plurality of floating junction layers are arranged in the N-epitaxial region 3 at intervals in the vertical direction, each floating junction layer comprises a plurality of independent P-type floating junction regions 4, and a plurality of P-type super junction regions 5 are arranged in the N-epitaxial region 3 at intervals in the horizontal direction; the P-type floating junction regions 4 opposite to the adjacent layers are connected through a P-type super junction region 5; the surface P + region 6 is positioned at the uppermost layer of the N-epitaxial region 3, and each P-type floating junction region 4 of the first layer is connected with the surface P + region 6 through a P-type super junction region 5; a front electrode 7 is deposited over the surface P + region 6 and a back electrode 1 is deposited on the lower surface of the N + substrate 2.
Wherein, the P-type super junction region 5 and the P-type floating junction region 4 are regular polygons. The back electrode 1 is in ohmic contact; the front electrode 7 is an ohmic contact or a schottky contact. The metals deposited to form the back electrode 5 and the front electrode 6 include Ti and Ni.
In a second aspect, the preparation method of the novel super floating junction silicon carbide power device provided by the invention comprises the following steps:
step 1: obtaining an N + substrate 2;
step 2: growing an N-epitaxial region 3 on the surface of the N + substrate 2 by a CVD method;
and step 3: forming a first floating junction layer comprising a plurality of independent P-type floating junction regions 4 inside the N-epitaxial region 3 by ion implantation on the surface of the N-epitaxial region 3;
and 4, step 4: growing a second layer of N-epitaxial region 3 on the surface of the last layer of N-epitaxial region 3 by a CVD method;
and 5: forming a second layer floating junction layer containing a plurality of independent P-type floating junction regions 4 inside the second layer N-epitaxial region 3 by ion implantation on the surface of the second layer N-epitaxial region 3;
step 6: forming a P-type super junction region 5 connecting the independent P-type floating junction regions 4 opposite to the adjacent layers by ion implantation on the surface of the N-epitaxial region 3;
and 7: repeating the steps 4, 5 and 6 to enable the number of the floating junction layers to reach the design requirement;
and 8: growing the last N-epitaxial region 3 on the surface of the uppermost N-epitaxial region 3 by a CVD method;
and step 9: performing P + implantation on the surface of the last layer of N-epitaxial region 3 to form a surface P + region 6;
step 10: forming a P-type super junction region 5 connecting the surface P + region 6 to each independent P-type floating junction region 4 below on the surface of the last layer of N-epitaxial region 3 through ion implantation;
step 11: metal is deposited on the upper surface of the surface P + region 6 to form a front electrode 7, and metal is deposited on the lower surface of the N + substrate 2 to form a back electrode 1.
Wherein the doping concentration of the N-epitaxial region 3 is 1 x 1014～5×1016cm-3The floating junction area of adjacent layerThe thickness of the N-epitaxial region 3 layer is 2-20 μm, and the doping concentration of the P-type floating junction region 4 is 1 x 1016～1×1020cm-3The width of each P-type floating junction region 4 is 1-5 μm, and the distance between two P-type floating junction regions 4 is 1-5 μm; the doping concentration of the P-type super junction region 5 is 1 x 1016～1×1020cm-3The width is 1-5 μm, the metal deposited in step 6 comprises Ti and Ni, the P-type super junction region 5 and the P-type floating junction region 4 are regular polygons, and the doping concentration of the surface P + region 6 is 1 x 1018～1×1020cm-3(ii) a The N + substrate region 2 has a doping concentration of 1 × 1018cm-3～1×1020cm-3The thickness is 50-400 μm.
The invention has the beneficial effects that:
the invention provides a novel super-floating junction silicon carbide power device and a preparation method thereof, wherein the prepared novel super-floating junction silicon carbide power device comprises a back electrode 1, an N + substrate area 2, an N-epitaxial area 3, a P-type floating junction area 4, a P-type super junction area 5, a surface P + area 6 and a front electrode 7; one or more layers of discontinuous P + structures are added into the epitaxial layer, and a PN junction structure is formed in the epitaxial layer, and meanwhile, in the design of the floating junction structure, the local floating junction structure is connected with the surface P + region 6 by the P column 5, so that negative charges in the P + region in the device can be extracted from the surface, and the device can still be normally conducted in the forward direction after being cut off in the reverse direction.
The present invention will be described in further detail with reference to the accompanying drawings and examples.
Drawings
FIG. 1 is a schematic diagram of a novel ultra-floating junction silicon carbide power device provided by an embodiment of the invention;
FIG. 2 is a top view of a novel super-floating junction device provided by an embodiment of the present invention;
FIG. 3 is a three-dimensional view of a novel super-floating junction device provided by an embodiment of the invention;
FIG. 4 is a flow chart of a process for fabricating a novel ultra-floating junction silicon carbide power device according to an embodiment of the present invention;
Detailed Description
The present invention will be described in further detail with reference to specific examples, but the embodiments of the present invention are not limited thereto.
With reference to fig. 1 to fig. 3, the present invention provides a novel super floating junction silicon carbide power device, which includes:
the device comprises a back electrode 1, an N + substrate region 2, an N-epitaxial region 3, a P-type floating junction region 4, a P-type super junction region 5, a surface P + region 6 and a front electrode 7;
the N-epitaxial region 3 is positioned on the N + substrate 2, a plurality of layers of floating junction regions are arranged in the N-epitaxial region 3 at intervals in the vertical direction, each layer of floating junction region comprises a plurality of independent P-type floating junction regions 4, and a plurality of P-type super junction regions 5 are arranged in the N-epitaxial region 3 at intervals in the horizontal direction; the P-type floating junction regions 4 opposite to the adjacent layers are connected through a P-type super junction region 5; the surface P + region 6 is positioned at the uppermost layer of the N-epitaxial region 3, and each P-type floating junction region 4 of the first layer is connected with the surface P + region 6 through a P-type super junction region 5; a front electrode 7 is deposited over the surface P + region 6 and a back electrode 1 is deposited on the lower surface of the N + substrate 2.
Wherein, the P-type super junction region 5 is a regular polygon. The back electrode 1 is in ohmic contact; the front electrode 7 is ohmic contact or Schottky contact; the metals deposited to form the back electrode 5 and the front electrode 6 include Ti and Ni.
It is worth mentioning that: the normal floating junction device works in reverse bias, because the N-epitaxial region 3 and the P-type floating junction region 4 are in a PN junction reverse bias state, the depletion region gradually expands to bear a high electric field, at the moment, a large amount of negative charges are accumulated near the contact surface of the P-type floating junction region 4 and the N-epitaxial region, and when the device is switched from the reverse bias to a forward conduction state, because the negative charges in the P-type floating junction region 4 of the device have no release path, based on a charge balance theory, the depletion layer in the N-epitaxial region cannot disappear, and the normal carrier conduction is blocked, so that the device cannot normally work after the working mode is switched.
Therefore, a P-type super junction region 5 is introduced into the device, a plurality of layers of P-type floating junction regions 4 in the device are connected with the surface to form an equipotential, at the moment, under the influence of forward voltage, accumulated negative charges are quickly dissipated, a depletion layer in an N-epitaxial region disappears, and the device is normally conducted.
As shown in fig. 4, the preparation method of the novel super-floating junction silicon carbide power device provided by the invention comprises the following steps:
step 1: obtaining an N + substrate 2;
and 2, step: growing an N-epitaxial region 3 on the surface of the N + substrate 2 by a CVD method;
wherein the doping concentration of the N + substrate region 2 is 1 × 1018cm-3～1×1020cm-3The thickness is 50-400 μm.
And step 3: forming a first floating junction layer containing a plurality of independent P-type floating junction regions 4 in the N-epitaxial region 3 by ion implantation on the surface of the N-epitaxial region 3;
wherein the doping concentration of the N-epitaxial region 3 is 1 x 1014～5×1016cm-3And the thickness of the N-epitaxial region 3 layer where the floating junction region of the adjacent layer is located is 2-20 μm.
And 4, step 4: growing a second layer of N-epitaxial region 3 on the surface of the last layer of N-epitaxial region 3 by a CVD method;
and 5: forming a second layer floating junction layer containing a plurality of independent P-type floating junction regions 4 inside the second layer N-epitaxial region 3 by ion implantation on the surface of the second layer N-epitaxial region 3;
step 6: forming a P-type super junction region 5 connecting the independent P-type floating junction regions 4 opposite to the adjacent layers by ion implantation on the surface of the N-epitaxial region 3;
and 7: repeating the steps 4, 5 and 6 to enable the number of the floating junction layers to reach the design requirement;
and step 8: growing a last layer of N-epitaxial region 3 on the surface of the uppermost N-epitaxial region 3 by a CVD method;
and step 9: performing P + implantation on the surface of the last layer of N-epitaxial region 3 to form a surface P + region 6;
wherein the doping concentration of the P-type floating junction region 4 is 1 × 1016～1×1020cm-3The width of each P-type floating junction region 4 is 1-5 μm, and the distance between two P-type floating junction regions 4 is 1-5 μm. Doping of P-type super junction regions 5The concentration is 1X 1016～1×1020cm-3And the width is 1-5 μm. The P-type super junction region 5 and the P-type floating junction region 4 may have any shape.
Referring to fig. 2 and 3, the present invention is a multilayer novel super floating junction device, which includes a plurality of layers of floating junction regions in a vertical direction inside an N-epitaxial region 3 of the device, each floating junction region includes a plurality of independent P-type floating junction regions 4, and two independent P-type floating junction regions 4 opposite to each other in adjacent layers are connected by one P-type super junction region 5.
Step 10: forming a P-type super junction region 5 connecting the surface P + region 6 to each independent P-type floating junction region 4 below on the surface of the last layer of N-epitaxial region 3 through ion implantation;
wherein, the surface P + region 6 is connected with the independent P-type floating junction region 4 of the first layer through the P-type super junction region 5;
step 11: metal is deposited on the upper surface of the surface P + region 6 to form a front electrode 7, and metal is deposited on the lower surface of the N + substrate 2 to form a back electrode 1.
Wherein the metal deposited in step 6 comprises Ti and Ni; the invention also needs to carry out annealing treatment on the back electrode 1 and the front electrode 7, and the annealing temperature is 400-1000 ℃. The doping concentration of the surface P + region 6 is 1 x 1018～1×1020cm-3。
The invention provides a preparation method of a novel super-floating junction silicon carbide power device, which comprises a back electrode 1, an N + substrate area 2, an N-epitaxial area 3, a P-type floating junction area 4, a P-type super junction area 5, a surface P + area 6 and a front electrode 7; one or more layers of discontinuous P + structures are added into the epitaxial layer, a PN junction structure is formed in the epitaxial layer similarly, meanwhile, in the design of the floating junction structure, the local floating junction structure is connected with the surface P + region 6 through the P column 5, so that negative charges in the P + region in the device can be extracted from the surface, and the device can still be normally conducted in the forward direction after being reversely cut off.
The foregoing is a more detailed description of the invention in connection with specific preferred embodiments and it is not intended that the invention be limited to these specific details. For those skilled in the art to which the invention pertains, several simple deductions or substitutions can be made without departing from the spirit of the invention, and all shall be considered as belonging to the protection scope of the invention.
Claims (10)
1. A novel super floating junction silicon carbide power device, comprising:
the device comprises a back electrode (1), an N + substrate region (2), an N-epitaxial region (3), a P-type floating junction region (4), a P-type super junction region (5), a surface P + region (6) and a front electrode (7);
the N-epitaxial region (3) is positioned on the N + substrate (2), multiple floating junction layers are arranged in the N-epitaxial region (3) at intervals in the vertical direction, each floating junction layer comprises multiple independent P-type floating junction regions (4), and multiple P-type super junction regions (5) are arranged in the N-epitaxial region (3) at intervals in the horizontal direction; the P-type floating junction regions (4) opposite to the adjacent layers are connected through a P-type super junction region (5); the surface P + region (6) is positioned at the uppermost layer of the N-epitaxial region (3), and each P-type floating junction region (4) of the first layer is connected with the surface P + region (6) through a P-type super junction region (5); the front electrode (7) is deposited on the surface P + region (6) and the back electrode (1) is deposited on the lower surface of the N + substrate (2).
2. The novel super-floating junction silicon carbide power device as claimed in claim 1, wherein the P-type super junction region (5) and the P-type floating junction region (4) are regular polygons.
3. The novel super-floating junction silicon carbide power device according to claim 1, characterized in that the back electrode (1) is an ohmic contact; the front electrode (7) is in ohmic contact or Schottky contact.
4. The novel super-floating junction silicon carbide power device according to claim 1, wherein the metals deposited to form the back electrode (5) and the front electrode (6) comprise Ti and Ni.
5. A preparation method of a novel super floating junction silicon carbide power device is characterized by comprising the following steps:
step 1: obtaining an N + substrate (2);
step 2: growing an N-epitaxial region (3) on the surface of the N + substrate (2) by a CVD method;
and 3, step 3: forming a first floating junction layer containing a plurality of independent P-type floating junction regions (4) inside the N-epitaxial region (3) by ion implantation on the surface of the N-epitaxial region (3);
and 4, step 4: growing a second layer of N-epitaxial region (3) on the surface of the last layer of N-epitaxial region (3) by a CVD method;
and 5: forming a second layer of floating junction layer containing a plurality of independent P-type floating junction regions (4) inside the second layer of N-epitaxial region (3) by ion implantation on the surface of the second layer of N-epitaxial region (3);
step 6: forming a P-type super junction region (5) which is connected with an independent P-type floating junction region (4) which is opposite to the adjacent layer by ion implantation on the surface of the N-epitaxial region (3);
and 7: repeating the steps 4, 5 and 6 to enable the number of the floating junction layers to reach the design requirement;
and step 8: growing a last layer of N-epitaxial region (3) on the surface of the uppermost N-epitaxial region (3) by a CVD method;
and step 9: p + implantation is carried out on the surface of the last layer of N-epitaxial region (3) to form a surface P + region (6);
step 10: forming a P-type super junction region (5) connecting the surface P + region (6) to each independent P-type floating junction region (4) below by ion implantation on the surface of the last layer of N-epitaxial region (3);
step 11: and depositing metal on the upper surface of the surface P + region (6) to form a front electrode (7), and depositing metal on the lower surface of the N + substrate (2) to form a back electrode (1).
6. The method for preparing the novel super floating junction silicon carbide power device as claimed in claim 5, wherein the doping concentration of the N-epitaxial region (3) is 1 x 1014～5×1016cm-3The thickness of the N-epitaxial region (3) layer where the floating junction region of the adjacent layer is located is 2-20 mu m.
7. The method for preparing the novel super floating junction silicon carbide power device as claimed in claim 5, wherein the doping concentration of the P-type floating junction region (4) is 1 x 1016～1×1020cm-3The width of each P-type floating junction region (4) is 1-5 mu m, and the distance between two P-type floating junction regions (4) is 1-5 mu m; the doping concentration of the P-type super junction region (5) is 1 multiplied by 1016～1×1020cm-3And the width is 1-5 μm.
8. The method for preparing the novel super-floating junction silicon carbide power device as claimed in claim 5, wherein the metal deposited in the step 6 comprises Ti and Ni.
9. The method for preparing the novel super-floating junction silicon carbide power device as claimed in claim 5, wherein the P-type super junction region (5) and the P-type floating junction region (4) are regular polygons.
10. The method for preparing the novel silicon carbide power device with the super-floating junction as claimed in claim 5, wherein the doping concentration of the surface P + region (6) is 1 x 1018～1×1020cm-3(ii) a The doping concentration of the N + substrate region (2) is 1 multiplied by 1018cm-3～1×1020cm-3The thickness is 50-400 μm.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116404034A (en) * | 2023-06-07 | 2023-07-07 | 西安电子科技大学 | Silicon carbide power device matched with floating junction to introduce sheet-shaped P channel |
| CN116454138A (en) * | 2023-06-15 | 2023-07-18 | 西安电子科技大学 | Silicon carbide floating junction diode with columnar P channel and preparation method |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116404034A (en) * | 2023-06-07 | 2023-07-07 | 西安电子科技大学 | Silicon carbide power device matched with floating junction to introduce sheet-shaped P channel |
| CN116454138A (en) * | 2023-06-15 | 2023-07-18 | 西安电子科技大学 | Silicon carbide floating junction diode with columnar P channel and preparation method |
| CN116454138B (en) * | 2023-06-15 | 2023-09-08 | 西安电子科技大学 | Silicon carbide floating junction diode with columnar P channel and preparation method |
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