CN114613759A

CN114613759A - LED semiconductor assembly, preparation method thereof and light-emitting device

Info

Publication number: CN114613759A
Application number: CN202011422640.3A
Authority: CN
Inventors: 何安和; 林素慧; 彭康伟; 詹宇; 洪灵愿
Original assignee: Xiamen Sanan Optoelectronics Technology Co Ltd
Current assignee: Xiamen Sanan Optoelectronics Technology Co Ltd
Priority date: 2020-12-08
Filing date: 2020-12-08
Publication date: 2022-06-10

Abstract

The invention relates to an LED semiconductor component, a preparation method thereof and a light-emitting device, wherein the LED semiconductor component comprises the following components: providing a bearing substrate; forming a plurality of chips on a bearing substrate, wherein the plurality of chips at least comprise a first chip and a second chip which are adjacently arranged, and when the first chip and the second chip are connected with the same current, the photoelectric characteristics of the first chip and the second chip are different. In the technical scheme, the adjacent chips on the same bearing substrate have different photoelectric parameters, although the chips are sorted for one time and are arranged according to the grabbing principle of the adjacent chips, the adjacent chips have different photoelectric parameters, so that the required mixed-row effect can be achieved through sorting for one time, the mixed BIN time is reduced, the flow is simplified, and the cost is reduced.

Description

LED semiconductor assembly, preparation method thereof and light-emitting device

Technical Field

The invention relates to the field of semiconductors, in particular to an LED semiconductor component, a preparation method thereof and a light-emitting device.

Background

The Mini LED size is generally smaller than 200um, has become a hotspot of research in the LED industry at present, and can be widely applied to the fields of RGB display, backlight, AR/VR and the like. Traditional RGB shows with chip can mix BIN after encapsulating into the lamp pearl to the effect that obtains even display in a disorderly way, however in the encapsulation of Mini LED uses, can be with chip snap-on certain base plate, lacked the step that the lamp pearl was disorderly, can produce the uneven Mura phenomenon of dark bright (being that display luminance is inhomogeneous this moment, causes the phenomenon of various vestige).

If the Mura phenomenon of uneven darkness and brightness is to be solved, chips with the same BIN (such as 1 nm-5 nm wavelength, 5% -30% brightness span and 0V-0.3V conduction voltage interval) need to be arranged in a chaotic way in the chip sorting process, however, the existing chaotic arrangement consumes long time and has high cost, so that the Mini LED cannot be rapidly enlarged in production scale.

Disclosure of Invention

In view of the above, it is desirable to provide an LED semiconductor module, a method for manufacturing the LED semiconductor module, and a light emitting device. The method has the effects of reducing the BIN mixing time, simplifying the flow and reducing the cost.

An LED semiconductor component comprises a bearing substrate, a plurality of independent LED chips are arranged on the bearing substrate, at least one LED chip comprises a semiconductor light-emitting sequence layer, the semiconductor light-emitting sequence layer comprises a first conductivity type semiconductor layer, a second conductivity type semiconductor layer, and a light-emitting layer between the first conductivity type semiconductor layer and the second conductivity type semiconductor layer,

the method comprises the following steps:

the LED chip comprises a plurality of independent LED chips, wherein the plurality of independent LED chips at least comprise a first LED chip and a second LED chip which are adjacently arranged, the sizes of the first LED chip and the second LED chip are the same, and when the first LED chip and the second LED chip are introduced with the same current, the photoelectric characteristics of the first LED chip and the second LED chip are different.

In one embodiment, the electro-optical characteristics of the first LED chip and the second LED chip include wavelength, voltage or luminous intensity.

In one embodiment, the areas of the light emitting layers of the first and second chips are different.

In one embodiment, a transparent conductive layer is formed on the second conductive type semiconductor layer of the chip, and the areas of the transparent conductive layers of the first chip and the second chip are different.

In one embodiment, the semiconductor light-emitting sequence layer is provided with a metal electrode, and the coverage areas of the metal electrodes of the first chip and the second chip are different.

In one embodiment, when the geometrical areas of the light-emitting layers are different, the difference of the areas of the light-emitting layers of the first chip and the second chip is 0-50%.

In one embodiment, when the areas of the transparent conductive layers are different, the area difference of the transparent conductive layers of the first chip and the second chip is 0-50%.

In one embodiment, when the coverage areas of the metal electrodes are different, the difference of the coverage areas of the metal electrodes of the first chip and the second chip is 0-50%.

In one embodiment, the metal electrodes are different in at least one of shape, width and length.

In one embodiment, the difference between the peak wavelengths of the radiation of the light emitting layers of the first chip and the second chip is not higher than 3 nm.

In one embodiment, the first chip and the second chip comprise a single independent substrate having opposite front and back surfaces, wherein the front surface supports the semiconductor light emitting sequence layer and the front surface is closer to the first conductive type semiconductor layer than the light emitting layer.

In one embodiment, the first chip and the second chip are flip LED chips, and further include an insulating reflective layer covering the metal electrode and the transparent conductive layer, and a pad formed on the insulating reflective layer and electrically connected to the metal electrode.

In one embodiment, the carrier substrate is a temporary substrate, and the temporary substrate is made of an insulating material.

The invention also provides an RGB (red, green and blue) packaging module which comprises the LED light-emitting component, wherein the bearing substrate is a packaging substrate.

The invention also provides an RGB display screen, which comprises a driving circuit and the RGB packaging module.

The invention also provides a preparation method of the LED semiconductor component, which comprises the following steps:

providing a bearing substrate;

forming a semiconductor light-emitting sequence layer on the bearing substrate, wherein the semiconductor light-emitting sequence layer comprises a first conduction type semiconductor layer, a second conduction type semiconductor layer and a light-emitting layer positioned between the first conduction type semiconductor layer and the second conduction type semiconductor layer;

and separating the semiconductor light emitting series layers to form a plurality of independent chips, wherein the plurality of independent LED chips at least comprise a first LED chip and a second LED chip which are adjacently arranged, the sizes of the first LED chip and the second LED chip are the same, the first chip and the second chip are connected with the same current, and the photoelectric properties of the first LED chip and the second LED chip are different.

In one embodiment, the areas of the light emitting layers of the first and second LED chips are different.

In one embodiment, the difference of the areas of the light emitting layers of the first LED chip and the second LED chip is 0-50%.

In one embodiment, the step of forming the semiconductor light-emitting sequence layer on the carrier substrate further includes a step of forming a transparent conductive layer on a surface of the semiconductor light-emitting sequence layer;

the coverage areas of the transparent conducting layers of the first LED chip and the second LED chip are different.

In one embodiment, the difference of the coverage areas of the transparent conductive layers of the first LED chip and the second LED chip is 0-50%.

In one embodiment, the step of forming the semiconductor light emitting sequence layer on the carrier substrate further includes a step of forming a metal electrode, and the metal electrodes of the first LED chip and the second LED chip have different coverage areas.

In one embodiment, the difference of the coverage areas of the metal electrodes of the first LED chip and the second LED chip is 0-50%.

In one embodiment, the metal electrodes of the first and second LED chips are different in at least one of shape, width dimension, and length dimension.

In one embodiment, after providing the carrier substrate and before forming the semiconductor light emitting sequence layer on the carrier substrate, the method further includes: forming a substrate on the bearing substrate, wherein the substrate is positioned between the bearing substrate and the semiconductor light-emitting sequence layer; the substrate is provided with a front surface and a back surface which are opposite, and the front surface supports the semiconductor light-emitting sequence layer; and the front surface is adjacent to the first conductive type semiconductor layer.

In one embodiment, the carrier substrate is a temporary substrate, and the temporary substrate is an insulating material.

The present invention also provides a method for manufacturing a light emitting device, comprising:

sorting the chips formed by the preparation method of the LED light-emitting component to realize a mixed arrangement effect;

providing a circuit substrate;

and mounting the chips subjected to mixed arrangement treatment on the circuit substrate.

In one embodiment, the light emitting device is an RGB display module or an RGB display screen.

In one embodiment, the sorting conditions include optoelectronic parameters of the chip, including wavelength, brightness, and turn-on voltage.

The semiconductor structure, the preparation method thereof and the preparation method of the light-emitting device have the following beneficial effects:

in the technical scheme, the adjacent LED chips on the same bearing substrate are provided with chip structures with different photoelectric parameters, and different photoelectric parameters are arranged between the adjacent LED chips on the same bearing substrate through the special design, so that the different photoelectric parameters are arranged between the adjacent LED chips according to the adjacent chip grabbing principle through one-time sorting, the different photoelectric parameters are already arranged between the adjacent LED chips, the required mixed arrangement effect can be achieved through one-time sorting, the mixed BIN time is reduced, the flow is simplified, and the cost is reduced.

Drawings

Fig. 1 is a flow chart of a method for manufacturing an LED semiconductor device according to an embodiment of the present invention;

fig. 2 is a schematic cross-sectional structure of an LED semiconductor device provided in an embodiment of the present invention after a substrate is provided;

fig. 3 is a schematic cross-sectional structure diagram of a semiconductor light-emitting sequence layer after being formed in a method for manufacturing an LED semiconductor device according to an embodiment of the present invention;

fig. 4 is a schematic cross-sectional structure diagram of an LED semiconductor device after a chip region is defined in a manufacturing method according to an embodiment of the invention;

fig. 5 is a schematic cross-sectional view illustrating a first window formed in a method for manufacturing an LED semiconductor device according to an embodiment of the present invention;

fig. 6 is a schematic cross-sectional structure diagram of an LED semiconductor assembly provided in an embodiment of the present invention after a transparent conductive layer, a first electrode, and a second electrode are formed;

fig. 7 is a schematic cross-sectional view of an LED semiconductor assembly according to an embodiment of the present invention after an insulating reflective layer is formed;

fig. 8 is a schematic cross-sectional view of a bonding pad formed in a method for manufacturing an LED semiconductor device according to an embodiment of the present invention;

fig. 9 is a schematic cross-sectional view of a cut substrate in a method for manufacturing an LED semiconductor device according to an embodiment of the present invention;

fig. 10 is a flowchart of a method for manufacturing a light-emitting device according to an embodiment of the present invention;

FIG. 11 is a schematic diagram showing different coverage areas of metal electrodes of a first LED chip and a second LED chip according to one embodiment of the present invention;

FIG. 12 is a schematic diagram showing the difference in geometric area of the light emitting layers of the first and second LED chips according to one embodiment of the present invention;

FIG. 13 is a schematic diagram showing the difference in the areas of the transparent conductive layers of the first LED chip and the second LED chip according to one embodiment of the present invention;

fig. 14 is a top view of an LED semiconductor assembly in accordance with an embodiment of the present invention.

Reference numerals: 10. a substrate; 11. a semiconductor light emitting sequence layer; 112. a first conductive type semiconductor layer; 113. a light emitting layer; 114. a second conductive type semiconductor layer; 12. a first window; 13. a transparent conductive layer; 14. an insulating reflective layer; 15. a second window; 16. a first electrode; 17. a second electrode; 18. cutting a channel; 20. a carrier substrate; 21. a pad; 30. a first LED chip; 40. and a second LED chip.

Detailed Description

To facilitate an understanding of the invention, the invention will now be described more fully with reference to the accompanying drawings. Preferred embodiments of the present invention are shown in the drawings. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.

Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used in the description of the invention herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.

In the description of the present invention, it is to be understood that the terms "upper", "lower", "vertical", "horizontal", "inner", "outer", etc. indicate orientations or positional relationships based on methods or positional relationships shown in the drawings, and are only for convenience in describing the present invention and simplifying the description, but do not indicate or imply that the referred devices or elements must have a specific orientation, be constructed and operated in a specific orientation, and thus, should not be construed as limiting the present invention.

The Mini LED size is generally smaller than 200um, has become a hotspot of research in the LED industry at present, and can be widely applied to the fields of RGB display, backlight, AR/VR and the like. Traditional RGB shows with chip can mix BIN after encapsulating into the lamp pearl to the effect that obtains even demonstration in a disorderly way, however in the encapsulation use of Mini LED, can be with chip snap-on certain kind of base plate, lacked the step that the lamp pearl was disorderly, can produce the uneven Mura phenomenon of dark bright this moment.

If the Mura phenomenon of uneven darkness and brightness is to be solved, chips with the same BIN (such as 1 nm-5 nm wavelength, 5% -30% brightness span, and 0V-0.3V on-state voltage spacing) need to be arranged in a chaotic manner in the chip sorting process, however, the existing chaotic arrangement consumes a long time and has high cost, so that the Mini LED cannot be rapidly enlarged in production scale.

In order to reduce the BIN mixing time, simplify the process, and reduce the cost, as shown in fig. 1 and 14, the present application provides a method for manufacturing an LED semiconductor device:

step S10: providing a carrier substrate 20;

step S20: forming a semiconductor light emitting sequence layer 11 on the carrier substrate 20, the semiconductor light emitting sequence layer 11 including a first conductive type semiconductor layer 112, a second conductive type semiconductor layer 114, and a light emitting layer 113 between the first conductive type semiconductor layer 112 and the second conductive type semiconductor layer 114;

step S30: the semiconductor light emitting series layer 11 is separated to form a plurality of independent chip structures, the plurality of independent LED chips at least comprise a first LED chip 30 and a second LED chip 40 which are adjacently arranged, the chip sizes of the first LED chip 30 and the second LED chip 40 are the same, the first LED chip and the second LED chip are connected with the same current, and the photoelectric properties of the first LED chip 30 and the second LED chip 40 are different.

In the above technical solution, the adjacent first LED chip 30 and the second LED chip 40 on the same carrier substrate have chip structures with different photoelectric parameters, and different photoelectric parameters are provided between the adjacent LED chips on the same carrier substrate through the above special design, so that although the adjacent chips are arranged according to the grabbing principle of the adjacent chips through one-time sorting, different photoelectric parameters are already provided between the adjacent chips, and thus the required mixed arrangement effect can be achieved through one-time sorting, the time of mixed BIN is reduced, the flow is simplified, and the cost is reduced.

In an alternative embodiment, for step S10, as shown in fig. 2, the carrier substrate 20 is a temporary substrate, and the material of the temporary substrate is an insulating material. In an alternative embodiment, the temporary substrate is a blue film, and a plurality of chip structures are present on the blue film.

In an alternative embodiment, the carrier substrate 20 is a circuit substrate.

In an alternative embodiment, before step S20, a step of forming the substrate 10 is further included, and as shown in fig. 9, the substrate 10 is cut after the chip structures are formed, each of the LED chip structures includes a separate substrate 10, the substrate 10 has opposite front and back surfaces, wherein the front surface supports the semiconductor light emitting sequence layer 11, and the front surface is close to the first conductive type semiconductor layer 112. The Substrate 10 in the present application may include, but is not limited to, a Sapphire Substrate, and in the present embodiment, the Substrate 10 may be a Patterned Sapphire Substrate (PSS).

In an alternative embodiment, step S20 specifically includes the following steps:

step S201: forming a semiconductor light-emitting sequence layer 11 on the substrate 10, wherein the semiconductor light-emitting sequence layer 11 includes a first conductive type semiconductor layer 112, a light-emitting layer 113 and a second conductive type semiconductor layer 114, which are sequentially stacked from bottom to top, as shown in fig. 3;

step S202: defining a chip region in the semiconductor light-emitting sequence layer 11, as shown in fig. 4;

step S203: defining a light emitting area in the chip area;

step S204: etching the second conductive type semiconductor layer 114 and the light emitting layer 113 on each light emitting region to form a first window 12, the first window 12 exposing the first conductive type semiconductor layer 112, as shown in fig. 5;

step S205: forming a transparent conductive layer 13 on the upper surface of the second conductive type semiconductor layer 114, as shown in fig. 6;

step S206: forming a first electrode 16 and a second electrode 17 on the transparent conductive layer 13, wherein the second electrode 17 is located in the first window 12; the first electrode 16 is electrically connected to the first conductive type semiconductor layer 112, and the second electrode 17 is electrically connected to the transparent conductive layer 13, as shown in fig. 6;

step S207: forming an insulating material layer on the upper surface of the second conductivity-type semiconductor layer 114, the sidewalls of the first window 12 and the bottom of the first window 12, the insulating material layer covering the transparent conductive layer 13, the first electrode 16 and the second electrode 17, as shown in fig. 7;

step S208: a portion of the insulating material layer at the bottom of the first window 12 is removed to expose the first electrode 16, a portion of the insulating material layer at the upper surface of the transparent conductive layer 13 is removed to form a second window 15, and the second window 15 exposes the second electrode 17, as shown in fig. 7.

In an alternative embodiment, for step S201, the first conductive type semiconductor layer 112 may be an N-type doped gallium nitride layer (N-GaN), the second conductive type semiconductor layer 114 may be a P-type doped gallium nitride layer, and the difference of the peak wavelength provided by the light emitting layer 113 is not higher than 3 nm.

In an alternative embodiment, in step S202, the scribe line 18 may be formed in the semiconductor light emitting sequence layer 11 by a dry etching process to divide the semiconductor light emitting sequence layer 11 into a plurality of separated chip structures.

In an alternative embodiment, the semiconductor light emitting sequence layer 11 of each chip region may be etched, so that the areas of the light emitting regions of the adjacent first LED chip 30 and the second LED chip 40 are different, and the chip structures having different areas of the light emitting regions are randomly distributed, that is, the areas of the regions of the plurality of chip structures formed on the substrate 10 are disordered.

In an alternative embodiment, as shown in fig. 12, the geometrical areas of the light emitting layer 113 in the adjacent first LED chip 30 and the light emitting layer 113 in the second LED chip 40 are different; the difference in the geometric area of the light-emitting layers 113 of the first chip and the second chip is 0 to 50%, and may be 10%, 20%, or 50%.

In an optional embodiment, in step S204, a mask layer may be first formed on the upper surface of the second conductive type semiconductor layer 114, and the mask layer may be a photoresist layer; secondly, exposing and developing the mask layer to perform graphical processing on the mask layer; then, the second conductivity type semiconductor layer 114 and the light emitting layer 113 on each light emitting region are etched by a dry etching process based on the patterned mask layer, thereby forming the first window 12. The first window 12 penetrates the second conductive type semiconductor layer 114 and the light emitting layer 113 along a thickness direction of the second conductive type semiconductor layer 114, and the first window 12 exposes the first conductive type semiconductor layer 112.

In an alternative embodiment, the first window 12 extends into the first conductive type semiconductor layer 112; of course, in other embodiments, the first window 12 may also be formed to penetrate the second conductive type semiconductor layer 114 and the light emitting layer 113 only in the thickness direction.

In an alternative embodiment, in step S205, the material of the transparent conductive layer 13 formed on the upper surface of the second conductive type semiconductor layer 114 may be one or a combination of at least two of ITO (indium tin oxide), GTO (cadmium doped tin oxide), GZO (gallium doped zinc oxide), and ZnO (zinc oxide); the transparent conductive layer 13 is a transparent conductive layer 13, and is formed on the upper surface of the second conductive type semiconductor layer 114 by an evaporation process. In this embodiment, as shown in fig. 13, the areas of the transparent conductive layers 13 of the adjacent first and second chips are different. The area difference of the transparent conductive layer 13 is 0 to 50%, and may be 10%, 20%, or 50%.

In an alternative embodiment, in step S206, a first electrode 16 may be formed in the first window 12 and a second electrode 17 may be formed in the second window 15 by an evaporation process, the first electrode 16 is in direct contact with the first conductive type semiconductor layer 112, the second electrode 17 is in direct contact with the transparent conductive layer 13, and the first electrode 16 and the second electrode 17 may be made of Au materials. In this embodiment, as shown in figure 11,

the coverage areas of the metal electrodes of the first LED chip 30 and the second LED chip 40 are different, and the metal electrodes include the first electrode 16 and the second electrode 17, so that the areas of the first electrodes 16 of the first LED chip 30 and the second LED chip 40 may be different, and/or the areas of the second electrodes 17 of the first LED chip 30 and the second LED chip 40 may be different; that is, only the areas of the first electrodes 16 of the first LED chip 30 and the second LED chip 40 may be different, only the areas of the second electrodes 17 of the first LED chip 30 and the second LED chip 40 may be different, or the areas of the first electrodes 16 of the first LED chip 30 and the second LED chip 40 may be different and the areas of the second electrodes 17 of the chip structures may be different. In an alternative embodiment, the metal electrodes of different chip structures have different shapes, widths, and lengths.

In an alternative embodiment, the insulating material layer deposited in step S207 may be a single silicon dioxide layer or a bragg reflective layer, wherein the bragg reflective layer is a stack of alternating silicon dioxide layers and titanium dioxide layers.

Specifically, the insulating material layer covers the entire upper surface of the transparent conductive layer 13, the side walls of the first window 12, and the bottom of the first window 12.

In an alternative embodiment, in step S208, a patterned mask layer may be first formed on the insulating material layer, where the opening of the patterned mask layer defines the position of the second window 15, and the opening of the patterned mask layer exposes a portion of the bottom of the first window 12; and then etching the insulating material layer based on the patterned mask layer, wherein the insulating material layer remained after the etching is completed is the insulating reflecting layer 14.

In an alternative embodiment, as shown in fig. 8, the chip structure is a flip-chip LED chip, and further includes a bonding pad 21, the insulating reflective layer 14 covers the metal electrode and the transparent conductive layer 13, the bonding pad 21 is formed on the insulating reflective layer 14, and a portion of the bonding pad 21 extends into the first window 12 and the second window 15 and is electrically connected to the metal electrode.

In an alternative embodiment, the first electrode 16 may be an N electrode and the second electrode 17 may be a P electrode.

After step S20 and before step S30, the method further includes a step of thinning the substrate 10. Specifically, the substrate 10 may be thinned and polished using a grinding apparatus; more specifically, the substrate 10 may be thinned and polished using a chemical mechanical polishing process.

In an alternative embodiment, in step S30, the substrate 10 may be cut along the scribe lines 18 formed in the previous step using a cutting or scribing process to obtain a plurality of separated chip structures; specifically, the substrate 10 may be cut using a mechanical cutting process or a laser cutting process.

As shown in fig. 10, the present application also provides a method for manufacturing a light emitting device, including the following steps:

step S10: sorting is performed on the basis of the chip structure formed by the semiconductor manufacturing method of any one of the embodiments to achieve a mixed arrangement effect;

step S20: providing a circuit substrate;

step S30: and mounting the chip structure after the mixed arrangement treatment on a circuit substrate.

Specifically, in an alternative embodiment, the manner of grabbing the job by the sorter is as follows: 1. setting a BIN parameter, wherein the BIN parameter is a data combination comprising chip brightness, voltage and wavelength; 2. the sorting machine picks and sorts according to the principle of being nearby. In the prior art, the photoelectric parameters of the adjacent chip structures are very close to each other, and the mixed arrangement effect cannot be achieved. However, in the present application, the current density of the first LED chip 30 and the second LED chip 40 is adjusted to have a difference, so that the optical-electrical parameters of the adjacent chips have a difference, and thus, a desired mixed-row effect can be obtained by one-time grabbing. In an alternative embodiment, the sorting conditions include optoelectronic parameters of the chip structure, including wavelength, brightness, and turn-on voltage. After the chip structures are arranged in a mixed mode, the difference and disorder of the wavelength, the brightness and the conduction voltage exceed the visual judgment capability of human eyes, and the uniform display effect is achieved. After each chip is inversely bonded on the heat dissipation base plate, the surface of each chip far away from the substrate 10 is contacted with the heat dissipation base plate; the die may be bonded to the heat-dissipating substrate using solder paste.

In the above technical scheme, the adjacent chips on the same carrier substrate have chip structures with different photoelectric parameters, different photoelectric parameters are provided between the adjacent chips on the same carrier substrate through the special design, namely, the photoelectric characteristics between the adjacent chips on the same wafer are discontinuous, therefore, although the adjacent chips are arranged according to the grabbing principle of the adjacent chips through one-time sorting, different photoelectric parameters are provided between the adjacent chips, so that the required mixed arrangement effect can be achieved through one-time sorting, the mixed BIN time is reduced, the flow is simplified, and the cost is reduced.

With continued reference to fig. 9, the present application further provides an LED semiconductor light emitting device, comprising: a carrier substrate 20; a plurality of independent chips are formed on the carrier substrate 20, at least one chip includes a semiconductor light-emitting sequence layer 11, the semiconductor light-emitting sequence layer 11 includes a first conductive type semiconductor layer 112, a second conductive type semiconductor layer 114 and a light-emitting layer 113 sandwiched between the first conductive type semiconductor layer 112 and the second conductive type semiconductor layer 114, the plurality of independent LED chips at least includes a first LED chip 30 and a second LED chip 40 which are adjacently arranged, the chip sizes of the first LED chip 30 and the second LED chip 40 are the same, and when the first LED chip 30 and the second LED chip 40 are supplied with the same current, the photoelectric characteristics of the first LED chip 30 and the second LED chip 40 are different.

In this embodiment, it is preferable that the Substrate 10 is further included between the carrier Substrate 20 and the chip, where the Substrate 10 may include, but is not limited to, a Sapphire Substrate, and in this embodiment, the Substrate 10 may be a Patterned Sapphire Substrate (PSS). In an alternative embodiment, as shown in fig. 7 and 8, the chip includes: a first conductive type semiconductor layer 112 on an upper surface of the substrate 10; a light emitting layer 113 on an upper surface of the first conductive type semiconductor layer 112; a second conductive type semiconductor layer 114 on an upper surface of the light emitting layer 113; a first window 12, the first window 12 penetrating the second conductive type semiconductor layer 114 and the light emitting layer 113 in a thickness direction to expose the first conductive type semiconductor layer 112; a transparent conductive layer 13, the transparent conductive layer 13 being positioned on an upper surface of the second conductive type semiconductor layer 114; the insulating reflecting layer 14, the insulating reflecting layer 14 locates at the upper surface of the transparent conducting layer 13, sidewall of the first window 12 and some first windows 12 bottoms; a second window 15, the second window 15 penetrating the insulating reflective layer 14 in a thickness direction and exposing the transparent conductive layer 13; a first electrode 16 at least located in the first window 12 and electrically connected to the transparent conductive layer 13; and a second electrode 17 at least in the second window 15 and electrically connected to the first conductive type semiconductor layer 112.

Specifically, the first conductivity type may be an N-type, so the first conductivity type semiconductor layer 112 may be an N-type doped gallium nitride layer, the second conductivity type semiconductor layer 114 may be a P-type doped gallium nitride layer, and the difference of the peak wavelengths provided by the light emitting layer 113 is not higher than 3 nm. The scribe lines 18 are formed in the semiconductor light-emitting sequence layer 11 by a dry etching process to define a plurality of chip regions in the semiconductor light-emitting sequence layer 11.

In an alternative embodiment, the light emitting areas of the first LED chip 30 and the second LED chip 40 are different in size, and the chips having different light emitting areas are randomly distributed, that is, areas of regions of the plurality of chips formed on the substrate 10 are disordered.

In an alternative embodiment, as shown in fig. 12, the geometric areas of the light emitting layers 113 of the first LED chip 30 and the second LED chip 40 are different; the difference in the geometric area of the light-emitting layers 113 of the first chip and the second chip is 0 to 50%, and may be 10%, 20%, or 50%.

In an alternative embodiment, as shown in fig. 13, the areas of the transparent conductive layer 13 of the first LED chip 30 and the second LED chip 40 are different. The area difference of the transparent conductive layer 13 is 0 to 50%, and may be 10%, 20%, or 50%.

In an alternative embodiment, as shown in fig. 11, the coverage areas of the metal electrodes of the first LED chip 30 and the second LED chip 40 are different, and the metal electrodes include the first electrode 16 and the second electrode 17, so that the areas of the first electrodes 16 of the first LED chip 30 and the second LED chip 40 may be different, and/or the areas of the second electrodes 17 of the first LED chip 30 and the second LED chip 40 may be different; that is, only the areas of the first electrodes 16 of the first LED chip 30 and the second LED chip 40 may be different, only the areas of the second electrodes 17 of the first LED chip 30 and the second LED chip 40 may be different, or the areas of the first electrodes 16 of the first LED chip 30 and the second LED chip 40 may be different and the areas of the second electrodes 17 of the first LED chip 30 and the second LED chip 40 may be different. In an alternative embodiment, the metal electrodes of the first LED chip 30 and the second LED chip 40 differ in at least one of shape, width dimension, and length dimension.

In an alternative embodiment, the material of the transparent conductive layer 13 formed on the upper surface of the second conductive type semiconductor layer 114 may be one or a combination of at least two of ITO, GTO, GZO, and ZnO; the transparent conductive layer 13 is a transparent conductive layer 13, and is formed on the upper surface of the second conductive type semiconductor layer 114 by an evaporation process.

In an alternative embodiment, the insulating material layer deposited may be a single silicon dioxide layer or a bragg reflector layer, wherein the bragg reflector layer is a stack of alternating silicon dioxide and titanium dioxide layers. A patterned mask layer can be formed on the insulating material layer, the position of the second window 15 is defined by the opening of the patterned mask layer, and the bottom of a part of the first window 12 is exposed by the opening of the patterned mask layer; and then etching the insulating material layer based on the patterned mask layer, wherein the insulating material layer remained after the etching is completed is the insulating reflecting layer 14.

Specifically, the insulating reflective layer 14 covers the entire upper surface of the transparent conductive layer 13, the side wall of the first window 12, and the bottom of the first window 12. In an alternative embodiment, the chip structure is a flip-chip LED chip, and further includes a bonding pad 21, the insulating reflective layer 14 covers the metal electrode and the transparent conductive layer 13, the bonding pad 21 is formed on the insulating reflective layer 14, and a portion of the bonding pad 21 extends into the first window 12 and the second window 15 and is electrically connected to the metal electrode.

The present application further provides a light emitting device which is an RGB display module including the LED light emitting device in any of the above embodiments, wherein the carrier substrate is a package substrate.

The technical features of the above embodiments can be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the above embodiments are not described, but should be considered as the scope of the present specification as long as there is no contradiction between the combinations of the technical features.

The above examples only show some embodiments of the present invention, and the description thereof is more specific and detailed, but not construed as limiting the scope of the invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the inventive concept, which falls within the scope of the present invention. Therefore, the protection scope of the present patent shall be subject to the appended claims.

Claims

1. An LED semiconductor component comprises a bearing substrate, a plurality of independent LED chips are arranged on the bearing substrate, at least one LED chip comprises a semiconductor light-emitting sequence layer, the semiconductor light-emitting sequence layer comprises a first conduction type semiconductor layer, a second conduction type semiconductor layer and a light-emitting layer between the first conduction type semiconductor layer and the second conduction type semiconductor layer,

it is characterized by comprising:

2. The LED semiconductor assembly of claim 1, wherein: the photoelectric characteristics of the first LED chip and the second LED chip comprise wavelength, voltage or luminous intensity.

3. The LED semiconductor assembly of claim 1, wherein: the areas of the light emitting layers of the first chip and the second chip are different.

4. The LED semiconductor assembly of claim 1, wherein: and a transparent conducting layer is formed on the second conduction type semiconductor layer of the chip, and the areas of the transparent conducting layers of the first chip and the second chip are different.

5. The LED semiconductor assembly of claim 1, wherein: and the semiconductor light-emitting sequence layer is provided with metal electrodes, and the coverage areas of the metal electrodes of the first chip and the second chip are different.

6. The LED semiconductor assembly of claim 3, wherein: when the geometrical areas of the light emitting layers are different, the difference of the areas of the light emitting layers of the first chip and the second chip is 0-50%.

7. The LED semiconductor assembly of claim 4, wherein: when the areas of the transparent conductive layers are different, the area difference of the transparent conductive layers of the first chip and the second chip is 0-50%.

8. The LED semiconductor assembly of claim 5, wherein: when the coverage areas of the metal electrodes are different, the difference of the coverage areas of the metal electrodes of the first chip and the second chip is 0-50%.

9. The LED semiconductor assembly of claim 8, wherein: the metal electrodes are different in at least one of shape, width and length.

10. The LED semiconductor assembly of claim 1, wherein: the difference of the peak wavelength of the radiation of the light emitting layers of the first chip and the second chip is not higher than 3 nm.

11. The LED semiconductor assembly of claim 1, wherein: the first chip and the second chip comprise a separate substrate having opposite front and back surfaces, wherein the front surface supports the semiconductor light emitting sequence layer and is closer to the first conductive type semiconductor layer than the light emitting layer.

12. The LED semiconductor assembly of claim 1, wherein: the first chip and the second chip are flip LED chips and further comprise insulating reflecting layers and bonding pads, the insulating reflecting layers cover the metal electrodes and the transparent conducting layers, and the bonding pads are formed on the insulating reflecting layers and are electrically connected with the metal electrodes.

13. The LED semiconductor assembly of claim 1, wherein: the bearing substrate is a temporary substrate, and the temporary substrate is made of an insulating material.

14. An RGB package module comprising the LED light emitting device of any one of claims 1 to 13, wherein the carrier substrate is a package substrate.

15. An RGB display panel comprising a driver circuit and an RGB package module as recited in claim 14.

16. A preparation method of an LED semiconductor component is characterized by comprising the following steps:

providing a bearing substrate;

17. A method for producing an LED semiconductor component according to claim 16, characterized in that: the areas of the light emitting layers of the first LED chip and the second LED chip are different.

18. A method for producing an LED semiconductor component according to claim 17, characterized in that: the difference in area between the light emitting layers of the first LED chip and the second LED chip is 0-50%.

19. A method for producing an LED semiconductor element according to claim 16, characterized in that: the step of forming the semiconductor light-emitting sequence layer on the bearing substrate further comprises the step of forming a transparent conducting layer on the surface of the semiconductor light-emitting sequence layer;

the covering areas of the transparent conducting layers of the first LED chip and the second LED chip are different.

20. A method for producing an LED semiconductor component according to claim 19, characterized in that: the difference of the coverage areas of the transparent conductive layers of the first LED chip and the second LED chip is 0-50%.

21. A method for producing an LED semiconductor component according to claim 16, characterized in that: the step of forming the semiconductor light-emitting sequence layer on the bearing substrate further comprises a step of forming a metal electrode, and the metal electrodes of the first LED chip and the second LED chip are different in coverage area.

22. A method for producing an LED semiconductor component according to claim 21, characterized in that: the difference of the coverage areas of the metal electrodes of the first LED chip and the second LED chip is 0-50%.

23. The method of manufacturing an LED semiconductor device according to claim 22, wherein said metal electrodes of said first LED chip and said second LED chip are different in at least one of shape, width and length.

24. The method for manufacturing an LED semiconductor device according to claim 16, wherein: after the carrier substrate is provided and before the semiconductor light-emitting sequence layer is formed on the carrier substrate, the method further comprises the following steps: forming a substrate on the bearing substrate, wherein the substrate is positioned between the bearing substrate and the semiconductor light-emitting sequence layer; the substrate is provided with a front surface and a back surface which are opposite, and the front surface supports the semiconductor light-emitting sequence layer; and the front surface is closer to the first conductive type semiconductor layer than the light emitting layer.

25. The method for manufacturing an LED semiconductor device according to claim 16, wherein the carrier substrate is a temporary substrate, and the temporary substrate is an insulating material.

26. A method of making a light emitting device, comprising:

sorting chips formed based on the method for manufacturing an LED light emitting assembly according to any one of claims 16 to 25 to achieve a mixed arrangement effect;

providing a circuit substrate;

27. A method of fabricating a light emitting device according to claim 26, characterized in that: the light-emitting device is an RGB display module or an RGB display screen.

28. The method of claim 26, wherein the sorting conditions include optoelectronic parameters of the chip, the optoelectronic parameters including wavelength, brightness and turn-on voltage.