CN114598237A - Voltage surge control method and circuit and power supply circuit applying same - Google Patents

Voltage surge control method and circuit and power supply circuit applying same Download PDF

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Publication number
CN114598237A
CN114598237A CN202210304822.3A CN202210304822A CN114598237A CN 114598237 A CN114598237 A CN 114598237A CN 202210304822 A CN202210304822 A CN 202210304822A CN 114598237 A CN114598237 A CN 114598237A
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CN
China
Prior art keywords
voltage
surge
signal
circuit
permanent magnet
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CN202210304822.3A
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Chinese (zh)
Inventor
钟臻峰
黄晓冬
黄新建
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Hangzhou Silergy Semiconductor Technology Ltd
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Hangzhou Silergy Semiconductor Technology Ltd
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Priority to CN202210304822.3A priority Critical patent/CN114598237A/en
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
    • H02P29/00—Arrangements for regulating or controlling electric motors, appropriate for both AC and DC motors
    • H02P29/02—Providing protection against overload without automatic interruption of supply
    • H02P29/024—Detecting a fault condition, e.g. short circuit, locked rotor, open circuit or loss of load
    • H02P29/028—Detecting a fault condition, e.g. short circuit, locked rotor, open circuit or loss of load the motor continuing operation despite the fault condition, e.g. eliminating, compensating for or remedying the fault
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
    • H02P27/00—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage
    • H02P27/04—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage
    • H02P27/06—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage using dc to ac converters or inverters
    • H02P27/08—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage using dc to ac converters or inverters with pulse width modulation
    • H02P27/085—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage using dc to ac converters or inverters with pulse width modulation wherein the PWM mode is adapted on the running conditions of the motor, e.g. the switching frequency

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Control Of Motors That Do Not Use Commutators (AREA)

Abstract

The invention discloses a voltage surge control method, a voltage surge control circuit and a power supply circuit applying the same. And the suppression of voltage surge is completely realized by software without adding additional devices.

Description

Voltage surge control method and circuit and power supply circuit applying same
Technical Field
The invention relates to a technology for controlling the rotation of a rotating body, in particular to a voltage surge control method and circuit of a three-phase permanent magnet motor and a power supply circuit applying the same.
Background
In the prior art, in order to suppress voltage surge caused by over-fast motor deceleration in three-phase permanent magnet motor control, a brake circuit is often used for discharging. However, under the condition of space and cost limitation, voltage surge suppression is required to be performed on the basis of the original control circuit, and additional devices cannot be added.
As shown in fig. 1, a prior art scheme for determining whether a voltage surge occurs by detecting a dc bus voltage is provided. The brake control circuit 150 is configured to determine whether to enable the brake circuit 120 when the voltage detection circuit 140 detects the occurrence of the surge, thereby suppressing the voltage surge. The method needs to preset a voltage surge comparison threshold, and when the voltage of the direct current bus exceeds the comparison threshold range, brake discharge is carried out. The switch tube of the brake circuit is controlled to be conducted, energy is consumed from the brake circuit, and voltage surge can be quickly restrained. This scheme is reliable under the condition of fixed supply voltage, but after the comparison threshold value is preset, if the supply voltage changes, the voltage surge suppression effect may not be ideal, and the comparison threshold value must be reset to reliably suppress the voltage surge. In addition to the necessity of adding a switching tube and a braking resistor, the braking resistor has a large power because surge energy is discharged, and thus the volume of the braking resistor is large. And in some application occasions, the brake circuit cannot be installed again due to the consideration of cost and space.
Disclosure of Invention
In view of this, the present invention provides a simple control method for suppressing a voltage surge generated due to a reduction in the speed of a permanent magnet motor under an adjustable dc supply voltage, so as to achieve the purpose that the voltage surge suppression effect is still reliable when the supply voltage changes, and no additional device is required to be added in the technical scheme of the present invention.
In a first aspect, a voltage surge control method is provided, where the method is used in a permanent magnet motor system, and is characterized by including:
when the permanent magnet motor receives an instruction for representing that the speed needs to be reduced, the numerical state of the direct current bus voltage is judged, and in the first state, the driving voltage output by the inverter circuit is increased so as to inhibit the permanent magnet motor from charging the bus to inhibit voltage surge; and in the second state, reducing the driving voltage to reduce the rotating speed of the permanent magnet motor.
Preferably, when the dc bus voltage is greater than a voltage threshold, the dc bus is in the first state, which indicates that a voltage surge occurs; and when the direct current bus voltage is not greater than the voltage threshold value, the direct current bus is in the second state, and the voltage surge is not generated.
Preferably, if a voltage surge occurs, increasing the duty ratio of a PWM signal for controlling a three-phase bridge arm in an inverter circuit to increase the driving voltage output by the inverter circuit so as to inhibit the permanent magnet motor from charging a bus; and if no voltage surge occurs, reducing the duty ratio of the PWM signal to reduce the driving voltage, so that the rotating speed of the permanent magnet motor is reduced.
Preferably, if a voltage surge occurs, the duty ratio of the PWM signal for controlling the three-phase bridge arm in the inverter circuit is increased, so that the driving voltage output by the inverter circuit approaches the back electromotive force of the permanent magnet motor.
Preferably, the determining the numerical state of the dc bus voltage includes:
generating a voltage sampling signal representing the magnitude of the direct-current bus voltage by detecting the direct-current bus voltage;
filtering the voltage sampling signal to obtain a filtering signal, and increasing the filtering signal to a preset value to be used as the voltage threshold value for judging voltage surge;
and judging whether voltage surge occurs or not by comparing the voltage sampling signal with the voltage threshold.
Preferably, the predetermined value obtained by superimposing the filtered signal with a bias voltage is used as a voltage threshold for determining the occurrence of a voltage surge.
Preferably, the predetermined value obtained by amplifying the filtered signal by a predetermined multiple is used as a voltage threshold for judging the occurrence of the voltage surge.
Preferably, when the voltage surge occurs, the voltage sampling signal will be above the voltage threshold; when the voltage surge does not occur, the voltage sampling signal will not be above the voltage threshold.
Preferably, the filtering the voltage sampling signal to obtain a filtered signal includes: and the voltage sampling signal is processed by a low-pass filter circuit to obtain the filter signal.
Preferably, the filtering the voltage sampling signal to obtain a filtered signal includes: the voltage sampling signal is subjected to digital filtering processing to obtain a filtering signal which is:
Vdcfilter[kTs]＝(1-f)×Vdcfilter[(k-1)Ts]+f×Vdc[kTs]
wherein, in the formula, Vdc [ kTs ]]F is a digital filter coefficient and is a positive number less than 1, Vdc, for the voltage sampling signal of the DC bus voltage obtained at the kTs sampling momentfilterIs 0.
Preferably, the driving voltage output by the inverter circuit is obtained according to the product of the dc bus voltage and the duty ratio; the counter electromotive force is obtained according to the product of a counter electromotive force coefficient and the rotating speed of the motor, wherein the counter electromotive force coefficient is an inherent parameter of the permanent magnet motor.
In a second aspect, a voltage surge control circuit is provided, which is used in a power supply circuit of a permanent magnet motor, and includes:
the surge detection circuit is used for judging the numerical state of the direct current bus voltage to generate a surge detection signal when the permanent magnet motor receives an instruction for representing that the speed needs to be reduced;
the control circuit receives the surge detection signal, and when the direct current bus voltage is in a first state, the control circuit inhibits the permanent magnet motor from charging the bus so as to inhibit voltage surge by improving the driving voltage output by the inverter circuit; and when the direct current bus voltage is in a second state, reducing the driving voltage output by the inverter circuit so as to reduce the rotating speed of the permanent magnet motor.
Preferably, when the dc bus voltage is greater than a voltage threshold, in the first state, the surge detection signal indicates that a voltage surge occurs; when the direct current bus voltage is not larger than the voltage threshold value, the second state is achieved, and the surge detection signal represents that no voltage surge occurs.
Preferably, when a voltage surge occurs, the control circuit increases the duty ratio of the PWM signal for controlling the three-phase bridge arm in the inverter circuit to increase the driving voltage output by the inverter circuit so as to inhibit the permanent magnet motor from charging the bus; reducing the duty ratio of the PWM signal to reduce the driving voltage when no voltage surge occurs, thereby reducing the rotation speed of the permanent magnet motor
Preferably, when a voltage surge occurs, the control circuit increases the duty ratio of the PWM signal for controlling the three-phase bridge arm in the inverter circuit, so that the driving voltage output by the inverter circuit approaches the back electromotive force of the permanent magnet motor.
Preferably, the surge detection circuit generates the surge detection signal according to a voltage sampling signal representing the voltage of the direct current bus and a voltage threshold value used for judging the occurrence of voltage surge;
wherein the voltage threshold is obtained by increasing a filtered signal obtained by filtering the voltage sampling signal to a predetermined value.
Preferably, the surge detection circuit superimposes the filtered signal with a bias voltage to obtain the predetermined value as the voltage threshold.
Preferably, the surge detection circuit amplifies the filtered signal by a predetermined multiple to obtain the predetermined value as the voltage threshold.
Preferably, the surge detection circuit is configured such that when the voltage surge occurs, the voltage sampling signal will be above the voltage threshold; when the voltage surge does not occur, the voltage sampling signal will not be above the voltage threshold.
Preferably, the surge detection circuit obtains the filtered signal after passing the voltage sampling signal through a low-pass filter circuit.
Preferably, the surge detection circuit performs digital filtering on the voltage sampling signal to obtain a filtered signal:
Vdcfilter[kTs]＝(1-f)×Vdcfilter[(k-1)Ts]+f×Vdc[kTs]
wherein, in the formula, Vdc [ kTs ]]F is a digital filter coefficient and is a positive number less than 1, Vdc, for the voltage sampling signal of the DC bus voltage obtained at the kTs sampling momentfilterIs 0.
Preferably, the surge detection circuit includes:
the sampling circuit is used for receiving the direct-current bus voltage and generating a voltage sampling signal representing the magnitude of the direct-current bus voltage;
the filter circuit is used for carrying out low-pass filtering or digital filtering on the voltage sampling signal to obtain a filtered signal;
the lifting circuit is used for increasing the filtering signal to a preset value and then taking the signal as the voltage threshold value;
and the comparison circuit is used for generating the surge detection signal by comparing the voltage sampling signal with the voltage threshold value.
Preferably, the control circuit obtains the driving voltage output by the inverter circuit according to the product of the dc bus voltage and the duty ratio; and obtaining the counter electromotive force according to the product of the counter electromotive force coefficient and the motor rotating speed, wherein the counter electromotive force coefficient is an inherent parameter of the permanent magnet motor.
In a third aspect, a power supply circuit for a permanent magnet motor is provided, which includes:
a permanent magnet motor, and,
the voltage surge control circuit is described above.
The invention aims to provide a voltage surge control method, which is characterized in that after the voltage of a direct current bus is detected, the voltage obtained by filtering the voltage of the direct current bus is added with a preset bias voltage to be used as a voltage threshold value for judging the occurrence of voltage surge, and when the voltage of the direct current bus is detected to be higher than the voltage threshold value in the speed reduction process of a permanent magnet motor, the output voltage of an inverter circuit is increased, so that the permanent magnet motor does not charge the bus any more, and the purposes of inhibiting the voltage surge and protecting a chip under any power supply voltage are achieved. And the suppression of voltage surge is completely realized by software without adding additional devices.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.
FIG. 1 is a schematic diagram of a prior art motor braking surge voltage suppression circuit;
FIG. 2 is a schematic diagram of a voltage surge control circuit according to the present invention;
fig. 3 is a schematic diagram of a surge detection circuit according to the present invention.
Detailed Description
The present invention will be described below based on examples, but the present invention is not limited to only these examples. In the following detailed description of the present invention, certain specific details are set forth. It will be apparent to one skilled in the art that the present invention may be practiced without these specific details. Well-known methods, procedures, flows, components and circuits have not been described in detail so as not to obscure the present invention.
Further, those of ordinary skill in the art will appreciate that the drawings provided herein are for illustrative purposes and are not necessarily drawn to scale.
Meanwhile, it should be understood that, in the following description, a "circuit" refers to a conductive loop constituted by at least one element or sub-circuit through electrical or electromagnetic connection. When an element or circuit is referred to as being "connected to" another element or element/circuit is referred to as being "connected between" two nodes, it may be directly coupled or connected to the other element or intervening elements may be present, and the connection between the elements may be physical, logical, or a combination thereof. In contrast, when an element is referred to as being "directly coupled" or "directly connected" to another element, it is intended that there are no intervening elements present.
Unless the context clearly requires otherwise, throughout the description and the claims, the words "comprise", "comprising", and the like are to be construed in an inclusive sense as opposed to an exclusive or exhaustive sense; that is, what is meant is "including, but not limited to".
In the description of the present invention, it is to be understood that the terms "first," "second," and the like are used for descriptive purposes only and are not to be construed as indicating or implying relative importance. In addition, in the description of the present invention, "a plurality" means two or more unless otherwise specified.
Fig. 2 is a circuit configuration diagram of a three-phase permanent magnet motor system to which the voltage surge control circuit of the present invention is applied. As shown in fig. 2, the three-phase permanent magnet motor system includes a three-phase permanent magnet motor M, a rectifier circuit 21, a voltage surge control circuit 22, and an inverter circuit 23.
The input end of the rectifying circuit 21 is connected to an alternating current power supply AC, the rectifying circuit 110 has a first output end and a second output end, and the rectifying circuit 21 is configured to receive alternating current output by the alternating current power supply AC and rectify the alternating current to output direct current. The bus capacitor C0 is connected between the first output terminal and the second output terminal of the rectifying circuit 110. In this embodiment, the bus capacitor C0 may be a thin film capacitor or a small-capacity electrolytic capacitor, which is used to filter out the voltage after smoothing the current and absorb the peak voltage during abnormal conditions, and the bus capacitor C0 is smaller than the electrolytic capacitors commonly used in the related art, and has a lower cost. It is understood that the voltage of the bus capacitor C0 is the dc bus voltage Vdc.
The voltage surge control circuit 22 generates a surge detection signal Vsur according to the dc bus voltage Vdc, and the surge detection signal Vsur is used to represent whether a voltage surge occurs in the speed reduction process of the permanent magnet motor system. The voltage surge control circuit 22 suppresses the voltage surge by increasing the driving voltage output from the inverter circuit so as to suppress the charging of the bus by the permanent magnet motor when the voltage surge occurs during the deceleration of the permanent magnet motor.
The inverter circuit 23 is connected to the first output terminal and the second output terminal of the rectifier circuit 21, respectively, and the driving voltage output by the inverter circuit 23 is used to control the permanent magnet motor M.
The inverter circuit 23 is controlled by the control signal PWM of the three-phase bridge arm, so that the driving current or driving voltage of the permanent magnet motor M meets the driving requirement. In an alternative embodiment, the inverter circuit 23 is formed by a three-phase inverter circuit, and the transistors Q1 and Q2, Q3 and Q4, Q5 and Q6 (none of which are shown in fig. 2) respectively serve as a switching tube of the upper arm bridge and a switching tube of the lower arm bridge of the a-phase stator winding, a switching tube of the upper arm bridge and a switching tube of the lower arm bridge of the b-phase stator winding, and a switching tube of the upper arm bridge and a switching tube of the lower arm bridge of the c-phase stator winding, and the transistors Q1 to Q6 are controlled by a control signal PWM of a three-phase bridge arm to be turned on and off so that one of a, b and c is connected to the positive pole of the dc bus voltage Udc, the other is connected to the negative pole of the dc bus voltage Udc, and the third is in a power-off state. Thus, the drive signal output to the permanent magnet motor M can be controlled by the inverter circuit.
Specifically, according to the three-phase permanent magnet motor system of the present invention, the AC power supply inputs AC power to the rectifier circuit 21, the rectifier circuit 21 rectifies the AC power output from the AC power supply and outputs dc power, and the bus capacitor C0 smoothes and filters the dc power to obtain the dc bus voltage Vdc. Thereafter, the inverter circuit 23 inverts the dc bus voltage Vdc into ac power and supplies it to a load, i.e., the permanent magnet motor M, to control its operation. Since the bus capacitor C0 has a small capacity, the absorption capability against abnormal surge is deteriorated, which may cause the dc bus voltage to be too high and damage the components. When the permanent magnet motor receives a deceleration instruction, the duty ratio of the control signal PWM of the inverter circuit 23 is reduced, the driving voltage output by the inverter circuit 23 is reduced, and if the inertia of the permanent magnet motor M is large at this time, and the deceleration acceleration is fast under the working condition, the condition that the counter electromotive force of the motor is higher than the output voltage of the inverter circuit 23 may occur, the permanent magnet motor M charges the bus, resulting in the occurrence of voltage surge, which indicates that the counter electromotive force of the motor is greater than the driving voltage output by the inverter circuit 23, and the output of the surge detection circuit is changed from low to high at this time.
Further, the voltage surge control circuit 22 includes a surge detection circuit 221 and a control circuit 222.
The surge detection circuit 221 is connected in parallel with the bus capacitor C0, and when the permanent magnet motor M receives an instruction indicating that the speed needs to be reduced, determines the numerical state of the dc bus voltage to detect whether the dc bus voltage Vdc has a voltage surge, thereby generating a surge detection signal Vsur based on the voltage surge. Specifically, the surge detection circuit 221 generates the surge detection signal Vsur based on the voltage sampling signal Vs representing the magnitude of the dc bus voltage Vdc and the voltage threshold Vth for determining the occurrence of the voltage surge.
When the direct current bus voltage Vdc is greater than the voltage threshold value Vth, the direct current bus is in a first state and indicates that voltage surge occurs; when the direct current bus voltage Vdc is not greater than the voltage threshold Vth, the state is a second state, which indicates that no voltage surge occurs.
More specifically, the voltage threshold Vth may be obtained by increasing a filtered signal obtained by filtering the voltage sampling signal Vs to a predetermined value. Here, the voltage sampling signal Vs is preferably obtained after passing through a low-pass filter circuit. In an alternative embodiment, the surge detection circuit 221 uses a predetermined value obtained by superimposing a low-pass filtered signal of the voltage sampling signal Vs and an offset voltage as the voltage threshold Vth; in another alternative embodiment, the surge detection circuit 221 amplifies a low-pass filtered signal of the voltage sampling signal Vs by a predetermined multiple to obtain a predetermined value as the voltage threshold Vth.
Optionally, the surge detection circuit 221 may also perform digital filtering on the voltage sampling signal Vs to obtain a filtered signal VdcfilterSpecifically, the filtered signal Vdc can be obtained by the following formulafilter：
Vdcfilter[kTs]＝(1-f)×Vdcfilter[(k-1)Ts]+f×Vdc[kTs]
In the formula, Vdc [ kTs ]]A voltage sampling signal of the DC bus voltage obtained at the kTs sampling moment, k is a positive integer, Ts is a sampling period, f is a digital filter coefficient, f is a positive number less than 1, VdcfilterIs 0.
The purpose of raising the low-pass filtered signal of the voltage sampling signal Vs to a predetermined value as the voltage threshold Vth is only to make the voltage sampling signal Vs higher than the voltage threshold Vth when a voltage surge occurs, so that the surge detection circuit 221 outputs an effective surge detection signal Vsur (for example, a high level); when no voltage surge occurs, the voltage sampling signal Vs is made not higher than the voltage threshold Vth, so that the surge detection circuit 221 outputs an invalid surge detection signal Vsur (e.g., low level).
The control circuit 222 is used for receiving the surge detection signal Vsur, and when a voltage surge occurs in the permanent magnet motor system during the speed reduction process, the drive voltage output by the inverter circuit 23 is increased, so that the permanent magnet motor M is inhibited from charging the bus to inhibit the voltage surge; when no voltage surge occurs, the driving voltage output from the inverter circuit 23 is reduced to reduce the rotation speed of the permanent magnet motor M.
Further, when a voltage surge occurs, the control circuit 222 increases the duty ratio of the control signal PWM for controlling the three-phase bridge arm in the inverter circuit to increase the driving voltage output by the inverter circuit 23, so that the permanent magnet motor M does not charge the bus; when no voltage surge occurs, the duty ratio of the control signal PWM of the three-phase arm in the inverter circuit 23 is reduced to reduce the output drive voltage, thereby reducing the rotation speed of the permanent magnet motor M.
Further, the control circuit 222 increases the duty ratio of the control signal PWM for controlling the three-phase arm in the inverter circuit when a voltage surge occurs, so that the driving voltage output from the inverter circuit 23 approaches the counter electromotive force of the permanent magnet motor M. Preferably, the control circuit 222 may obtain the driving voltage output by the inverter circuit according to the product of the dc bus voltage Vdc and the duty ratio of the control signal PWM; and the counter electromotive force can be obtained according to the product of the counter electromotive force coefficient and the motor rotating speed, wherein the counter electromotive force coefficient is an inherent parameter of the permanent magnet motor and can be directly measured, and the motor rotating speed can be directly obtained through the existing control algorithm.
When the voltage surge control circuit 22 detects that a voltage surge occurs in the voltage of the bus capacitor C0, that is, when the fluctuation of the dc bus voltage Vdc exceeds a predetermined range, the control circuit 222 controls the driving voltage output by the inverter circuit 23 to approach the back electromotive force of the permanent magnet motor M, so that the permanent magnet motor M no longer charges the bus, and an abnormal surge is suppressed, thereby preventing the voltage across the bus capacitor C0 from further increasing, and protecting power devices (such as power devices in the inverter circuit 23) from being damaged by high voltage.
After the system receives the surge detection signal Vsur, the PWM duty ratio is increased from low to high, so that the output voltage of the inverter is equal to the back electromotive force of the motor, the motor does not continue to reduce the speed, the bus voltage stops rising, and the voltage surge is restrained. After the surge is suppressed, the voltage of the bus is reduced until the surge detection signal Vsur output by the surge detection circuit is changed from high to low, and then the speed is reduced. Therefore, the invention realizes surge suppression in the speed reduction process of the motor and prevents the system or the chip from being damaged by overvoltage.
Therefore, the control method and the circuit for suppressing the voltage surge of the bus do not need additional brake resistors and brake switch tubes, and the surge detection signal representing whether the voltage surge occurs is obtained by comparing the directly acquired direct current bus voltage signal with the direct current bus voltage which is subjected to low-pass filtering and amplification, so that the purposes of suppressing the voltage surge and protecting the system can be achieved under any power supply voltage.
Fig. 3 is a schematic diagram of a surge detection circuit of the present invention. As shown in fig. 3, in the embodiment of the present invention, the surge detection circuit 221 includes a sampling circuit 2211, a filtering circuit 2212, a boosting circuit 2213 and a comparing circuit U2.
Specifically, the sampling circuit 2211 is configured to receive the dc bus voltage Vdc and accordingly generate a voltage sampling signal Vs representing the magnitude of the dc bus voltage Vdc. In one specific example of the present invention, as shown in fig. 3, the sampling circuit 2211 includes a first voltage-dividing resistor R1 and a second voltage-dividing resistor R2. One end of the first voltage dividing resistor R1 is connected with one end of the bus capacitor C0 to receive the direct-current bus voltage Vdc; one end of the second voltage-dividing resistor R2 is connected to the other end of the first voltage-dividing resistor R1, and the other end of the second voltage-dividing resistor R2 is connected to the other end of the bus capacitor C0, wherein a voltage sampling signal Vs is generated at a common node of the first voltage-dividing resistor R1 and the second voltage-dividing resistor R2. That is, the voltage of the bus capacitor C0 is detected by a voltage dividing circuit composed of the first voltage dividing resistor R1 and the second voltage dividing resistor R2.
The filter circuit 2212 is configured to perform low-pass filtering or digital filtering on the voltage sampling signal Vs to obtain a filtered signal. In one specific example of the present invention, as shown in fig. 3, the filter circuit 2212 includes a low-pass filter circuit formed by the third resistor R3 and the first capacitor C1. One end of the third resistor R3 is connected to the common node of the first voltage-dividing resistor R1 and the second voltage-dividing resistor R2 to receive the voltage sampling signal Vs, the other end is connected to one end of the first capacitor C1, the first capacitor C1 is connected to the ground, and a filtered signal of the voltage sampling signal Vs is generated at the common node of the third resistor R3 and the first capacitor C1. Furthermore, the values of the third resistor R3 and the first capacitor C1 are required to make the time constant t of the low-pass filtering larger, where the time constant t is R3 × C1.
The boosting circuit 2213 is used for boosting the filtered signal to a predetermined value as a voltage threshold Vth. In one specific example of the present invention, as shown in fig. 3, the boost circuit 2213 includes an amplification circuit composed of an amplifier U1, a fourth resistor R4, and a fifth resistor R5. The voltage threshold Vth is obtained after the filtering signal is amplified by an amplifying circuit, and the amplification factor of the amplifying circuit is (R4+ R5)/R5. In other embodiments, the filtered signal can be directly superimposed with an offset voltage to be used as the voltage threshold Vth.
The comparator circuit U2 is configured to compare the voltage sampling signal Vs with a voltage threshold Vth to generate a surge detection signal Vsur. In this example, the non-inverting input of the comparison circuit U2 receives the voltage sampling signal Vs and the inverting input receives the voltage threshold Vth. When the permanent magnet motor system normally runs and has no voltage surge, the voltage threshold value Vth is slightly higher than the voltage sampling signal Vs, and the surge detection signal Vsur is at a low level; when a voltage surge occurs in the permanent magnet motor system, the dc bus voltage Vdc rises rapidly, and the inverting input terminal of the comparison circuit U2 is subjected to a significant delay in the change of the voltage threshold Vth due to the presence of the low pass filter having a large time constant t and is kept at a value before the change, so that the surge detection signal Vsur is at a high level, and thus, whether a voltage surge occurs can be determined.
In this embodiment, the amplifier U1 and the comparator U2 may be dedicated integrated circuit chips, or may be circuits with the same function formed by discrete components.
The surge detection circuit 221, by filtering the dc bus voltage Vdc and increasing the voltage Vdc to a predetermined value, may adjust the voltage threshold Vth by itself in the application where the power supply voltage is adjustable, without presetting the voltage threshold according to the power supply voltage in software. Meanwhile, the motor voltage surge suppression can be realized without additionally adding a brake circuit in the system.
Therefore, by adopting the voltage surge control method, whether the voltage surge occurs can be judged under any power supply voltage, and the voltage surge detection is carried out without setting the voltage surge threshold under different power supply voltages like the prior art.
In summary, the present invention is directed to a control method for suppressing a voltage surge caused by a motor speed reduction under an adjustable dc supply voltage. The core invention point of the invention lies in that on the basis of the original permanent magnet motor control system hardware, the voltage obtained by filtering the direct current bus voltage after detecting the direct current bus voltage and adding the artificially set bias voltage is taken as the voltage threshold value of the generated voltage surge, and when the direct current bus voltage detected in the speed reduction process of the permanent magnet motor is higher than the voltage threshold value, the output voltage of the inverter circuit is increased, so that the permanent magnet motor can not charge the bus any more, thereby achieving the purposes of inhibiting the voltage surge and protecting the chip under any power supply voltage. And the suppression of voltage surge is completely realized by software without adding additional devices.
The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims (24)

1. A method of voltage surge control for use in a permanent magnet motor system, comprising:
when the permanent magnet motor receives an instruction for representing that the speed needs to be reduced, the numerical state of the direct current bus voltage is judged, and in the first state, the driving voltage output by the inverter circuit is increased so as to inhibit the permanent magnet motor from charging the bus to inhibit voltage surge; and in the second state, reducing the driving voltage to reduce the rotating speed of the permanent magnet motor.
2. The voltage surge control method of claim 1, wherein when the dc bus voltage is greater than a voltage threshold, in the first state, indicating a voltage surge is occurring; when the direct current bus voltage is not larger than the voltage threshold value, the direct current bus is in the second state, and the voltage surge is not generated.
3. The voltage surge control method according to claim 2, wherein if a voltage surge occurs, the duty ratio of PWM signals for controlling a three-phase bridge arm in an inverter circuit is increased to increase the driving voltage output by the inverter circuit so as to inhibit the permanent magnet motor from charging a bus; and if no voltage surge occurs, reducing the duty ratio of the PWM signal to reduce the driving voltage so as to reduce the rotating speed of the permanent magnet motor.
4. The voltage surge control method according to claim 2, wherein if a voltage surge occurs, the duty ratio of the PWM signal for controlling the three-phase bridge arm in the inverter circuit is increased so that the driving voltage output from the inverter circuit approaches the back electromotive force of the permanent magnet motor.
5. The method of claim 2, wherein determining the numerical state of the dc bus voltage comprises:
generating a voltage sampling signal representing the magnitude of the direct-current bus voltage by detecting the direct-current bus voltage;
filtering the voltage sampling signal to obtain a filtering signal, and increasing the filtering signal to a preset value to be used as the voltage threshold for judging the occurrence of voltage surge;
and judging whether voltage surge occurs or not by comparing the voltage sampling signal with the voltage threshold.
6. The voltage surge control method according to claim 5, wherein the predetermined value obtained by superimposing the filtered signal with an offset voltage is used as a voltage threshold value for determining occurrence of a voltage surge.
7. The voltage surge control method according to claim 5, wherein the predetermined value obtained by amplifying the filtered signal by a predetermined multiple is used as a voltage threshold value for determining occurrence of the voltage surge.
8. The voltage surge control method of claim 5, wherein the voltage sampling signal will be above the voltage threshold when the voltage surge occurs; when the voltage surge does not occur, the voltage sampling signal will not be above the voltage threshold.
9. The voltage surge control method of claim 5, wherein filtering the voltage sample signal to obtain a filtered signal comprises: and the voltage sampling signal is processed by a low-pass filter circuit to obtain the filter signal.
10. The voltage surge control method of claim 5, wherein filtering the voltage sample signal to obtain a filtered signal comprises: the voltage sampling signal is subjected to digital filtering processing to obtain a filtering signal which is:
Vdcfilter[kTs]＝(1-f)×Vdcfilter[(k-1)Ts]+f×Vdc[kTs]
wherein, in the formula, Vdc [ kTs ]]F is a digital filter coefficient and is a positive number less than 1, Vdc, for a voltage sampling signal of the DC bus voltage obtained at the kTs sampling timefilterIs 0.
11. The voltage surge control method according to claim 4, wherein the driving voltage output by the inverter circuit is obtained from a product of the dc bus voltage and the duty ratio; the counter electromotive force is obtained according to the product of a counter electromotive force coefficient and the rotating speed of the motor, wherein the counter electromotive force coefficient is an inherent parameter of the permanent magnet motor.
12. A voltage surge control circuit is used in a permanent magnet motor power supply circuit, and is characterized by comprising:
the surge detection circuit is used for judging the numerical state of the direct current bus voltage to generate a surge detection signal when the permanent magnet motor receives an instruction for representing that the speed needs to be reduced;
the control circuit receives the surge detection signal, and when the direct current bus voltage is in a first state, the control circuit inhibits the permanent magnet motor from charging the bus so as to inhibit voltage surge by improving the driving voltage output by the inverter circuit; and when the direct current bus voltage is in a second state, reducing the driving voltage output by the inverter circuit so as to reduce the rotating speed of the permanent magnet motor.
13. The voltage surge control circuit of claim 12, wherein in the first state when the dc bus voltage is greater than a voltage threshold, the surge detection signal is indicative of a voltage surge occurring; when the direct current bus voltage is not larger than the voltage threshold value, the second state is achieved, and the surge detection signal represents that no voltage surge occurs.
14. The voltage surge control circuit according to claim 13, wherein the control circuit increases the driving voltage output from the inverter circuit by increasing the duty ratio of the PWM signal for controlling the three-phase bridge arm in the inverter circuit when the voltage surge occurs, so as to inhibit the permanent magnet motor from charging the bus; and when no voltage surge occurs, reducing the duty ratio of the PWM signal to reduce the driving voltage so as to reduce the rotating speed of the permanent magnet motor.
15. The voltage surge control circuit of claim 13, wherein the control circuit increases a duty ratio of a PWM signal for controlling a three-phase bridge arm of an inverter circuit when a voltage surge occurs, so that a driving voltage output from the inverter circuit approaches a back electromotive force of the permanent magnet motor.
16. The voltage surge control circuit of claim 13, wherein the surge detection circuit generates the surge detection signal based on a voltage sampling signal indicative of a magnitude of a dc bus voltage and a voltage threshold used to determine that a voltage surge occurs;
wherein the voltage threshold is obtained by increasing a filtered signal obtained by filtering the voltage sampling signal to a predetermined value.
17. The voltage surge control circuit of claim 16, wherein the surge detection circuit superimposes the filtered signal with a bias voltage to obtain the predetermined value as the voltage threshold.
18. The voltage surge control circuit of claim 16, wherein the surge detection circuit amplifies the filtered signal by a predetermined factor to obtain the predetermined value as the voltage threshold.
19. The voltage surge control circuit of claim 16, wherein the surge detection circuit is configured such that when the voltage surge occurs, the voltage sample signal will be above the voltage threshold; when the voltage surge does not occur, the voltage sampling signal will not be above the voltage threshold.
20. The voltage surge control circuit of claim 16, wherein the surge detection circuit passes the voltage sampled signal through a low pass filter circuit to obtain the filtered signal.
21. The voltage surge control circuit of claim 16, wherein the filtered signal obtained by the surge detection circuit digitally filtering the voltage sampled signal is:
Vdcfilter[kTs]＝(1-f)×Vdcfilter[(k-1)Ts]+f×Vdc[kTs]
wherein, in the formula, Vdc [ kTs ]]F is a digital filter coefficient and is a positive number less than 1, Vdc, for the voltage sampling signal of the DC bus voltage obtained at the kTs sampling momentfilterIs 0.
22. The voltage surge control circuit of claim 16, wherein the surge detection circuit comprises:
the sampling circuit is used for receiving the direct-current bus voltage and generating a voltage sampling signal representing the magnitude of the direct-current bus voltage;
the filter circuit is used for carrying out low-pass filtering or digital filtering on the voltage sampling signal to obtain a filter signal;
the lifting circuit is used for increasing the filtering signal to a preset value and then taking the signal as the voltage threshold value;
and the comparison circuit is used for generating the surge detection signal by comparing the voltage sampling signal with the voltage threshold value.
23. The voltage surge control circuit of claim 15, wherein the control circuit obtains the driving voltage output by the inverter circuit according to a product of the dc bus voltage and the duty cycle; and obtaining the counter electromotive force according to the product of the counter electromotive force coefficient and the motor rotating speed, wherein the counter electromotive force coefficient is an inherent parameter of the permanent magnet motor.
24. A permanent magnet motor supply circuit, comprising:
a permanent magnet motor, and,
a voltage surge control circuit according to any of claims 12-23.
CN202210304822.3A 2022-03-23 2022-03-23 Voltage surge control method and circuit and power supply circuit applying same Pending CN114598237A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202210304822.3A CN114598237A (en) 2022-03-23 2022-03-23 Voltage surge control method and circuit and power supply circuit applying same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202210304822.3A CN114598237A (en) 2022-03-23 2022-03-23 Voltage surge control method and circuit and power supply circuit applying same

Publications (1)

Publication Number Publication Date
CN114598237A true CN114598237A (en) 2022-06-07

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Application Number Title Priority Date Filing Date
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CN (1) CN114598237A (en)

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