CN114564152A - Flash memory control method and device - Google Patents

Flash memory control method and device Download PDF

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Publication number
CN114564152A
CN114564152A CN202210189605.4A CN202210189605A CN114564152A CN 114564152 A CN114564152 A CN 114564152A CN 202210189605 A CN202210189605 A CN 202210189605A CN 114564152 A CN114564152 A CN 114564152A
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flash memory
memory unit
data
memory module
condition
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廖火生
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Lenovo Beijing Ltd
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Lenovo Beijing Ltd
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671—In-line storage system
    • G06F3/0673—Single storage device
    • G06F3/0679—Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0608—Saving storage space on storage systems
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/061—Improving I/O performance
    • G06F3/0611—Improving I/O performance in relation to response time
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0646—Horizontal data movement in storage systems, i.e. moving data in between storage devices or systems
    • G06F3/0647—Migration mechanisms
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Theoretical Computer Science (AREA)
  • Human Computer Interaction (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
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Abstract

The application discloses a flash memory control method and a flash memory control device, wherein the method comprises the following steps: under the condition that the electronic equipment meets the dormancy condition, obtaining data caching information of a first flash memory unit in a flash memory module, wherein the data caching information represents the condition of caching data in the first flash memory unit; if the data caching information meets the first condition, the flash memory module is maintained in a non-dormant state, so that the flash memory module can transfer the cached data in the first flash memory unit to the second flash memory unit. According to the scheme, after the electronic equipment is awakened from the sleep mode, the situation that the writing performance of writing data into the first flash memory unit is influenced due to the fact that the available space of the first flash memory unit is small is reduced.

Description

Flash memory control method and device
Technical Field
The present application relates to the field of control technologies, and in particular, to a flash memory control method and apparatus.
Background
With the continuous development of memory technology, the types of flash memories in flash memory modules in electronic devices are increasingly diversified. For example, the flash memory may be divided into a Single-Level Cell (SLC), a Multi-Level Cell (MLC), a Triple-Level Cell (TLC), and so on.
The storage capacity and write performance of different flash memories may vary. At present, a flash memory with large storage capacity generally has the condition of slow writing speed; the storage capacity of the flash memory with a fast writing speed is smaller, and once the remaining storage space of the flash memory becomes smaller, the writing performance is also greatly reduced, so how to effectively ensure the writing performance of the flash memory module is a technical problem that needs to be solved by those skilled in the art.
Disclosure of Invention
The application provides a flash memory control method and device.
The flash memory control method is applied to electronic equipment and comprises the following steps:
under the condition that the electronic equipment meets a sleep condition, obtaining data cache information of a first flash memory unit in a flash memory module, wherein the data cache information represents the condition of caching data in the first flash memory unit, the flash memory module comprises a first flash memory unit and a second flash memory unit, and the data writing speed of the first flash memory unit is higher than that of the second flash memory unit;
if the data caching information meets a first condition, maintaining the flash memory module in a non-dormant state, so that the flash memory module can transfer the cached data in the first flash memory unit to the second flash memory unit.
In a possible implementation manner, the obtaining data cache information of a first flash memory unit in a flash memory module includes:
obtaining first available space information of a first flash memory unit in the flash memory module;
the data caching information meets a first condition, and comprises:
the first available space information represents that the remaining space proportion of the first flash memory unit is smaller than a proportion threshold, and the remaining space proportion is the proportion of the remaining space of the first flash memory unit to the total space of the first flash memory unit.
In another possible implementation manner, before determining that the remaining space proportion of the first flash memory unit is smaller than the proportion threshold, the method further includes:
obtaining the fragmentation degree of a storage unit in the first flash memory unit;
determining a proportional threshold corresponding to the degree of fragmentation.
In another possible implementation manner, after maintaining the flash memory module in the non-sleep state, the method further includes:
obtaining second available space information of a first flash memory unit in the flash memory module;
and if the second available space information represents that the remaining space occupation ratio of the first flash memory unit is not less than the ratio threshold value and the electronic equipment still meets the sleep condition or is in the sleep state, controlling the flash memory module to enter the sleep state.
In another possible implementation manner, the data caching information satisfies a first condition, including:
the data caching information represents data cached in the first flash memory unit.
In another possible implementation manner, obtaining data caching information of a first flash memory unit in a flash memory module includes:
acquiring data information to be transferred from a first flash memory unit of a flash memory module to a second flash memory unit;
the data caching information indicates that data is cached in the first flash memory unit, and the data caching information includes:
and the data information to be transferred represents that the data to be transferred to the second flash memory unit exists in the first flash memory unit.
In another possible implementation manner, after maintaining the flash memory module in the non-sleep state, the method further includes:
and controlling the flash memory module to enter a dormant state when the first flash memory unit is confirmed to have no cached data or no data to be transferred to a second flash memory unit and the electronic equipment still meets the dormant condition or is in the dormant state.
In yet another possible implementation manner, before the maintaining the flash memory module in the non-sleep state, the method further includes:
acquiring electric quantity state information of the electronic equipment;
if the data caching information meets a first condition, maintaining the flash memory module in a non-dormant state comprises:
and if the data cache information meets a first condition and the electric quantity state information meets a second condition, maintaining the flash memory module in a non-dormant state.
In yet another possible implementation manner, the method further includes:
if the electronic equipment does not meet the dormancy condition and the data volume to be written into the flash memory module of the electronic equipment exceeds a quantity threshold value, sending a buffer expansion instruction to the flash memory module;
and responding to the buffer expansion instruction through the flash memory module, and expanding a part of the storage area of the second flash memory unit in the flash memory module into an expansion area of the first flash memory unit, wherein the expansion area of the first flash memory unit has the same data storage mode as that of the first flash memory unit.
The flash memory control device is applied to electronic equipment and comprises:
the information obtaining unit is used for obtaining data caching information of a first flash memory unit in a flash memory module under the condition that the electronic equipment meets a dormancy condition, the data caching information represents the condition of caching data in the first flash memory unit, the flash memory module comprises the first flash memory unit and a second flash memory unit, and the data writing speed of the first flash memory unit is higher than that of the second flash memory unit;
and the dormancy control unit is used for maintaining the flash memory module in a non-dormant state if the data caching information meets a first condition so that the flash memory module can transfer the cached data in the first flash memory unit to the second flash memory unit.
According to the scheme, under the condition that the electronic equipment meets the dormancy condition, if the data caching information of the first flash memory unit in the flash memory module meets the first condition, the flash memory module cannot be dormant, so that the flash memory module can transfer the cached data in the first flash memory unit to the second flash memory unit, and the condition that the data in the first flash memory unit cannot be timely transferred can be reduced; the situation that the writing performance of writing data into the first flash memory unit is influenced due to the fact that the available space of the first flash memory unit is small after the electronic equipment wakes up again can be reduced.
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In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic flowchart of a flash memory control method according to an embodiment of the present disclosure;
fig. 2 is a schematic flowchart of another flash memory control method according to an embodiment of the present disclosure;
FIG. 3 is a diagram illustrating fragmentation in a first flash memory cell according to an embodiment of the present application;
fig. 4 is a schematic flowchart of another flash memory control method according to an embodiment of the present disclosure;
fig. 5 is a schematic flowchart of another flash memory control method according to an embodiment of the present disclosure;
fig. 6 is a schematic flowchart of another flash memory control method according to an embodiment of the present disclosure;
fig. 7 is a schematic structural diagram of an extended first flash memory unit in an electronic device according to an embodiment of the present disclosure;
fig. 8 is a schematic structural diagram of a flash memory control device according to an embodiment of the present disclosure;
fig. 9 is a schematic structural diagram of an electronic device according to an embodiment of the present application.
The terms "first," "second," "third," "fourth," and the like in the description and in the claims, as well as in the drawings described above, if any, are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It should be understood that the data so used may be interchanged under appropriate circumstances such that embodiments of the application described herein may be practiced otherwise than as specifically illustrated.
Detailed Description
The scheme of the application can be applied to any electronic equipment, the writing performance of the flash memory module in the electronic equipment can be improved through the scheme of the application, and the situation that the writing performance is influenced due to insufficient storage space of the high-writing-performance flash memory unit in the flash memory module is reduced.
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without inventive step, are within the scope of the present disclosure.
Referring to fig. 1, which shows a flowchart of a flash memory control method provided in an embodiment of the present application, the method of the present application may be applied to an electronic device, which may be a desktop computer, a notebook computer, or a mobile phone, and the like, without limitation.
The method of the embodiment may include:
s101, under the condition that the electronic equipment meets the dormancy condition, data caching information of a first flash memory unit in a flash memory module is obtained.
The electronic equipment meeting the dormancy condition means that the electronic equipment meets the condition of entering the dormancy state, and the electronic equipment can also start the dormancy operation.
Flash memory modules are non-volatile memories that retain stored data information when power is removed. In electronic devices a CPU or a host system including a CPU often needs to store data into a flash memory module. For example, the flash memory module may store data related to the BIOS and the camera in the electronic device.
In order to ensure that the flash memory module has a large storage capacity and simultaneously can ensure the data writing speed of the flash memory module, in the application, the flash memory module comprises two flash memory units, namely a first flash memory unit and a second flash memory unit. The data writing speed of the first flash memory unit is faster than that of the second flash memory unit. Of course, the storage capacity of the second flash memory unit is generally larger than that of the first flash memory unit.
On the basis, data needing to be written into the flash memory module in the electronic equipment is firstly cached in the first flash memory unit, then the controller in the flash memory module controls the data cached in the first flash memory unit to be transferred into the second flash memory unit, and the data writing speed of the first flash memory unit is high, so that the flash memory module can be guaranteed to have large storage capacity while the writing speed is guaranteed.
The flash memory module may have various possibilities, which are not limited in the present application.
For example, in one possible scenario, the Flash memory module may be a Universal Flash Storage (UFS). In this case, the first flash memory Cell may be a single-Level Cell (SLC) or may be referred to as a single-layer Cell, and the second flash memory Cell may be a Triple-Level Cell (TLC).
Wherein, for UFS, available flash memory cells include: SLC, second-Level Cell (MLC), TLC and fourth-Level Cell (QLC), wherein the storage capacity of the flash memory Cell is, in order from low to high: SLC, MLC, TLC and QLC, where the larger the storage capacity is, the slower the writing speed is relatively, and therefore, the writing speed of SLC is the fastest, and in order to guarantee performance, the first flash memory cell in the flash memory module may be SLC.
It is understood that, in the case where the first flash memory Cell is an SLC, the second flash memory Cell may also be a Multi-Level Cell (MLC), or other memory Cell having a lower write performance than the SLC but a larger storage capacity than the SLC.
Of course, the first flash memory cell may also be an MLC, and the second flash memory cell may be a TLC, and there may be other possible situations for the first flash memory cell and the second flash memory cell, which is not limited in this respect.
The data caching information represents the condition of caching data in the first flash memory unit. For example, the condition of caching data in the first flash memory unit may be whether data is cached in the first flash memory unit, the amount of cached data, the space occupied by cached data, or the remaining available space due to caching data, and the like, which is not limited herein.
S102, if the data caching information meets the first condition, the flash memory module is maintained in a non-dormant state, so that the flash memory module can transfer the cached data in the first flash memory unit to the second flash memory unit.
The data caching information meets the requirement that the first condition represents that the first flash memory unit has transfer or clear data.
It is understood that, since the data caching information reflects the condition of caching data in the first flash memory unit, the condition of data to be transferred in the first flash memory unit or the condition of space usage, etc. can be confirmed through the data caching information. The writing performance of the first flash memory unit is affected by the amount of data stored in the first flash memory unit or the amount of space usage, and in order to ensure the writing performance of the first flash memory unit, it is necessary to transfer or clean the data stored therein in time.
And the research shows that: when the electronic device meets the hibernation condition, the electronic device starts hibernation, and in the process, the electronic device sleeps the flash memory module, and once the flash memory module is dormant, the cached data in the first flash memory unit cannot be transferred or cleaned. On the basis, after the electronic device is awakened from the sleep mode, the performance of writing data into the first flash memory unit may be affected because the data in the first flash memory unit is not requested in time.
Based on the research, under the condition that the electronic equipment needs to enter the dormant state, if the data cache unit meets the first condition, the flash memory module cannot be dormant, so that the flash memory module can still normally maintain and manage the data storage of the first flash memory unit and the second flash memory unit. Accordingly, the flash memory module can still transfer the data in the first flash memory unit to the second flash memory module when the data in the first flash memory unit needs to be transferred, or perform other related data cleaning on the data in the first flash memory unit, so as to release the storage space of the first flash memory unit.
It can be understood that, after maintaining the flash memory module in the non-hibernation state, the electronic device may further monitor data caching information in a first flash memory unit in the flash memory module, and if the data caching information of the first flash memory unit does not satisfy a first condition (or satisfies a second condition other than the first condition), the flash memory module may be hibernated to reduce power consumption of the electronic device if the electronic device still satisfies the hibernation state.
The data caching information of the first flash memory unit does not satisfy the first condition (or satisfies the second condition), which may indicate that the first flash memory unit does not have a requirement for data cleaning or data transfer, and the current data caching condition of the first flash memory unit has no or little influence on the data writing performance of the first flash memory unit.
It is understood that, in the present application, if the electronic device (such as a CPU or a host system including the CPU) is in a data writing state for writing data into the flash memory module when the electronic device satisfies the hibernation condition, the electronic device may wait for completing the data writing before the electronic device can hibernate the flash memory module regardless of the data cache information of the first flash memory unit of the flash memory module.
Correspondingly, if the electronic device is still in a data writing state of writing data into the flash memory module when the electronic device meets the hibernation condition, the electronic device needs to wait for the completion of the writing of the data to be written into the flash memory module and then judges whether the data cache information of the first flash memory unit meets the first condition so as to determine whether to hibernate the flash memory module.
According to the scheme, under the condition that the electronic equipment meets the dormancy condition, if the data caching information of the first flash memory unit in the flash memory module meets the first condition, the flash memory module cannot be dormant, so that the flash memory module can transfer the cached data in the first flash memory unit to the second flash memory unit, and the condition that the data in the first flash memory unit cannot be timely transferred can be reduced; the situation that the writing performance of writing data into the first flash memory unit is influenced due to the fact that the available space of the first flash memory unit is small after the electronic equipment wakes up again can be reduced.
In order to facilitate understanding of the scheme of the present application, the scheme of the present application is described below with reference to different cases of the obtained data caching information in the first flash memory unit and the first condition.
In one possible case, the data cache information in the first flash memory unit may be available space information of the first flash memory unit. In order to distinguish the available space from the available space obtained after the flash memory module enters the hibernation state, the available space information of the first flash memory unit obtained for the first time when the electronic device meets the hibernation state is called as first available space information.
The first available space information may characterize a condition of remaining space in the first flash memory unit. Correspondingly, if the first available space information represents that the remaining space proportion of the first flash memory unit is smaller than the proportion threshold value, the data cache information is determined to meet the first condition. The remaining space ratio is the ratio of the remaining available space of the first flash memory unit to the total space of the first flash memory unit.
It can be understood that if the remaining space ratio of the first flash memory unit is smaller than the ratio threshold, it indicates that the remaining space in the first flash memory unit is insufficient, in this case, if the flash memory module is put to sleep, the data writing performance will be affected due to the insufficient remaining space in the first flash memory unit after the subsequent electronic device is awakened.
Based on this, when the electronic device starts to sleep and the first available space information represents that the remaining space ratio of the first flash memory unit is smaller than the proportional threshold, the flash memory module is maintained in the non-sleep state, so that the flash memory module can process data in the first flash memory unit, and thus, after the subsequent electronic device is awakened, the situation that the data writing performance is affected due to insufficient remaining space in the first flash memory unit can be reduced.
It will be appreciated that there are many possibilities for the first available space information characterizing the remaining space in the first flash memory unit.
For example, the first available space information of the first flash memory cell may be a remaining space fraction of the first flash memory cell.
For another example, in the case that the storage capacity of the first flash memory unit is fixed, the first available space information may also be the remaining space of the first flash memory unit. In this case, if the remaining space of the first flash memory unit is smaller than the space threshold, it indicates that the remaining space ratio of the first flash memory unit is smaller than the ratio threshold, that is, the first available space information satisfies the first condition.
It is to be understood that the proportional threshold in the first condition may be set as desired.
Considering that there may be a situation that a storage space of the first flash memory unit is fragmented in the process of storing data, in a case that the remaining space of the first flash memory unit is constant, the more fragments in the storage space of the first flash memory unit, the smaller the space available for storing data in the first flash memory unit, and the greater the influence on the writing performance of the first flash memory unit. Based on this, in order to more reasonably control whether the flash memory module is dormant or not, the method and the device can also determine the ratio threshold value by combining the fragmentation degree of the storage space in the first flash memory unit.
The following description is made in connection with a case of the first available spatial information.
As shown in fig. 2, which shows another flowchart of the flash memory control method provided in the embodiment of the present application, the method of the present embodiment may be applied to an electronic device, and the method of the present embodiment may include:
s201, under the condition that the electronic equipment meets the dormancy condition, the remaining space proportion of a first flash memory unit in the flash memory module is obtained.
The remaining space occupation ratio is a ratio of the remaining space of the first flash memory unit to the total space of the first flash memory unit.
For example, the CPU or the host system of the electronic device may instruct the controller of the flash memory module to report the remaining space ratio of the first flash memory unit when it is determined that the electronic device satisfies the hibernation condition.
For another example, the flash memory module may report the remaining space ratio of the first flash memory unit on a CPU or a host system periodically or aperiodically, and on this basis, when the electronic device satisfies the hibernation condition, the CPU or the host of the electronic device may obtain the remaining space ratio reported by the flash memory module.
Of course, the present application is not limited to the specific manner of obtaining the remaining space fraction of the first flash memory unit.
It can be understood that, in the embodiment, the first available space information is taken as an example of the remaining space proportion of the first flash memory unit, and the situation that the first available space information is the remaining space of the first flash memory unit is similar, and is not described herein again.
S202, obtaining the fragmentation degree of the storage unit in the first flash memory unit.
S203, determining a proportional threshold corresponding to the fragmentation degree.
It will be appreciated that the memory space of the first flash memory unit is fragmented due to the presence of some data in the first flash memory unit that has not been transferred but has been deleted or other invalid data.
Fig. 3 shows a schematic diagram of fragmentation in a first flash memory cell.
In fig. 3, 5 memory regions 301 comprised by the first memory unit are shown, each memory region being divided into a plurality of small squares, the small squares representing the smallest memory unit in the first flash memory unit.
Where the blank cell 302 represents the smallest unit of memory that has not yet stored data. While the black boxes 303 and the gray boxes 304 represent that the stored data is some invalid data, e.g., the black boxes represent that the stored data is dirty data, etc.
As can be seen from fig. 3, since there are some minimum storage units of invalid data in the first flash memory unit, there are many discontinuous storage spaces, also known as fragmentation, in the left 3 storage areas in the first flash memory unit.
The fragmentation degree of the storage unit in the first flash memory unit can represent the proportion of the storage space which cannot be effectively used for storing data in the first flash memory unit. Based on this, in the case where the remaining space of the first flash memory unit is the same, the higher the fragmentation degree is, the less storage space is available to store data.
It can be seen that, when the remaining space of the first flash memory unit is the same, the higher the fragmentation degree is, the greater the influence on the writing performance of the first flash memory unit is. Therefore, in order to more reasonably determine whether the current remaining space of the first flash memory unit can have a large influence on the writing performance of the first flash memory unit, a proportion threshold value for controlling the dormancy of the flash memory module needs to be determined in combination with a fragmentation program.
For example, in a possible case, the ratio threshold corresponding to different fragmentation degrees may be set, and accordingly, the ratio threshold corresponding to the current fragmentation degree of the first flash memory unit may be queried.
S204, if the remaining space ratio of the first flash memory unit is less than the ratio threshold, the flash memory module is maintained in a non-sleep state.
It can be understood that, in a case that the remaining space proportion of the first flash memory unit is smaller than the proportion threshold, it indicates that there is less space available in the first flash memory unit for storing data, and in this case, by maintaining the flash memory module in the non-sleep state, the flash memory module may be enabled to perform data transfer from the first flash memory unit to the second flash memory unit, or perform a data request for the cache in the first flash memory unit, so that a situation that the data writing performance is affected due to insufficient space of the first flash memory unit after the electronic device wakes up again may be reduced.
It can be understood that, in this embodiment, the first available space information of the first flash memory unit is taken as an example of the remaining space proportion of the first flash memory unit, and for the case that the first available space information of the first flash memory unit is the remaining space of the first flash memory unit, the flash memory module may be maintained in the non-sleep state when it is determined that the remaining space proportion of the first flash memory unit is smaller than the proportional threshold value based on the remaining space of the first flash memory unit; or determining a space threshold corresponding to the current fragmentation degree in the first flash memory unit, and maintaining the flash memory module in the non-sleep state when the remaining space of the first flash memory unit is smaller than the space threshold.
It is understood that after the flash memory module is maintained in the non-sleep state, the data buffering information of the first flash memory unit may also be changed as the flash memory module processes the data buffered in the first flash memory unit. On this basis, the electronic device may also monitor a change condition of the data cache information of the first flash memory unit, and if the data cache information of the first flash memory unit indicates that the flash memory module meets the hibernation condition, and the electronic device still meets the hibernation condition or is in a hibernation state, the flash memory module may be hibernated.
The condition that the data cache information of the first flash memory unit has a small influence or no influence on the data write request of the first flash memory unit may be that the data cache information of the first flash memory unit represents that the flash memory module meets the hibernation condition.
For example, in one possible implementation, after maintaining the flash memory module in the non-hibernation state, the second available space information of the first flash memory unit in the flash memory module can also be obtained. And if the second available space information represents that the remaining space occupation ratio of the first flash memory unit is not less than the ratio threshold value and the electronic equipment still meets the sleep condition at the current moment or the electronic equipment is in the sleep state, controlling the flash memory module to enter the sleep state.
For convenience of distinction, the available space information of the first flash memory unit obtained after the flash memory module is maintained in the non-sleep state is referred to as second available space information, which is similar to the information type of the first available space information, for example, the second available space information may be a remaining space proportion of the first flash memory unit, or may be a remaining space, and the like, which is not limited thereto.
The proportional threshold mentioned here may be a fixed value, or may be a proportional threshold determined in conjunction with the fragmentation degree in the embodiment of fig. 2.
It can be understood that, after the electronic device has been woken up, the flash memory module is necessarily required to be in a woken-up state, and therefore, after the flash memory module is in the non-sleep state, the second available space information is required to be acquired and whether the flash memory module is suitable for sleeping is determined based on the second available space information only in the process that the electronic device still meets the sleep condition or is in the sleep state.
In order to facilitate understanding of this situation, the available space information of the first flash memory cell is taken as an example of the remaining space ratio.
As shown in fig. 4, which shows a schematic flow chart of another embodiment of the flash memory control method of the present application, the method of this embodiment may include:
s401, under the condition that the electronic device meets the dormancy condition, obtaining a first residual space proportion of a first flash memory unit in the flash memory module.
For the convenience of distinguishing, when the electronic device satisfies the hibernation condition, the first obtained remaining space ratio of the first flash memory unit is referred to as a first remaining space ratio, and after the subsequent maintenance flash memory module enters the hibernation state, the remaining space ratio of the first flash memory unit is referred to as a second remaining space ratio.
The first remaining space proportion and the second remaining space proportion both represent the proportion of the remaining space of the first flash memory unit to the total space of the first flash memory unit.
S402, if the ratio of the remaining space of the first flash memory unit is less than the ratio threshold, the flash memory module is maintained in a non-dormant state, so that the flash memory module can transfer the data cached in the first flash memory unit to the second flash memory unit.
Of course, when the flash memory module is in the non-sleep state, the flash memory module may also delete or otherwise delete invalid data such as dirty data cached in the first flash memory unit as needed.
The proportional threshold mentioned here may be a fixed value, or a proportional threshold determined by combining the fragmentation degree in the embodiment of fig. 2, which is not limited herein.
S403, obtaining a second remaining space ratio in the first flash memory unit.
S404, if the second remaining space ratio is smaller than the ratio threshold, and the electronic device still satisfies the sleep condition or is in the sleep state, controlling the flash memory module to enter the sleep state.
It is understood that, in practical applications, the step S403 may be executed on the premise that the electronic device still satisfies the hibernation condition or is in the hibernation state, and in this case, obtaining the second remaining space proportion may indicate that the electronic device still satisfies the hibernation condition or is in the hibernation state. Correspondingly, the flash memory module can be controlled to enter the dormant state only by judging that the second remaining space ratio is smaller than the ratio threshold value without repeatedly judging whether the electronic equipment meets the dormant condition or is in the dormant state.
It can be understood that, the above is exemplified by monitoring the available space information of the first flash memory unit after maintaining the flash memory module in the non-hibernation state, so as to determine whether the data caching information of the first flash memory unit represents that the flash memory module is hibernated.
In another possible case, after the flash memory module is maintained in the non-sleep state, since the flash memory module may perform data processing on the data cached in the first flash memory unit, if the amount of the data cached in the first flash memory unit is small or the data in the first flash memory unit is already cleared, the flash memory module is in sleep, and there is no case that the data writing performance is affected due to the large amount of the data cached in the first flash memory unit after the electronic device is awakened again.
Based on this, after maintaining the flash memory module in the non-hibernation state, if the electronic device still satisfies the hibernation condition or is still in the hibernation state, the electronic device may further monitor whether data to be transferred to the second flash memory unit still exists in the first flash memory unit, or whether cached data still exists in the first flash memory unit, for example, the electronic device may monitor the first flash memory unit through one processor core. Correspondingly, when the electronic equipment confirms that the first flash memory unit does not have cached data or data to be transferred to the second flash memory unit, and the electronic equipment still meets the dormancy condition or is in the dormancy state, the flash memory module is controlled to enter the dormancy state.
If the flash memory module has cached the data to be transferred in the first flash memory unit to the second flash memory unit, the electronic device maintains the flash memory module in the non-dormant state and maintains other modules needing to be dormant in the dormant state; alternatively, the flash memory module has cleaned up the data in the first flash memory unit (including transferring the data to be transferred in the first flash memory unit to the second flash memory unit, cleaning up invalid data cached in the first flash memory unit, etc.), then the electronic device may hibernate the flash memory module.
The present invention is described below with reference to yet another possible case of the obtained data caching information in the first flash memory unit and the first condition.
In yet another possible scenario, the data caching information of the first flash memory unit may indicate whether data is cached in the first flash memory unit. In this case, if the data caching information of the first flash memory unit indicates that data is cached in the first flash memory unit under the condition that the electronic device satisfies the hibernation condition, the flash memory module may be maintained in the non-hibernation state, so that the flash memory module can process the data cached in the first flash memory unit.
It can be understood that, if the electronic device satisfies the hibernation condition, if data is cached in the first flash memory unit, it indicates that the storage space of the first flash memory unit is occupied, in this case, if the flash memory module is hibernated, after the electronic device is awakened again, because the storage space of the first flash memory unit of the flash memory module is occupied more, or the electronic device needs to write data into the flash memory module, and the flash memory module can preferentially process the data that needs to be written, the data cached in the first flash memory unit may be continuously increased, and the like, which may affect the writing performance of the data into the flash memory module.
Based on this, the flash memory module is maintained in the non-dormant state under the condition that the data are cached in the first flash memory unit, so that the flash memory module can process the cached data in the first flash memory unit, and the influence on the writing performance of the data written into the flash memory module due to the fact that the storage space of the first flash memory unit is occupied too much is reduced after the electronic device is awakened again.
In this case, there may also be a plurality of possibilities for buffering data in the first flash memory unit.
For example, in a possible implementation manner, the obtained data cache unit of the first flash memory unit may be to obtain information of data to be transferred in the first flash memory unit to be transferred to the second flash memory unit. In this implementation manner, if the to-be-transferred data information indicates that data to be transferred to the second flash memory unit exists in the first flash memory unit, it indicates that the data cache information of the first flash memory unit satisfies the first condition, so that the flash memory module is maintained in the non-dormant state, and the flash memory module can transfer the to-be-transferred data cached in the first flash memory unit to the second flash memory unit.
In yet another possible implementation manner, whether the data cached in the first flash memory unit is the data to be transferred or not may not be concerned, and accordingly, obtaining the data caching information of the first flash memory unit may also be obtaining whether the cached data exists in the first flash memory unit, where the cached data may include one or both of the data to be transferred to the second flash memory unit and the invalid data to be cleared. Correspondingly, only if the data cached in the first flash memory unit is not empty, the first flash memory unit is maintained in the non-sleep state.
It can be understood that, in the case that the data caching information indicates that the data is cached in the first flash memory unit, after the flash memory module is maintained in the non-sleep state, the situation of caching the data in the first flash memory unit may also change due to the transfer or cleaning of the data in the first flash memory unit by the flash memory module. If the amount of data cached in the first flash memory unit or the content of the data does not have a great influence on the writing performance, the flash memory module can be dormant in order to reduce energy consumption.
Correspondingly, after the flash memory module is in the dormant state, the data processing request of the first flash memory unit can be monitored. If the electronic device still meets the hibernation condition or is in a hibernation state, and the first flash memory unit does not have cached data or data to be transferred to the second flash memory unit, the flash memory module can be hibernated.
The following description will take the data cache information as the data cached in the first flash memory unit to be transferred to the second flash memory unit as an example. As shown in fig. 5, which shows another flow chart of a flash memory control method according to the present application, the method of the present embodiment may include:
s501, under the condition that the electronic equipment meets the dormancy condition, data information to be transferred to a second flash memory unit in a first flash memory unit in a flash memory module is obtained.
The information of the data to be transferred can represent the condition of the data to be transferred which is cached in the first flash memory unit and needs to be transferred to the second flash memory unit.
The method and the device for determining the data to be transferred in the first flash memory unit are not limited.
For example, in order to distinguish the data category cached in the first flash memory unit, the category of the cached data may be marked in the storage unit in which the data is stored in the first flash memory unit, so that the data category to be transferred cached in the first flash memory unit may be determined according to the marked data category.
For example, some valid data cached in the first flash memory unit that does not belong to dirty data or deleted data, etc., may belong to data that needs to be transferred to the second flash memory unit. Specific marks can be added in the storage units cached with invalid data such as dirty data and the like in the first flash memory unit, the data can be determined to be invalid data based on the specific marks, and correspondingly, other data which do not belong to the invalid data belong to valid data to be transferred to the second flash memory unit.
S502, if the information of the data to be transferred indicates that the first flash memory unit has data to be transferred to the second flash memory unit, the flash memory module is maintained in a non-sleep state, so that the flash memory module can transfer the data in the first flash memory unit to the second flash memory unit.
It can be understood that, in the case that there is data to be transferred to the second flash memory unit in the first flash memory unit, after waking up the electronic device again if the flash memory unit is dormant, the writing performance of the first flash memory unit may be affected because some historical data is already cached in the first flash memory unit. By means of the embodiment, under the condition that the data to be transferred exists in the first flash memory unit, the flash memory unit is in the non-dormant state, so that the flash memory module can still transfer the data of the first flash memory unit to the second flash memory unit in the process that the electronic device enters the dormant state, and therefore the influence on the writing performance of the first flash memory unit due to the fact that the data are cached in the first flash memory unit can be effectively reduced.
S503, if the first flash memory unit does not have data to be transferred to the second flash memory unit, and the electronic device still satisfies the hibernation condition or is in a hibernation state, controlling the flash memory module to enter the hibernation state.
It can be understood that, considering that the occupation ratio of invalid data such as dirty data in the first flash memory unit is relatively small, if the flash memory module has transferred all the data to be transferred in the first flash memory unit to the second flash memory unit, then the main data affecting the writing performance of the first flash memory unit has been transferred, on this basis, in the case of hibernation of the electronic device, if the flash memory module is continuously maintained in the non-hibernation state, resource waste may be caused, and therefore, in this case, the flash memory module is hibernated again, which not only can effectively ensure the writing performance of the flash memory module, but also can reduce resource consumption to the greatest extent.
It can be understood that, in the process of entering the hibernation state or after the electronic device is in the hibernation state, the flash memory module may also be hibernated after the flash memory module completes cleaning of all data in the first flash memory unit, that is, when it is determined that there is no cached data in the first flash memory unit, the flash memory module is controlled to enter the hibernation state, which is similar to fig. 5 and is not described herein again.
It is understood that, in the above embodiments of the present application, the reason for maintaining the flash memory module in the non-sleep state is to ensure that the flash memory module can operate normally. Based on this, the maintaining of the flash memory module in the non-sleep state may be maintaining of the flash memory module and associated modules such as a power module required by the operation of the flash memory module in the non-sleep state.
It can be understood that the case where the electronic device satisfies the hibernation condition may be a case where the electronic device fails to detect an input operation for a long time, or may be a case where the electronic device has a low power. However, in the case of insufficient power of the electronic device, it is necessary to preferentially ensure reliable operation of the electronic device. Therefore, in the application, whether the flash memory module is controlled to be in the non-sleep state can be determined by combining the power state condition of the electronic device.
The following is a description with reference to the flowchart. As shown in fig. 6, which shows another flowchart of the flash memory control method provided in the embodiment of the present application, the method of the present embodiment may include:
s601, under the condition that the electronic equipment meets the dormancy condition, obtaining data caching information of a first flash memory unit in the flash memory module.
The data caching information may refer to the related description of any of the foregoing embodiments, and is not described herein again.
S602, acquiring the power state information of the electronic equipment.
The power state information of the electronic device can represent the power supply condition of the electronic device.
For example, in one possible scenario, the power state information of the electronic device may be a remaining power of the electronic device.
In yet another possible scenario, the power state information of the electronic device may be a charging state of the electronic device. The charging state may characterize whether the electronic device is in a charging state.
Of course, the state of charge information may include both of the above cases, which is not limited.
S603, if the data caching information of the first flash memory unit satisfies the first condition and the electric quantity status information satisfies the second condition, maintaining the flash memory module in the non-sleep state.
The condition that the data cache information of the first flash memory unit satisfies the first condition may be the condition described in any one of the foregoing embodiments, and specific reference may be made to related descriptions of the foregoing embodiments, which are not described herein again.
The second condition that the state of charge information satisfies indicates that the power supply of the electronic device is sufficient. And the power supply of the electronic equipment is sufficient, so that the flash memory module is in a non-dormant state and can reliably ensure that the flash memory module can perform data processing on the first flash memory unit.
Wherein the second condition is different based on the state of charge information.
If the power state information is the remaining power of the electronic device, and the remaining power is greater than the set power threshold, it indicates that the power state information satisfies the second condition.
For another example, if the state of charge information of the electronic device represents whether the electronic device is in the charging state, then the electronic device is in the charging state, and then it may be determined that the state of charge information satisfies the second condition.
In this embodiment, when the electronic device meets the hibernation condition, the data cache information of the first flash memory unit of the flash memory module meets the first condition, and the electric quantity state information of the electronic device meets the second condition, the flash memory module is controlled to be in the non-hibernation state, which considers the electric quantity condition of the electronic device and the write-in performance to the greatest extent, so that the electronic device can transfer or clear the data cached in the first flash memory unit in time in the hibernation state when the power supply of the electronic device is sufficient.
It can be understood that, if the storage space of the first flash memory unit in the flash memory module of the electronic device is limited, and the electronic device does not satisfy the hibernation condition, that is, during the normal operation of the electronic device, if the electronic device has an excessive amount of data to be written into the flash memory module, the writing performance may be affected due to the limited storage space of the first flash memory unit, and even a writing exception may be caused.
For example, the amount of data that the electronic device needs to write into the flash memory module exceeds the storage space of the first flash memory unit, and thus, in the process of writing data into the first flash memory unit by the flash memory module, since the data in the first flash memory unit cannot be transferred to the second flash memory unit in time, the writing speed may be too slow, and even the storage space of the first flash memory unit may be filled with the data, the data cannot be written in a short time, and other abnormal situations may occur.
In order to reduce the situations of poor writing performance, even abnormal writing and the like caused by the fact that the data volume needing to be written into the flash memory module by the electronic equipment is too large, under the condition that the electronic equipment does not meet the dormancy condition, if the data volume needing to be written into the flash memory module by the electronic equipment exceeds a quantity threshold value, the electronic equipment can also send a buffer expansion instruction to the flash memory module. The buffer expansion instruction may instruct the flash module to expand as a buffer unit.
Correspondingly, the flash memory module responds to the buffer expansion instruction, and can expand a part of the storage area of the second flash memory unit in the flash memory module into the expansion area of the first flash memory unit, wherein the expansion area of the first flash memory unit has the same data storage mode as that of the first flash memory unit.
The expansion area and the first flash memory unit have the same data storage mode, and the data writing mode and the data storage mode of the expansion area are similar to those of the first flash memory unit, so that the writing performance of the expansion area and the first flash memory unit is the same or similar.
It can be understood that, because a part of the storage area of the second flash memory unit is expanded into the expansion area of the first flash memory unit, so that the expansion area has the same data storage manner as the first flash memory unit, the expansion area can serve as the same flash memory unit as the first flash memory unit to cache data, and thus, the expansion area is expanded to the storage space of the flash memory unit for caching data, and the situation that the data writing performance is affected or data writing is abnormal due to insufficient storage space of the flash memory unit for caching data can be reduced.
For example, taking the flash memory module as the universal flash memory UFS as an example, it is assumed that the first flash memory cell in the UFS is a single-level cell SLC, and the second flash memory cell can be a third-level cell TLC. Fig. 7 is a schematic diagram illustrating a composition architecture of an electronic device according to the present application in an application scenario.
As can be seen in fig. 7, the electronic device comprises a host system 701 and a general flash memory 702. The universal flash memory UFS includes a controller 7021, a single-rank memory unit 7022, and a third-rank memory unit 7023.
The host system may include at least a processor CPU, a motherboard including the CPU, and the like, which is not limited.
The host system is connected to the universal flash memory such that the host system can be connected to the controller of the universal flash memory UFS.
The controller of the single-level memory unit UFS may be connected to the single-level memory unit SLC and the three-level memory unit TLC.
Wherein, 1 memory cell in SLC can store 1bit data, and only two charging values of 0 and 1 exist. And 1 memory storage unit in TLC can store 3bit data.
The data written into the UFS by the host system is cached into the SLC by the controller of the UFS first, and when the UFS is idle, the controller of the UFS transfers the data cached in the SLC to the TLC for caching.
Since the storage capacity of the SLC is relatively limited, if the host system needs to write data to the UFS exceeding the storage capacity of the SLC, the data writing speed may be too slow, and even a writing abnormality may occur.
In this application, if the data that needs to be written into the UFS by the host system of the electronic device is too large, the host system may issue a buffer expansion instruction to the controller of the UFS. On this basis, the controller of the UFS may extend the partial storage area of TLC to SLC, i.e. control TLC to simulate the partial storage area to SLC. For example, the partial area of the TLC is used as the extended area of the SLC, each memory cell in the extended area can store 1bit of data, and only two charge values of 0 and 1 exist, so that the extended area is equivalent to the SLC. Correspondingly, the extended area as SLC in TLC can also be used to cache the data written in UFS, and the writing performance is the same as SLC writing performance.
As shown in fig. 7, a portion of the memory region 7024 of the third-level memory cell 7023 is extended to be an analog single-level memory cell.
The application also provides a flash memory control device corresponding to the flash memory control method.
As shown in fig. 8, which shows a schematic structural diagram of a flash memory control device of the present application, the device of the present embodiment is applied to an electronic device. The apparatus may include:
an information obtaining unit 801, configured to obtain data cache information of a first flash memory unit in a flash memory module when the electronic device meets a hibernation condition, where the data cache information represents a situation of caching data in the first flash memory unit, the flash memory module includes the first flash memory unit and a second flash memory unit, and a data writing speed of the first flash memory unit is faster than a data writing speed of the second flash memory unit;
a hibernation control unit 802, configured to maintain the flash memory module in a non-hibernation state if the data caching information meets a first condition, so that the flash memory module can transfer the data cached in the first flash memory unit to the second flash memory unit.
In one possible implementation manner, the information obtaining unit includes:
the first information obtaining unit is used for obtaining first available space information of a first flash memory unit in the flash memory module under the condition that the electronic equipment meets a sleep condition;
a sleep control unit comprising:
a first sleep control unit, configured to maintain the flash memory module in a non-sleep state if the first available space information represents that a remaining space proportion of the first flash memory unit is smaller than a ratio threshold, where the remaining space proportion is a proportion of a remaining space of the first flash memory unit to a total space of the first flash memory unit.
In another possible implementation manner, the apparatus further includes:
the fragmentation determining unit is used for obtaining the fragmentation degree of the storage unit in the first flash memory unit before the first dormancy control unit determines that the residual space ratio of the first flash memory unit is smaller than a ratio threshold;
a threshold determination unit for determining a proportional threshold corresponding to the fragmentation degree.
In yet another possible implementation manner, the apparatus further includes:
the module monitoring unit is used for acquiring second available space information of a first flash memory unit in the flash memory module after the dormancy control unit maintains the flash memory module in a non-dormancy state;
a first module hibernation unit, configured to control the flash memory module to enter a hibernation state if the second available space information indicates that the remaining space proportion of the first flash memory unit is not less than the proportion threshold, and the electronic device still satisfies the hibernation condition or the electronic device is in the hibernation state.
In yet another possible implementation, the sleep control unit includes:
and the second dormancy control unit is used for maintaining the flash memory module in a non-dormancy state if the data caching information represents that data are cached in the first flash memory unit.
In one possible implementation, the information obtaining unit includes one or more of the following:
the second information obtaining unit is used for obtaining data information to be transferred to the second flash memory unit in the first flash memory unit of the flash memory module;
when the second dormancy control unit confirms that the data cache information represents that data is cached in the first flash memory unit, specifically, the data information to be transferred represents that data to be transferred to the second flash memory unit exists in the first flash memory unit.
In yet another possible scenario, the apparatus further comprises:
and the second module dormancy unit is used for controlling the flash memory module to enter the dormancy state after the second dormancy control unit maintains the flash memory module in the non-dormancy state and confirms that the first flash memory unit does not have cached data or data to be transferred to the second flash memory unit and the electronic equipment still meets the dormancy condition or the electronic equipment is in the dormancy state.
In yet another possible implementation manner, the apparatus further includes a power information obtaining unit, configured to obtain power state information of the electronic device before the hibernation control unit maintains the flash memory module in the non-hibernation state;
the sleep control unit is specifically configured to maintain the flash memory module in a non-sleep state if the data cache information meets a first condition and the electric quantity state information meets a second condition.
In another possible implementation manner, the apparatus further includes:
the expansion indicating unit is used for sending a buffer expansion instruction to the flash memory module if the electronic equipment does not meet the dormancy condition and the data volume of the electronic equipment to be written into the flash memory module exceeds a quantity threshold;
and the cache expansion unit is used for responding to the cache expansion instruction through the flash memory module and expanding a part of the storage area of the second flash memory unit in the flash memory module into an expansion area of the first flash memory unit, and the data storage mode of the expansion area of the first flash memory unit is the same as that of the first flash memory unit.
In yet another aspect, the present application further provides an electronic device, as shown in fig. 9, which shows a schematic structural diagram of the electronic device, and the electronic device may be any type of electronic device, and the electronic device at least includes a memory 901 and a processor 902;
the electronic device may also have a flash memory module 903.
The flash memory module 903 includes a first flash memory unit and a second flash memory unit, and the data writing speed of the first flash memory unit is higher than the data writing speed of the second flash memory unit.
Wherein the processor 901 is configured to execute the flash memory control method in any of the above embodiments.
The memory 902 is used to store programs needed for the processor to perform operations.
It is to be understood that the electronic device may further include a display unit 904 and an input unit 905.
Of course, the electronic device may have more or less components than those shown in fig. 9, which is not limited thereto.
In another aspect, the present application further provides a computer-readable storage medium, in which at least one instruction, at least one program, a code set, or a set of instructions is stored, and the at least one instruction, the at least one program, the code set, or the set of instructions is loaded and executed by a processor to implement the flash memory control method according to any one of the above embodiments.
The present application also proposes a computer program comprising computer instructions stored in a computer readable storage medium. The computer program is for executing the flash memory control method as in any of the above embodiments when run on an electronic device.
It should be noted that, in the present specification, the embodiments are all described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments may be referred to each other. Meanwhile, the features described in the embodiments of the present specification may be replaced or combined with each other, so that those skilled in the art can implement or use the present application. For the device-like embodiment, since it is basically similar to the method embodiment, the description is simple, and for the relevant points, reference may be made to the partial description of the method embodiment.
Finally, it should also be noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the application. Thus, the present application is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (10)

1. A flash memory control method is applied to electronic equipment and comprises the following steps:
under the condition that the electronic equipment meets a sleep condition, obtaining data cache information of a first flash memory unit in a flash memory module, wherein the data cache information represents the condition of caching data in the first flash memory unit, the flash memory module comprises a first flash memory unit and a second flash memory unit, and the data writing speed of the first flash memory unit is higher than that of the second flash memory unit;
if the data caching information meets a first condition, maintaining the flash memory module in a non-dormant state, so that the flash memory module can transfer the cached data in the first flash memory unit to the second flash memory unit.
2. The method of claim 1, wherein obtaining data cache information for a first flash memory cell in a flash memory module comprises:
obtaining first available space information of a first flash memory unit in the flash memory module;
the data caching information meets a first condition, and comprises:
the first available space information represents that the ratio of the remaining space of the first flash memory unit is smaller than a ratio threshold, and the ratio of the remaining space of the first flash memory unit is the ratio of the remaining space of the first flash memory unit to the total space of the first flash memory unit.
3. The method of claim 2, prior to determining that the remaining space fraction of the first flash memory cell is less than the ratio threshold, further comprising:
obtaining the fragmentation degree of a storage unit in the first flash memory unit;
determining a proportional threshold corresponding to the degree of fragmentation.
4. The method of claim 2 or 3, after maintaining the flash memory module in the non-sleep state, further comprising:
obtaining second available space information of a first flash memory unit in the flash memory module;
and if the second available space information represents that the remaining space occupation ratio of the first flash memory unit is not less than the ratio threshold value and the electronic equipment still meets the sleep condition or is in the sleep state, controlling the flash memory module to enter the sleep state.
5. The method of claim 1, the data caching information satisfying a first condition, comprising:
the data caching information represents that data is cached in the first flash memory unit.
6. The method of claim 5, obtaining data cache information for a first flash memory cell in a flash memory module, comprising:
acquiring data information to be transferred from a first flash memory unit of a flash memory module to a second flash memory unit;
the data caching information indicates that data is cached in the first flash memory unit, and the data caching information includes:
and the data information to be transferred represents that the data to be transferred to the second flash memory unit exists in the first flash memory unit.
7. The method of claim 5 or 6, after maintaining the flash memory module in the non-sleep state, further comprising:
and controlling the flash memory module to enter a dormant state when the first flash memory unit is confirmed to have no cached data or no data to be transferred to a second flash memory unit and the electronic equipment still meets the dormant condition or is in the dormant state.
8. The method of claim 1, prior to said maintaining said flash memory module in a non-sleep state, further comprising:
acquiring electric quantity state information of the electronic equipment;
if the data caching information meets a first condition, maintaining the flash memory module in a non-dormant state comprises:
and if the data cache information meets a first condition and the electric quantity state information meets a second condition, maintaining the flash memory module in a non-dormant state.
9. The method of claim 1, further comprising:
if the electronic equipment does not meet the dormancy condition and the data volume to be written into the flash memory module of the electronic equipment exceeds a quantity threshold value, sending a buffer expansion instruction to the flash memory module;
and responding to the buffer expansion instruction through the flash memory module, and expanding a part of the storage area of the second flash memory unit in the flash memory module into an expansion area of the first flash memory unit, wherein the expansion area of the first flash memory unit has the same data storage mode as that of the first flash memory unit.
10. A flash memory control device applied to electronic equipment comprises:
the information obtaining unit is used for obtaining data caching information of a first flash memory unit in a flash memory module under the condition that the electronic equipment meets a dormancy condition, the data caching information represents the condition of caching data in the first flash memory unit, the flash memory module comprises the first flash memory unit and a second flash memory unit, and the data writing speed of the first flash memory unit is higher than that of the second flash memory unit;
and the dormancy control unit is used for maintaining the flash memory module in a non-dormant state if the data caching information meets a first condition so that the flash memory module can transfer the cached data in the first flash memory unit to the second flash memory unit.
CN202210189605.4A 2022-02-28 2022-02-28 Flash memory control method and device Pending CN114564152A (en)

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