CN114553387A - Method and device for judging validity of received signal - Google Patents
Method and device for judging validity of received signal Download PDFInfo
- Publication number
- CN114553387A CN114553387A CN202210093419.0A CN202210093419A CN114553387A CN 114553387 A CN114553387 A CN 114553387A CN 202210093419 A CN202210093419 A CN 202210093419A CN 114553387 A CN114553387 A CN 114553387A
- Authority
- CN
- China
- Prior art keywords
- synchronous
- synchronization
- signal
- reasonable
- interval
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/0054—Detection of the synchronisation error by features other than the received signal transition
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D30/00—Reducing energy consumption in communication networks
- Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
Abstract
The invention discloses a method for judging validity of a received signal, which comprises the following steps: processing the synchronous signals in the received signals to obtain the synchronous position of each synchronous signal in the preset time; sequencing the synchronous positions obtained by the synchronous signals, and averaging the rest synchronous positions after removing the maximum synchronous position and the minimum synchronous position to obtain an average synchronous position and a reasonable synchronous interval; and according to the average synchronization position and the reasonable synchronization interval, carrying out validity judgment on each synchronous receiving signal. The invention also discloses a device for judging the validity of the received signal. The invention can improve the resistance of the system to interference and reduce the influence of the interference on the communication quality.
Description
Technical Field
The present invention relates to the field of communications technologies, and in particular, to the field of validity determination of received signals.
Background
The communication technology is widely applied, and influences the aspects of daily life, work and the like of people. At present, many intentional or unintentional interferences often exist in a communication environment, and when the interferences reach a certain threshold, the communication quality is seriously reduced or even the communication cannot work normally. Therefore, identifying and countering interference is of increasing importance to the design of communication systems.
Disclosure of Invention
The invention aims to provide a method and a device for judging the validity of a received signal, which can improve the resistance of a system to interference and reduce the influence of the interference on communication quality.
The technical scheme for realizing the purpose is as follows:
the method for judging the validity of the received signal comprises the following steps:
step S1, processing the synchronous signals in the received signals to obtain the synchronous position of each synchronous signal in the preset time;
step S2, the synchronization positions obtained by each synchronization signal are sequenced, after the maximum synchronization position and the minimum synchronization position are removed, the rest synchronization positions are averaged, and an average synchronization position and a reasonable synchronization interval are obtained;
and step S3, according to the average synchronization position and the reasonable synchronization interval, the validity judgment is carried out on each synchronization receiving signal.
Preferably, the step S1 includes:
carrying out digital AGC on each received synchronous signal;
performing cyclic correlation on each received synchronous signal and a local synchronous sequence to obtain a correlation peak value;
and determining the synchronous position according to the position of the correlation peak value of each synchronous signal.
Preferably, the step S2 includes:
note that sync position is denoted Posi, i ═ 0,1, … L-1; i is a synchronous position index in a period of time, and L is the total number of synchronous signals in the period of time;
acquiring M (max) (Pos), keeping the position of M in Pos as Pm, continuously searching for a minimum value N, keeping N (min) (Pos), and keeping the position of N in Pos as Pn;
the average synchronization position is:
the reasonable synchronization interval of the synchronization position in the period of time is as follows:
[thr-δ，thr+δ]
where δ represents the absolute value of the expected maximum shift in the synchronization position.
Preferably, the step S3 includes:
comparing the synchronous positions of all synchronous signals in the preset time with a reasonable synchronous interval, and if the synchronous positions of the synchronous signals are not in the reasonable synchronous interval, outputting a signal effective flag which is 0; if the synchronous position of the synchronous signal is in a reasonable synchronous interval, outputting a signal effective flag which is 1;
and judging whether to set the soft bit of the data symbol corresponding to the synchronous signal to zero or not according to the output flag, and if the flag is equal to 0, setting the soft bit of the data symbol corresponding to the synchronous signal to zero.
The second device for determining validity of received signal of the present invention comprises:
a digital AGC module for performing digital AGC on each synchronous signal in the received signals;
a correlation module for performing cyclic correlation between each synchronization signal and a local synchronization sequence and obtaining a correlation peak value;
a search module for obtaining the synchronous position through the correlation peak value;
the sequencing module is used for sequencing all the synchronous positions and obtaining a sequencing result;
a judgment module for obtaining a reasonable synchronization interval and judging by processing the sequencing result; and
and a zero setting module for judging whether to zero the data soft bit according to the judgment result.
Preferably, the digital AGC module compares the average power of the synchronization signal with an expected power setting value, and if the average power of the synchronization signal is greater than the expected power, arithmetically right-shifts the synchronization signal to reduce the amplitude of the synchronization signal; and if the average power of the synchronous signal is smaller than the expected power, performing arithmetic left shift on the synchronous signal, and increasing the amplitude of the synchronous signal.
Preferably, the searching module searches for a position of a correlation peak of each synchronization signal as a synchronization position.
Preferably, after the maximum synchronization position and the minimum synchronization position are removed by the decision module, averaging the rest of the synchronization positions to obtain an average synchronization position and a reasonable synchronization interval within a preset time; comparing all the synchronous positions with a reasonable synchronous interval, if the synchronous positions are in the reasonable synchronous interval, considering that the corresponding data of the synchronous signal is valid, and outputting a valid signal flag which is equal to 1, otherwise, determining that the flag is equal to 0;
and the zero setting module judges whether to set the data soft bit corresponding to the synchronous signal to zero according to the output flag, when the flag is 0, the data soft bit corresponding to the synchronous signal is set to zero, otherwise, the processing is not carried out.
The invention has the beneficial effects that: the invention has simple realization and low complexity, fully utilizes the relevant characteristics of the received signal, accurately judges whether the current signal is reliable or not, and ensures the validity of the signal so as to improve the resistance of the system to interference and reduce the influence of the interference on the communication quality.
Drawings
Fig. 1 is a flowchart of a method for determining validity of a received signal according to the present invention;
fig. 2 is a block diagram of a received signal validity determination device according to the present invention.
Detailed Description
The invention will be further explained with reference to the drawings.
Referring to fig. 1, the method for determining validity of received signals according to the present invention includes the following steps:
step S1, the synchronization signal in the received signal is processed to obtain the synchronization position of each synchronization signal within a period of time. The method specifically comprises the following steps:
1) digital AGC (adaptive gain control) is carried out on each synchronous signal in the received signals, and saturation in the subsequent calculation process is prevented on the premise of ensuring the processing precision.
2) And performing cyclic correlation on each received synchronous signal and a local synchronous sequence to obtain a correlation peak value.
3) And determining the synchronous position according to the position of the correlation peak value of each synchronous signal.
Step S2, the synchronization positions obtained by the synchronization signals are sorted, and after the maximum synchronization position and the minimum synchronization position are removed, the remaining synchronization positions are averaged to obtain an average synchronization position thr and a reasonable synchronization interval [ thr- δ, thr + δ ] within the period of time. The method specifically comprises the following steps:
1) noting the synchronous position as PosiL-1, · i ═ 0, 1; i is a synchronous position index in a period of time, and L is the total number of synchronous signals in the period of time;
2) and obtaining M ═ max (Pos), keeping the position of M in Pos as Pm, keeping Pos (Pm) equal to 0, continuously searching for the minimum value N, keeping N equal to min (Pos), keeping the position of N in Pos as Pn, and keeping Pos (Pn) equal to 0.
The average synchronization position is:
the expected interval of the sync position during this time is:
[thr-δ，thr+δ]
where δ is determined by clock accuracy, multipath delay, etc., and represents the absolute value of the maximum deviation of the expected synchronization position.
Step S3, performing validity determination on each synchronization signal: and comparing all the synchronous positions with a reasonable synchronous interval, if the synchronous positions are in the reasonable synchronous interval, considering that the corresponding data of the synchronous signal is valid, and outputting a valid flag which is equal to 1, otherwise, setting the corresponding information soft bit of the synchronous signal to zero, wherein the valid flag is equal to 0.
Referring to fig. 2, the apparatus for determining validity of received signals according to the present invention includes: the device comprises a digital AGC module 1, a correlation module 2, a searching module 3, a sorting module 4, a judging module 5 and a zero setting module 6.
The digital AGC module 1 compares the average power of the synchronous signal with an expected power set value, and if the average power of the synchronous signal is greater than the expected power, the arithmetic right shift is carried out on the synchronous signal to reduce the amplitude of the synchronous signal; and if the average power of the synchronous signal is smaller than the expected power, performing arithmetic left shift on the synchronous signal, and increasing the amplitude of the synchronous signal.
The correlation module 2 performs cyclic correlation of each synchronization signal passing through the digital AGC module 1 with a local synchronization sequence. The result of the circular correlation operation is as follows:
wherein q is*(m) represents the conjugate of q (m), and | A | represents the modulo of A, p is the received sync signal, q is the local sync sequence, and Syc _ len is the sync sequence length.
The searching module 3 uses the maximum correlation value position (correlation peak value) of each synchronization signal as the synchronization position according to the correlation result of the correlation module 2.
The sorting module 4 sorts the synchronous positions obtained by the searching module 3.
The judgment module 5 processes the result of the sorting module 4 to obtain a reasonable synchronization interval (an expected synchronization interval), and outputs a judgment result. Noting the synchronous position as PosiL-1, · i ═ 0, 1; i is a synchronous position index in a period of time, and L is the total number of synchronous signals in the period of time;
and obtaining M ═ max (Pos), keeping the position of M in Pos as Pm, keeping Pos (Pm) equal to 0, continuously searching for the minimum value N, keeping N equal to min (Pos), keeping the position of N in Pos as Pn, and keeping Pos (Pn) equal to 0.
The average synchronization position is:
the reasonable synchronization interval of the synchronization position in the period of time is as follows:
[thr-δ，thr+δ]
where δ is determined by clock accuracy, multipath delay, etc., and represents the absolute value of the maximum deviation of the expected synchronization position.
And comparing all the synchronous positions with a reasonable synchronous interval, if the synchronous positions are in the interval, considering that the corresponding data of the synchronous signal is valid, and outputting a signal valid flag which is 1, or else, judging that the flag is 0.
The zero setting module 6 judges whether to zero the data soft bit according to the judgment result output by the judgment module 5, and if the judgment result is 0, the data soft bit corresponding to the synchronous signal is set to zero.
In conclusion, the invention judges whether the current received signal is interfered and carries out corresponding processing, thereby improving the resistance of the system to the interference and reducing the influence of the interference on the communication quality.
The above embodiments are provided only for illustrating the present invention and not for limiting the present invention, and those skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention, and therefore all equivalent technical solutions should also fall within the scope of the present invention, and should be defined by the claims.
Claims (8)
1. A method for determining validity of a received signal, comprising:
step S1, processing the synchronous signals in the received signals to obtain the synchronous position of each synchronous signal in the preset time;
step S2, the synchronization positions obtained by each synchronization signal are sequenced, after the maximum synchronization position and the minimum synchronization position are removed, the rest synchronization positions are averaged, and an average synchronization position and a reasonable synchronization interval are obtained;
and step S3, according to the average synchronization position and the reasonable synchronization interval, the validity judgment is carried out on each synchronization receiving signal.
2. The method for determining the validity of a received signal according to claim 1, wherein the step S1 includes:
carrying out digital AGC on each received synchronous signal;
performing cyclic correlation on each received synchronous signal and a local synchronous sequence to obtain a correlation peak value;
and determining the synchronous position according to the position of the correlation peak value of each synchronous signal.
3. The method for determining the validity of a received signal according to claim 1, wherein the step S2 includes:
note that sync position is denoted Posi, i ═ 0,1, … L-1; i is a synchronous position index in a period of time, and L is the total number of synchronous signals in the period of time;
acquiring M (max) (Pos), keeping the position of M in Pos as Pm, continuously searching for a minimum value N, keeping N (min) (Pos), and keeping the position of N in Pos as Pn;
the average synchronization position is:
the reasonable synchronization interval of the synchronization position in the period of time is as follows:
[thr-δ，thr+δ]
where δ represents the absolute value of the expected maximum shift in the synchronization position.
4. The method for determining the validity of a received signal according to claim 1, wherein the step S3 includes:
comparing the synchronous positions of all synchronous signals in the preset time with a reasonable synchronous interval, and if the synchronous positions of the synchronous signals are not in the reasonable synchronous interval, outputting a signal effective flag which is 0; if the synchronous position of the synchronous signal is in a reasonable synchronous interval, outputting a signal effective flag which is 1;
and judging whether to set the soft bit of the data symbol corresponding to the synchronous signal to zero or not according to the output flag, and if the flag is equal to 0, setting the soft bit of the data symbol corresponding to the synchronous signal to zero.
5. An apparatus for determining validity of a received signal, comprising:
a digital AGC module for performing digital AGC on each synchronous signal in the received signals;
a correlation module for performing cyclic correlation between each synchronization signal and a local synchronization sequence and obtaining a correlation peak value;
a search module for obtaining the synchronous position through the correlation peak value;
the sequencing module is used for sequencing all the synchronous positions and obtaining a sequencing result;
a judgment module for obtaining a reasonable synchronization interval and judging by processing the sequencing result; and
and a zero setting module for judging whether to zero the data soft bit according to the judgment result.
6. The apparatus for determining validity of received signal according to claim 5, wherein the digital AGC module compares the average power of the synchronization signal with a predetermined power setting value, and arithmetically right-shifts the synchronization signal to reduce the amplitude of the synchronization signal if the average power of the synchronization signal is greater than the predetermined power; and if the average power of the synchronous signal is smaller than the expected power, performing arithmetic left shift on the synchronous signal, and increasing the amplitude of the synchronous signal.
7. The apparatus of claim 5, wherein the searching module searches for a position of a correlation peak of each synchronization signal as a synchronization position.
8. The apparatus according to claim 5, wherein the decision module averages the remaining synchronization positions after removing the maximum synchronization position and the minimum synchronization position to obtain an average synchronization position and a reasonable synchronization interval within a preset time; comparing all the synchronous positions with a reasonable synchronous interval, if the synchronous positions are in the reasonable synchronous interval, considering that the corresponding data of the synchronous signal is valid, and outputting a valid flag of 1, otherwise, setting the flag of 0;
and the zero setting module judges whether to zero the data soft bit corresponding to the synchronous signal according to the output flag, when the flag is equal to 0, the data soft bit corresponding to the synchronous signal is set to zero, otherwise, the processing is not carried out.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210093419.0A CN114553387B (en) | 2022-01-26 | 2022-01-26 | Method and device for judging validity of received signal |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210093419.0A CN114553387B (en) | 2022-01-26 | 2022-01-26 | Method and device for judging validity of received signal |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN114553387A true CN114553387A (en) | 2022-05-27 |
| CN114553387B CN114553387B (en) | 2023-03-21 |
Family
ID=81673495
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202210093419.0A Active CN114553387B (en) | 2022-01-26 | 2022-01-26 | Method and device for judging validity of received signal |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN114553387B (en) |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2010069172A1 (en) * | 2008-12-17 | 2010-06-24 | 中兴通讯股份有限公司 | Precise timing synchronization method and system for cmmb mode mobile tv |
| JP2010278483A (en) * | 2009-05-26 | 2010-12-09 | Mitsubishi Electric Corp | Device and method for synchronizing signals |
| CN106998237A (en) * | 2017-04-05 | 2017-08-01 | 大唐联诚信息系统技术有限公司 | A kind of time-frequency synchronization method and device |
| CN108075997A (en) * | 2016-11-16 | 2018-05-25 | 大唐联诚信息系统技术有限公司 | A kind for the treatment of method and apparatus for receiving signal |
| CN113133088A (en) * | 2021-04-07 | 2021-07-16 | 深圳智微电子科技有限公司 | Wireless communication channel scanning method and device |
| CN113132287A (en) * | 2021-04-07 | 2021-07-16 | 深圳智微电子科技有限公司 | Synchronous detection method and device in OFDM system |
-
2022
- 2022-01-26 CN CN202210093419.0A patent/CN114553387B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2010069172A1 (en) * | 2008-12-17 | 2010-06-24 | 中兴通讯股份有限公司 | Precise timing synchronization method and system for cmmb mode mobile tv |
| JP2010278483A (en) * | 2009-05-26 | 2010-12-09 | Mitsubishi Electric Corp | Device and method for synchronizing signals |
| CN108075997A (en) * | 2016-11-16 | 2018-05-25 | 大唐联诚信息系统技术有限公司 | A kind for the treatment of method and apparatus for receiving signal |
| CN106998237A (en) * | 2017-04-05 | 2017-08-01 | 大唐联诚信息系统技术有限公司 | A kind of time-frequency synchronization method and device |
| CN113133088A (en) * | 2021-04-07 | 2021-07-16 | 深圳智微电子科技有限公司 | Wireless communication channel scanning method and device |
| CN113132287A (en) * | 2021-04-07 | 2021-07-16 | 深圳智微电子科技有限公司 | Synchronous detection method and device in OFDM system |
Also Published As
| Publication number | Publication date |
|---|---|
| CN114553387B (en) | 2023-03-21 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN1149797C (en) | Technology for determination of length of channel impulse response | |
| US20080019458A1 (en) | Guard section length detection method and system | |
| US20060140293A1 (en) | Method for detecting signal and estimating symbol timing | |
| CN1118965C (en) | Channel estimating apparatus for digital telecommunication station | |
| US7221717B2 (en) | Bluetooth access code assisted initial DC estimation and frame synchronization | |
| CN111010225B (en) | Navigation message rapid frame synchronization method and system based on ephemeris matching | |
| CN101103556A (en) | Method and system for synchronization between a transmitter and a receiver in a wireless communication system | |
| CN108736921B (en) | Power line carrier communication preamble detection method for resisting random impulse noise | |
| CN1347252A (en) | Soft normalizer for channel decoder | |
| CN114785653A (en) | Symbol synchronization method, system, equipment and readable storage medium | |
| CN114553387B (en) | Method and device for judging validity of received signal | |
| CN112929822A (en) | Return value state monitoring system based on WiFi-RTT ranging | |
| CN111865854B (en) | Frame capturing and synchronizing method of burst OFDM system | |
| WO2012052771A1 (en) | Multicarrier packet synchronisation | |
| CN1710895A (en) | Method for reducing channel estimation false-alarm probability in TD-SCDMA mobile communication system | |
| CN1925470B (en) | Multi-path judging method for time-division duplex mobile communication system | |
| EP2659612A1 (en) | Preamble detection at low signal-to-noise levels | |
| CN114390575B (en) | CBTC-oriented wireless signal synchronous detection method, system and device | |
| US20190109698A1 (en) | Time synchronisation method, insensitive to power variations, associated receiver and computer program | |
| US20020122407A1 (en) | Methods, communication apparatus, and computer program products for detecting an information field in a signal by averaging symbol values across multiple time slot intervals | |
| US7227914B2 (en) | Automatic gain control for digital signals | |
| CN111726180A (en) | Method and device for detecting preamble signal | |
| CN1381122A (en) | Method and receiver for estimating data bit rates | |
| CN112187693B (en) | PSS timing synchronization method and device in 5G system | |
| JPH11112489A (en) | Frame synchronization circuit |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| CB02 | Change of applicant information | ||
| CB02 | Change of applicant information |
Address after: 200233 floor 5, building 61, No. 421, Hongcao Road, Xuhui District, Shanghai Applicant after: Xiaotang Technology (Shanghai) Co.,Ltd. Address before: 200233 floor 5, building 61, No. 421, Hongcao Road, Xuhui District, Shanghai Applicant before: XIAOTANG TECHNOLOGY (SHANGHAI) Co.,Ltd. |
|
| GR01 | Patent grant | ||
| GR01 | Patent grant |