CN114552965A

CN114552965A - Surge current suppression circuit, switching power supply and chip

Info

Publication number: CN114552965A
Application number: CN202210437335.4A
Authority: CN
Inventors: 李旭; 彭国允
Original assignee: Shenzhen Dark Energy Power Supply Co ltd
Current assignee: Shenzhen Dark Energy Power Supply Co ltd
Priority date: 2022-04-25
Filing date: 2022-04-25
Publication date: 2022-05-27

Abstract

The embodiment of the present disclosure provides an inrush current suppression circuit, a switching power supply and a chip, wherein the inrush current suppression circuit includes: the surge suppression module and the driving module; the input end of the surge suppression module is connected with the output end of the power supply EMI module, the output end of the surge suppression module is connected with the input end of the rectification module and the output end of the driving module, and the surge suppression module comprises a bidirectional thyristor and a surge suppression resistor; the drive module comprises a photothyristor and a photothyristor drive circuit, the photothyristor drive circuit is used for providing stable drive for the photothyristor, the photothyristor is used for driving the conduction of the bidirectional thyristor, and therefore after the power supply works, the drive module controls the bidirectional thyristor in the surge suppression module to conduct, the current is limited when the drive module starts, and the power loss is reduced.

Description

Surge current suppression circuit, switching power supply and chip

Technical Field

The present disclosure relates to the field of switching circuit technology, and more particularly, to the field of switching power supply technology.

Background

The input of the switching Power supply adopts capacitor filtering to obtain high-voltage direct current, particularly, both a two-stage Active Power Factor Correction (APFC) circuit and a single-stage high-Power low-Power PFC (PFC) circuit have electrolytic capacitors with larger input capacity, at the moment of starting the Power supply, the high voltage input into a Power grid instantly charges a large capacitor, and because the capacitor is in a non-energy storage state, a large cold-start surge current is formed, and the current easily damages diodes and MOS semiconductor switching elements in the circuit. Meanwhile, the larger starting current can cause interference to other electrical equipment in the power grid, even trigger an air switch, and cause false triggering power failure, so that a reliable and stable technical scheme is needed to solve the problems.

To solve such problems, a surge suppression module composed of a relay and a thermistor is used in the related art to suppress a surge current in an alternating current-direct current (AC-DC) circuit. In the scheme, because the contact is easy to ignite at the moment of working of the relay, the larger the power is, the longer the switch action contact is easy to oxidize, the service life of the whole system is influenced, and the reverse voltage of the inductor at the moment of conducting the relay is easy to interfere the circuit or cause other elements to be damaged, so that the stability of the power supply system is influenced.

Disclosure of Invention

The disclosure provides a surge current suppression circuit, a switching power supply and a chip.

According to a first aspect of the present disclosure, there is provided an inrush current suppression circuit of a switching power supply, the switching power supply including a power supply EMI module and a rectification module, the inrush current suppression circuit including: the surge suppression module and the driving module;

the input end of the surge suppression module is connected with the output end of the power supply EMI module, and the output end of the surge suppression module is connected with the input end of the rectification module and the output end of the driving module;

the surge suppression module comprises a bidirectional thyristor and a surge suppression resistor;

the drive module comprises a photothyristor and a photothyristor drive circuit, the photothyristor drive circuit is used for providing stable drive for the photothyristor, and the photothyristor is used for driving the conduction of the bidirectional thyristor.

In a possible design, the input of bidirectional thyristor with surge suppression resistance's first end is connected, bidirectional thyristor's output with surge suppression resistance's second end is connected, bidirectional thyristor's control end with photoelectric silicon controlled rectifier's first output is connected, bidirectional thyristor's output through a first current-limiting resistance with photoelectric silicon controlled rectifier's first output is connected, bidirectional thyristor's input through a second current-limiting resistance with photoelectric silicon controlled rectifier's second output is connected.

In one possible design, the surge suppressing resistor is formed by connecting a thermistor and a third current limiting resistor in parallel.

In one possible design, two input ends of the photovoltaic controlled silicon are respectively connected with two output ends of the photovoltaic controlled silicon driving circuit, and the photovoltaic controlled silicon driving circuit is composed of a driving voltage stabilizing circuit and a main transformer auxiliary winding circuit of the switching power supply.

In one possible design, an input end of the driving voltage stabilizing circuit is connected with an output end of the main transformer auxiliary winding circuit, and two output ends of the driving voltage stabilizing circuit are respectively connected with two input ends of the photo-thyristor.

In one possible design, the driving voltage stabilizing circuit comprises a zener diode, a triode and a first filter capacitor, wherein the input end of the triode is connected with the output end of the zener diode through a fourth current limiting resistor, the output end of the triode is connected with the first input end of the photothyristor through a fifth current limiting resistor, the control end of the triode is connected with the output end of the zener diode, the input end of the zener diode is connected with the second input end of the photothyristor, the output end of the triode is connected with the first end of the first filter capacitor, the input end of the zener diode is connected with the second end of the first filter capacitor, and the second end of the first filter capacitor is grounded.

In one possible design, the main transformer auxiliary winding circuit includes a main transformer auxiliary winding, a first diode and a second filter capacitor, a first end of the main transformer auxiliary winding is connected to an input end of the first diode, a second end of the main transformer auxiliary winding is grounded, an output end of the first diode is connected to a first end of the second filter capacitor, and a second end of the second filter capacitor is grounded.

According to a second aspect of the present disclosure, there is provided a switching power supply including:

the power supply EMI module is used for inhibiting electromagnetic interference of an alternating current power supply;

the rectification module is used for converting the high-voltage alternating current of the alternating current power supply into high-voltage direct current to be output;

the inrush current suppression circuit according to the first aspect is disposed between the power supply EMI module and the rectification module, and configured to suppress an inrush current of the switching power supply; and the number of the first and second groups,

and the PFC boost module is used for improving the power factor of the switching power supply.

In one possible design, the rectifier module is a rectifier bridge.

According to a third aspect of the present disclosure, there is provided a chip comprising: the switching power supply according to the second aspect.

It should be understood that the statements herein reciting aspects are not intended to limit the critical or essential features of the embodiments of the present disclosure, nor are they intended to limit the scope of the present disclosure. Other features of the present disclosure will become apparent from the following description.

Drawings

The above and other features, advantages and aspects of various embodiments of the present disclosure will become more apparent by referring to the following detailed description when taken in conjunction with the accompanying drawings. The accompanying drawings are included to provide a further understanding of the present disclosure, and are not intended to limit the disclosure thereto, and the same or similar reference numerals will be used to indicate the same or similar elements, where:

fig. 1 shows a schematic configuration diagram of an inrush current suppression circuit of a switching power supply according to the present disclosure;

fig. 2 shows a schematic diagram of a surge suppression resistor according to the present disclosure;

FIG. 3 shows a schematic diagram of a thyristor drive circuit according to the present disclosure;

fig. 4 shows a schematic structural diagram of a switching power supply according to the present disclosure;

fig. 5 shows a circuit schematic of a switching power supply according to the present disclosure.

Detailed Description

To make the objects, technical solutions and advantages of the embodiments of the present disclosure more clear, the technical solutions of the embodiments of the present disclosure will be described clearly and completely with reference to the drawings in the embodiments of the present disclosure, and it is obvious that the described embodiments are some, but not all embodiments of the present disclosure. All other embodiments, which can be derived by a person skilled in the art from the embodiments disclosed herein without making any creative effort, shall fall within the protection scope of the present disclosure.

One skilled in the art will recognize that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. It will be understood that when an element is referred to as being "connected" or "coupled" to another element, it can be directly connected or coupled to the other element or intervening elements may also be present. Further, "connected" or "coupled" as used herein may include wirelessly connected or wirelessly coupled. As used herein, the term "and/or" includes all or any element and all combinations of one or more of the associated listed items, and the term "and/or" is used herein merely to describe an associative relationship of associated objects, meaning that three relationships may exist, e.g., A and/or B, and may mean: a exists alone, A and B exist simultaneously, and B exists alone. In addition, the character "/" herein generally indicates that the former and latter related objects are in an "or" relationship.

Fig. 1 shows a schematic structural diagram of an inrush current suppression circuit of a switching power supply according to an embodiment of the present disclosure, the switching power supply includes a power supply Electromagnetic Interference (EMI) module and a rectification module, the inrush current suppression circuit is disposed between the power supply EMI module and the rectification module, and it can be seen from the figure that the inrush current suppression circuit includes an inrush suppression module 10 and a driving module 20, specifically:

the input end of the surge suppression module 10 is connected with the output end of the power supply EMI module, and the output end of the surge suppression module 10 is connected with the input end of the rectification module and the output end of the driving module 20;

the surge suppression module 10 comprises a bidirectional thyristor (Q1 in FIG. 1) and a surge suppression resistor; the driving module 20 includes a photo-thyristor and a photo-thyristor driving circuit, and as can be seen from fig. 1, the photo-thyristor includes 6 pins, where pin 1 corresponds to a positive input terminal, pin 2 corresponds to a negative input terminal, pin 4 and pin 6 correspond to two output terminals, which are referred to as a first output terminal and a second output terminal, and pin 3 and pin 6 are empty pins.

It should be noted that the photothyristors in the present disclosure are made of diodes and triacs by driving isolation, and the model is, for example, MOC 3083M.

The input end of the bidirectional thyristor Q1 is connected with the first end of the surge suppression resistor, the output end of the bidirectional thyristor Q1 is connected with the second end of the surge suppression resistor, the control end of the bidirectional thyristor Q1 is connected with the first output end of the photothyristor (pin 4 of the photothyristor in figure 1), the output end of the bidirectional thyristor Q1 is connected with the first output end of the photothyristor (pin 4 of the photothyristor in figure 1) through a current-limiting resistor (R3 in figure 1), and the input end of the bidirectional thyristor Q1 is connected with the second output end of the photothyristor (pin 6 of the photothyristor in figure 1) through a current-limiting resistor (R4 in figure 1).

The photoelectric silicon controlled rectifier driving circuit is used for providing stable driving for the photoelectric silicon controlled rectifier, and the photoelectric silicon controlled rectifier is used for driving the conduction of the bidirectional silicon controlled rectifier Q1.

Fig. 2 further shows a schematic diagram of the structure of the surge suppressing resistor, and as can be seen from fig. 2, the surge suppressing resistor is formed by connecting a thermistor (NTC 1 in fig. 2) and a current limiting resistor (R8 in fig. 2) in parallel.

Before the switching power supply system is completely operated, the bidirectional thyristor Q1 is cut off, and the current charges a PFC capacitor or a bus capacitor through the surge suppression resistor to suppress the starting current.

As can be seen from fig. 1, two input terminals of the thyristor are respectively connected to two output terminals of the thyristor driving circuit.

Fig. 3 further shows a schematic structural diagram of the thyristor driving circuit. As can be seen from fig. 3, the thyristor driving circuit is composed of a driving voltage stabilizing circuit and a main transformer auxiliary winding circuit of the switching power supply.

The input end of the driving voltage stabilizing circuit is connected with the output end of the main transformer auxiliary winding circuit, and the two output ends of the driving voltage stabilizing circuit are respectively connected with the two input ends of the photoelectric silicon controlled rectifier.

The driving voltage stabilizing circuit comprises a voltage stabilizing diode (ZD 1 in figure 3), a triode (Q2 in figure 3) and a first filter capacitor (EC 1 in figure 3), wherein the input end of the triode Q2 is connected with the output end of the voltage stabilizing diode ZD1 through a current limiting resistor (R6 in figure 3), the output end of the triode Q2 is connected with the first input end (pin 1) of the photothyristor through a current-limiting resistor (R5 in figure 3), the control end of the triode Q2 is connected with the output end of the zener diode ZD1, the input end of the zener diode ZD1 is connected with the second input end (pin 2) of the photothyristor, the output end of the triode Q2 is connected to the first end of the first filter capacitor EC1, the input end of the zener diode ZD1 is connected to the second end of the first filter capacitor EC1, and the second end of the first filter capacitor EC1 is grounded.

The main transformer auxiliary winding circuit comprises a main transformer auxiliary winding (L4 in FIG. 3), a first diode (D1 in FIG. 3) and a second filter capacitor (EC 2 in FIG. 3), wherein a first end of the main transformer auxiliary winding L4 is connected with an input end of the first diode D1, a second end of the main transformer auxiliary winding L4 is grounded, an output end D1 of the first diode is connected with a first end of the second filter capacitor EC2, and a second end of the second filter capacitor EC2 is grounded.

When the voltage of the PFC capacitor (EC 3 in fig. 5) is charged to the system working voltage, the power supply part works, the main transformer auxiliary winding supplies power, and stable driving is provided for the photothyristor by driving the regulated voltage.

Fig. 4 shows a schematic diagram of a switching power supply, which includes:

a power supply EMI module 41 for suppressing electromagnetic interference of the ac power supply;

the rectifying module 42 is configured to convert the high-voltage ac of the ac power supply into a high-voltage dc for output;

an inrush current suppression circuit 43, provided between the power EMI module 41 and the rectifier module 42, for suppressing an inrush current of the switching power supply; and the number of the first and second groups,

and a PFC boost module 44 for improving the power factor of the switching power supply.

Optionally, the rectifier module 42 is a rectifier bridge, and the inrush current suppression circuit 43 is shown with reference to fig. 1 and 2. As an example, fig. 5 shows a circuit schematic diagram of a switching power supply, and the power supply EMI module, the rectifier module, and the PFC boost module may adopt existing circuit structures, which are not described herein again.

When the switching power supply is started to work, the photoelectric silicon controlled rectifier of the driving module acts to drive the bidirectional silicon controlled rectifier of the surge suppression module to be conducted, current does not flow into a loop through the bidirectional silicon controlled rectifier any more through the surge suppression resistor for limiting current, loss in the circuit is reduced, complete action of cold start current suppression of the power supply is completed, and the power supply enters a stable working state.

The surge suppression circuit of the present disclosure has the following advantages:

1: the bidirectional thyristor and the surge suppression resistor are connected in parallel to achieve starting current limiting, the bidirectional thyristor is conducted after the power supply is started, and circuit loss is low.

2: the surge suppression circuit is arranged in front of the rectifier bridge and plays a role in protecting the rectifier bridge.

3: the bidirectional controllable silicon is driven by the photoelectric controllable silicon, so that alternating current and direct current electrical isolation can be realized, and the system is more stable and reliable.

4: after the power supply is started, the main transformer acts to supply power to the auxiliary winding for driving, and a detection part does not need to be added independently.

According to an embodiment of the present disclosure, there is also provided a chip including the switching power supply described with reference to fig. 4.

Although the embodiments of the present disclosure have been described in detail with reference to the accompanying drawings, the embodiments of the present disclosure are not limited to the details of the embodiments, and various simple modifications may be made to the technical solutions of the embodiments of the present disclosure within the technical concept of the embodiments of the present disclosure, and the simple modifications all belong to the scope of the embodiments of the present disclosure.

It should be noted that the various features described in the above embodiments may be combined in any suitable manner without departing from the scope of the invention. In order to avoid unnecessary repetition, the embodiments of the present disclosure do not separately describe various possible combinations.

The foregoing is illustrative of the preferred embodiments of the present disclosure, and is not to be construed as limiting the disclosure in any way. Although the disclosure has been described with reference to preferred embodiments, it is not intended to be limited thereto. Those skilled in the art can now make numerous possible variations and modifications to the disclosed embodiments, or modify equivalent embodiments, using the methods and techniques disclosed above, without departing from the scope of the disclosed embodiments. Therefore, any simple modification, equivalent change and modification made to the above embodiments according to the technical essence of the present disclosure are still within the protection scope of the technical solution of the present disclosure, unless the technical essence of the present disclosure departs from the content of the technical solution of the present disclosure.

Various implementations of the systems and techniques described here above may be implemented in digital electronic circuitry, integrated circuitry, Field Programmable Gate Arrays (FPGAs), Application Specific Integrated Circuits (ASICs), Application Specific Standard Products (ASSPs), system on a chip (SOCs), load programmable logic devices (CPLDs), computer hardware, firmware, software, and/or combinations thereof. These various embodiments may include: implemented in one or more computer programs that are executable and/or interpretable on a programmable system including at least one programmable processor, which may be special or general purpose, receiving data and instructions from, and transmitting data and instructions to, a storage system, at least one input device, and at least one output device.

Program code for implementing the methods of the present disclosure may be written in any combination of one or more programming languages. These program codes may be provided to a processor or controller of a general purpose computer, special purpose computer, or other programmable data processing apparatus, such that the program codes, when executed by the processor or controller, cause the functions/operations specified in the flowchart and/or block diagram to be performed. The program code may execute entirely on the machine, partly on the machine, as a stand-alone software package partly on the machine and partly on a remote machine or entirely on the remote machine or server.

In the context of this disclosure, a machine-readable medium may be a tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device. The machine-readable medium may be a machine-readable signal medium or a machine-readable storage medium. A machine-readable medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. More specific examples of a machine-readable storage medium would include an electrical connection based on one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

To provide for interaction with a user, the systems and techniques described here can be implemented on a computer having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to a user; and a keyboard and a pointing device (e.g., a mouse or a trackball) by which a user can provide input to the computer. Other kinds of devices may also be used to provide for interaction with a user; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form, including acoustic, speech, or tactile input.

The systems and techniques described here can be implemented in a computing system that includes a back-end component (e.g., as a data server), or that includes a middleware component (e.g., an application server), or that includes a front-end component (e.g., a user computer having a graphical user interface or a web browser through which a user can interact with an implementation of the systems and techniques described here), or any combination of such back-end, middleware, or front-end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: local Area Networks (LANs), Wide Area Networks (WANs), and the Internet.

The computer system may include clients and servers. A client and server are generally remote from each other and typically interact through a communication network. The relationship of client and server arises by virtue of computer programs running on the respective computers and having a client-server relationship to each other. The server may be a cloud server, a server of a distributed system, or a server with a combined blockchain.

It should be understood that various forms of the flows shown above may be used, with steps reordered, added, or deleted. For example, the steps described in the present disclosure may be executed in parallel, sequentially, or in different orders, as long as the desired results of the technical solutions disclosed in the present disclosure can be achieved, and the present disclosure is not limited herein.

The above detailed description should not be construed as limiting the scope of the disclosure. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions may be made in accordance with design requirements and other factors. Any modification, equivalent replacement, and improvement made within the spirit and principle of the present disclosure should be included in the protection scope of the present disclosure.

Claims

1. An inrush current suppression circuit for a switching power supply, the switching power supply including a power supply EMI module and a rectification module, the inrush current suppression circuit comprising: the surge suppression module and the driving module;

2. The surge current suppression circuit according to claim 1, wherein an input terminal of said triac is connected to a first terminal of said surge suppression resistor, an output terminal of said triac is connected to a second terminal of said surge suppression resistor, a control terminal of said triac is connected to a first output terminal of said triac, an output terminal of said triac is connected to a first output terminal of said triac through a first current limiting resistor, and an input terminal of said triac is connected to a second output terminal of said triac through a second current limiting resistor.

3. The inrush current suppression circuit of claim 2, wherein the inrush current suppression resistor is formed by connecting a thermistor and a third current limiting resistor in parallel.

4. The inrush current suppression circuit according to claim 2 or 3, wherein two input terminals of the thyristor are respectively connected to two output terminals of the thyristor drive circuit, and the thyristor drive circuit is composed of a drive voltage stabilizing circuit and a main transformer auxiliary winding circuit of the switching power supply.

5. The inrush current suppression circuit according to claim 4, wherein an input terminal of the driving voltage stabilization circuit is connected to an output terminal of the main transformer auxiliary winding circuit, and two output terminals of the driving voltage stabilization circuit are respectively connected to two input terminals of the thyristor.

6. The inrush current suppression circuit according to claim 5, wherein the driving voltage regulator circuit comprises a zener diode, a transistor, and a first filter capacitor, an input terminal of the transistor is connected to an output terminal of the zener diode through a fourth current limiting resistor, an output terminal of the transistor is connected to the first input terminal of the thyristor through a fifth current limiting resistor, a control terminal of the transistor is connected to an output terminal of the zener diode, an input terminal of the zener diode is connected to the second input terminal of the thyristor, an output terminal of the transistor is connected to the first terminal of the first filter capacitor, an input terminal of the zener diode is connected to the second terminal of the first filter capacitor, and a second terminal of the first filter capacitor is grounded.

7. The inrush current suppression circuit of claim 5, wherein the main transformer auxiliary winding circuit comprises a main transformer auxiliary winding, a first diode, and a second filter capacitor, a first end of the main transformer auxiliary winding is connected to an input terminal of the first diode, a second end of the main transformer auxiliary winding is grounded, an output terminal of the first diode is connected to a first end of the second filter capacitor, and a second end of the second filter capacitor is grounded.

8. A switching power supply, comprising:

the inrush current suppression circuit as claimed in any one of claims 1 to 7, disposed between the power supply EMI module and the rectification module, for suppressing an inrush current of the switching power supply; and the number of the first and second groups,

9. The switching power supply according to claim 8, wherein the rectifying module is a rectifying bridge.

10. A chip, comprising: a switching power supply according to claim 8 or 9.