CN114527816A - Potential state discriminating device - Google Patents

Potential state discriminating device Download PDF

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Publication number
CN114527816A
CN114527816A CN202011637991.6A CN202011637991A CN114527816A CN 114527816 A CN114527816 A CN 114527816A CN 202011637991 A CN202011637991 A CN 202011637991A CN 114527816 A CN114527816 A CN 114527816A
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CN
China
Prior art keywords
terminal
coupled
transistor
circuit
voltage
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CN202011637991.6A
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Chinese (zh)
Inventor
彭天云
蔡贤皇
陈智圣
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Richwave Technology Corp
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Richwave Technology Corp
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Publication of CN114527816A publication Critical patent/CN114527816A/en
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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current
    • G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices

Abstract

The potential state judging device comprises an input end, a voltage drop circuit, a pull-down circuit, a load circuit, a transistor, a pull-up circuit, a first output end and a second output end. The voltage drop circuit is coupled to the input end. The pull-down circuit is coupled to the voltage drop circuit and the first reference voltage terminal. The load circuit is coupled to the second reference voltage terminal. The first end of the transistor is coupled to the load circuit, the second end of the transistor is coupled to the first reference voltage end, and the control end of the transistor is coupled to the voltage drop circuit. The pull-up circuit is coupled to the second reference voltage terminal and the voltage drop circuit. The first output end is coupled to the first end of the transistor and used for outputting a first state judgment signal. The second output end is coupled to the voltage drop circuit and used for outputting a second state judgment signal.

Description

Potential state discriminating device
Technical Field
The present invention relates to a potential state determination device, and more particularly, to a potential state determination device capable of determining a floating state.
Background
In the design of electronic circuits, a potential state determination device is usually used to determine the potential state of a specific node, or determine the state of a circuit or a component associated with the specific node. However, in the prior art, the potential state discriminating device can only discriminate a specific fixed potential, and cannot discriminate whether or not a specific node is in a floating (floating) state, so that the application range of the potential state discriminating device is limited.
Disclosure of Invention
An embodiment of the present invention provides a potential state determination device, which includes an input terminal, a voltage drop circuit, a pull-down circuit, a load circuit, a transistor, a pull-up circuit, a first output terminal, and a second output terminal.
The voltage drop circuit has a first end and a second end, and the first end of the voltage drop circuit is coupled to the input end. The pull-down circuit has a first terminal coupled to the second terminal of the voltage drop circuit and a second terminal coupled to the first reference voltage terminal. The load circuit has a first terminal and a second terminal, and the first terminal of the load circuit is coupled to the second reference voltage terminal. The transistor has a first terminal, a second terminal and a control terminal, wherein the first terminal of the transistor is coupled to the second terminal of the load circuit, and the second terminal of the transistor is coupled to the first reference voltage terminal. The pull-up circuit has a first terminal coupled to the second reference voltage terminal and a second terminal coupled to the first terminal of the voltage drop circuit.
The first output end is coupled to the first end of the transistor and used for outputting a first state judgment signal, and the second output end is used for outputting a second state judgment signal. The control end of the transistor is coupled to the second end of the voltage drop circuit and the second output end is coupled to the first end of the voltage drop circuit, or the control end of the transistor is coupled to the first end of the voltage drop circuit and the second output end is coupled to the second end of the voltage drop circuit.
The first state discrimination signal and the second state discrimination signal are used for judging the potential state of the input end.
Drawings
Fig. 1 is a schematic diagram of a potential state determination device according to an embodiment of the invention.
Fig. 2 is a schematic diagram of a potential state determination device according to another embodiment of the invention.
Fig. 3 is a schematic diagram of a potential state determination device according to another embodiment of the invention.
Fig. 4 is a schematic application diagram of a potential state determination device according to an embodiment of the invention.
Fig. 5 is a schematic diagram of a potential state determination device according to another embodiment of the invention.
Fig. 6 is a schematic diagram of a potential state determination device according to another embodiment of the invention.
Fig. 7 is a schematic diagram of a potential state determination device according to another embodiment of the invention.
Fig. 8 is a schematic application diagram of a potential state determination device according to another embodiment of the invention.
Description of the drawings：
100. 200, 300, 400, 500, 600, 700, 800 potential state discriminating device
110. 410, 510, 810 voltage drop circuit
120. 420, 520, 820 pull-down circuit
130. 354, 430, 454, 530, 754, 830, 854 load circuit
140. 440, 540, 840 pull-up circuit
250. 350, 450, 650, 750, 850 logic circuit
352. 452 nand gate
460. 860 internal circuit
462. 862 switch circuit
464. 864 functional circuit
752. 852 nor gate
CS1, CS2 and CS3 current sources
DA. D1, D2 and D3 diodes
DU1, DU2, DU3 diode unit
IDDetecting current
IL1、IL2Load current
IN input terminal
M1A, M1B, M2, M3, M4, M5, and transistor
M6A、M6B、M7A、M7B、M8、M9
OUT1, OUT2 output terminal
Resistance of RA, RB, R1, R2 and R3
VN1, VN2 reference voltage terminal
SIGD1、SIGD2State discrimination signal
SIGctrlControl signal
Detailed Description
Fig. 1 is a schematic diagram of a potential state determination device 100 according to an embodiment of the invention. The potential state determination device 100 includes an input terminal IN, an output terminal OUT1, an output terminal OUT2, a voltage drop circuit 110, a pull-down circuit 120, a load circuit 130, a transistor M1A, and a pull-up circuit 140.
The voltage drop circuit 110 has a first terminal and a second terminal, and the first terminal of the voltage drop circuit 110 is coupled to the input terminal IN. When a current flows through the voltage drop circuit 110, the voltage drop circuit 110 correspondingly generates a voltage drop between the first terminal and the second terminal.
The pull-down circuit 120 has a first terminal and a second terminal, the first terminal of the pull-down circuit 120 is coupled to the second terminal of the voltage drop circuit 110, and the second terminal of the pull-down circuit 120 is coupled to the reference voltage terminal VN 1.
The load circuit 130 has a first terminal and a second terminal, and the first terminal of the load circuit 130 is coupled to the reference voltage terminal VN 2.
The transistor M1A has a first terminal, a second terminal, and a control terminal. The first terminal of the transistor M1A is coupled to the second terminal of the load circuit 130, the second terminal of the transistor M1A is coupled to the reference voltage terminal VN1, and the control terminal of the transistor M1A is coupled to the second terminal of the voltage drop circuit 110.
The pull-up circuit 140 has a first terminal and a second terminal, the first terminal of the pull-up circuit 140 is coupled to the reference voltage terminal VN2, and the second terminal of the pull-up circuit 140 is coupled to the first terminal of the voltage drop circuit 110. In some embodiments of the invention, the voltage provided by the reference voltage terminal VN2 may be higher than the voltage provided by the reference voltage terminal VN 1. For example, the voltage provided by the reference voltage terminal VN2 can be, for example but not limited to, an operating voltage in the system, and the voltage provided by the reference voltage terminal VN1 can be, for example but not limited to, a ground voltage in the system.
The output terminal OUT1 is coupled to the first terminal of the transistor M1A and is used for outputting a state signal SIGD1. The output terminal OUT2 is coupled to the first terminal of the voltage drop circuit 110 and is used for outputting a state signal SIGD2. The potential state discrimination apparatus 100 can output a state discrimination signal SIG of different voltages according to the potential state of the input terminal IND1And SIGD2. That is, the state discrimination signal SIGD1And SIGD2Can be used to determine the potential state of the input terminal IN. IN some embodiments of the present invention, the input terminal IN may be coupled to a specific node to determine a potential state of the specific node or a state of a circuit or a component associated with the specific node.
For example, when the potential state of the input terminal IN is floating, the detection current I with proper magnitude is generatedDIn the case of (1), the current I is detectedDThe voltage of the output terminal OUT2 can be regarded as the difference between the voltage provided by the reference voltage terminal VN2 and the voltage drop generated by the pull-up circuit 140, and at this time, the output terminal OUT2 will output the state discrimination signal SIG with high voltageD2. The voltage received by the control terminal of the transistor M1A can be regarded as a voltage obtained by dividing the voltage of the output terminal OUT2 by the voltage drop circuit 110 and the pull-down circuit 120, so that the control terminal of the transistor M1A receives a low voltage, and the transistor M1A is turned off. In this case, the voltage at the output terminal OUT1 can be regarded as the voltage provided by the reference voltage terminal VN2, and therefore the output terminal OUT1 can also output the state determination signal SIG with a high voltageD1。
However, when the potential state of the input terminal IN is atIn the high voltage state, a detection current I with a proper magnitude is generatedDIN this case, the voltage received by the control terminal of the transistor M1A can be regarded as a voltage obtained by dividing the high voltage of the input terminal IN by the voltage drop circuit 110 and the pull-down circuit 120, so that the control terminal of the transistor M1A is at a high voltage, and the transistor M1A is turned on. At this time, the voltage at the output terminal OUT1 is pulled down by the transistor M1A to a voltage close to the voltage provided by the reference voltage terminal VN1, so the output terminal OUT1 outputs the state determination signal SIG with a low voltageD1. IN addition, the voltage of the output terminal OUT2 will be dominated by the high voltage of the input terminal IN, so the output terminal OUT2 will output the state discrimination signal SIG with high voltageD2。
Furthermore, when the potential state of the input terminal IN is IN a low voltage state, a detection current I with a proper magnitude is generatedDIN this case, the voltage received by the control terminal of the transistor M1A can be regarded as the voltage obtained by dividing the low voltage of the input terminal IN by the voltage drop circuit 110 and the pull-down circuit 120, so that the control terminal of the transistor M1A is at the low voltage, and therefore the transistor M1A is turned off. In this case, the voltage at the output terminal OUT1 can be regarded as the voltage provided by the reference voltage terminal VN2, so the output terminal OUT1 will output the state discrimination signal SIG with high voltageD1. IN addition, the voltage of the output terminal OUT2 will be dominated by the low voltage of the input terminal IN, so the output terminal OUT2 will output the state discrimination signal SIG having a low voltageD2。
Thus, the signal SIG is judged through the stateD1And SIGD2The potential state of the input terminal IN can be judged. That is, the signal SIG is judged when the state isD1And SIGD2When both are high voltage, it indicates that the potential state of the input terminal IN is IN floating state. And the current state identification signal SIGD1And SIGD2When the voltages are different, it indicates that the potential state of the input terminal IN is IN a high voltage state or a low voltage state.
Detecting the current IDCan be designed to cause the control terminal of the transistor M1A to be raised to a voltage high enough to turn on the transistor M1A when the potential state of the input terminal IN is IN a high voltage state, and the potential state of the input terminal IN isIn the low voltage state or floating state, the control terminal of the transistor M1A can be forced to adjust to a low voltage to turn off the transistor M1A. In some embodiments of the present invention, the pull-up circuit 140, the pull-down circuit 110 and the pull-down circuit 120 are designed appropriately to generate the detection current I with an appropriate magnitudeD。
Fig. 2 is a schematic diagram of a potential state determining apparatus 200 according to another embodiment of the invention. The electric potential state discrimination device 200 has a similar structure to the electric potential state discrimination device 100 and can operate according to a similar principle, however, the electric potential state discrimination device 200 may also include a logic circuit 250.
The logic circuit 250 is coupled to the output terminals OUT1 and OUT2 for determining the signal SIG according to the stateD1And SIGD2Generating a control signal SIG dependent on the potential state of the input INctrl. That is, through the logic circuit 250, the electric potential state discriminating device 200 can output the control signal SIG of different voltages according to the electric potential state of the input terminal INctrlAnd thereby determining the potential state of the input terminal IN.
Fig. 3 is a schematic diagram of a potential state determination device 300 according to another embodiment of the invention. The electric potential state discriminating device 300 has a similar structure to the electric potential state discriminating device 200 and can operate according to a similar principle, however, the logic circuit 350 of the electric potential state discriminating device 300 can include a NAND gate (NAND gate)352 and a load circuit 354.
The NAND gate 352 has a first input terminal, a second input terminal and an output terminal, the first input terminal of the NAND gate 352 is coupled to the output terminal OUT1, the second input terminal of the NAND gate 352 is coupled to the output terminal OUT2, and the output terminal of the NAND gate 352 is used for outputting the control signal SIGctrl。
The load circuit 354 has a first terminal and a second terminal, the first terminal of the load circuit 354 is coupled to the reference voltage terminal VN2, and the second terminal of the load circuit 354 is coupled to the output terminal of the nand gate 352.
The potential state discriminating device 300 can output control signals SIG of different voltages according to the potential state of the input terminal INctrl. For example, according to FIG. 1, when the potential state of the input IN is floating, the input IN is floatingThe output terminal OUT1 outputs a state discrimination signal SIG having a high voltageD1And the output terminal OUT2 outputs a high-voltage state-discrimination signal SIGD2. As a result, the output of the NAND gate 352 outputs the control signal SIG with a low voltagectrl。
IN addition, when the potential state of the input terminal IN is IN a high voltage state, the output terminal OUT1 outputs a state discrimination signal SIG having a low voltageD1And the output terminal OUT2 outputs a high-voltage state-discrimination signal SIGD2. Thus, the output of the NAND gate 352 outputs the control signal SIG with a high voltagectrl。
Furthermore, when the potential state of the input terminal IN is IN a low voltage state, the output terminal OUT1 outputs a state discrimination signal SIG having a high voltageD1And the output terminal OUT2 outputs a state decision signal SIG with a low voltageD2. Thus, the output of the NAND gate 352 will also output the control signal SIG with a high voltagectrl。
That is, via the control signal SIGctrlThe potential state of the input terminal IN can be judged. In FIG. 3, when the control signal SIGctrlAt low voltage, it indicates that the potential state of the input terminal IN is floating. When the control signal SIGctrlWhen the voltage is high, it indicates that the potential state of the input terminal IN is IN a high voltage or low voltage state. In other embodiments of the present invention, the logic circuit 350 may also generate the control signal SIG by other logic operationsctrlTo meet the actual operation requirements of the system.
Fig. 4 is a schematic application diagram of a potential state determination device 400 according to an embodiment of the invention. The electrical potential state discriminating apparatus 400 may be one of the implementation aspects of the electrical potential state discriminating apparatus 300 of fig. 3, and may operate according to similar principles. The electric potential state discriminating device 400 may include an input terminal IN, an output terminal OUT1, an output terminal OUT2, a voltage drop circuit 410, a pull-down circuit 420, a load circuit 430, a transistor M1A, a pull-up circuit 440 and a logic circuit 450.
The voltage drop circuit 410 may comprise at least one transistor, at least one diode, at least one resistor, or any combination thereof, and the pull-down circuit 420 may comprise at least one transistor, at least one diode, at least one resistor, or any combination thereof. For example, in fig. 4, the voltage drop circuit 410 may include a resistor RA and a diode DA in series with each other, while the pull-down circuit 420 may include a resistor RB. In other embodiments of the present invention, the diode DA may be replaced with a diode connected transistor.
In some embodiments of the present invention, the load circuit 430 may include the current source CS1, and the current source CS1 may include at least one transistor, at least one diode, at least one resistor, or any combination thereof. For example, in fig. 4, current source CS1 may include transistor M2 and resistor R1.
The Transistor M2 may be a Field Effect Transistor (FET). In some embodiments of the present invention, the transistor M2 may be a depletion mode (D-mode) pseudomorphic high-speed electron mobility transistor (PHEMT). The transistor M2 has a first terminal, a second terminal, and a control terminal, and the first terminal of the transistor M2 is coupled to the first terminal of the load circuit 430. The resistor R1 has a first terminal and a second terminal, the first terminal of the resistor R1 is coupled to the second terminal of the transistor M2, and the second terminal of the resistor R1 is directly or indirectly coupled to the control terminal of the transistor M2 and the second terminal of the load circuit 430. The second terminal of the resistor R1 is directly coupled to the control terminal of the transistor M2 and the second terminal of the load circuit 430, and the voltage of the second terminal of the load circuit 430 is pulled low (i.e., the output terminal OUT1 outputs the state-determination signal SIG with a low voltage at this time)D1) For example, the control terminal of the transistor M2 receives a low voltage, so that the transistor M2 is turned on. The voltage at the second terminal of the transistor M2 can be regarded as the voltage at the output terminal OUT1 minus the voltage difference between the control terminal and the second terminal of the transistor M2. While the load current I flows through the current source CS1L1It can be seen as the voltage at the second terminal of the transistor M2 divided by the resistance of the resistor R1. Due to the resistance of the resistor R1 and the load current IL1Is inversely proportional, so that the load current I can be adjusted by selecting the resistor R1 (e.g., 1M Ω) with a large resistanceL1The leakage current (leakage) of the potential state discrimination device 400 is reduced (e.g., less than 1 μ A) to reducecurrent) and power consumption. However, the resistor R1 with a large resistance occupies a larger circuit area of the electric potential state determination device 400 (for example, the circuit area of the current source CS1 is increased to 1 time of the original circuit area).
To improve the above, the current source CS1 may also include a diode unit DU 1. The diode unit DU1 has a first terminal and a second terminal, the first terminal of the diode unit DU1 is coupled to the second terminal of the resistor R1, and the second terminal of the diode unit DU1 is coupled to the control terminal of the transistor M2 and the second terminal of the load circuit 430. That is, the second terminal of the resistor R1 is indirectly coupled to the control terminal of the transistor M2 and the second terminal of the load circuit 430. Diode unit DU1 may include at least one transistor, at least one diode, or any combination of the two. In some embodiments of the present invention, at least one transistor and/or at least one diode with smaller size may be selected. For example, in fig. 4, diode unit DU1 may include transistor M3 and diode D1. The transistor M3 has a first terminal, a second terminal, and a control terminal, and the first terminal of the transistor M3 is coupled to the first terminal of the diode unit DU 1. The diode D1 has a first terminal and a second terminal, the first terminal of the diode D1 is coupled to the second terminal of the transistor M3, and the second terminal of the diode D1 is coupled to the second terminal of the diode unit DU 1. Further, the transistor M3 may be diode connected. In some embodiments of the present invention, the resistor R1, the transistor M3, and the diode D1 may be used for current limiting. As a result, when the voltage at the second end of the load circuit 430 is pulled low, the control terminal of the transistor M2 receives a low voltage, so that the transistor M2 is turned on. The voltage at the second terminal of the transistor M2 can be regarded as the voltage at the output terminal OUT1 minus the voltage difference between the control terminal and the second terminal of the transistor M2. While the load current I flows through the current source CS1L1It can be seen that the voltage at the second terminal of the transistor M2 is subtracted by the voltage drop generated by the transistor M3 and the diode D1, and then divided by the resistance of the resistor R1. In other words, the load current I is reduced compared to the case of using the resistor R1 with a large resistance valueL1(e.g. less than 1 μ A), by providing diode unit DU1, not only resistor R1 (e.g. 0.4M Ω) with smaller resistance can be selected to reduce load current IL1(e.g., less than 1 μ A), and the occupation of the current source CS1 in the electric potential state determination device 400 can be reducedThe circuit area (for example, the circuit area of the current source CS1 is increased by 0.4 times of the original circuit area). In other embodiments of the present invention, the load current I may be varied according to the desired load currentL1The current value of diode unit DU 1.
In some embodiments of the present invention, pull-up circuit 440 may comprise current source CS2, and current source CS2 may comprise at least one transistor, at least one diode, at least one resistor, or any combination thereof. For example, in fig. 4, current source CS2 may include transistor M4 and resistor R2.
The transistor M4 may be a FET. In some embodiments of the invention, transistor M4 may be a D-mode PHEMT. The transistor M4 has a first terminal, a second terminal, and a control terminal, and the first terminal of the transistor M4 is coupled to the first terminal of the pull-up circuit 440. The resistor R2 has a first terminal and a second terminal, the first terminal of the resistor R2 is coupled to the second terminal of the transistor M4, and the second terminal of the resistor R2 can be directly or indirectly coupled to the control terminal of the transistor M4 and the second terminal of the pull-up circuit 440. Taking the second terminal of the resistor R2 directly coupled to the control terminal of the transistor M4 and the second terminal of the pull-up circuit 440, and the voltage of the second terminal of the pull-up circuit 440 is pulled low (i.e. the voltage state of the input terminal IN is at a low voltage state), the control terminal of the transistor M4 receives a low voltage, so that the transistor M4 is turned on. The voltage at the second terminal of the transistor M4 can be regarded as the voltage at the input terminal IN minus the voltage difference between the control terminal and the second terminal of the transistor M4. And the detection current I flowing through the current source CS2DIt can be seen as the voltage at the second terminal of the transistor M4 divided by the resistance of the resistor R2. Due to the resistance of the resistor R2 and the detection current IDThe current value of the resistor is inversely proportional, so that the current I can be detected by selecting the resistor R2 (e.g. 1M omega) with a large resistance valueDThe leakage current and power consumption of the potential state discrimination device 400 are reduced (e.g., less than 1 μ A). However, the resistor R2 with a large resistance occupies a larger circuit area of the electric potential state determination device 400 (for example, the circuit area of the current source CS2 is increased to 1 time of the original circuit area).
To improve the above, the current source CS2 may also include a diode unit DU 2. The diode unit DU2 has a first terminal and a second terminal, and the first terminal of the diode unit DU2The second terminal of the diode unit DU2 is coupled to the second terminal of the resistor R2, and the control terminal of the transistor M4 and the second terminal of the pull-up circuit 440. That is, the second terminal of the resistor R2 is indirectly coupled to the control terminal of the transistor M4 and the second terminal of the pull-up circuit 440. Diode unit DU2 may include at least one transistor, at least one diode, or any combination of the two. In some embodiments of the present invention, at least one transistor and/or at least one diode with smaller size may be selected. For example, in fig. 4, diode unit DU2 may include transistor M5 and diode D2. The transistor M5 has a first terminal, a second terminal, and a control terminal, and the first terminal of the transistor M5 is coupled to the first terminal of the diode unit DU 2. The diode D2 has a first terminal and a second terminal, the first terminal of the diode D2 is coupled to the second terminal of the transistor M5, and the second terminal of the diode D2 is coupled to the second terminal of the diode unit DU 2. Further, the transistor M5 may be diode connected. In some embodiments of the present invention, the resistor R2, the transistor M5, and the diode D2 may be used for current limiting. As a result, when the voltage at the second terminal of the pull-up circuit 440 is pulled low, the control terminal of the transistor M4 receives a low voltage, so that the transistor M4 is turned on. The voltage at the second terminal of the transistor M4 can be regarded as the voltage at the input terminal IN minus the voltage difference between the control terminal and the second terminal of the transistor M4. And the detection current I flowing through the current source CS2DThe voltage at the second end of the transistor M4 can be regarded as the voltage drop generated by the transistor M5 and the diode D2, and then divided by the resistance of the resistor R2. In other words, the detection current I is reduced compared to the case of using the resistor R2 with a large resistanceD(e.g., less than 1 μ A), by providing the diode unit DU2, not only the resistor R2 (e.g., 0.4M Ω) with smaller resistance can be selected to reduce the detection current ID(e.g., less than 1 μ A), the circuit area occupied by the current source CS2 in the electric potential state determination device 400 can be reduced (e.g., the circuit area of the current source CS2 is increased to 0.4 times the original circuit area). In other embodiments of the present invention, the current I can be detected according to the required valueDThe current value of diode unit DU 2.
The logic circuit 450 may include a nand gate 452 and a load circuit 454. The nand gate 452 may include transistor M6A and transistor M7A. The transistor M6A has a first terminal, a second terminal, and a control terminal, the first terminal of the transistor M6A is coupled to the output terminal of the nand gate 452, and the control terminal of the transistor M6A is coupled to the first input terminal of the nand gate 452. The transistor M7A has a first terminal, a second terminal, and a control terminal, the first terminal of the transistor M7A is coupled to the second terminal of the transistor M6A, the second terminal of the transistor M7A is coupled to the reference voltage terminal VN1, and the control terminal of the transistor M7A is coupled to the second input terminal of the nand gate 452.
Furthermore, in some embodiments of the present invention, the load circuit 454 may include the current source CS3, and the current source CS3 may include at least one transistor, at least one diode, at least one resistor, or any combination thereof. For example, in fig. 4, current source CS3 may include transistor M8 and resistor R3.
The transistor M8 may be a FET. In some embodiments of the invention, transistor M8 may be a D-mode PHEMT. The transistor M8 has a first terminal, a second terminal, and a control terminal, and the first terminal of the transistor M8 is coupled to the first terminal of the load circuit 454. The resistor R3 has a first terminal and a second terminal, the first terminal of the resistor R3 is coupled to the second terminal of the transistor M8, and the second terminal of the resistor R3 is directly or indirectly coupled to the control terminal of the transistor M8 and the second terminal of the load circuit 454. The second terminal of the resistor R3 is directly coupled to the control terminal of the transistor M8 and the second terminal of the load circuit 454, and the voltage of the second terminal of the load circuit 454 is pulled low (i.e., the output terminal of the nand gate 452 outputs the control signal SIG with a low voltage)ctrl) For example, the control terminal of the transistor M8 receives a low voltage, so that the transistor M8 is turned on. The voltage at the second terminal of the transistor M8 can be regarded as the voltage at the output terminal of the nand gate 452 minus the voltage difference between the control terminal and the second terminal of the transistor M8. While the load current I flowing through the current source CS3L2It can be seen as the voltage at the second terminal of the transistor M8 divided by the resistance of the resistor R3. Due to the resistance of the resistor R3 and the load current IL2Is inversely proportional, so that the load current I can be adjusted by selecting the resistor R3 (e.g., 1M Ω) with a large resistanceL2The leakage current and power consumption of the potential state discrimination device 400 are reduced (e.g., less than 1 μ A). However, the resistor R3 with a large resistance occupies a larger circuit area of the electrical potential state determination device 400 (for example, the electrical potential state determination device has a larger circuit areaSuch as the circuit area of the current source CS3 may be increased by 1 time of the original circuit area).
To improve the above, the current source CS3 may also include a diode unit DU 3. The diode unit DU3 has a first terminal and a second terminal, the first terminal of the diode unit DU3 is coupled to the second terminal of the resistor R3, and the second terminal of the diode unit DU3 is coupled to the control terminal of the transistor M8 and the second terminal of the load circuit 454. That is, the second terminal of the resistor R3 is indirectly coupled to the control terminal of the transistor M8 and the second terminal of the load circuit 454. Diode unit DU3 may include at least one transistor, at least one diode, or any combination of the two. In some embodiments of the present invention, at least one transistor and/or at least one diode with smaller size may be selected. For example, in fig. 4, diode unit DU3 may include transistor M9 and diode D3. The transistor M9 has a first terminal, a second terminal, and a control terminal, and the first terminal of the transistor M9 is coupled to the first terminal of the diode unit DU 3. The diode D3 has a first terminal and a second terminal, the first terminal of the diode D3 is coupled to the second terminal of the transistor M9, and the second terminal of the diode D3 is coupled to the second terminal of the diode unit DU 3. Further, the transistor M9 may be diode connected. In some embodiments of the present invention, the resistor R3, the transistor M9, and the diode D3 may be used for current limiting. As a result, when the voltage at the second terminal of the load circuit 454 is pulled low, the control terminal of the transistor M8 receives a low voltage, so that the transistor M8 is turned on. The voltage at the second terminal of the transistor M8 can be regarded as the voltage at the output terminal of the nand gate 452 minus the voltage difference between the control terminal and the second terminal of the transistor M8. While the load current I flowing through the current source CS3L2The voltage at the second end of the transistor M8 can be regarded as the voltage drop generated by the transistor M9 and the diode D3, and then divided by the resistance of the resistor R3. In other words, the load current I is reduced compared to the case of using the resistor R3 with a large resistance valueL2(e.g. less than 1 μ A), by providing diode unit DU3, not only resistor R3 (e.g. 0.4M Ω) with smaller resistance can be selected to reduce load current IL2(e.g., less than 1 μ A), the circuit area occupied by the current source CS3 in the electric potential state distinguishing device 400 can be reduced (e.g., the circuit area of the current source CS3 is increased to 0.4 times of the original circuit area). In the bookIn other embodiments of the invention, the load current I may be varied according to the load current I requiredL2The current value of diode unit DU 3.
IN fig. 4, when the potential state of the input terminal IN is IN a floating state, the state discrimination signal SIGD1And SIGD2Both have high voltages, causing transistors M6A and M7A to be turned on. The voltage at the output of the NAND gate 452 is pulled down by the transistors M6A and M7A to a voltage close to that provided by the reference voltage terminal VN1, so that the output of the NAND gate 452 outputs the control signal SIG with a low voltagectrl。
When the potential state of the input terminal IN is IN a high voltage state, the state discrimination signal SIGD1Will have a low voltage and a state discrimination signal SIGD2Will have a high voltage such that transistor M6A is turned off and transistor M7A is turned on. The voltage at the output of the NAND gate 452 can be regarded as the voltage provided by the reference voltage terminal VN2, so the output of the NAND gate 452 will output the control signal SIG with high voltagectrl。
When the potential state of the input terminal IN is IN a low voltage state, the state discrimination signal SIGD1Will have a high voltage and a state discrimination signal SIGD2Will have a low voltage such that transistor M6A is turned on and transistor M7A is turned off. The voltage at the output of the NAND gate 452 can be regarded as the voltage provided by the reference voltage terminal VN2, so the output of the NAND gate 452 will also output the control signal SIG with high voltagectrl。
In some embodiments of the present invention, the potential state discrimination device 400 may convert the control signal SIGctrlProvided to the internal circuitry 460 for use. In this case, the logic circuit 450 of the electrical potential state determination apparatus 400 may be coupled to the internal circuit 460. The internal circuitry 460 may include switching circuitry 462 and functional circuitry 464. The switch circuit 462 is coupled to the logic circuit 450, and the function circuit 464 is coupled to the switch circuit 462. The function circuitry 464 may be used to perform a particular function. For example, the control signal SIGctrlMay also be used to switch the operating state of the internal circuitry 460. When the control signal SIGctrlWith a low voltage, the switch circuit 462 may be turned off, thereby disabling the function circuit 464. When controllingSignal SIGctrlWith a high voltage, the switch circuit 462 can be turned on to enable the function circuit 464, so that the function circuit 464 can perform a specific function. IN some embodiments of the present invention, the potential state determination device 400 and the internal circuit 460 may be disposed IN a chip (chip), and the input end IN of the potential state determination device 400 may be coupled to a specific pin (pin) of the chip to determine the potential state of the specific pin.
In another embodiment of the present invention, the control signal SIG outputted from the potential state discriminating device 400ctrlOther ways may be used by other circuits or directly operated with other circuits, and is not limited to the control of the internal circuit 460.
Fig. 5 is a schematic diagram of a potential state determining device 500 according to another embodiment of the invention. The potential state discrimination device 500 has a similar structure to the potential state discrimination device 100 and can operate according to a similar principle. The electric potential state determination device 500 may include an input terminal IN, an output terminal OUT1, an output terminal OUT2, a voltage drop circuit 510, a pull-down circuit 520, a load circuit 530, a transistor M1B, and a pull-up circuit 540. The control terminal of the transistor M1B may be coupled to the first terminal of the voltage drop circuit 510, and the output terminal OUT2 may be coupled to the second terminal of the voltage drop circuit 510.
IN the embodiment of FIG. 5, the electric potential state determination apparatus 500 can also output the state determination signal SIG with different voltages according to the electric potential state of the input terminal IND1And SIGD2. That is, the state discrimination signal SIGD1And SIGD2Can be used to determine the potential state of the input terminal IN. IN some embodiments of the present invention, the input terminal IN may be coupled to a specific node to determine a potential state of the specific node or a state of a circuit or a component associated with the specific node.
For example, when the potential state of the input terminal IN is floating, a detection current I with a proper magnitude is generatedDIn the case of (2), detecting the current IDThe voltage drop generated by the pull-up circuit 540 is correspondingly generated by the pull-up circuit 540, the voltage drop circuit 510 and the pull-down circuit 520, and the voltage received by the control terminal of the transistor M1B is considered as the voltage provided by the reference voltage terminal VN2The difference with the voltage drop generated by the pull-up circuit 540, the control terminal of the transistor M1B will receive a higher voltage, so that the transistor M1B is turned on. At this time, the voltage at the output terminal OUT1 is pulled down by the transistor M1B to be close to the voltage provided by the reference voltage terminal VN1, so that the output terminal OUT1 outputs the state determination signal SIG with a low voltageD1. In addition, since the voltage of the output terminal OUT2 can be regarded as a voltage obtained by dividing the voltage of the control terminal of the transistor M1B by the voltage drop circuit 510 and the pull-down circuit 520, the output terminal OUT2 outputs the state determination signal SIG having a low voltageD2。
When the potential state of the input terminal IN is IN the high voltage state, the voltage received by the control terminal of the transistor M1B is the high voltage of the input terminal IN, so that the transistor M1B is turned on. At this time, the voltage at the output terminal OUT1 is pulled down by the transistor M1B to be close to the voltage provided by the reference voltage terminal VN1, so that the output terminal OUT1 outputs the state determination signal SIG with a low voltageD1. In generating a detection current I of a suitable magnitudeDIN this case, the voltage of the output terminal OUT2 can be regarded as the voltage obtained by dividing the high voltage of the input terminal IN by the voltage drop circuit 510 and the pull-down circuit 520, so that the output terminal OUT2 outputs the state-judging signal SIG having the high voltageD2。
Furthermore, when the potential state of the input terminal IN is IN a low voltage state, the voltage received by the control terminal of the transistor M1B is a low voltage of the input terminal IN, so that the transistor M1B is turned off. In this case, the voltage at the output terminal OUT1 can be regarded as the voltage provided by the reference voltage terminal VN2, and therefore the output terminal OUT1 outputs the state discrimination signal SIG with a high voltageD1. In generating a detection current I of a suitable magnitudeDIN this case, the voltage of the output terminal OUT2 can be regarded as the voltage obtained by dividing the low voltage of the input terminal IN by the voltage drop circuit 510 and the pull-down circuit 520, so that the output terminal OUT2 outputs the state-determining signal SIG having the low voltageD2。
Thus, the signal SIG is determined through the stateD1And SIGD2The potential state of the input terminal IN can be judged. That is, the signal SIG is judged when the stateD1And SIGD2All at low voltageIt means that the potential state of the input terminal IN is IN a floating state. And the current state identification signal SIGD1And SIGD2When the voltages are different, it indicates that the potential state of the input terminal IN is IN a high voltage state or a low voltage state.
Detecting the current IDCan be designed to cause the output terminal OUT2 to have a high voltage when the potential state of the input terminal IN is IN a high voltage state, and to cause the output terminal OUT2 to have a low voltage when the potential state of the input terminal IN is IN a low voltage or floating state. IN addition, when the potential state of the input terminal IN is floating, the control terminal of the transistor M1B can be raised to a high enough voltage to turn on the transistor M1B. In some embodiments of the present invention, the pull-up circuit 540, the pull-down circuit 510 and the pull-down circuit 520 are designed appropriately to generate the detection current I with an appropriate magnitudeD。
Fig. 6 is a schematic diagram of a potential state determining device 600 according to another embodiment of the invention. The electrical potential state discriminating apparatus 600 has a similar structure to the electrical potential state discriminating apparatus 500 and can operate according to a similar principle, however, the electrical potential state discriminating apparatus 600 may further include a logic circuit 650.
The logic circuit 650 is coupled to the output terminals OUT1 and OUT2 for determining the signal SIG according to the stateD1And SIGD2Generating a control signal SIG dependent on the potential state of the input INctrl. That is, through the logic circuit 650, the electric potential state discriminating device 600 can output the control signal SIG with different voltages according to the electric potential state of the input terminal INctrlAnd thereby determining the potential state of the input terminal IN.
Fig. 7 is a schematic diagram of a potential state determining apparatus 700 according to another embodiment of the invention. The electric potential state discriminating device 700 has a similar structure to the electric potential state discriminating device 600 and can operate according to a similar principle, however, the logic circuit 750 in the electric potential state discriminating device 700 can include a NOR gate (NOR gate)752 and a load circuit 754.
The NOR gate 752 has a first input terminal, a second input terminal and an output terminal, the first input terminal of the NOR gate 752 is coupled to the output terminal OUT1, the second input terminal of the NOR gate 752 is coupled to the output terminal OUT1The output terminal OUT2 of the NOR gate 752 can output the control signal SIGctrl。
The load circuit 754 has a first terminal and a second terminal, the first terminal of the load circuit 754 is coupled to the reference voltage terminal VN2, and the second terminal of the load circuit 754 is coupled to the output terminal of the nor gate 752.
The potential state discriminating device 700 outputs a control signal SIG of different voltages according to the potential state of the input terminal INctrl. For example, according to FIG. 5, when the potential state of the input IN is floating, the output OUT1 outputs a state-determining signal SIG with a low voltageD1And the output terminal OUT2 outputs a state decision signal SIG with a low voltageD2. Thus, the output terminal of the nor gate 752 will output the control signal SIG having a high voltagectrl。
IN addition, when the potential state of the input terminal IN is IN a high voltage state, the output terminal OUT1 outputs a state discrimination signal SIG having a low voltageD1And the output terminal OUT2 outputs a high-voltage state-discrimination signal SIGD2. Thus, the output of the NOR gate 752 will output the control signal SIG with a low voltagectrl。
Furthermore, when the potential state of the input terminal IN is IN a low voltage state, the output terminal OUT1 outputs a state discrimination signal SIG having a high voltageD1And the output terminal OUT2 outputs a state decision signal SIG with a low voltageD2. In this way, the output terminal of the nor gate 752 will also output the control signal SIG with a low voltagectrl。
That is, via the control signal SIGctrlThe potential state of the input terminal IN can be judged. In FIG. 7, when the control signal SIGctrlAt a high voltage, it indicates that the potential state of the input terminal IN is floating. When the control signal SIGctrlWhen the voltage is low, it indicates that the potential state of the input terminal IN is IN a high voltage state or a low voltage state. In other embodiments of the present invention, the logic circuit 750 may also generate the control signal SIG by other logic operationsctrlTo meet the actual operation requirements of the system.
Fig. 8 is a schematic application diagram of a potential state determination device 800 according to another embodiment of the invention. The electrical potential state determination device 800 may be one of the implementation aspects of the electrical potential state determination device 700 of fig. 7, and may operate according to similar principles. The device 800 for determining the potential state may include an input terminal IN, an output terminal OUT1, an output terminal OUT2, a voltage drop circuit 810, a pull-down circuit 820, a load circuit 830, a transistor M1B, a pull-up circuit 840, and a logic circuit 850. In some embodiments of the present invention, the potential state discrimination device 800 may convert the control signal SIGctrlAnd provided to the internal circuitry 860 for use. In this case, the logic circuit 850 in the electrical potential state determination device 800 may be coupled to the internal circuit 860.
In the embodiment of fig. 8, the voltage drop circuit 810 and the voltage drop circuit 410 may be implemented with the same structure, the pull-down circuit 820 and the pull-down circuit 420 may be implemented with the same structure, the load circuit 830 and the load circuit 430 may be implemented with the same structure, the pull-up circuit 840 and the pull-up circuit 440 may be implemented with the same structure, and the internal circuit 860 and the internal circuit 460 may be implemented with the same structure, which is not repeated.
The logic circuit 850 may include a nor gate 852 and a load circuit 854. Nor gate 852 may include transistor M6B and transistor M7B. The transistor M6B has a first terminal, a second terminal, and a control terminal, the first terminal of the transistor M6B is coupled to the output terminal of the nor gate 852, the second terminal of the transistor M6B is coupled to the reference voltage terminal VN1, and the control terminal of the transistor M6B is coupled to the first input terminal of the nor gate 852. The transistor M7B has a first terminal, a second terminal, and a control terminal, the first terminal of the transistor M7B is coupled to the first terminal of the transistor M6B, the second terminal of the transistor M7B is coupled to the reference voltage terminal VN1, and the control terminal of the transistor M7B is coupled to the second input terminal of the nor gate 852. In the embodiment of fig. 8, the load circuit 854 may be implemented with the same structure as the load circuit 454, and thus the description thereof is omitted.
IN fig. 8, when the potential state of the input terminal IN is IN a floating state, the state discrimination signal SIGD1And SIGD2Both have low voltages, so that transistors M6B and M7B are turned off. The voltage at the output of NOR gate 852 can be considered the voltage provided by reference voltage terminal VN2, so the output of NOR gate 852 will have the output voltage provided byHigh voltage control signal SIGctrl。
When the potential state of the input terminal IN is IN a high voltage state, the state discrimination signal SIGD1Will have a low voltage and a state discrimination signal SIGD2Will have a high voltage such that transistor M6B is turned off and transistor M7B is turned on. The voltage at the output of the NOR gate 852 is pulled down by the transistor M7B to be close to the voltage provided by the reference voltage terminal VN1, so that the output of the NOR gate 852 will output the control signal SIG with a low voltagectrl。
When the potential state of the input terminal IN is IN a low voltage state, the state discrimination signal SIGD1Will have a high voltage and a state discrimination signal SIGD2Will have a low voltage such that transistor M6B is turned on and transistor M7B is turned off. The output of the NOR gate 852 will be pulled down by the transistor M6B to a voltage close to that provided by the reference voltage terminal VN1, and thus the output of the NOR gate 852 will also output the control signal SIG with a low voltagectrl。
In some embodiments of the present invention, the state discrimination signal SIG in either FIG. 1 or FIG. 5D1And SIGD2Or the control signal SIG in FIG. 2, FIG. 3, FIG. 6 or FIG. 7ctrlBesides being used to determine the potential state of the input IN, the signal can also be provided to other circuits or be directly activated with other circuits, such as the state determination signal SIGD1And SIGD2Or a control signal SIGctrlCan be used to control its back-end circuitry.
In some embodiments of the present invention, the logic circuit may be selectively configured according to different applications or according to system requirements. For example, when the back-end circuit of the electrical potential state determination device is a single-ended input, a logic circuit may be provided, such as fig. 2, fig. 3, fig. 4, fig. 6, fig. 7, or fig. 8. When the back-end circuit of the electric potential state determination device is a dual-end input, the logic circuit can be omitted, as shown in fig. 1 or fig. 5.
The transistors M1A, M1B, M3, M5, M9, M6A, M7A, M6B, or M7B may be FETs. In some embodiments of the present invention, the transistors M1A, M1B, M3, M5, M9, M6A, M7A, M6B, or M7B may be enhancement mode (E-mode) PHEMT. When the transistor is an E-mode PHEMT and is diode-connected, the control terminal of the transistor may be coupled to the first terminal thereof, such as the transistors M3, M5, and M9 in fig. 4 or fig. 8. However, when the transistor is a D-mode PHEMT and is diode-connected, the control terminal of the transistor can be coupled to the second terminal thereof. The first terminals of the transistors M1A-M9 may be drains, the second terminals may be sources, and the control terminals may be gates. The transistor may use a gallium arsenide (GaAs) process.
In summary, the potential state determination device provided in the embodiments of the present invention can determine whether the potential state of a specific node is a floating state, a high voltage state, or a low voltage state. Therefore, the potential state for judgment can be increased, the circuit design is more flexible, and the application range of the potential state judgment device is expanded.
The above description is only a preferred embodiment of the present invention, and all equivalent changes and modifications made within the scope of the claims of the present invention should be covered by the present invention.

Claims (20)

1. An electric potential state discrimination apparatus, comprising:
an input terminal;
a voltage drop circuit having a first end coupled to the input end and a second end;
a pull-down circuit having a first terminal coupled to the second terminal of the voltage drop circuit and a second terminal coupled to a first reference voltage terminal;
a first load circuit having a first terminal coupled to a second reference voltage terminal and a second terminal;
a first transistor having a first terminal coupled to the second terminal of the first load circuit, a second terminal coupled to the first reference voltage terminal, and a control terminal;
a pull-up circuit having a first terminal coupled to the second reference voltage terminal and a second terminal coupled to the first terminal of the voltage drop circuit;
a first output end coupled to the first end of the first transistor for outputting a first state discrimination signal; and
a second output terminal for outputting a second state determination signal, wherein the control terminal of the first transistor is coupled to the second terminal of the voltage drop circuit and the second output terminal is coupled to the first terminal of the voltage drop circuit, or the control terminal of the first transistor is coupled to the first terminal of the voltage drop circuit and the second output terminal is coupled to the second terminal of the voltage drop circuit;
the first state discrimination signal and the second state discrimination signal are used for judging a potential state of the input end.
2. The apparatus according to claim 1, wherein the voltage drop circuit comprises at least one transistor, at least one diode, at least one resistor, or any combination thereof.
3. The apparatus according to claim 1, wherein the pull-down circuit comprises at least one transistor, at least one diode, at least one resistor, or any combination thereof.
4. The apparatus according to claim 1, wherein the first load circuit comprises a first current source.
5. The apparatus according to claim 4, wherein the first current source comprises at least one transistor, at least one diode, at least one resistor, or any combination thereof.
6. The apparatus according to claim 4, wherein the first current source comprises:
a second transistor having a first terminal coupled to the first terminal of the first load circuit, a second terminal, and a control terminal;
a first resistor having a first end coupled to the second end of the second transistor and a second end; and
a first diode unit having a first terminal coupled to the second terminal of the first resistor, and a second terminal coupled to the control terminal of the second transistor and the second terminal of the first load circuit.
7. The apparatus according to claim 1, wherein the pull-up circuit comprises a second current source.
8. The apparatus according to claim 7, wherein the second current source comprises at least one transistor, at least one diode, at least one resistor, or any combination thereof.
9. The apparatus according to claim 7, wherein the second current source comprises:
a third transistor having a first terminal coupled to the first terminal of the pull-up circuit, a second terminal, and a control terminal;
a second resistor having a first end coupled to the second end of the third transistor and a second end; and
a second diode unit having a first end coupled to the second end of the second resistor, and a second end coupled to the control end of the third transistor and the second end of the pull-up circuit.
10. The apparatus for determining electric potential state according to claim 1, further comprising:
a logic circuit coupled to the first output terminal and the second output terminal for generating a control signal according to the first state determination signal and the second state determination signal, wherein the control signal is related to the potential state of the input terminal.
11. The apparatus according to claim 10, wherein when the control terminal of the first transistor is coupled to the second terminal of the voltage drop circuit and the second output terminal is coupled to the first terminal of the voltage drop circuit, the logic circuit comprises:
a NAND gate having a first input end coupled to the first output end, a second input end coupled to the second output end, and an output end for outputting the control signal.
12. The apparatus according to claim 11, wherein the logic circuit further comprises:
a second load circuit having a first end coupled to the second reference voltage end and a second end coupled to the output end of the nand gate.
13. The electrical potential state discriminating device of claim 12 wherein the nand gate comprises:
a fourth transistor having a first end coupled to the output end of the nand gate, a second end, and a control end coupled to the first input end of the nand gate; and
a fifth transistor having a first terminal coupled to the second terminal of the fourth transistor, a second terminal coupled to the first reference voltage terminal, and a control terminal coupled to the second input terminal of the nand gate.
14. The apparatus according to claim 10, wherein when the control terminal of the first transistor is coupled to the first terminal of the voltage drop circuit and the second output terminal is coupled to the second terminal of the voltage drop circuit, the logic circuit comprises:
a NOR gate having a first input end coupled to the first output end, a second input end coupled to the second output end, and an output end for outputting the control signal.
15. The apparatus according to claim 14, wherein the logic circuit further comprises:
a second load circuit having a first terminal coupled to the second reference voltage terminal and a second terminal coupled to the output terminal of the nor gate.
16. The apparatus of claim 15, wherein the NOR gate comprises a fourth transistor having a first terminal coupled to the output terminal of the NOR gate, a second terminal coupled to the first reference voltage terminal, and a control terminal coupled to the first input terminal of the NOR gate; and
a fifth transistor having a first terminal coupled to the first terminal of the fourth transistor, a second terminal coupled to the first reference voltage terminal, and a control terminal coupled to the second input terminal of the nor gate.
17. The apparatus according to claim 12 or 15, wherein the second load circuit comprises a third current source, the third current source comprising at least one transistor, at least one diode, at least one resistor, or any combination thereof.
18. The apparatus according to claim 12 or 15, wherein the second load circuit comprises a third current source, the third current source comprising:
a sixth transistor having a first terminal coupled to the first terminal of the second load circuit, a second terminal, and a control terminal;
a third resistor having a first end coupled to the second end of the sixth transistor and a second end; and
a third diode unit having a first end coupled to the second end of the third resistor, and a second end coupled to the control end of the sixth transistor and the second end of the second load circuit.
19. The potential state discrimination apparatus according to claim 10, wherein:
the logic circuit is further coupled to an internal circuit, and the control signal is further used for switching an operation state of the internal circuit.
20. The apparatus according to claim 1, wherein the potential state of the input terminal comprises a floating state.
CN202011637991.6A 2020-11-23 2020-12-31 Potential state discriminating device Pending CN114527816A (en)

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