CN114513726A - Level switching time-sharing multiplexing and isolating circuit and method and TWS earphone system - Google Patents
Level switching time-sharing multiplexing and isolating circuit and method and TWS earphone system Download PDFInfo
- Publication number
- CN114513726A CN114513726A CN202210107096.6A CN202210107096A CN114513726A CN 114513726 A CN114513726 A CN 114513726A CN 202210107096 A CN202210107096 A CN 202210107096A CN 114513726 A CN114513726 A CN 114513726A
- Authority
- CN
- China
- Prior art keywords
- circuit
- vbus
- communication
- level
- mos tube
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims abstract description 22
- 238000002955 isolation Methods 0.000 claims abstract description 38
- 230000005540 biological transmission Effects 0.000 claims abstract description 25
- 238000006243 chemical reaction Methods 0.000 claims abstract description 22
- 239000003990 capacitor Substances 0.000 claims description 12
- 230000007704 transition Effects 0.000 claims description 2
- 230000000087 stabilizing effect Effects 0.000 claims 3
- 230000008054 signal transmission Effects 0.000 abstract description 3
- 238000010586 diagram Methods 0.000 description 3
- 230000002457 bidirectional effect Effects 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04R—LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
- H04R5/00—Stereophonic arrangements
- H04R5/04—Circuit arrangements, e.g. for selective connection of amplifier inputs/outputs to loudspeakers, for loudspeaker detection, or for adaptation of settings to personal preferences or hearing impairments
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/017509—Interface arrangements
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D30/00—Reducing energy consumption in communication networks
- Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks
Abstract
The invention provides a level switching time-sharing multiplexing and isolating circuit, a level switching time-sharing multiplexing and isolating method and a TWS (two way satellite system) earphone system, which comprise a first equipment unit and a second equipment unit, wherein the first equipment unit and the second equipment unit are communicated through Power/TX/RX (Power/TX/RX), the first equipment unit comprises a processor, a first communication circuit, a level switching time-sharing multiplexing circuit and a first Power module, the level switching time-sharing multiplexing circuit is used for controlling a level signal sent by the processor to switch a level working state, the second equipment unit comprises a Power supply communication isolating module, a second communication circuit and a second Power module, and the Power supply communication isolating module is connected with the level switching time-sharing multiplexing circuit to carry out Power supply isolation communication, so that the isolation of VBUS and the communication module is realized. According to the invention, through level conversion and communication isolation, level mutual conversion between the signal transmission modules is realized, isolation between the electric energy transmission voltage and the communication modules is realized, and the communication reliability of the charging box and the wireless earphone is improved.
Description
Technical Field
The invention relates to the technical field of electronic equipment, in particular to a level switching time-sharing multiplexing and isolating circuit, a control method applied to the circuit and a TWS (two way switching) earphone system.
Background
Wireless headsets are widely used with their advantages of being wireless and lightweight. TWS headphones are generally used with a charging box because of the problems of small battery capacity and short standby time. In order to reduce the contact interface between the earphone box and the wireless earphone as much as possible, the charging interface of the earphone box and the wireless earphone and a scheme of time-sharing multiplexing of carrier communication, power supply and communication exist in the prior art, but when the contact interface of the earphone box and the wireless earphone is multiplexed into a communication interface, the problem of low communication reliability exists.
Patent application No. CN110769343A discloses a method for communication between a wireless headset and a charging box, a TWS headset and a system, but the patent has the following disadvantages:
the communication level can not be converted, the electric energy transmission voltage and the communication of the receiving equipment are not isolated, the electric energy transmission voltage can enter the communication receiving module, and once the electric energy transmission voltage is higher than the communication level, the circuit of the communication module can be damaged.
Disclosure of Invention
The invention aims to provide a power supply and communication-based level switching time-sharing multiplexing and isolating circuit and method and a TWS (two way switch) earphone system, which mainly solve the problems that the communication level can not be converted and the isolation between transmission voltage and communication is not realized.
In order to solve the problems, the technical scheme adopted by the invention is as follows:
a level switching time-sharing multiplexing and isolating circuit comprises a first equipment unit and a second equipment unit, wherein the first equipment unit and the second equipment unit are communicated through Power/TX/RX, the first equipment unit comprises a processor, a first communication circuit, a level switching time-sharing multiplexing circuit and a first Power module, the first Power module provides Power for each circuit module of the first equipment unit, the processor is connected with the first communication circuit, and the level switching time-sharing multiplexing circuit is used for controlling a level signal sent by the processor to switch a level working state; the second equipment unit comprises a power supply communication isolation module, a second communication circuit and a second power supply module, the second power supply module provides power for each circuit module of the second equipment unit, the power supply communication isolation module is connected with the second communication circuit, and the power supply communication isolation module is connected with the level conversion time-sharing multiplexing circuit to carry out power supply isolation communication, so that isolation between the VBUS and the communication module is realized.
The further scheme is that the level conversion time-sharing multiplexing circuit comprises a first MOS tube, a second MOS tube, a third MOS tube, a fourth MOS tube and a fifth MOS tube, wherein the grid of the first MOS tube is connected with Power _ ctl, the grid of the second MOS tube is connected with comm _ receive, the grid of the fourth MOS tube is connected with VCC _ L, the grid of the fifth MOS tube is connected with VCC _ H, the drain of the first MOS tube is connected with the grid of the third MOS tube, the source and the drain of the third MOS tube are connected with a third diode, the source and the drain of the fourth MOS tube are connected with a fourth diode, the source and the drain of the fifth MOS tube are connected with a fifth diode, the drain of the second MOS tube is connected with a second resistor, and the anode of the third diode, the anode of the fourth diode and the second resistor are respectively connected to Power/TX/RX.
A further scheme is, level transition time sharing multiplex circuit still includes first resistance second resistance, third resistance and first electric capacity, the first end of first electric capacity, the first termination VBUS of first resistance, first electric capacity second end ground connection, first resistance second end is connected first MOS pipe drain electrode with between the third MOS pipe grid, the first termination Power TX RX of second resistance, second resistance second end is connected to second MOS pipe drain electrode, the first end of third resistance is connected to fifth MOS pipe source pole and fifth diode positive pole, third resistance second end VCC _ H.
In a further aspect, the power supply communication isolation module includes a sixth MOS transistor, a voltage regulator diode, a sixth diode, and a seventh diode, the gate of the sixth MOS transistor is connected to the negative electrode of the voltage regulator diode, the source of the sixth MOS transistor is connected to VBUS/TX/RX, the drain of the sixth MOS transistor is connected to VBUS, the positive electrode of the voltage regulator diode is grounded, the negative electrodes of the sixth diode and the seventh diode are connected to VBUS/TX/RX, the positive electrode of the sixth diode is connected to VBUS, and the positive electrode of the seventh diode is connected to TX/RX.
In a further aspect, the power supply communication isolation module further includes a fourth resistor, a fifth resistor, and a second capacitor, where a first end of the fourth resistor is connected to VBUS/TX/RX, a second end of the fourth resistor is connected to VZ, a first end of the fifth resistor is connected to VCC _ L, a second end of the fifth resistor is connected to TX/RX, a first end of the second capacitor is connected to VBUS, and a second end of the second capacitor is connected to ground.
In a further aspect, the first device unit is a charging box and the second device unit is a TWS headset.
A control method of a level switching time-sharing multiplexing and isolating circuit adopts the level switching time-sharing multiplexing and isolating circuit, and the method comprises the following steps: when the Power _ ctl is at a high level, the first MOS tube is conducted, and the Power supply VBUS is in short circuit with the VBUS/TX/RX, so that electric energy is transmitted from the first equipment unit to the second equipment unit, and meanwhile VBUS is larger than VCC _ H; during the power transmission process, the VBUS/TX in the second device unit is equal to the VBUS of the first device unit, and the VBUS in the second device unit is greater than VZ, so that power is conducted to realize power transmission to the power supply module of the second device unit, and meanwhile, since the VBUS of the second device unit is greater than VCC _ L, the power supply VBUS is not conducted to TX/RX to realize isolation between the VBUS and the communication module.
In a further scheme, when the circuit works in a communication mode, the Power _ ctl is at a low level, the first MOS transistor is turned off, and the Power supply VBUS is disconnected from VBUS/TX/RX to realize switching from the Power transmission mode to the communication mode, wherein the first device unit is defined to be in a transmitting state when transmitting data to the second device unit, and vice versa.
In a further scheme, in the sending state, comm _ receive is at a low level, TX/RX is at a high level VCC _ H, VCC _ L is less than VCC _ H, and due to the conduction characteristic of the NMOS tube, the maximum voltage transmitted in the circuit is GATE-VTH. The Mos gate voltage is VCC _ L, so the maximum voltage of VBUS/TX/RX is VCC _ L-VTH, thereby realizing the level conversion from VCC _ H to VCC _ L domain in communication engineering.
A TWS earphone system comprises the level switching time division multiplexing and isolating circuit.
Therefore, the power supply and communication level conversion time-sharing multiplexing and isolating circuit provided by the invention has the advantages that the electric energy transmission and communication interface signal line can be completed by only using two lines (one ground line and one electric energy transmission and communication line multiplexing line), the isolation between the electric energy transmission voltage and the communication module is realized, the high voltage during the electric energy transmission can be ensured not to enter the communication module, and the safety of the communication module is ensured. During communication, the level signal sent by the CPU can be controlled by the level conversion time-sharing multiplexing circuit to switch the level working state, and the level conversion between the signal transmission modules can be realized.
The present invention will be described in further detail with reference to the accompanying drawings and specific embodiments.
Drawings
FIG. 1 is a schematic diagram of an embodiment of a level-shifting time-division multiplexing and isolating circuit according to the invention.
FIG. 2 is a schematic circuit diagram of a level shift multiplexing circuit in an embodiment of the level shift multiplexing and isolating circuit according to the present invention.
Fig. 3 is a schematic circuit diagram of a power supply communication isolation module in an embodiment of the level-switching time division multiplexing and isolation circuit of the invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the drawings of the embodiments of the present invention. It is to be understood that the embodiments described are only a few embodiments of the present invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the described embodiments of the invention without any inventive step, are within the scope of protection of the invention.
An embodiment of a level switching time division multiplexing and isolating circuit comprises:
referring to fig. 1, a level switching time-sharing multiplexing and isolating circuit includes a first device unit 1 and a second device unit 2, where the first device unit 1 and the second device unit 2 communicate with each other through Power/TX/RX, the first device unit 1 includes a processor 11, a first communication circuit 12, a level switching time-sharing multiplexing circuit 13, and a first Power module, where the first Power module provides Power for each circuit module of the first device unit 1, the processor 11 is connected to the first communication circuit 12, and the level switching time-sharing multiplexing circuit 13 is configured to control a level signal sent by the processor 11 to switch a level operating state.
The second equipment unit 2 comprises a power supply communication isolation module 21, a second communication circuit and a second power supply module, the second power supply module provides power for each circuit module of the second equipment unit 2, the power supply communication isolation module 21 is connected with the second communication circuit, and the power supply communication isolation module 21 is connected with the level conversion time-sharing multiplexing circuit 13 to carry out power supply isolation communication, so that isolation between the VBUS and the communication module is realized.
As shown in fig. 2, the level shift time division multiplexing circuit 13 includes a first MOS transistor Q1, a second MOS transistor Q2, a third MOS transistor Q3, a fourth MOS transistor Q4, and a fifth MOS transistor Q5, the gate of the first MOS transistor Q1 is connected to Power _ ctl, the gate of the second MOS transistor Q2 is connected to comm _ receive, the gate of the fourth MOS transistor Q4 is connected to VCC _ L, the gate of the fifth MOS transistor Q5 is connected to VCC _ H, the drain of the first MOS transistor Q1 is connected to the gate of the third MOS transistor Q3, the source and the drain of the third MOS transistor Q3 are connected to a third diode D3, the source and the drain of the fourth MOS transistor Q4 are connected to a fourth diode D4, the source and the drain of the fifth MOS transistor Q5 are connected to a fifth diode D5, the drain of the second MOS transistor Q2 is connected to a second resistor R2, and the anode of the third diode D3, the anode of the fourth diode D4, and the anode of the fourth diode Q2 are connected to RX/TX/RX/TX, respectively.
In this embodiment, the level-shifting time-sharing multiplexing circuit 13 further includes a first resistor R1, a second resistor R2, a third resistor R3, and a first capacitor C1, wherein a first end of the first capacitor C1 and a first end of the first resistor R1 are connected to VBUS, a second end of the first capacitor C1 is connected to ground, a second end of the first resistor R1 is connected between a drain of the first MOS transistor Q1 and a gate of the third MOS transistor Q3, a first end of the second resistor R2 is connected to Power/TX/RX, a second end of the second resistor R2 is connected to a drain of the second MOS transistor Q2, a first end of the third resistor R3 is connected to a source of the fifth MOS transistor Q5 and an anode of the fifth diode D5, and a second end of the third resistor R3 is connected to VCC _ H.
As shown in fig. 3, the power supply communication isolation module 21 includes a sixth MOS transistor Q6, a zener diode D8, a sixth diode D6, and a seventh diode D7, the gate of the sixth MOS transistor Q6 is connected to the cathode of the zener diode D8, the source of the sixth MOS transistor Q6 is connected to VBUS/TX/RX, the drain of the sixth MOS transistor Q6 is connected to VBUS, the anode of the zener diode D8 is grounded, the cathode of the sixth diode D6 and the cathode of the seventh diode D7 are connected to VBUS/TX/RX, the anode of the sixth diode D6 is connected to VBUS, and the anode of the seventh diode D7 is connected to TX/RX.
In this embodiment, the power supply communication isolation module 21 further includes a fourth resistor R4, a fifth resistor R5, and a second capacitor C2, wherein a first end of the fourth resistor R4 is connected to VBUS/TX/RX, a second end of the fourth resistor R4 is connected to VZ, a first end of the fifth resistor R5 is connected to VCC _ L, a second end of the fifth resistor R5 is connected to TX/RX, a first end of the second capacitor C2 is connected to VBUS, and a second end of the second capacitor C2 is connected to ground.
In this embodiment, the first device unit 1 is a charging box and the second device unit 2 is a TWS headset.
It can be seen that the charging box of the present embodiment is composed of a processor 11, a first communication circuit 12, a level conversion time division multiplexing circuit 13 and a power supply; the WS headset of this embodiment is composed of a power supply communication isolation module 21, a communication module, and a power supply module. The processor 11 controls when the power supply and communication level conversion time division multiplexing and isolating circuit operates in the power supply transmission mode and when it operates in the communication mode.
In addition, the CMOS field effect transistor is used for power gating of the communication level, so that the cost is reduced, the service life and the working reliability of the semiconductor device are superior to those of a relay scheme with a mechanical contact, and the problem of weak driving capability of a signal analog switch is avoided.
The embodiment of a control method of a level switching time division multiplexing and isolating circuit comprises the following steps:
the present embodiment provides a method for controlling a level switch time division multiplexing and isolating circuit, where the level switch time division multiplexing and isolating circuit of the present embodiment employs the above level switch time division multiplexing and isolating circuit, and the method includes the following steps:
when Power _ ctl is at a high level, the first MOS transistor Q1 is turned on, and the Power source VBUS and VBUS/TX/RX are shorted, so that the electric Power is transmitted from the first device unit 1 to the second device unit 2, and VBUS is greater than VCC _ H. It can be seen that, in combination with the Power supply and communication level conversion time division multiplexing and isolation circuit, when the Power _ ctl is at a high level, the first MOS transistor Q1 is turned on, and the Power supply VBUS and VBUS OR TX/RX are shorted, so that the electric energy is transmitted to the second device unit 2.
During the power transmission, VBUS/TX in the second device unit 2 is equal to VBUS of the first device unit 1, VBUS in the second device unit 2 is greater than VZ, so that power is conducted to realize power transmission to the power supply module of the second device unit 2, and at the same time, since VBUS of the second device unit 2 is greater than VCC _ L, the power supply VBUS is not conducted to TX/RX to realize isolation of VBUS from the communication module. It can be seen that, at the same time, since VBUS is greater than VCC _ H, the first MOS transistor Q1XX will not conduct, preventing VBUS from flowing backward to TX/RX to damage the processor 11.
Specifically, in the power transmission mode, in the second device unit 2, the operation principle of the power supply communication isolation module 21 is described with reference to the example in fig. 3. In the second device unit 2, VBUS or TX/TX is equal to VBUS of the first device unit 1, VBUS is larger than VZ, and thus power is turned on and power transfer to the power supply module can be achieved. Meanwhile, due to the unidirectional conduction characteristic of the diode, VBUS is larger than VCC _ L, so that VBUS cannot be conducted to TX/RX, and isolation of VBUS and a communication module is achieved.
When the circuit works in the communication mode, Power _ ctl is at a low level, the first MOS transistor Q1 is turned off, and the Power supply VBUS is turned off to VBUS/TX/RX, so as to switch from the Power transmission mode to the communication mode, wherein it is defined that the first device unit 1 transmits data to the second device unit 2 in a transmitting state, and vice versa in a receiving state. It can be seen that the power supply and communication level shifting time division multiplexing and isolating circuit is controlled by the processor 11 to operate in the communication mode in the first equipment unit 1. When VBUS _ ctl is low, therefore, the first MOS transistor Q1 is turned off, and VBUS is turned off to VBUS or TX/RX, thereby realizing switching from the power transmission mode to the communication mode. The communication mode is divided into two states, namely a transmitting state and a receiving state, and the state that the first equipment unit 1 transmits data to the second equipment unit 2 is defined as the transmitting state and the state that the data is received is defined as the receiving state.
In the sending state, comm _ receive is low level, TX/RX is high level and VCC _ H, VCC _ L is less than VCC _ H, and due to the conduction characteristic of NMOS pipe, the maximum voltage transmitted in the circuit is GATE-VTH. The Mos gate voltage is VCC _ L, so the maximum voltage of VBUS/TX/RX is VCC _ L-VTH, thereby realizing the level conversion from VCC _ H to VCC _ L domain in communication engineering. Therefore, the level conversion time-sharing multiplexing and isolating circuit of the embodiment forms a power domain bidirectional switching circuit, and the working principle is as follows: in the sending state, comm _ receive is at low level, TX/RX () is at VCC _ H at high level, VCC _ L is less than VCC _ H, and due to the NMOS tube conduction characteristic, the highest voltage VBUS _ TX/RX can be at VCC _ L-VTH at large voltage GATE-VTH and MOS GATE voltage VCC _ L, thus realizing the level conversion from VCC _ H to VCC _ L domain in the communication engineering.
The present embodiment further provides a TWS headset system, which includes the level-switching time-division multiplexing and isolating circuit. For the introduction of the charging box, the TWS headset and the TWS headset system provided by the present invention, please refer to the above method embodiments, which are not described herein again.
Therefore, the power supply and communication level conversion time-sharing multiplexing and isolating circuit provided by the invention has the advantages that the electric energy transmission and communication interface signal line can be completed by only using two lines (one ground line and one electric energy transmission and communication line multiplexing line), the isolation between the electric energy transmission voltage and the communication module is realized, the high voltage during the electric energy transmission can be ensured not to enter the communication module, and the safety of the communication module is ensured. During communication, the level signal sent by the CPU can be controlled by the level conversion time division multiplexing circuit 13 to switch the level operating state, and level interconversion between the signal transmission modules can be realized.
It is to be noted that, in the present specification, relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
The above embodiments are only preferred embodiments of the present invention, and the protection scope of the present invention is not limited thereby, and any insubstantial changes and substitutions made by those skilled in the art based on the present invention are within the protection scope of the present invention.
Claims (10)
1. A level switching time division multiplexing and isolating circuit, comprising:
the first equipment unit and the second equipment unit communicate through Power/TX/RX, the first equipment unit comprises a processor, a first communication circuit, a level conversion time-sharing multiplexing circuit and a first Power module, the first Power module provides Power for each circuit module of the first equipment unit, the processor is connected with the first communication circuit, and the level conversion time-sharing multiplexing circuit is used for controlling a level signal sent by the processor to switch a level working state;
the second equipment unit comprises a power supply communication isolation module, a second communication circuit and a second power supply module, the second power supply module provides power for each circuit module of the second equipment unit, the power supply communication isolation module is connected with the second communication circuit, and the power supply communication isolation module is connected with the level conversion time-sharing multiplexing circuit to carry out power supply isolation communication, so that isolation between the VBUS and the communication module is realized.
2. The circuit of claim 1, wherein:
the level conversion time-sharing multiplexing circuit comprises a first MOS tube, a second MOS tube, a third MOS tube, a fourth MOS tube and a fifth MOS tube, wherein the grid of the first MOS tube is connected with Power _ ctl, the grid of the second MOS tube is connected with comm _ receive, the grid of the fourth MOS tube is connected with VCC _ L, the grid of the fifth MOS tube is connected with VCC _ H, the drain of the first MOS tube is connected with the grid of the third MOS tube, the source and the drain of the third MOS tube are connected with a third diode, the source and the drain of the fourth MOS tube are connected with a fourth diode, the source and the drain of the fifth MOS tube are connected with a fifth diode, the drain of the second MOS tube is connected with a second resistor, and the anode of the third diode, the anode of the fourth diode and the second resistor are respectively connected to Power/TX/RX.
3. The circuit of claim 2, wherein:
level transition time sharing multiplex circuit still includes first resistance second resistance, third resistance and first electric capacity, the first end of first electric capacity, the first termination VBUS of first resistance, first electric capacity second end ground connection, first resistance second end is connected first MOS pipe drain electrode with between the third MOS pipe grid, the first termination of second resistance Power TX RX, second resistance second end is connected to second MOS pipe drain electrode, the first end of third resistance is connected to fifth MOS pipe source pole and fifth diode are anodal, third resistance second end VCC _ H.
4. The circuit of claim 1, wherein:
the power supply communication isolation module comprises a sixth MOS tube, a voltage stabilizing diode, a sixth diode and a seventh diode, wherein the grid electrode of the sixth MOS tube is connected with the negative electrode of the voltage stabilizing diode, the source electrode of the sixth MOS tube is connected with VBUS/TX/RX, the drain electrode of the sixth MOS tube is connected with VBUS, the positive electrode of the voltage stabilizing diode is grounded, the negative electrode of the sixth diode and the negative electrode of the seventh diode are connected with VBUS/TX/RX, the positive electrode of the sixth diode is connected with VBUS, and the positive electrode of the seventh diode is connected with TX/RX.
5. The circuit of claim 4, wherein:
the power supply communication isolation module further comprises a fourth resistor, a fifth resistor and a second capacitor, wherein the first end of the fourth resistor is connected with VBUS/TX/RX, the second end of the fourth resistor is connected with VZ, the first end of the fifth resistor is connected with VCC _ L, the second end of the fifth resistor is connected with TX/RX, the first end of the second capacitor is connected with VBUS, and the second end of the second capacitor is grounded.
6. The circuit of any of claims 1 to 5, wherein:
the first equipment unit is a charging box, and the second equipment unit is a TWS earphone.
7. A method for controlling a level-switching time-division multiplexing and isolating circuit, wherein the level-switching time-division multiplexing and isolating circuit is the level-switching time-division multiplexing and isolating circuit according to any one of claims 1 to 6, the method comprising the steps of:
when the Power _ ctl is at a high level, the first MOS tube is conducted, and the Power supply VBUS is in short circuit with the VBUS/TX/RX, so that electric energy is transmitted from the first equipment unit to the second equipment unit, and meanwhile VBUS is larger than VCC _ H;
during the power transmission process, the VBUS/TX in the second device unit is equal to the VBUS of the first device unit, and the VBUS in the second device unit is greater than VZ, so that power is conducted to realize power transmission to the power supply module of the second device unit, and meanwhile, since the VBUS of the second device unit is greater than VCC _ L, the power supply VBUS is not conducted to TX/RX to realize isolation between the VBUS and the communication module.
8. The method of claim 7, wherein:
when the circuit works in a communication mode, the Power _ ctl is at a low level, the first MOS tube is turned off, and the Power supply VBUS is disconnected from VBUS/TX/RX so as to realize switching from the Power transmission mode to the communication mode, wherein the first equipment unit is defined to be in a transmitting state when transmitting data to the second equipment unit, and otherwise, the first equipment unit is defined to be in a receiving state.
9. The method of claim 8, wherein:
in the sending state, comm _ receive is low level, TX/RX is high level and VCC _ H, VCC _ L is less than VCC _ H, and due to the conduction characteristic of NMOS pipe, the maximum voltage transmitted in the circuit is GATE-VTH. The Mos gate voltage is VCC _ L, so the maximum voltage of VBUS/TX/RX is VCC _ L-VTH, thereby realizing the level conversion from VCC _ H to VCC _ L domain in communication engineering.
10. A TWS headset system comprising the level-switched time division multiplexing and isolation circuit of any of claims 1 to 6.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210107096.6A CN114513726A (en) | 2022-01-28 | 2022-01-28 | Level switching time-sharing multiplexing and isolating circuit and method and TWS earphone system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210107096.6A CN114513726A (en) | 2022-01-28 | 2022-01-28 | Level switching time-sharing multiplexing and isolating circuit and method and TWS earphone system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN114513726A true CN114513726A (en) | 2022-05-17 |
Family
ID=81551005
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202210107096.6A Pending CN114513726A (en) | 2022-01-28 | 2022-01-28 | Level switching time-sharing multiplexing and isolating circuit and method and TWS earphone system |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN114513726A (en) |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110769343A (en) * | 2019-10-31 | 2020-02-07 | 歌尔股份有限公司 | Method for communication between wireless headset and charging box, TWS headset and system |
| CN111800697A (en) * | 2020-07-03 | 2020-10-20 | 上海闻泰信息技术有限公司 | Charging box, earphone system, charging control method and storage medium |
| CN212751846U (en) * | 2020-08-20 | 2021-03-19 | Tcl通力电子（惠州）有限公司 | Time division multiplexing circuit and TWS device |
| CN214591942U (en) * | 2021-04-16 | 2021-11-02 | 深圳市领跑微电子有限公司 | Charging and communication conversion circuit of Bluetooth headset |
| CN217063992U (en) * | 2022-01-28 | 2022-07-26 | 珠海昇生微电子有限责任公司 | Level switching time-sharing multiplexing and isolating circuit and TWS earphone system |
-
2022
- 2022-01-28 CN CN202210107096.6A patent/CN114513726A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110769343A (en) * | 2019-10-31 | 2020-02-07 | 歌尔股份有限公司 | Method for communication between wireless headset and charging box, TWS headset and system |
| CN111800697A (en) * | 2020-07-03 | 2020-10-20 | 上海闻泰信息技术有限公司 | Charging box, earphone system, charging control method and storage medium |
| CN212751846U (en) * | 2020-08-20 | 2021-03-19 | Tcl通力电子（惠州）有限公司 | Time division multiplexing circuit and TWS device |
| CN214591942U (en) * | 2021-04-16 | 2021-11-02 | 深圳市领跑微电子有限公司 | Charging and communication conversion circuit of Bluetooth headset |
| CN217063992U (en) * | 2022-01-28 | 2022-07-26 | 珠海昇生微电子有限责任公司 | Level switching time-sharing multiplexing and isolating circuit and TWS earphone system |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US8766221B1 (en) | Isolation system for a bi-directional communication bus line | |
| US10673477B2 (en) | Communication device, adapter device, communication system | |
| CN217063992U (en) | Level switching time-sharing multiplexing and isolating circuit and TWS earphone system | |
| CN210007688U (en) | level conversion circuit for isolating UART communication | |
| CN106712764B (en) | Communication isolation and level conversion circuit | |
| EP1482640B1 (en) | Power switching circuit with controlled reverse leakage | |
| CN113606761A (en) | Current loop communication circuit and air conditioner | |
| CN114513726A (en) | Level switching time-sharing multiplexing and isolating circuit and method and TWS earphone system | |
| CN111355593B (en) | Support PD equipment of multi-mode PoE power supply | |
| KR20210053794A (en) | Nmos switch driving circuit and power supply device | |
| CN117251012A (en) | Voltage switching circuit and power supply system using the same | |
| CN213186140U (en) | MBUS host computer transmitting circuit | |
| CN113113678B (en) | Single-wire communication circuit, battery management system, battery pack and electric device | |
| CN213402972U (en) | Level conversion circuit and electric equipment | |
| CN214623340U (en) | Communication circuit and household appliance | |
| CN111463853A (en) | Power supply circuit and robot apparatus | |
| CN216016856U (en) | Isolation protection circuit and backup power supply | |
| CN218124699U (en) | Single-wire serial transceiving circuit | |
| CN112186842B (en) | Charging and communication circuit and electronic device | |
| CN220475760U (en) | Interface circuit, interface device and charger | |
| CN213367433U (en) | Single-wire communication circuit, device and battery pack based on battery management system | |
| CN113076269B (en) | Serial port expansion circuit and electronic device | |
| CN216599614U (en) | Bidirectional rapid transmission isolation circuit | |
| CN218471436U (en) | Multiplexing control circuit, external connector, infrared control equipment and infrared control system | |
| CN216599583U (en) | Communication circuit, electronic equipment and communication system |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination |