CN114499698B

CN114499698B - Synchronous signal processing method, device, equipment and storage medium

Info

Publication number: CN114499698B
Application number: CN202011239655.6A
Authority: CN
Inventors: 魏林; 刘曦
Original assignee: Kingclean Electric Co Ltd; Lexy Electric Green Energy Technology Suzhou Co Ltd
Current assignee: Kingclean Electric Co Ltd; Lexy Electric Green Energy Technology Suzhou Co Ltd
Priority date: 2020-11-09
Filing date: 2020-11-09
Publication date: 2024-04-19
Anticipated expiration: 2040-11-09
Also published as: CN114499698A

Abstract

The disclosure provides a synchronous signal processing method, a device, equipment and a storage medium, wherein the method comprises the following steps: monitoring a target synchronization signal for controlling a target device; when the first jump of the target synchronous signal is monitored, first jump information of the target synchronous signal in a preset time period from the current moment is acquired, wherein the first jump information comprises: first transition count and/or first level comparison information; if the first jump information meets the invalid synchronous signal judging condition, determining that the target synchronous signal is an invalid synchronous signal; the synchronous signal sampling distortion or misjudgment caused by the interference signals can be effectively avoided, the fault tolerance rate is improved, the circuit setting is simplified, the flexibility of the whole machine is improved, and the production cost is reduced.

Description

Synchronous signal processing method, device, equipment and storage medium

Technical Field

The disclosure relates to the technical field of communication, and in particular relates to a synchronous signal processing method, a synchronous signal processing device, synchronous signal processing equipment and a storage medium.

Background

When the synchronous signal control equipment operates, the accuracy of signal sampling is particularly important, and when interference signals such as vibration interference, electrostatic interference or electromagnetic interference occur, the synchronous signal sampling is easy to distort or misjudge, so that the controlled equipment operates in error, and the operation safety and the user experience of the equipment are affected. In the prior art, a perfect physical protection is adopted on a sampling circuit to prevent a synchronous signal from being interfered; or a filter component is added in the circuit to filter the interfered synchronous signals. However, the mode has the defects of incomplete protection, high production cost and the like, and is not beneficial to flexible configuration and cost control of the whole machine.

Therefore, there is a need to provide an improved synchronization signal processing scheme to solve the above-mentioned problems in the prior art, improve the flexibility of the whole machine and reduce the production cost.

Disclosure of Invention

The disclosure provides a synchronous signal processing method, a synchronous signal processing device, synchronous signal processing equipment and a storage medium, which can improve the flexibility of a complete machine, reduce the production cost and improve the user experience.

In one aspect, the present disclosure provides a synchronization signal processing method, including:

monitoring a target synchronization signal for controlling a target device;

when the first jump of the target synchronous signal is monitored, first jump information of the target synchronous signal in a preset time period from the current moment is acquired, wherein the first jump information comprises: first hop count and/or first signal comparison information;

And if the first jump information meets the invalid synchronous signal judging condition, determining that the target synchronous signal is an invalid synchronous signal.

Optionally, when the first jump of the target synchronization signal is monitored, the step of acquiring the first jump information of the target synchronization signal in a preset time period from the current moment includes:

When the first jump of the target synchronous signal is monitored, measuring a first jump count of the target synchronous signal in a first preset time period from the current moment; and/or when the first jump of the target synchronous signal is monitored, measuring a second synchronous signal after a second preset time period is started from the current moment, and acquiring first signal comparison information between the second synchronous signal and a first synchronous signal before the first jump occurs;

and if the first jump information meets the invalid synchronous signal judging condition, determining that the target synchronous signal is the invalid synchronous signal, wherein the step comprises the following steps:

And if the first jump count is larger than a first preset count and/or if the first signal comparison information meets the invalid synchronous signal level judgment condition, determining that the target synchronous signal is the invalid synchronous signal.

Optionally, the duration corresponding to the first preset time period and/or the second preset time period is smaller than a half period of the valid synchronization signal.

Optionally, before the obtaining the first jump information of the target synchronization signal in the preset time period from the current moment, the method further includes:

The external interrupt function is masked so that the transmission of the external interrupt trigger signal is not performed until the target synchronization signal is determined to be a valid synchronization signal.

Optionally, the measuring the first transition count of the target synchronization signal within the first preset period from the current time includes:

starting a first interference monitoring timer;

measuring a jump count of the target synchronous signal when the count time of the first interference monitoring timer started from the current moment reaches the time corresponding to the first preset time period, and obtaining the first jump count;

And/or, the step of measuring the second synchronization signal after the second preset time period from the current moment comprises the following steps:

Starting a second interference monitoring timer;

And when the counting time of the second interference monitoring timer reaches the time corresponding to the second preset time period from the current time, measuring the second synchronous signal.

Optionally, the first signal comparison information includes a first level comparison result between a second level of the second synchronization signal and a first level of the first synchronization signal;

The invalid synchronization signal level judgment conditions include: the comparison result of the first level grade is that the second level grade is consistent with the first level grade;

Or alternatively

The first signal comparison information includes a first difference between a second level value of the second synchronization signal and a first level value of the first synchronization signal;

The invalid synchronization signal level judgment conditions include: the absolute value of the first difference value is smaller than a first preset threshold value.

Optionally, the method further comprises:

and if the first jump information meets the effective synchronous signal judging condition corresponding to the first jump, determining that the target synchronous signal is an effective synchronous signal.

Optionally, when the second jump of the target synchronization signal is monitored, measuring a second jump count of the target synchronization signal within a third preset time period from the current moment; and/or when the second jump of the target synchronous signal is monitored, measuring a third synchronous signal after a fourth preset time period is started from the current moment, and acquiring second signal comparison information between the third synchronous signal and the second synchronous signal before the second jump occurs;

and if the second jump count is greater than zero and less than or equal to a second preset count and/or if the second signal comparison information meets a preset action switching condition, determining that the second jump is a target action switching signal for controlling the target equipment to execute corresponding action switching operation.

Optionally, after the determining that the target synchronization signal is a valid synchronization signal, the method further includes:

when the effective synchronous signal is not detected to jump beyond the preset time length, determining that the effective synchronous signal is terminated;

the first and/or second interference monitoring timer is/are closed.

Optionally, before the monitoring of the target synchronization signal for controlling the target device, the method further comprises: initializing the first interference monitoring timer and/or initializing the second interference monitoring timer.

In another aspect, the present disclosure further provides a synchronization signal processing apparatus, including:

and the signal monitoring module is used for: configured to monitor a target synchronization signal for controlling a target device;

An information acquisition module: the method comprises the steps of acquiring first jump information of a target synchronous signal in a preset time period from the current moment when the first jump of the target synchronous signal is monitored, wherein the first jump information comprises the following steps: first hop count and/or first signal comparison information;

A signal determining module: and the first jump information is configured to determine that the target synchronous signal is an invalid synchronous signal if the first jump information meets an invalid synchronous signal judging condition.

On the other hand, the disclosure also provides a synchronous signal processing device, which comprises the synchronous signal processing device.

In another aspect, the disclosure also provides a computer readable storage medium having stored therein at least one instruction or at least one program, the at least one instruction or the at least one program loaded and executed by a processor to implement a synchronization signal processing method as described above.

The method, the device, the equipment and the storage medium for processing the synchronous signals have the following technical effects:

The synchronous signal sampling distortion or misjudgment caused by the interference signals can be effectively avoided, the fault tolerance rate is improved, the circuit setting is simplified, the flexibility of the whole machine is improved, and the production cost is reduced.

Drawings

In order to more clearly illustrate the embodiments of the present disclosure or the technical solutions and advantages of the prior art, the following description will briefly explain the drawings required for the embodiments or the prior art description, and it is apparent that the drawings in the following description are only some embodiments of the present disclosure, and other drawings may be obtained according to the drawings without inventive effort for those skilled in the art.

Fig. 1 is a flowchart of a synchronization signal processing method provided in an embodiment of the present disclosure;

fig. 2 is a flowchart of acquiring first jump information of a target synchronization signal within a preset time period from a current moment when a first jump of the target synchronization signal is monitored;

Fig. 3 is a program flow chart of a synchronization signal processing method according to an embodiment of the present disclosure;

FIG. 4 is a waveform schematic diagram of an active synchronization signal provided by one embodiment of the present disclosure;

FIG. 5 is a schematic diagram of effective synchronization signal waveforms under electrostatic interference provided by an embodiment of the present disclosure;

FIG. 6 is an enlarged view of the square frame portion of FIG. 5;

Fig. 7 is a flowchart of obtaining first transition information of a target synchronization signal within a preset time period from a current time when it is monitored that the target synchronization signal is first hopped, which is provided in an embodiment of the present disclosure;

fig. 8 is a schematic diagram of a synchronization signal processing apparatus according to an embodiment of the disclosure;

fig. 9 is a schematic structural diagram of an electronic device according to an embodiment of the disclosure.

Detailed Description

The following description of the technical solutions in the embodiments of the present disclosure will be made clearly and completely with reference to the accompanying drawings in the embodiments of the present disclosure, and it is apparent that the described embodiments are only some embodiments of the present disclosure, not all embodiments. All other embodiments, which can be made by one of ordinary skill in the art without undue burden from the disclosure, are within the scope of the disclosure.

It should be noted that the terms "first," "second," and the like in the description and claims of the present disclosure and in the foregoing figures are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that the embodiments of the disclosure described herein may be capable of operation in sequences other than those illustrated or described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or server that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed or inherent to such process, method, article, or apparatus, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.

Referring to fig. 1, fig. 1 is a flow chart of a method for processing a synchronization signal according to the present disclosure. The method may include:

s100: a target synchronization signal for controlling a target device is monitored.

S300: when the first jump of the target synchronous signal is monitored, first jump information of the target synchronous signal in a preset time period from the current moment is acquired, wherein the first jump information comprises: the first transition count and/or the first signal comparison information.

S500: and if the first jump information meets the invalid synchronous signal judging condition, determining that the target synchronous signal is the invalid synchronous signal.

In summary, the synchronous signal processing method provided by the application can effectively avoid synchronous signal sampling distortion or misjudgment caused by interference signals, improve the fault tolerance rate, simplify the circuit arrangement, improve the flexibility of the whole machine and reduce the production cost.

A method of processing a synchronization signal of the present disclosure is described below in conjunction with fig. 2-6, which may include:

s110: monitoring a target synchronization signal for controlling a target device;

In the disclosed embodiments, the target synchronization signal may include, but is not limited to, a pulse signal or a switching signal. Wherein the pulse signal can comprise one or a combination of a plurality of rectangular pulse, square wave pulse, spike pulse, saw tooth wave pulse, bell wave pulse, step wave pulse or triangular wave pulse according to the waveform; and/or may include, but is not limited to, one or a combination of several of superimposed pulses, double pulses, pulsatile pulses, reverse pulses, bi-directional pulses, commutation modulated pulses, or reverse pulses with off-times, etc.

In practical applications, the target synchronization signal may be an electrical signal or a digital signal input to the sampling circuit.

S310: when the first jump of the target synchronous signal is monitored, first jump information of the target synchronous signal in a preset time period from the current moment is acquired, and the first jump information comprises first signal comparison information.

In the embodiment of the disclosure, the first edge of the first transition may be a start edge of the first pulse wave period of the target synchronization signal, an edge of the switching signal, or an edge of the interference signal. The interference signal may include, but is not limited to, one or more of an electrostatic interference signal, a vibration interference signal, a dithering signal, or the like.

In practical applications, referring to fig. 2, step S310 may include:

s3101: and when the first jump of the target synchronous signal is monitored, measuring a second synchronous signal after a second preset time period is started from the current moment.

It should be noted that, the second preset time period may be determined according to the duration of the interference signal, specifically, the duration corresponding to the second preset time period is greater than the duration of the interference signal, so as to ensure that the duration of the second preset time period covers the duration of the interference signal as much as possible, avoid that the measured second synchronization signal includes interference signal information, and ensure the signal quality and accuracy of the measured second synchronization signal. And/or the second preset time period may be determined according to a period of the effective synchronization signal, specifically, when the target synchronization signal is a pulse signal, a duration corresponding to the second preset time period is smaller than a half period of the effective synchronization signal, so as to avoid that the effective synchronization signal and the interference signal are measured simultaneously in the second preset time period. Further, the duration corresponding to the second preset time period is smaller than 1/4 period of the effective synchronous signal, so that the effective synchronous signal and the interference signal are prevented from being measured in the second preset time period at the same time, and the occupation of resources is reduced.

In a specific embodiment, the measuring the second synchronization signal after the second preset period from the current time may include: and measuring at least one parameter of the level, the voltage, the current, the slope, the phase angle and the like of the second synchronous signal after a second preset time period from the current moment.

S3102: first signal comparison information between the second synchronization signal and the first synchronization signal before the occurrence of the first jump is acquired.

In practical applications, the signal before the first jump occurs in the target synchronization signal is the first synchronization signal.

In a specific embodiment, the first signal comparison information may include at least one of a first level comparison result, a first level value comparison result, a first voltage value comparison result, a first current value comparison result, a first slope comparison result, a first phase angle comparison result, and the like.

S510: and if the first jump information meets the invalid synchronous signal judging condition, determining that the target synchronous signal is the invalid synchronous signal.

In the embodiment of the present disclosure, step S510 may include:

s5101: and if the first signal comparison information meets the invalid synchronous signal level judgment condition, determining that the target synchronous signal is the invalid synchronous signal.

In some embodiments, the first signal comparison information includes a first level comparison result between a second level of the second synchronization signal and a first level of the first synchronization signal; accordingly, the invalid synchronization signal level judgment conditions include: the first level class comparison results in the second level class being identical to the first level class.

Wherein the level levels may include, but are not limited to, high and low levels. If the first level grade and the second level grade are both low levels or if the first level grade and the second level grade are both high levels, the first signal comparison information is determined to meet the invalid synchronous signal level judgment condition.

Further, when the first jump of the target synchronous signal is monitored, whether the first jump is a positive jump or not can be judged, and if the first jump is the positive jump, the first synchronous signal is in a low level; further, whether the second synchronizing signal is at a low level is judged, if the second synchronizing signal is at a low level, the level levels of the first synchronizing signal and the second synchronizing signal are consistent, and it is determined that the first signal comparison information meets the invalid synchronizing signal level judging condition. If the first jump is not positive jump, determining that the first jump is negative jump, and the first synchronous signal is high level; further, whether the second synchronizing signal is at a high level is judged, if the second synchronizing signal is at a high level, the level levels of the first synchronizing signal and the second synchronizing signal are consistent, and it is determined that the first signal comparison information meets the invalid synchronizing signal level judging condition.

Therefore, the software program judges whether the level grades of the target synchronous signals before and after the first jump are consistent, and determines whether the target synchronous signals are invalid synchronous signals or not, so that false triggering of interference signals is avoided.

In other embodiments, the first signal comparison information includes a first difference between a second level value of the second synchronization signal and a first level value of the first synchronization signal; accordingly, the invalid synchronization signal level judgment conditions include: the absolute value of the first difference is smaller than a first preset threshold.

The first preset threshold may be determined according to a pulse waveform of the target synchronization signal, or may be determined according to a pulse waveform of the target synchronization signal and a duration corresponding to the second preset time period.

In one embodiment, if the target synchronization signal is a rectangular wave pulse signal or a square wave pulse signal, the amplitude of the rectangular wave pulse signal or the square wave pulse signal may be set to a first preset threshold.

In another embodiment, if the target synchronization signal is a sawtooth pulse signal, a first amplitude variation value of a duration corresponding to a second preset time period of a positive slope band of the sawtooth pulse signal can be obtained by calculation, and a second amplitude variation value of a duration corresponding to a second preset time period of a negative slope band of the sawtooth pulse signal can be obtained by calculation; the smaller value of the first amplitude variation value and the second amplitude variation value may be set as the first preset threshold value.

Further, the first preset threshold may include a first sub-preset threshold and a second sub-preset threshold; the first amplitude variation value may be set to a first sub-preset threshold value, and the second amplitude variation value may be set to a second sub-preset threshold value. Correspondingly, if the first jump is positive jump and the absolute value of the first difference value is smaller than a first sub-preset threshold value, determining that the first signal comparison information meets an invalid synchronous signal level judgment condition; and if the first jump is a negative jump and the absolute value of the first difference value is smaller than the second sub-preset threshold value, determining that the first signal comparison information meets the invalid synchronous signal level judgment condition.

S710: and if the first jump information meets the effective synchronous signal judging condition corresponding to the first jump, determining the target synchronous signal as the effective synchronous signal.

In an embodiment of the present disclosure, step S710 may include:

s7101: and if the first signal comparison information meets the effective synchronous signal level judgment condition, determining that the target synchronous signal is an effective synchronous signal.

In some embodiments, the valid synchronization signal level determination condition includes: the first level class comparison results in the second level class not being consistent with the first level class.

In other embodiments, the valid synchronization signal level determination condition includes: the absolute value of the first difference is greater than or equal to a first preset threshold.

In summary, the method for processing the synchronous signal can be executed through a software program, so that synchronous signal sampling distortion or misjudgment caused by an interference signal is effectively avoided, the fault tolerance is improved, and misoperation of target equipment is avoided; the sampling circuit can be provided with no electrostatic physical protection or only basic physical protection, and a filter element or a filter circuit is not required to be added, so that the circuit setting is simplified, the flexibility of the whole machine is improved, and the production cost is reduced.

Based on the above part or all of the specific embodiments, in the embodiment of the disclosure, the synchronization signal processing method may further include:

S910: and if the target synchronous signal is determined to be a valid synchronous signal, sending an external interrupt trigger signal so that the target equipment responds to the valid synchronous signal to execute a corresponding action.

In the disclosed embodiment, after determining that the target synchronization signal is a valid synchronization signal, an external interrupt trigger signal is sent to trigger an external interrupt, and the valid synchronization signal is sent to the target device, so that the target device performs a corresponding action, such as heating, motor starting, or pulse width modulation (PWM, pulse Width Modulation), in response to the valid synchronization signal.

In practical application, if the first jump information does not meet the effective synchronization signal judgment condition corresponding to the first jump, determining that the target synchronization signal is an ineffective synchronization signal, further determining that the first jump may be derived from the interference signal, and not sending an external interrupt trigger signal at this time so as to avoid misoperation.

Based on the foregoing part or all of the specific embodiments, in the embodiment of the disclosure, before acquiring the first hopping information of the target synchronization signal within the preset time period from the current time, the synchronization signal processing method of the disclosure may further include S200: the external interrupt function is masked so that the transmission of the external interrupt trigger signal is not performed until the target synchronization signal is determined to be a valid synchronization signal.

Accordingly, in some embodiments, the measuring the second synchronization signal after the second preset period from the current time may include:

S31011: a second interference monitoring timer is started.

S31012: and when the counting time length of the second interference monitoring timer reaches the time length corresponding to the second preset time period from the current time, measuring a second synchronous signal.

In practical application, accurate delay of the timer is monitored through the second interference so as to achieve measurement of the second synchronous signal after delay of the duration corresponding to the second preset time period.

Therefore, the external interrupt function is shielded after the first jump is monitored, and the second synchronous signal is measured by delaying the second interference monitoring timer, so that whether the target synchronous signal is effective or not can be judged before the external interrupt is triggered, the false triggering of the external interrupt by the invalid synchronous signal is avoided, and the false action of the target equipment in response to the invalid synchronous signal caused by the interference signal and the like is prevented.

Accordingly, in some embodiments, before step S110, the synchronization signal processing method of the present disclosure may further include step S100: initializing a second interference monitoring timer; to ensure that the second interference monitoring timer is operating properly.

Based on the foregoing part or all of the specific implementation manners, in an embodiment of the disclosure, after step S710, the synchronization signal processing method of the disclosure may further include:

S8101: and when the second jump of the target synchronous signal is monitored, measuring a third synchronous signal after a fourth preset time period is started from the current moment.

In practical applications, the first edge of the second transition may be another edge adjacent to the start edge of the first pulse period corresponding to the first transition, another edge of the switching signal, or an edge of another interfering signal.

In a specific embodiment, the second interference monitoring timer delays precisely for a fourth preset period of time to measure the tri-synchronization signal.

It should be noted that, the fourth preset time period may be determined according to the duration of the interference signal, specifically, the duration corresponding to the fourth preset time period is greater than the duration of the interference signal, so as to ensure that the duration of the fourth preset time period covers the duration of the interference signal as much as possible, avoid that the measured third synchronization signal includes interference signal information, and ensure the signal quality and accuracy of the third synchronization signal. And/or the fourth preset time period may be determined according to a period of the valid synchronization signal, specifically, when the target synchronization signal is a pulse signal, a duration corresponding to the fourth preset time period is less than a half period of the valid synchronization signal. Further, the duration corresponding to the fourth preset time period is smaller than 1/4 period of the effective synchronization signal, so that the effective synchronization signal and the interference signal are prevented from being measured in the second preset time period at the same time, and the resource occupation is saved.

In some embodiments, the duration corresponding to the fourth preset time period may be equal to the duration corresponding to the second preset time period.

Specifically, measuring the third synchronization signal after the fourth preset period from the current time may include: and measuring at least one parameter of the level, the voltage, the current, the slope and the phase angle of the third synchronous signal after a fourth preset period from the current moment.

S8103: second signal comparison information between the third synchronization signal and the second synchronization signal before the occurrence of the second jump is acquired.

In practical applications, the second signal comparison information may include at least one of a second level comparison result, a second level value comparison result, a second voltage value comparison result, a second current value comparison result, a second slope comparison result, a second phase angle comparison result, and the like.

S8105: if the second signal comparison information meets the preset action switching condition corresponding to the second jump, determining that the second jump is a target action switching signal for controlling the target equipment to execute the corresponding action switching operation.

In some embodiments, the second signal comparison information includes a second level comparison result between a third level of the third synchronization signal and a second level of the second synchronization signal, and the preset action switching condition includes: the second level comparison results in the third level not being consistent with the second level.

Wherein the level levels may include, but are not limited to, high and low levels. If the second level and the third level are both low levels or if the second level and the third level are both high levels, determining that the second comparison result does not meet the preset action switching condition, and correspondingly, determining that the second jump is not the target action switching signal.

In other embodiments, the second signal comparison information includes a second difference between a third level value of the third synchronization signal and a second level value of the second synchronization signal; correspondingly, the preset action switching conditions include: the absolute value of the second difference value is larger than or equal to a second preset threshold value.

The second preset threshold may be determined according to a pulse waveform of the target synchronization signal, or may be determined according to a pulse waveform of the target synchronization signal and a duration corresponding to the fourth preset time period.

In one embodiment, if the target pulse signal is a rectangular wave pulse signal or a square wave pulse signal, the amplitude of the rectangular wave pulse signal or the square wave pulse signal may be set to a second preset threshold.

In another embodiment, if the target pulse signal is a sawtooth pulse signal, a third amplitude variation value of a duration corresponding to a fourth preset time period of a positive slope band of the sawtooth pulse signal can be calculated, and a fourth amplitude variation value of a duration corresponding to a fourth preset time period of a negative slope band of the sawtooth pulse signal can be calculated; the smaller value of the third amplitude variation value and the fourth amplitude variation value may be set as the second preset threshold value.

Further, the second preset threshold may include a third sub-preset threshold and a fourth sub-preset threshold; the third amplitude variation value may be set to a third sub-preset threshold value and the fourth amplitude variation value may be set to a fourth sub-preset threshold value. Correspondingly, if the second jump is positive jump and the absolute value of the second difference value is larger than or equal to a third sub preset threshold value, determining that the second signal comparison information meets the corresponding preset action switching condition; if the second jump is a negative jump, determining that the second signal comparison information meets the corresponding preset action switching condition if the absolute value of the second difference value is larger than or equal to a fourth sub preset threshold value.

Based on the above specific implementation, in the embodiment of the present disclosure, after step S710, the synchronization signal processing method of the present disclosure may further include:

s8107: and when no jump of the effective synchronous signal is detected beyond the preset time length, determining that the effective synchronous signal is terminated.

In practical applications, the preset duration is at least greater than the duration corresponding to one period of the target synchronization signal, and specifically may be greater than the duration corresponding to two periods of the target synchronization signal.

S8109: the second disturbance monitoring timer is turned off and an external interrupt off signal is sent.

In practical applications, the external interrupt is turned off in response to the external interrupt off signal to cause the target device to stop receiving the target synchronization signal.

The method for processing a synchronization signal of the present disclosure is described below by taking a sampling circuit as an example in a 5V single chip microcomputer, please refer to fig. 3, fig. 3 is a program flow chart of the method for processing a synchronization signal in the present embodiment, an effective synchronization signal for controlling a target device in the present embodiment is a square wave pulse signal, a half period of the square wave pulse signal is 10ms, please refer to fig. 4, fig. 4 shows a waveform schematic diagram of the effective synchronization signal in the present embodiment, based on which, a specific program flow of the method for processing a synchronization signal in the present embodiment is as follows:

s1: a second interference monitoring timer is initialized.

S2: the external interrupt function is turned on.

S3: is monitoring the target synchronization signal for the occurrence of the first transition? If yes, go to step S4, if not, repeat this step.

If the target synchronous signal in the sampling circuit is monitored to generate a first jump, an external interrupt trigger request is determined. The synchronization signal before the first jump is the first synchronization signal.

S4: shielding external interrupt functions.

S5a: determine if the first transition is a falling edge break? If yes, go to step S6a, if no, go to step S5b.

If the first jump is determined to be the falling edge interrupt, the first synchronization signal before the first jump is at a high level.

S6a: a second interference monitoring timer is started.

S7a: judging whether the synchronization signal after the second preset period is at a low level? If yes, go to step S9, if no, go to step S8.

And judging whether the detected second synchronizing signal after the second preset time period is a low level or not, if so, determining that the level of the second synchronizing signal is inconsistent with that of the first synchronizing signal, and determining that the first signal comparison information meets the effective synchronizing signal judging condition corresponding to the first jump. If not, the level grades of the second synchronous signal and the first synchronous signal are consistent, and the first signal comparison information is determined to meet the invalid synchronous signal judgment condition.

In this embodiment, V higher than 3.7V is high level, and 0 to 1.3V is low level; the second preset time period corresponds to a duration of 1 mus.

S5b: the first transition is determined to be a rising edge interrupt.

If the first jump is determined to be the rising edge interrupt, the first synchronization signal before the first jump is at a low level.

S6b: a second interference monitoring timer is started.

S7b: judging whether the synchronization signal after the second preset period is at a high level? If yes, go to step S8, if no, go to step S9.

And judging whether the second synchronizing signal after the measured second preset time period is at a high level, if so, enabling the level grades of the second synchronizing signal and the first synchronizing signal to be inconsistent, and determining that the first signal comparison information meets the effective synchronizing signal judging condition corresponding to the first jump. If not, the level grades of the second synchronous signal and the first synchronous signal are consistent, and the first signal comparison information is determined to meet the invalid synchronous signal judgment condition.

S8: the target synchronization signal is determined to be an invalid synchronization signal, and the process proceeds to step S1.

S9: the target synchronization signal is determined to be a valid synchronization signal.

S10: the external interrupt function is triggered to cause the target device to perform a corresponding action in response to the valid synchronization signal. For example, the target device is caused to perform heating, turning on a motor, PWM, or the like according to the effective synchronization signal.

Further, after step S10, the synchronization signal processing method further includes the following steps:

S11: is the second transition of the monitoring target synchronization signal occur? If yes, go to step S12, if no, repeat this step.

If the target synchronous signal in the sampling circuit is monitored to generate a second jump, determining that an action switching trigger request exists.

S12: shielding external interrupt functions.

S13: the timer delay is monitored by the second disturbance.

S14a: if the synchronization signal before the second jump is at a high level, it is determined whether the synchronization signal after the fourth preset period is at a low level? If yes, go to step S16, if no, go to step S15.

Wherein, the duration corresponding to the fourth preset time period is 1 mu s.

Further, the synchronization signal after the fourth preset period is the third synchronization signal. Judging whether the third synchronizing signal after the fourth preset time period is low level or not, if yes, enabling the level grades of the third synchronizing signal and the level grade of the second synchronizing signal to be inconsistent, and determining that the second signal comparison information meets the preset action switching condition corresponding to the second jump. If not, the level grades of the third synchronizing signal and the second synchronizing signal are consistent, and it is determined that the second signal comparison information does not meet the preset action switching condition corresponding to the second jump.

Further, referring to fig. 5, fig. 5 shows a waveform schematic diagram of an effective synchronization signal under electrostatic interference in the present embodiment, as shown in fig. 5, the effective synchronization signal generates a second jump (a signal in a block in the figure) in the 0.5 th period due to the electrostatic interference. Referring to fig. 6, fig. 6 is an enlarged view of a square frame portion in fig. 5, and a duration of an interference signal (a signal in a square frame in the drawing) caused by the electrostatic interference is about 500 μs. The duration corresponding to the fourth preset time period is longer than the duration of the interference signal, so that the detected ground three-synchronous signal after the fourth preset time period is still in a high level, the situation that the second jump caused by the interference signal is mistakenly regarded as an action switching signal is avoided, and further misoperation of the target equipment is avoided.

S14b: if the synchronization signal before the second jump is at a low level, it is determined whether the synchronization signal after the fourth preset period is at a high level? If yes, go to step S16, if no, go to step S15.

And judging whether the third synchronizing signal after the fourth preset time period is high level, if so, determining that the level grades of the third synchronizing signal and the second synchronizing signal are inconsistent, and determining that the second signal comparison information meets the preset action switching condition corresponding to the second jump. If not, the level grades of the third synchronizing signal and the second synchronizing signal are consistent, and it is determined that the second signal comparison information does not meet the preset action switching condition corresponding to the second jump.

S15: the second transition is determined to be an invalid operation switching signal, and the process proceeds to step S11.

S16: and determining the second jump as a target action switching signal so that the target equipment executes corresponding action switching according to the target action switching signal. For example, stopping heating, motor speed commutation, motor speed regulation, PWM, or the like.

The following describes a synchronization signal processing method of the present disclosure, which may include:

S120: a target synchronization signal for controlling a target device is monitored.

In practical applications, the target synchronization signal may be an electrical signal input to the sampling circuit.

S320: when the first jump of the target synchronous signal is monitored, first jump information of the target synchronous signal in a preset time period from the current moment is acquired, wherein the first jump information comprises a first jump count.

In the embodiment of the disclosure, the first edge in the first transition may be a start edge of the first pulse wave period of the target synchronization signal, an edge of the switching signal, or an edge of the interference signal. The interference signal may include, but is not limited to, one or more of an electrostatic interference signal, a vibration interference signal, a dither signal, an electromagnetic interference signal, and the like.

In practical applications, the first hops may include more than one consecutive or spaced first sub-hops, each of which may include one hop edge, and the count of the first sub-hops included in the first hops is the first hop count.

In practical applications, step S320 may include:

S3201: and when the first jump of the target synchronous signal is monitored, measuring a first jump count of the target synchronous signal in a first preset time period from the current moment.

It should be noted that, the duration corresponding to the first preset time period may be determined according to the duration of the interference signal, specifically, the duration corresponding to the first preset time period is greater than the duration of the interference signal, so that it is ensured that the duration of the first preset time period covers the duration of the interference signal as much as possible, and accuracy of the measured first jump count is ensured. And/or the first preset time period may be determined according to a period of the valid synchronization signal, specifically, when the target synchronization signal is a pulse signal, a duration corresponding to the first preset time period is less than a half period of the valid synchronization signal. Further, the duration corresponding to the first preset time period is smaller than 1/4 period of the effective synchronous signal, so that the effective synchronous signal and the interference signal are prevented from being measured in the second preset time period at the same time, and the resource occupation is saved.

S520: and if the first jump information meets the invalid synchronous signal judging condition, determining that the target synchronous signal is the invalid synchronous signal.

In an embodiment of the present disclosure, step S520 may include:

S5201: and if the first jump count is larger than the first preset count, determining that the target synchronous signal is an invalid synchronous signal.

In the embodiment of the disclosure, the first preset count may be determined according to properties such as a waveform of the pulse signal and a signal period. In one embodiment, when the target synchronization signal is a pulse signal and there is one transition in a half period of the target synchronization signal, the first preset count may be 1.

S720: and if the first jump information meets the effective synchronous signal judging condition corresponding to the first jump, determining the target synchronous signal as the effective synchronous signal.

In the embodiment of the present disclosure, step S720 may include:

s7201: and if the first jump count is greater than zero and less than or equal to a first preset count, determining that the target synchronous signal is a valid synchronous signal.

s920: and if the target synchronous signal is determined to be a valid synchronous signal, sending an external interrupt trigger signal so that the target equipment responds to the valid synchronous signal to execute a corresponding action.

In the embodiment of the disclosure, after determining that the target synchronization signal is a valid synchronization signal, an external interrupt trigger signal is sent to trigger an external interrupt, and the valid synchronization signal is sent to the target device, so that the target device performs a corresponding action, such as heating, motor starting, or PMW, in response to the valid synchronization signal.

In practical application, if the first jump information does not meet the valid synchronization signal judgment condition corresponding to the first jump, it is determined that the target synchronization signal is an invalid synchronization signal, and further it is determined that the first jump may be derived from an interference signal, for example, an interference signal generated by electromagnetic radiation or vibration, where the interference signal may include a plurality of continuous or intermittent jump edges, and at this time, an external interrupt trigger signal is not sent to avoid malfunction.

Based on the above part or all of the specific embodiments, in the embodiment of the present disclosure, before acquiring the first transition information of the target synchronization signal within the preset time period from the current time, the synchronization signal processing method of the present disclosure may further include S200: the external interrupt function is masked so that the transmission of the external interrupt trigger signal is not performed until the target synchronization signal is determined to be a valid synchronization signal.

Accordingly, in some embodiments, the measuring the first transition count of the target synchronization signal within the first preset period of time from the current time may include:

s32011: a first interference monitoring timer is started.

S32012: and measuring the jump count of the target synchronous signal when the count time length of the first interference monitoring timer started from the current time reaches the time length corresponding to the first preset time period, and obtaining the first jump count.

In practical application, accurate delay of the timer is monitored through the first interference so as to achieve measurement of the first jump information when the time length corresponding to the delay first preset time period.

Therefore, the external interrupt function is shielded after the first jump is monitored, and the first jump information is measured by delaying the first interference monitoring timer, so that whether the target synchronous signal is effective or not can be judged before the external interrupt is triggered, the false triggering of the external interrupt by the invalid synchronous signal is avoided, and the false action of the target equipment in response to the invalid synchronous signal caused by the interference signal and the like is prevented.

Accordingly, in some embodiments, before step S120, the synchronization signal processing method of the present disclosure further includes step S100: initializing a first interference monitoring timer; to ensure that the first interference monitoring timer is operating properly.

Based on the above part or all of the specific implementations, in an embodiment of the disclosure, after step S720, the synchronization signal processing method of the disclosure may further include:

S8201: and when the second jump of the target synchronous signal is monitored, measuring a second jump count of the target synchronous signal in a third preset time period from the current moment.

In practical applications, the first edge of the second transition may be another edge adjacent to the start edge of the first pulse period corresponding to the first transition, another edge of the switching signal, or an edge of another interfering signal. The second transitions may include more than one consecutive or spaced second sub-transitions, each of which may include one edge, the second transitions including a second count of second transitions.

In a specific embodiment, the first interference monitoring timer delays precisely for a third preset period of time to measure the second hop count.

It should be noted that, the third preset time period may be determined according to the duration of the interference signal, specifically, the duration corresponding to the third preset time period is greater than the duration of the interference signal, so that the duration of the third preset time period is ensured to cover the duration of the interference signal as much as possible, and the accuracy of the measured second jump count is ensured. And/or the third preset time period may be determined according to a period of the valid synchronization signal, specifically, when the target synchronization signal is a pulse signal, a duration corresponding to the third preset time period is smaller than a half period of the valid synchronization signal. Further, the duration corresponding to the third preset time period is smaller than 1/4 period of the effective synchronization signal, so that the effective synchronization signal and the interference signal are prevented from being measured in the second preset time period at the same time, and the resource occupation is saved.

In some embodiments, the duration corresponding to the third preset time period may be equal to the duration corresponding to the first preset time period.

S8203: and if the second jump count is greater than zero and less than or equal to a second preset count, determining that the second jump is a target action switching signal for controlling the target equipment to execute corresponding action switching operation.

In practical applications, the second preset count may be determined according to the waveform of the pulse signal, the signal period, and the like.

In some embodiments, the second preset count may be equal to the first preset count described above.

Based on the above specific implementation, in the embodiment of the present disclosure, after step S720, the synchronization signal processing method of the present disclosure may further include:

S8205: and when no jump of the effective synchronous signal is detected beyond the preset time length, determining that the effective synchronous signal is terminated.

S8207: the first disturbance monitoring timer is turned off and an external interrupt off signal is sent.

The following describes a synchronization signal processing method of the present disclosure with reference to fig. 7, where the method may include:

s130: a target synchronization signal for controlling a target device is monitored.

S330: when the first jump of the target synchronous signal is monitored, first jump information of the target synchronous signal in a preset time period from the current moment is acquired, wherein the first jump information comprises: the first transition count and the first signal compare information.

In the embodiment of the disclosure, the first edge of the first transition may be a start edge of the first pulse wave period of the target synchronization signal, an edge of the switching signal, or an edge of the interference signal. The interference signal may include, but is not limited to, one or more of an electrostatic interference signal, a vibration interference signal, a dither signal, an electromagnetic interference signal, and the like.

In practical application, referring to fig. 7, step S330 may include:

s3301: and when the first jump of the target synchronous signal is monitored, measuring a first jump count of the target synchronous signal in a first preset time period from the current moment.

S3302: and when the first jump of the target synchronous signal is monitored, measuring a second synchronous signal after a second preset time period is started from the current moment.

In the embodiment of the present disclosure, a signal before the occurrence of the first transition in the target synchronization signal is the first synchronization signal.

S3303: first signal comparison information between the second synchronization signal and the first synchronization signal before the occurrence of the first jump is acquired.

It should be noted that, the duration corresponding to the second preset time period is greater than or equal to the duration corresponding to the first preset time period, so that the second synchronization signal is ensured to be the signal after the first jump occurs.

Further, the time periods corresponding to the first preset time period and the second preset time period can be determined according to the time periods of the interference signals, specifically, the time periods corresponding to the first preset time period and the second preset time period are larger than the time periods of the interference signals, so that the time periods corresponding to the first preset time period and the second preset time period are ensured to cover the time periods of the interference signals as much as possible, the measured second synchronous signals are prevented from containing the interference signal information, and the accuracy of the first jump count and the second synchronous signals is ensured. And/or the first preset time period and the second preset time period may be determined according to a period of the valid synchronization signal, specifically, when the target synchronization signal is a pulse signal, a duration corresponding to each of the first preset time period and the second preset time period is less than a half period of the valid synchronization signal. Further, the duration corresponding to the first preset time period and the second preset time period is smaller than 1/4 period of the effective synchronous signal, so that the effective synchronous signal and the interference signal are prevented from being measured in the second preset time period at the same time, and the resource occupation is saved.

In practical applications, the first signal comparison information may include at least one of a first level comparison result, a first level value comparison result, a first voltage value comparison result, a first current value comparison result, a first slope comparison result, a first phase angle comparison result, and the like.

S530: and if the first jump information meets the invalid synchronous signal judging condition, determining that the target synchronous signal is the invalid synchronous signal.

In the embodiment of the present disclosure, step S530 may include:

s5301: if the first jump count is larger than the first preset count and if the first signal comparison information meets the invalid synchronous signal level judgment condition, determining that the target synchronous signal is the invalid synchronous signal.

In practical applications, the first preset count may be determined according to the waveform of the pulse signal, the signal period, and the like. In one embodiment, when the target synchronization signal is a pulse signal and there is one transition in a half period of the target synchronization signal, the first preset count may be 1.

S730: and if the first jump information meets the effective synchronous signal judging condition corresponding to the first jump, determining the target synchronous signal as the effective synchronous signal.

In the embodiment of the present disclosure, step S730 may include:

S7301: and if the first jump count is greater than zero and less than or equal to the first preset count and if the first signal comparison information meets the effective synchronous signal level judgment condition, determining that the target synchronous signal is an effective synchronous signal.

It should be noted that, the invalid synchronization signal determining condition and the valid synchronization signal determining condition are the same as those described above, and are not described here again.

s930: an external interrupt trigger signal is sent to cause the target device to perform a corresponding action in response to the valid synchronization signal.

Based on the above part or all of the specific implementations, in an embodiment of the disclosure, before step S330, the synchronization signal processing method of the disclosure may further include S200: the external interrupt function is masked so that the transmission of the external interrupt trigger signal is not performed until the target synchronization signal is determined to be a valid synchronization signal.

Accordingly, the measuring the first transition count of the target synchronization signal within the first preset period from the current time and the measuring the second synchronization signal after the second preset period from the current time may include:

S33011: and starting a first interference monitoring timer and a second interference monitoring timer.

S33012: and measuring the jump count of the target synchronous signal when the count time length of the first interference monitoring timer started from the current time reaches the time length corresponding to the first preset time period, and obtaining the first jump count.

S33013: and when the counting time length of the second interference monitoring timer reaches the time length corresponding to the second preset time period from the current time, measuring a second synchronous signal.

Therefore, the external interrupt function is shielded after the first jump is monitored, and whether the target synchronous signal is effective or not can be judged before the external interrupt is triggered by comparing the first jump information with the first signal comparison information and the corresponding conditions, so that the false triggering of the external interrupt by the invalid synchronous signal is avoided, and further, the false action of the target equipment in response to the invalid synchronous signal caused by the interference signal and the like is prevented.

Accordingly, in some embodiments, before step S130, the synchronization signal processing method of the present disclosure further includes step S100: the first and second interference monitoring timers are initialized to ensure that the first and second interference monitoring timers operate properly.

Based on the foregoing part or all of the specific implementation manners, in an embodiment of the disclosure, after step S730, the synchronization signal processing method of the disclosure may further include:

s8301: when the second jump of the target synchronous signal is monitored, measuring a second jump count of the target synchronous signal in a third preset time period from the current moment; and when the second jump of the target synchronous signal is monitored, measuring a third synchronous signal after a fourth preset time period is started from the current moment.

In a specific embodiment, the first interference monitoring timer delays precisely by a third preset time period to measure the second hopping information, and the second interference monitoring timer delays precisely by a fourth preset time period to measure the third synchronization signal.

It should be noted that, the duration corresponding to the fourth preset time period is greater than or equal to the duration corresponding to the third preset time period, so that the third synchronization signal is ensured to be the signal after the second jump occurs.

Further, the time periods corresponding to the third preset time period and the fourth preset time period can be determined according to the time periods of the interference signals, specifically, the time periods corresponding to the third preset time period and the fourth preset time period are larger than the time periods of the interference signals, so that the time periods corresponding to the third preset time period and the fourth preset time period are ensured to cover the time periods of the interference signals as much as possible, the measured fourth synchronous signals are prevented from containing the interference signal information, and the accuracy of the third jump count and the fourth synchronous signals is ensured. And/or the third preset time period and the fourth preset time period may be determined according to a period of the valid synchronization signal, specifically, when the target synchronization signal is a pulse signal, a duration corresponding to each of the third preset time period and the fourth preset time period is less than a half period of the valid synchronization signal. And thirdly, the time length corresponding to the third preset time period and the fourth preset time period is smaller than 1/4 period of the effective synchronous signal, so that the effective synchronous signal and the interference signal are prevented from being measured in the second preset time period at the same time, and the resource occupation is saved.

Specifically, measuring the third synchronization signal after the fourth preset period from the current time may include: and measuring at least one parameter of the level, the voltage, the current, the slope and the phase angle of the third synchronous signal after the fourth preset time period.

S8303: second signal comparison information between the third synchronization signal and the second synchronization signal before the occurrence of the second jump is acquired.

S8305: and if the second jump count is greater than zero and less than or equal to a second preset count and if the second signal comparison information meets the preset action switching condition corresponding to the second jump, determining that the second jump is a target action switching signal for controlling the target equipment to execute corresponding action switching operation.

In practical applications, the second preset count may be determined according to the waveform of the pulse signal, the signal period, and the like. The second preset count may be the same as the first preset count.

It should be noted that the preset action switching conditions are the same as those described above, and are not repeated here.

Based on the above specific implementation, in the embodiment of the present disclosure, after step S730, the synchronization signal processing method of the present disclosure may further include:

s8307: and when no jump of the effective synchronous signal is detected beyond the preset time length, determining that the effective synchronous signal is terminated.

S8309: closing the first and second disturbance monitoring timers and transmitting an external interrupt close signal.

It is noted that the present disclosure provides method operational steps as an example or a flowchart, but may include more or fewer operational steps based on conventional or non-inventive labor. The order of steps recited in the embodiments is merely one way of performing the order of steps and does not represent a unique order of execution. When an apparatus, device or system product in practice is executed, it may be performed sequentially or in parallel according to the method shown in the embodiments or the drawings.

The embodiment of the present disclosure further provides a synchronization signal processing apparatus, as shown in fig. 8, where the apparatus may include:

signal monitoring module 10: configured to monitor a target synchronization signal for controlling a target device;

Information acquisition module 20: when the first jump of the target synchronous signal is monitored, first jump information of the target synchronous signal in a preset time period from the current moment is acquired, wherein the first jump information comprises: first hop count and/or first signal comparison information;

Signal determination module 30: and the first jump information is configured to determine that the target synchronous signal is an invalid synchronous signal if the first jump information meets the invalid synchronous signal judging condition.

Based on the foregoing implementation manner, in the embodiment of the present disclosure, the information obtaining module 20 may include:

And a measuring unit: the method comprises the steps of measuring a first jump count of a target synchronous signal in a first preset time period from the current moment when the first jump of the target synchronous signal is monitored; and/or is configured to, when the first jump of the target synchronization signal is monitored, measure a second synchronization signal after a second preset time period is started from the current moment, and acquire first signal comparison information between the second synchronization signal and the first synchronization signal before the first jump occurs;

Based on some or all of the foregoing implementations, in the embodiments of the present disclosure, the signal determining module 30 may include:

a determination unit: is configured to determine that the target synchronization signal is an invalid synchronization signal if the first transition count is greater than a first preset count and/or if the first signal comparison information satisfies an invalid synchronization signal level determination condition.

The duration corresponding to the first preset time period and/or the second preset time period is smaller than the half period of the effective synchronous signal.

Based on the foregoing part or all of the foregoing implementation manners, in an embodiment of the disclosure, the synchronization signal processing apparatus may further include a shielding module: is configured to mask an external interrupt function before acquiring first transition information of a target synchronization signal within a preset period from a current time, so as not to perform transmission of an external interrupt trigger signal until the target synchronization signal is determined to be a valid synchronization signal.

Accordingly, the signal measurement module may include:

a first timer control unit: configured to start a first interference monitoring timer;

a first count duration measurement unit: and the first jump count is obtained by measuring the jump count of the target synchronous signal when the count time length of the first interference monitoring timer started from the current time reaches the time length corresponding to the first preset time period.

And/or, correspondingly, the signal measurement module may further include:

A second timer control unit: configured to start a second interference monitoring timer;

A second counting time length measuring unit: and the second synchronization signal is measured when the counting time length of the second interference monitoring timer reaches the time length corresponding to the second preset time period from the current time point.

Based on the above-described partial or full implementations, in the embodiment of the present disclosure, the first signal comparison information includes a first level comparison result between the second level of the second synchronization signal and the first level of the first synchronization signal; the invalid synchronization signal level judgment conditions include: the comparison result of the first level grade is that the second level grade is consistent with the first level grade; or alternatively

The first signal comparison information includes a first difference between a second level value of the second synchronization signal and a first level value of the first synchronization signal; the invalid synchronization signal level judgment conditions include: the absolute value of the first difference is smaller than a first preset threshold.

Based on the above-mentioned partial or full embodiments, in the embodiment of the present disclosure, the signal determining module 30 is further configured to determine that the target synchronization signal is an effective synchronization signal if the first transition information meets an effective synchronization signal judgment condition corresponding to the first transition.

In practical application, the synchronization signal processing device may further include an action switching signal determining module configured to measure a second transition count of the target synchronization signal within a third preset time period from the current time when the second transition of the target synchronization signal is monitored; and/or, when the second jump of the target synchronous signal is monitored, measuring a third synchronous signal after a fourth preset time period from the current moment, and acquiring second signal comparison information between the third synchronous signal and a second synchronous signal before the second jump; and determining that the second jump is a target action switching signal for controlling the target device to execute the corresponding action switching operation if the second jump count is greater than zero and less than or equal to a second preset count and/or if the second signal comparison information meets the preset action switching condition.

Based on the foregoing part or all of the foregoing implementation manners, in an embodiment of the disclosure, the synchronization signal processing apparatus may further include a signal termination determining module: the method comprises the steps of determining that a valid synchronous signal is terminated when no jump of the valid synchronous signal is detected after a target synchronous signal is determined to be the valid synchronous signal and a preset time length is exceeded; and, configured to close the first and/or second disturbance monitoring timers and to send an external interrupt close signal.

Based on the foregoing part or all of the foregoing implementation manners, in an embodiment of the disclosure, the synchronization signal processing apparatus may further include an initialization module: is configured to initialize the first interference monitoring timer and/or to initialize the second interference monitoring timer before monitoring a target synchronization signal for controlling the target device.

The apparatus embodiments and method embodiments in this disclosure are based on similar implementations.

The embodiment of the disclosure also provides a synchronous signal processing device, which comprises the synchronous signal processing device.

Embodiments of the present disclosure also provide a computer-readable storage medium including a memory and a processor, the memory storing at least one instruction and at least one program, the at least one instruction and the at least one program being loaded and executed by the processor to implement the synchronization signal processing method as recited in the claims

The embodiment of the disclosure also provides an electronic device, which comprises a memory and a processor, wherein the memory stores at least one instruction and at least one section of program, and the at least one instruction and the at least one section of program are loaded and executed by the processor to realize the synchronous signal processing method.

Further, fig. 9 shows a schematic hardware structure of an electronic device for implementing the synchronization signal processing method provided by the embodiments of the present disclosure, where the electronic device may participate in forming or including an apparatus or a system provided by the embodiments of the present disclosure. As shown in fig. 9, the electronic device 1 may include one or more (shown as 102a, 102b, … …,102n in the figures) processors 102 (the processors 102 may include, but are not limited to, processing means such as a microprocessor MCU or a programmable logic device FPGA), a memory 104 for storing data, and a transmission means 106 for communication functions. In addition, the method may further include: a display, an input/output interface (I/O interface), a Universal Serial Bus (USB) port (which may be included as one of the ports of the I/O interface), a network interface, a power supply, and/or a camera. It will be appreciated by those skilled in the art that the configuration shown in fig. 9 is merely illustrative and is not intended to limit the configuration of the electronic device. For example, the electronic device 1 may also include more or fewer components than shown in fig. 9, or have a different configuration than shown in fig. 9.

It should be noted that the one or more processors 102 and/or other data processing circuits described above may be referred to generally herein as "data processing circuits. The data processing circuit may be embodied in whole or in part in software, hardware, firmware, or any other combination. Furthermore, the data processing circuitry may be a single stand-alone processing module, or incorporated in whole or in part into any of the other elements in the electronic device 1 (or mobile device). As referred to in embodiments of the application, the data processing circuit acts as a processor control (e.g., selection of the path of the variable resistor termination connected to the interface).

The memory 104 may be used to store software programs and modules of application software, such as program instructions/data storage devices corresponding to the methods in the embodiments of the present disclosure, and the processor 102 executes the software programs and modules stored in the memory 104 to perform various functional applications and data processing, i.e., to implement one of the above-described methods for determining vehicle speed. Memory 104 may include high-speed random access memory, and may also include non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some examples, the memory 104 may further include memory remotely located with respect to the processor 102, which may be connected to the electronic device 1 via a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.

The transmission means 106 is arranged to receive or transmit data via a network. The specific examples of the network described above may include a wireless network provided by a communication provider of the electronic device 1. In one example, the transmission device 106 includes a network adapter (Network Interface Controller, NIC) that can connect to other network devices through a base station to communicate with the internet. In one example, the transmission device 106 may be a Radio Frequency (RF) module for communicating with the internet wirelessly.

The display may be, for example, a touch screen type Liquid Crystal Display (LCD) that may enable a user to interact with a user interface of the electronic device 1 (or mobile device).

In the embodiments of the present disclosure, the memory may be used to store software programs and modules, and the processor executes the software programs and modules stored in the memory to perform various functional applications and data processing. The memory may mainly include a storage program area and a storage data area, wherein the storage program area may store an operating system, application programs required for functions, and the like; the storage data area may store data created according to the use of the device, etc. In addition, the memory may include high-speed random access memory, and may also include non-volatile memory, such as at least one magnetic disk storage device, flash memory device, or other volatile solid-state storage device. Accordingly, the memory may also include a memory controller to provide access to the memory by the processor.

According to the embodiments of the synchronous signal processing method, the synchronous signal processing device, the synchronous signal processing equipment, the synchronous signal processing computer-readable storage medium and the electronic equipment, the synchronous signal sampling distortion or erroneous judgment caused by an interference signal can be effectively avoided, the fault tolerance rate is improved, the circuit setting is simplified, the flexibility of the whole machine is improved, and the production cost is reduced.

It should be noted that: the foregoing sequence of the embodiments of the present disclosure is merely for description and does not represent the advantages or disadvantages of the embodiments. And the foregoing has described certain embodiments of the present disclosure. Other embodiments are within the scope of the following claims. In some cases, the actions or steps recited in the claims can be performed in a different order than in the embodiments and still achieve desirable results. In addition, the processes depicted in the accompanying figures do not necessarily require the particular order shown, or sequential order, to achieve desirable results. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.

The various embodiments in this disclosure are described in a progressive manner, and identical and similar parts of the various embodiments are all referred to each other, and each embodiment is mainly described as different from other embodiments. In particular, for the apparatus and device embodiments, since they are substantially similar to the method embodiments, the description is relatively simple, with reference to the description of the method embodiments in part.

It will be understood by those skilled in the art that all or part of the steps for implementing the above embodiments may be implemented by hardware, or may be implemented by a program for instructing relevant hardware, where the program may be stored in a computer readable storage medium, and the storage medium may be a read-only memory, a magnetic disk or an optical disk, etc.

The foregoing description of the preferred embodiments of the present disclosure is not intended to limit the disclosure, but rather to cover any and all modifications, equivalents, improvements or alternatives falling within the spirit and principles of the present disclosure.

Claims

1. A method of synchronous signal processing, the method comprising:

monitoring a target synchronization signal for controlling a target device;

if the first jump information meets the invalid synchronous signal judging condition, determining that the target synchronous signal is an invalid synchronous signal;

When the first jump of the target synchronous signal is monitored, the step of obtaining the first jump information of the target synchronous signal in a preset time period from the current moment comprises the following steps: when the first jump of the target synchronous signal is monitored, measuring a first jump count of the target synchronous signal in a first preset time period from the current moment; and/or when the first jump of the target synchronous signal is monitored, measuring a second synchronous signal after a second preset time period is started from the current moment, and acquiring first signal comparison information between the second synchronous signal and a first synchronous signal before the first jump occurs;

If the first jump information meets the invalid synchronization signal judging condition, determining that the target synchronization signal is the invalid synchronization signal includes: and if the first jump count is larger than a first preset count and/or if the first signal comparison information meets the invalid synchronous signal level judgment condition, determining that the target synchronous signal is the invalid synchronous signal.

2. The method according to claim 1, wherein the duration of the first preset time period and/or the second preset time period is less than a half period of the active synchronization signal.

3. The method of claim 1, wherein prior to the acquiring the first transition information of the target synchronization signal within a preset time period from a current time, the method further comprises:

4. The method of claim 1, wherein the measuring a first transition count of the target synchronization signal for a first preset period of time from a current time comprises:

starting a first interference monitoring timer;

Starting a second interference monitoring timer;

5. The method of claim 1, wherein the first signal comparison information includes a first level comparison result between a second level of the second synchronization signal and a first level of the first synchronization signal;

Or alternatively

6. The method according to any one of claims 1-5, further comprising:

7. The method according to any one of claims 1-5, further comprising:

When the second jump of the target synchronous signal is monitored, measuring a second jump count of the target synchronous signal in a third preset time period from the current moment; and/or when the second jump of the target synchronous signal is monitored, measuring a third synchronous signal after a fourth preset time period is started from the current moment, and acquiring second signal comparison information between the third synchronous signal and the second synchronous signal before the second jump occurs;

8. The method of claim 6, wherein after said determining that said target synchronization signal is a valid synchronization signal, said method further comprises:

the first and/or second interference monitoring timer is/are closed.

9. The method of claim 6, wherein prior to said monitoring a target synchronization signal for controlling a target device, the method further comprises: the first interference monitoring timer is initialized and/or the second interference monitoring timer is initialized.

10. A synchronization signal processing apparatus, the apparatus comprising:

A signal determining module: configured to determine that the target synchronization signal is an invalid synchronization signal if the first transition information satisfies an invalid synchronization signal judgment condition;

The information acquisition module is specifically configured to detect a first jump count of the target synchronous signal within a first preset time period from the current moment when the first jump of the target synchronous signal is detected; and/or is configured to, when the first jump of the target synchronization signal is monitored, measure a second synchronization signal after a second preset time period is started from the current moment, and acquire first signal comparison information between the second synchronization signal and the first synchronization signal before the first jump occurs;

The signal determining module is specifically configured to determine that the target synchronization signal is an invalid synchronization signal if the first transition count is greater than a first preset count and/or if the first signal comparison information satisfies an invalid synchronization signal level determining condition.

11. The apparatus according to claim 10, wherein a duration corresponding to the first preset time period and/or the second preset time period is less than a half period of the valid synchronization signal.

12. The apparatus of claim 10, wherein the apparatus further comprises:

And a shielding module: is configured to mask an external interrupt function before the acquisition of the first transition information of the target synchronization signal within a preset period of time from the current time to not perform transmission of an external interrupt trigger signal until the target synchronization signal is determined to be a valid synchronization signal.

13. The apparatus of claim 10, wherein the information acquisition module comprises:

a first count duration measurement unit: the first jump count is obtained by measuring the jump count of the target synchronous signal when the count time of the first interference monitoring timer is started from the current time and reaches the time corresponding to the first preset time period;

And/or, the information acquisition module comprises:

A second counting time length measuring unit: and the second synchronization signal is measured when the counting time of the second interference monitoring timer reaches the time corresponding to the second preset time period from the current time.

14. The apparatus of claim 10, wherein the first signal comparison information comprises a first level comparison result between a second level of the second synchronization signal and a first level of the first synchronization signal;

Or alternatively

15. The apparatus of any one of claims 10-14, wherein the signal determination module is further configured to: and if the first jump information meets the effective synchronous signal judging condition corresponding to the first jump, determining that the target synchronous signal is an effective synchronous signal.

16. The apparatus according to any one of claims 10-14, wherein the apparatus further comprises an action switching signal determination module:

Configured to measure a second transition count of the target synchronization signal within a third preset time period from the current time when the second transition of the target synchronization signal is monitored; and/or when the second jump of the target synchronous signal is monitored, measuring a third synchronous signal after a fourth preset time period is started from the current moment, and acquiring second signal comparison information between the third synchronous signal and the second synchronous signal before the second jump occurs;

And

And the second jump is determined to be a target action switching signal for controlling the target equipment to execute corresponding action switching operation if the second jump count is greater than zero and less than or equal to a second preset count and/or if the second signal comparison information meets a preset action switching condition.

17. The apparatus of claim 15, wherein the apparatus further comprises:

A signal termination determining module: the method comprises the steps of determining that a valid synchronous signal is terminated when no jump is detected to occur to the valid synchronous signal after the target synchronous signal is determined to be the valid synchronous signal and a preset duration is exceeded;

And, configured to close the first interference monitoring timer and/or the second interference monitoring timer.

18. The apparatus of claim 15, further comprising an initialization module: is configured to initialize a first interference monitoring timer and/or to initialize a second interference monitoring timer prior to said monitoring of a target synchronization signal for controlling a target device.

19. A synchronization signal processing device, characterized in that the device comprises the synchronization signal processing means of any one of claims 10-18.

20. A computer readable storage medium, characterized in that at least one instruction or at least one program is stored in the storage medium, the at least one instruction or the at least one program being loaded and executed by a processor to implement the synchronization signal processing method according to any one of claims 1-9.